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782690d0 MG |
1 | //-------------------------------------------------------------------\r |
2 | // \r | |
3 | // PLAYSTATION CONTROLLER-FPGA ARCADE GAME INTERFACE TOP \r | |
4 | // \r | |
5 | // Version : 2.01 \r | |
6 | // \r | |
7 | // Copyright(c) 2003 - 2004 Katsumi Degawa , All rights reserved \r | |
8 | // \r | |
9 | // Important ! \r | |
10 | // \r | |
11 | // This program is freeware for non-commercial use. \r | |
12 | // An author does no guarantee about this program. \r | |
13 | // You can use this under your own risk. \r | |
14 | //\r | |
15 | // 2004-4-29 fpga mooncrst use k .degawa \r | |
16 | //-------------------------------------------------------------------\r | |
17 | \r | |
18 | `timescale 100ps/10ps\r | |
19 | `include "src/mc_conf.v"\r | |
20 | \r | |
21 | module fpga_arcade_if(\r | |
22 | \r | |
23 | CLK_18M432,\r | |
24 | I_RSTn,\r | |
25 | psCLK,\r | |
26 | psSEL,\r | |
27 | psTXD,\r | |
28 | psRXD,\r | |
29 | ps_PSW,\r | |
30 | I_VIB_SW\r | |
31 | \r | |
32 | );\r | |
33 | \r | |
34 | input CLK_18M432,I_RSTn;\r | |
35 | input I_VIB_SW;\r | |
36 | input psRXD;\r | |
37 | output psCLK,psSEL,psTXD;\r | |
38 | output [8:0]ps_PSW;\r | |
39 | \r | |
40 | reg [5:0]clk_reg;\r | |
41 | wire CLK_288K;\r | |
42 | \r | |
43 | assign CLK_288K = clk_reg[5];\r | |
44 | always@(posedge CLK_18M432) clk_reg <= clk_reg+1;\r | |
45 | \r | |
46 | wire [7:0]RX_DATA_1,RX_DATA_2;\r | |
47 | wire [7:0]RX_DATA_3,RX_DATA_4;\r | |
48 | //wire [7:0]RX_DATA_5,RX_DATA_6;\r | |
49 | \r | |
50 | reg [1:0]XY_pos;\r | |
51 | \r | |
52 | assign ps_PSW[0] = 1'b1; // UP\r | |
53 | assign ps_PSW[1] = 1'b1; // DOWN\r | |
54 | assign ps_PSW[2] = XY_pos[0]; // LEFT\r | |
55 | assign ps_PSW[3] = XY_pos[1]; // RIGHT\r | |
56 | assign ps_PSW[4] = RX_DATA_2[5]; // CREDIT1 (MARU-BOTAN) \r | |
57 | assign ps_PSW[5] = RX_DATA_2[4]; // CREDIT2 (SANKAKU-BOTAN)\r | |
58 | assign ps_PSW[6] = RX_DATA_1[3]; // START 1P (START-BOTAN)\r | |
59 | assign ps_PSW[7] = RX_DATA_1[0]; // START 2P (SELCT-BOTAN)\r | |
60 | assign ps_PSW[8] = RX_DATA_1[6];\r | |
61 | \r | |
62 | always@(posedge CLK_288K)\r | |
63 | begin\r | |
64 | if(RX_DATA_3<=8'h5F&&RX_DATA_3>=8'h00)\r | |
65 | XY_pos <= 2'b10;\r | |
66 | else if(RX_DATA_3<=8'hFF&&RX_DATA_3>=8'hA0)\r | |
67 | XY_pos <= 2'b01;\r | |
68 | else\r | |
69 | XY_pos <= 2'b11; \r | |
70 | end\r | |
71 | \r | |
72 | // Dualshock\r | |
73 | `ifdef Dualshock\r | |
74 | psPAD_top pspad(\r | |
75 | \r | |
76 | .I_CLK250K(CLK_288K),\r | |
77 | .I_RSTn(I_RSTn),\r | |
78 | .I_VIB_SW({I_VIB_SW,1'b0}),\r | |
79 | .O_psCLK(psCLK),\r | |
80 | .O_psSEL(psSEL),\r | |
81 | .O_psTXD(psTXD),\r | |
82 | .I_psRXD(psRXD),\r | |
83 | .O_RXD_1(RX_DATA_1),\r | |
84 | .O_RXD_2(RX_DATA_2),\r | |
85 | .O_RXD_3(RX_DATA_3),\r | |
86 | .O_RXD_4(RX_DATA_4),\r | |
87 | .O_RXD_5(),\r | |
88 | .O_RXD_6(),\r | |
89 | .I_CONF_SW(),\r | |
90 | .I_MODE_SW(),\r | |
91 | .I_MODE_EN(),\r | |
92 | .I_VIB_DAT(8'hFF)\r | |
93 | );\r | |
94 | `else\r | |
95 | psPAD_top pspad(\r | |
96 | \r | |
97 | .I_CLK250K(CLK_288K),\r | |
98 | .I_RSTn(I_RSTn),\r | |
99 | .I_VIB_SW(I_VIB_SW),\r | |
100 | .O_psCLK(psCLK),\r | |
101 | .O_psSEL(psSEL),\r | |
102 | .O_psTXD(psTXD),\r | |
103 | .I_psRXD(psRXD),\r | |
104 | .O_RXD_1(RX_DATA_1),\r | |
105 | .O_RXD_2(RX_DATA_2),\r | |
106 | .O_RXD_3(RX_DATA_3),\r | |
107 | .O_RXD_4(RX_DATA_4),\r | |
108 | .O_RXD_5(),\r | |
109 | .O_RXD_6(),\r | |
110 | .I_CONF_SW(),\r | |
111 | .I_MODE_SW(),\r | |
112 | .I_MODE_EN(),\r | |
113 | .I_VIB_DAT()\r | |
114 | );\r | |
115 | `endif\r | |
116 | \r | |
117 | endmodule\r | |
118 | \r | |
119 | \r | |
120 | \r | |
121 | \r |