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Commit | Line | Data |
---|---|---|
6658905f | 1 | .extern CopyBootToRAM\r |
2 | \r | |
8652988d | 3 | .section .startup,"ax"\r |
4 | .code 32\r | |
5 | .align 0\r | |
6658905f | 6 | \r |
8652988d | 7 | .global flashstart\r |
8 | flashstart:\r | |
6658905f | 9 | b Reset\r |
10 | b UndefinedInstruction\r | |
11 | b SoftwareInterrupt\r | |
12 | b PrefetchAbort\r | |
13 | b DataAbort\r | |
14 | b Reserved\r | |
15 | b Irq\r | |
16 | b Fiq\r | |
17 | \r | |
18 | Reset:\r | |
e3ae0257 | 19 | ldr sp, .stack_end @ initialize stack pointer to top of RAM\r |
6658905f | 20 | bl CopyBootToRAM @ copy bootloader to RAM (in case the\r |
21 | @ user re-flashes the bootloader)\r | |
e3ae0257 | 22 | ldr r3, .bootphase2_start @ start address of RAM bootloader\r |
6658905f | 23 | bx r3 @ jump to it\r |
24 | \r | |
e3ae0257 | 25 | .stack_end:\r |
26 | .word _stack_end\r | |
27 | .bootphase2_start:\r | |
28 | .word __bootphase2_start__\r | |
29 | \r | |
6658905f | 30 | Fiq:\r |
31 | b Fiq\r | |
32 | UndefinedInstruction:\r | |
33 | b UndefinedInstruction\r | |
34 | SoftwareInterrupt:\r | |
35 | b SoftwareInterrupt\r | |
36 | PrefetchAbort:\r | |
37 | b PrefetchAbort\r | |
38 | DataAbort:\r | |
39 | b DataAbort\r | |
40 | Reserved:\r | |
41 | b Reserved\r | |
42 | Irq:\r | |
43 | b Irq\r |