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Tested by changing the master key from the default to a custom value
[proxmark3-svn] / armsrc / iclass.c
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cee5a30d 1//-----------------------------------------------------------------------------
2// Gerhard de Koning Gans - May 2008
3// Hagen Fritsch - June 2010
4// Gerhard de Koning Gans - May 2011
1e262141 5// Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
cee5a30d 6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support iClass.
12//-----------------------------------------------------------------------------
13// Based on ISO14443a implementation. Still in experimental phase.
14// Contribution made during a security research at Radboud University Nijmegen
15//
16// Please feel free to contribute and extend iClass support!!
17//-----------------------------------------------------------------------------
18//
cee5a30d 19// FIX:
20// ====
21// We still have sometimes a demodulation error when snooping iClass communication.
22// The resulting trace of a read-block-03 command may look something like this:
23//
24// + 22279: : 0c 03 e8 01
25//
26// ...with an incorrect answer...
27//
28// + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29//
30// We still left the error signalling bytes in the traces like 0xbb
31//
32// A correct trace should look like this:
33//
34// + 21112: : 0c 03 e8 01
35// + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36//
37//-----------------------------------------------------------------------------
38
f38a1528 39#include "../include/proxmark3.h"
cee5a30d 40#include "apps.h"
41#include "util.h"
42#include "string.h"
7e67e42f 43#include "common.h"
f38a1528 44#include "cmd.h"
1e262141 45// Needed for CRC in emulation mode;
46// same construction as in ISO 14443;
47// different initial value (CRC_ICLASS)
f38a1528 48#include "../common/iso14443crc.h"
49#include "../common/iso15693tools.h"
c3963755 50#include "iso15693tools.h"
f38a1528 51
cee5a30d 52
1e262141 53static int timeout = 4096;
cee5a30d 54
cee5a30d 55
1e262141 56static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
cee5a30d 57
58//-----------------------------------------------------------------------------
59// The software UART that receives commands from the reader, and its state
60// variables.
61//-----------------------------------------------------------------------------
62static struct {
63 enum {
64 STATE_UNSYNCD,
65 STATE_START_OF_COMMUNICATION,
66 STATE_RECEIVING
67 } state;
68 uint16_t shiftReg;
69 int bitCnt;
70 int byteCnt;
71 int byteCntMax;
72 int posCnt;
73 int nOutOfCnt;
74 int OutOfCnt;
75 int syncBit;
1e262141 76 int parityBits;
77 int samples;
cee5a30d 78 int highCnt;
79 int swapper;
80 int counter;
81 int bitBuffer;
82 int dropPosition;
83 uint8_t *output;
84} Uart;
85
1e262141 86static RAMFUNC int OutOfNDecoding(int bit)
cee5a30d 87{
9f693930 88 //int error = 0;
cee5a30d 89 int bitright;
90
91 if(!Uart.bitBuffer) {
92 Uart.bitBuffer = bit ^ 0xFF0;
93 return FALSE;
94 }
95 else {
96 Uart.bitBuffer <<= 4;
97 Uart.bitBuffer ^= bit;
98 }
99
100 /*if(Uart.swapper) {
101 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
102 Uart.byteCnt++;
103 Uart.swapper = 0;
104 if(Uart.byteCnt > 15) { return TRUE; }
105 }
106 else {
107 Uart.swapper = 1;
108 }*/
109
110 if(Uart.state != STATE_UNSYNCD) {
111 Uart.posCnt++;
112
113 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
114 bit = 0x00;
115 }
116 else {
117 bit = 0x01;
118 }
119 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
120 bitright = 0x00;
121 }
122 else {
123 bitright = 0x01;
124 }
125 if(bit != bitright) { bit = bitright; }
126
127
128 // So, now we only have to deal with *bit*, lets see...
129 if(Uart.posCnt == 1) {
130 // measurement first half bitperiod
131 if(!bit) {
132 // Drop in first half means that we are either seeing
133 // an SOF or an EOF.
134
135 if(Uart.nOutOfCnt == 1) {
136 // End of Communication
137 Uart.state = STATE_UNSYNCD;
138 Uart.highCnt = 0;
139 if(Uart.byteCnt == 0) {
140 // Its not straightforward to show single EOFs
141 // So just leave it and do not return TRUE
142 Uart.output[Uart.byteCnt] = 0xf0;
143 Uart.byteCnt++;
144
145 // Calculate the parity bit for the client...
146 Uart.parityBits = 1;
147 }
148 else {
149 return TRUE;
150 }
151 }
152 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
153 // When not part of SOF or EOF, it is an error
154 Uart.state = STATE_UNSYNCD;
155 Uart.highCnt = 0;
9f693930 156 //error = 4;
cee5a30d 157 }
158 }
159 }
160 else {
161 // measurement second half bitperiod
162 // Count the bitslot we are in... (ISO 15693)
163 Uart.nOutOfCnt++;
164
165 if(!bit) {
166 if(Uart.dropPosition) {
167 if(Uart.state == STATE_START_OF_COMMUNICATION) {
9f693930 168 //error = 1;
cee5a30d 169 }
170 else {
9f693930 171 //error = 7;
cee5a30d 172 }
173 // It is an error if we already have seen a drop in current frame
174 Uart.state = STATE_UNSYNCD;
175 Uart.highCnt = 0;
176 }
177 else {
178 Uart.dropPosition = Uart.nOutOfCnt;
179 }
180 }
181
182 Uart.posCnt = 0;
183
184
185 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
186 Uart.nOutOfCnt = 0;
187
188 if(Uart.state == STATE_START_OF_COMMUNICATION) {
189 if(Uart.dropPosition == 4) {
190 Uart.state = STATE_RECEIVING;
191 Uart.OutOfCnt = 256;
192 }
193 else if(Uart.dropPosition == 3) {
194 Uart.state = STATE_RECEIVING;
195 Uart.OutOfCnt = 4;
196 //Uart.output[Uart.byteCnt] = 0xdd;
197 //Uart.byteCnt++;
198 }
199 else {
200 Uart.state = STATE_UNSYNCD;
201 Uart.highCnt = 0;
202 }
203 Uart.dropPosition = 0;
204 }
205 else {
206 // RECEIVING DATA
207 // 1 out of 4
208 if(!Uart.dropPosition) {
209 Uart.state = STATE_UNSYNCD;
210 Uart.highCnt = 0;
9f693930 211 //error = 9;
cee5a30d 212 }
213 else {
214 Uart.shiftReg >>= 2;
215
216 // Swap bit order
217 Uart.dropPosition--;
218 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
219 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
220
221 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
222 Uart.bitCnt += 2;
223 Uart.dropPosition = 0;
224
225 if(Uart.bitCnt == 8) {
226 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
227 Uart.byteCnt++;
228
229 // Calculate the parity bit for the client...
230 Uart.parityBits <<= 1;
231 Uart.parityBits ^= OddByteParity[(Uart.shiftReg & 0xff)];
232
233 Uart.bitCnt = 0;
234 Uart.shiftReg = 0;
235 }
236 }
237 }
238 }
239 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
240 // RECEIVING DATA
241 // 1 out of 256
242 if(!Uart.dropPosition) {
243 Uart.state = STATE_UNSYNCD;
244 Uart.highCnt = 0;
9f693930 245 //error = 3;
cee5a30d 246 }
247 else {
248 Uart.dropPosition--;
249 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
250 Uart.byteCnt++;
251
252 // Calculate the parity bit for the client...
253 Uart.parityBits <<= 1;
254 Uart.parityBits ^= OddByteParity[(Uart.dropPosition & 0xff)];
255
256 Uart.bitCnt = 0;
257 Uart.shiftReg = 0;
258 Uart.nOutOfCnt = 0;
259 Uart.dropPosition = 0;
260 }
261 }
262
263 /*if(error) {
264 Uart.output[Uart.byteCnt] = 0xAA;
265 Uart.byteCnt++;
266 Uart.output[Uart.byteCnt] = error & 0xFF;
267 Uart.byteCnt++;
268 Uart.output[Uart.byteCnt] = 0xAA;
269 Uart.byteCnt++;
270 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
271 Uart.byteCnt++;
272 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
273 Uart.byteCnt++;
274 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
275 Uart.byteCnt++;
276 Uart.output[Uart.byteCnt] = 0xAA;
277 Uart.byteCnt++;
278 return TRUE;
279 }*/
280 }
281
282 }
283 else {
284 bit = Uart.bitBuffer & 0xf0;
285 bit >>= 4;
286 bit ^= 0x0F; // drops become 1s ;-)
287 if(bit) {
288 // should have been high or at least (4 * 128) / fc
289 // according to ISO this should be at least (9 * 128 + 20) / fc
290 if(Uart.highCnt == 8) {
291 // we went low, so this could be start of communication
292 // it turns out to be safer to choose a less significant
293 // syncbit... so we check whether the neighbour also represents the drop
294 Uart.posCnt = 1; // apparently we are busy with our first half bit period
295 Uart.syncBit = bit & 8;
296 Uart.samples = 3;
297 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
298 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
299 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
300 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
301 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
302 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
303 Uart.syncBit = 8;
304
305 // the first half bit period is expected in next sample
306 Uart.posCnt = 0;
307 Uart.samples = 3;
308 }
309 }
310 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
311
312 Uart.syncBit <<= 4;
313 Uart.state = STATE_START_OF_COMMUNICATION;
314 Uart.bitCnt = 0;
315 Uart.byteCnt = 0;
316 Uart.parityBits = 0;
317 Uart.nOutOfCnt = 0;
318 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
319 Uart.dropPosition = 0;
320 Uart.shiftReg = 0;
9f693930 321 //error = 0;
cee5a30d 322 }
323 else {
324 Uart.highCnt = 0;
325 }
326 }
327 else {
328 if(Uart.highCnt < 8) {
329 Uart.highCnt++;
330 }
331 }
332 }
333
334 return FALSE;
335}
336
337//=============================================================================
1e262141 338// Manchester
cee5a30d 339//=============================================================================
340
341static struct {
342 enum {
343 DEMOD_UNSYNCD,
344 DEMOD_START_OF_COMMUNICATION,
345 DEMOD_START_OF_COMMUNICATION2,
346 DEMOD_START_OF_COMMUNICATION3,
347 DEMOD_SOF_COMPLETE,
348 DEMOD_MANCHESTER_D,
349 DEMOD_MANCHESTER_E,
350 DEMOD_END_OF_COMMUNICATION,
351 DEMOD_END_OF_COMMUNICATION2,
352 DEMOD_MANCHESTER_F,
353 DEMOD_ERROR_WAIT
354 } state;
355 int bitCount;
356 int posCount;
357 int syncBit;
358 int parityBits;
359 uint16_t shiftReg;
360 int buffer;
361 int buffer2;
362 int buffer3;
363 int buff;
364 int samples;
365 int len;
366 enum {
367 SUB_NONE,
368 SUB_FIRST_HALF,
369 SUB_SECOND_HALF,
370 SUB_BOTH
371 } sub;
372 uint8_t *output;
373} Demod;
374
375static RAMFUNC int ManchesterDecoding(int v)
376{
377 int bit;
378 int modulation;
379 int error = 0;
380
381 bit = Demod.buffer;
382 Demod.buffer = Demod.buffer2;
383 Demod.buffer2 = Demod.buffer3;
384 Demod.buffer3 = v;
385
386 if(Demod.buff < 3) {
387 Demod.buff++;
388 return FALSE;
389 }
390
391 if(Demod.state==DEMOD_UNSYNCD) {
392 Demod.output[Demod.len] = 0xfa;
393 Demod.syncBit = 0;
394 //Demod.samples = 0;
395 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
cee5a30d 396
397 if(bit & 0x08) {
398 Demod.syncBit = 0x08;
399 }
400
401 if(bit & 0x04) {
402 if(Demod.syncBit) {
403 bit <<= 4;
404 }
405 Demod.syncBit = 0x04;
406 }
407
408 if(bit & 0x02) {
409 if(Demod.syncBit) {
410 bit <<= 2;
411 }
412 Demod.syncBit = 0x02;
413 }
414
415 if(bit & 0x01 && Demod.syncBit) {
416 Demod.syncBit = 0x01;
417 }
418
419 if(Demod.syncBit) {
420 Demod.len = 0;
421 Demod.state = DEMOD_START_OF_COMMUNICATION;
422 Demod.sub = SUB_FIRST_HALF;
423 Demod.bitCount = 0;
424 Demod.shiftReg = 0;
425 Demod.parityBits = 0;
426 Demod.samples = 0;
427 if(Demod.posCount) {
428 //if(trigger) LED_A_OFF(); // Not useful in this case...
429 switch(Demod.syncBit) {
430 case 0x08: Demod.samples = 3; break;
431 case 0x04: Demod.samples = 2; break;
432 case 0x02: Demod.samples = 1; break;
433 case 0x01: Demod.samples = 0; break;
434 }
435 // SOF must be long burst... otherwise stay unsynced!!!
436 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
437 Demod.state = DEMOD_UNSYNCD;
438 }
439 }
440 else {
441 // SOF must be long burst... otherwise stay unsynced!!!
442 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
443 Demod.state = DEMOD_UNSYNCD;
444 error = 0x88;
445 }
446
447 }
448 error = 0;
449
450 }
451 }
452 else {
453 modulation = bit & Demod.syncBit;
454 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
455 //modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
456
457 Demod.samples += 4;
458
459 if(Demod.posCount==0) {
460 Demod.posCount = 1;
461 if(modulation) {
462 Demod.sub = SUB_FIRST_HALF;
463 }
464 else {
465 Demod.sub = SUB_NONE;
466 }
467 }
468 else {
469 Demod.posCount = 0;
470 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
471 if(Demod.state!=DEMOD_ERROR_WAIT) {
472 Demod.state = DEMOD_ERROR_WAIT;
473 Demod.output[Demod.len] = 0xaa;
474 error = 0x01;
475 }
476 }*/
477 //else if(modulation) {
478 if(modulation) {
479 if(Demod.sub == SUB_FIRST_HALF) {
480 Demod.sub = SUB_BOTH;
481 }
482 else {
483 Demod.sub = SUB_SECOND_HALF;
484 }
485 }
486 else if(Demod.sub == SUB_NONE) {
487 if(Demod.state == DEMOD_SOF_COMPLETE) {
488 Demod.output[Demod.len] = 0x0f;
489 Demod.len++;
490 Demod.parityBits <<= 1;
491 Demod.parityBits ^= OddByteParity[0x0f];
492 Demod.state = DEMOD_UNSYNCD;
493// error = 0x0f;
494 return TRUE;
495 }
496 else {
497 Demod.state = DEMOD_ERROR_WAIT;
498 error = 0x33;
499 }
500 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
501 Demod.state = DEMOD_ERROR_WAIT;
502 Demod.output[Demod.len] = 0xaa;
503 error = 0x01;
504 }*/
505 }
506
507 switch(Demod.state) {
508 case DEMOD_START_OF_COMMUNICATION:
509 if(Demod.sub == SUB_BOTH) {
510 //Demod.state = DEMOD_MANCHESTER_D;
511 Demod.state = DEMOD_START_OF_COMMUNICATION2;
512 Demod.posCount = 1;
513 Demod.sub = SUB_NONE;
514 }
515 else {
516 Demod.output[Demod.len] = 0xab;
517 Demod.state = DEMOD_ERROR_WAIT;
518 error = 0xd2;
519 }
520 break;
521 case DEMOD_START_OF_COMMUNICATION2:
522 if(Demod.sub == SUB_SECOND_HALF) {
523 Demod.state = DEMOD_START_OF_COMMUNICATION3;
524 }
525 else {
526 Demod.output[Demod.len] = 0xab;
527 Demod.state = DEMOD_ERROR_WAIT;
528 error = 0xd3;
529 }
530 break;
531 case DEMOD_START_OF_COMMUNICATION3:
532 if(Demod.sub == SUB_SECOND_HALF) {
533// Demod.state = DEMOD_MANCHESTER_D;
534 Demod.state = DEMOD_SOF_COMPLETE;
535 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
536 //Demod.len++;
537 }
538 else {
539 Demod.output[Demod.len] = 0xab;
540 Demod.state = DEMOD_ERROR_WAIT;
541 error = 0xd4;
542 }
543 break;
544 case DEMOD_SOF_COMPLETE:
545 case DEMOD_MANCHESTER_D:
546 case DEMOD_MANCHESTER_E:
547 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
548 // 00001111 = 1 (0 in 14443)
549 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
550 Demod.bitCount++;
551 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
552 Demod.state = DEMOD_MANCHESTER_D;
553 }
554 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
555 Demod.bitCount++;
556 Demod.shiftReg >>= 1;
557 Demod.state = DEMOD_MANCHESTER_E;
558 }
559 else if(Demod.sub == SUB_BOTH) {
560 Demod.state = DEMOD_MANCHESTER_F;
561 }
562 else {
563 Demod.state = DEMOD_ERROR_WAIT;
564 error = 0x55;
565 }
566 break;
567
568 case DEMOD_MANCHESTER_F:
569 // Tag response does not need to be a complete byte!
570 if(Demod.len > 0 || Demod.bitCount > 0) {
571 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
572 Demod.shiftReg >>= (9 - Demod.bitCount);
573 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
574 Demod.len++;
575 // No parity bit, so just shift a 0
576 Demod.parityBits <<= 1;
577 }
578
579 Demod.state = DEMOD_UNSYNCD;
580 return TRUE;
581 }
582 else {
583 Demod.output[Demod.len] = 0xad;
584 Demod.state = DEMOD_ERROR_WAIT;
585 error = 0x03;
586 }
587 break;
588
589 case DEMOD_ERROR_WAIT:
590 Demod.state = DEMOD_UNSYNCD;
591 break;
592
593 default:
594 Demod.output[Demod.len] = 0xdd;
595 Demod.state = DEMOD_UNSYNCD;
596 break;
597 }
598
599 /*if(Demod.bitCount>=9) {
600 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
601 Demod.len++;
602
603 Demod.parityBits <<= 1;
604 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
605
606 Demod.bitCount = 0;
607 Demod.shiftReg = 0;
608 }*/
609 if(Demod.bitCount>=8) {
610 Demod.shiftReg >>= 1;
611 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
612 Demod.len++;
613
614 // FOR ISO15639 PARITY NOT SEND OTA, JUST CALCULATE IT FOR THE CLIENT
615 Demod.parityBits <<= 1;
616 Demod.parityBits ^= OddByteParity[(Demod.shiftReg & 0xff)];
617
618 Demod.bitCount = 0;
619 Demod.shiftReg = 0;
620 }
621
622 if(error) {
623 Demod.output[Demod.len] = 0xBB;
624 Demod.len++;
625 Demod.output[Demod.len] = error & 0xFF;
626 Demod.len++;
627 Demod.output[Demod.len] = 0xBB;
628 Demod.len++;
629 Demod.output[Demod.len] = bit & 0xFF;
630 Demod.len++;
631 Demod.output[Demod.len] = Demod.buffer & 0xFF;
632 Demod.len++;
633 // Look harder ;-)
634 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
635 Demod.len++;
636 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
637 Demod.len++;
638 Demod.output[Demod.len] = 0xBB;
639 Demod.len++;
640 return TRUE;
641 }
642
643 }
644
645 } // end (state != UNSYNCED)
646
647 return FALSE;
648}
649
650//=============================================================================
1e262141 651// Finally, a `sniffer' for iClass communication
cee5a30d 652// Both sides of communication!
653//=============================================================================
654
655//-----------------------------------------------------------------------------
656// Record the sequence of commands sent by the reader to the tag, with
657// triggering so that we start recording at the point that the tag is moved
658// near the reader.
659//-----------------------------------------------------------------------------
660void RAMFUNC SnoopIClass(void)
661{
17cba269 662
cee5a30d 663
664 // We won't start recording the frames that we acquire until we trigger;
665 // a good trigger condition to get started is probably when we see a
666 // response from the tag.
9f693930 667 //int triggered = FALSE; // FALSE to wait first for card
cee5a30d 668
669 // The command (reader -> tag) that we're receiving.
670 // The length of a received command will in most cases be no more than 18 bytes.
671 // So 32 should be enough!
17cba269 672 uint8_t *readerToTagCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
cee5a30d 673 // The response (tag -> reader) that we're receiving.
17cba269 674 uint8_t *tagToReaderResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
cee5a30d 675
7cc204bf 676 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
677
1e262141 678 // reset traceLen to 0
679 iso14a_set_tracing(TRUE);
d19929cb 680 iso14a_clear_trace();
1e262141 681 iso14a_set_trigger(FALSE);
cee5a30d 682
683 // The DMA buffer, used to stream samples from the FPGA
684 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
685 int lastRxCounter;
686 int8_t *upTo;
687 int smpl;
688 int maxBehindBy = 0;
689
690 // Count of samples received so far, so that we can include timing
691 // information in the trace buffer.
692 int samples = 0;
693 rsamples = 0;
694
cee5a30d 695 // Set up the demodulator for tag -> reader responses.
17cba269 696 Demod.output = tagToReaderResponse;
cee5a30d 697 Demod.len = 0;
698 Demod.state = DEMOD_UNSYNCD;
699
700 // Setup for the DMA.
701 FpgaSetupSsc();
702 upTo = dmaBuf;
703 lastRxCounter = DMA_BUFFER_SIZE;
704 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
705
706 // And the reader -> tag commands
707 memset(&Uart, 0, sizeof(Uart));
17cba269 708 Uart.output = readerToTagCmd;
cee5a30d 709 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
710 Uart.state = STATE_UNSYNCD;
711
712 // And put the FPGA in the appropriate mode
713 // Signal field is off with the appropriate LED
714 LED_D_OFF();
715 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
716 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
717
81012e67
MHS
718 uint32_t time_0 = GetCountSspClk();
719
720
cee5a30d 721 int div = 0;
722 //int div2 = 0;
723 int decbyte = 0;
724 int decbyter = 0;
725
726 // And now we loop, receiving samples.
727 for(;;) {
728 LED_A_ON();
729 WDT_HIT();
730 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
731 (DMA_BUFFER_SIZE-1);
732 if(behindBy > maxBehindBy) {
733 maxBehindBy = behindBy;
734 if(behindBy > 400) {
735 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
736 goto done;
737 }
738 }
739 if(behindBy < 1) continue;
740
741 LED_A_OFF();
742 smpl = upTo[0];
743 upTo++;
744 lastRxCounter -= 1;
745 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
746 upTo -= DMA_BUFFER_SIZE;
747 lastRxCounter += DMA_BUFFER_SIZE;
748 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
749 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
750 }
751
752 //samples += 4;
753 samples += 1;
cee5a30d 754
cee5a30d 755 if(smpl & 0xF) {
756 decbyte ^= (1 << (3 - div));
757 }
cee5a30d 758
759 // FOR READER SIDE COMMUMICATION...
17cba269 760
cee5a30d 761 decbyter <<= 2;
762 decbyter ^= (smpl & 0x30);
763
764 div++;
765
766 if((div + 1) % 2 == 0) {
767 smpl = decbyter;
1e262141 768 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
cee5a30d 769 rsamples = samples - Uart.samples;
770 LED_C_ON();
17cba269 771
81012e67 772 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
17cba269 773 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
81012e67
MHS
774 if(tracing)
775 {
776 LogTrace(Uart.output,Uart.byteCnt, (GetCountSspClk()-time_0) << 4, Uart.parityBits,TRUE);
777 LogTrace(NULL, 0, (GetCountSspClk()-time_0) << 4, 0, TRUE);
778 }
779
17cba269
MHS
780
781 /* And ready to receive another command. */
cee5a30d 782 Uart.state = STATE_UNSYNCD;
783 /* And also reset the demod code, which might have been */
784 /* false-triggered by the commands from the reader. */
785 Demod.state = DEMOD_UNSYNCD;
786 LED_B_OFF();
787 Uart.byteCnt = 0;
788 }
789 decbyter = 0;
790 }
791
792 if(div > 3) {
793 smpl = decbyte;
794 if(ManchesterDecoding(smpl & 0x0F)) {
795 rsamples = samples - Demod.samples;
796 LED_B_ON();
797
81012e67
MHS
798 if(tracing)
799 {
800 LogTrace(Demod.output,Demod.len, (GetCountSspClk()-time_0) << 4 , Demod.parityBits,FALSE);
801 LogTrace(NULL, 0, (GetCountSspClk()-time_0) << 4, 0, FALSE);
802 }
17cba269 803
cee5a30d 804
805 // And ready to receive another response.
806 memset(&Demod, 0, sizeof(Demod));
17cba269 807 Demod.output = tagToReaderResponse;
cee5a30d 808 Demod.state = DEMOD_UNSYNCD;
809 LED_C_OFF();
810 }
811
812 div = 0;
813 decbyte = 0x00;
814 }
815 //}
816
817 if(BUTTON_PRESS()) {
818 DbpString("cancelled_a");
819 goto done;
820 }
821 }
822
823 DbpString("COMMAND FINISHED");
824
825 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
826 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
827
828done:
829 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
830 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
831 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
832 LED_A_OFF();
833 LED_B_OFF();
1e262141 834 LED_C_OFF();
835 LED_D_OFF();
836}
837
912a3e94 838void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
839 int i;
840 for(i = 0; i < 8; i++) {
841 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
1e262141 842 }
843}
844
845//-----------------------------------------------------------------------------
846// Wait for commands from reader
847// Stop when button is pressed
848// Or return TRUE when command is captured
849//-----------------------------------------------------------------------------
850static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
851{
912a3e94 852 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1e262141 853 // only, since we are receiving, not transmitting).
854 // Signal field is off with the appropriate LED
855 LED_D_OFF();
856 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
857
858 // Now run a `software UART' on the stream of incoming samples.
859 Uart.output = received;
860 Uart.byteCntMax = maxLen;
861 Uart.state = STATE_UNSYNCD;
862
863 for(;;) {
864 WDT_HIT();
865
866 if(BUTTON_PRESS()) return FALSE;
867
868 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
869 AT91C_BASE_SSC->SSC_THR = 0x00;
870 }
871 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
872 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
873 /*if(OutOfNDecoding((b & 0xf0) >> 4)) {
874 *len = Uart.byteCnt;
875 return TRUE;
876 }*/
877 if(OutOfNDecoding(b & 0x0f)) {
878 *len = Uart.byteCnt;
879 return TRUE;
880 }
881 }
882 }
883}
884
885
886//-----------------------------------------------------------------------------
887// Prepare tag messages
888//-----------------------------------------------------------------------------
889static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
890{
81012e67
MHS
891 //So far a dummy implementation, not used
892 //int lastProxToAirDuration =0;
1e262141 893 int i;
894
895 ToSendReset();
896
897 // Send SOF
898 ToSend[++ToSendMax] = 0x00;
899 ToSend[++ToSendMax] = 0x00;
900 ToSend[++ToSendMax] = 0x00;
81012e67 901 ToSend[++ToSendMax] = 0xff;//Proxtoair duration starts here
1e262141 902 ToSend[++ToSendMax] = 0xff;
903 ToSend[++ToSendMax] = 0xff;
904 ToSend[++ToSendMax] = 0x00;
905 ToSend[++ToSendMax] = 0xff;
906
907 for(i = 0; i < len; i++) {
908 int j;
909 uint8_t b = cmd[i];
910
911 // Data bits
912 for(j = 0; j < 8; j++) {
913 if(b & 1) {
914 ToSend[++ToSendMax] = 0x00;
915 ToSend[++ToSendMax] = 0xff;
916 } else {
917 ToSend[++ToSendMax] = 0xff;
918 ToSend[++ToSendMax] = 0x00;
919 }
920 b >>= 1;
921 }
922 }
923
924 // Send EOF
925 ToSend[++ToSendMax] = 0xff;
926 ToSend[++ToSendMax] = 0x00;
927 ToSend[++ToSendMax] = 0xff;
928 ToSend[++ToSendMax] = 0xff;
81012e67 929 ToSend[++ToSendMax] = 0xff;
1e262141 930 ToSend[++ToSendMax] = 0x00;
931 ToSend[++ToSendMax] = 0x00;
932 ToSend[++ToSendMax] = 0x00;
933
81012e67
MHS
934 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
935
1e262141 936 // Convert from last byte pos to length
937 ToSendMax++;
938}
939
940// Only SOF
941static void CodeIClassTagSOF()
942{
81012e67
MHS
943 //So far a dummy implementation, not used
944 //int lastProxToAirDuration =0;
1e262141 945
81012e67 946 ToSendReset();
1e262141 947 // Send SOF
948 ToSend[++ToSendMax] = 0x00;
949 ToSend[++ToSendMax] = 0x00;
950 ToSend[++ToSendMax] = 0x00;
951 ToSend[++ToSendMax] = 0xff;
952 ToSend[++ToSendMax] = 0xff;
953 ToSend[++ToSendMax] = 0xff;
954 ToSend[++ToSendMax] = 0x00;
955 ToSend[++ToSendMax] = 0xff;
81012e67
MHS
956
957// lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
958
1e262141 959
960 // Convert from last byte pos to length
961 ToSendMax++;
962}
9f6e9d15 963int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived, uint8_t *reader_mac_buf);
ff7bb4ef
MHS
964/**
965 * @brief SimulateIClass simulates an iClass card.
966 * @param arg0 type of simulation
967 * - 0 uses the first 8 bytes in usb data as CSN
968 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
969 * in the usb data. This mode collects MAC from the reader, in order to do an offline
970 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
971 * - Other : Uses the default CSN (031fec8af7ff12e0)
972 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
973 * @param arg2
974 * @param datain
975 */
976void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
1e262141 977{
ff7bb4ef
MHS
978 uint32_t simType = arg0;
979 uint32_t numberOfCSNS = arg1;
7cc204bf 980 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1e262141 981
ff7bb4ef
MHS
982 // Enable and clear the trace
983 iso14a_set_tracing(TRUE);
984 iso14a_clear_trace();
81cd0474 985
ff7bb4ef 986 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
ff7bb4ef
MHS
987 if(simType == 0) {
988 // Use the CSN from commandline
989 memcpy(csn_crc, datain, 8);
9f6e9d15 990 doIClassSimulation(csn_crc,0,NULL);
ff7bb4ef
MHS
991 }else if(simType == 1)
992 {
9f6e9d15 993 doIClassSimulation(csn_crc,0,NULL);
ff7bb4ef
MHS
994 }
995 else if(simType == 2)
996 {
9f6e9d15
MHS
997
998 uint8_t mac_responses[64] = { 0 };
17cba269 999 Dbprintf("Going into attack mode");
ff7bb4ef
MHS
1000 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1001 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1002 // in order to obtain the keys, as in the "dismantling iclass"-paper.
9f6e9d15
MHS
1003 int i = 0;
1004 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
ff7bb4ef
MHS
1005 {
1006 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1007
1008 memcpy(csn_crc, datain+(i*8), 8);
9f6e9d15 1009 if(doIClassSimulation(csn_crc,1,mac_responses))
f83cc126
MHS
1010 {
1011 return; // Button pressed
1012 }
ff7bb4ef 1013 }
9f6e9d15
MHS
1014 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1015
81012e67
MHS
1016 }
1017 else{
ff7bb4ef
MHS
1018 // We may want a mode here where we hardcode the csns to use (from proxclone).
1019 // That will speed things up a little, but not required just yet.
1020 Dbprintf("The mode is not implemented, reserved for future use");
1021 }
9f6e9d15 1022 Dbprintf("Done...");
ff7bb4ef
MHS
1023
1024}
1025/**
1026 * @brief Does the actual simulation
1027 * @param csn - csn to use
1028 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1029 */
9f6e9d15 1030int doIClassSimulation(uint8_t csn[], int breakAfterMacReceived, uint8_t *reader_mac_buf)
ff7bb4ef 1031{
81012e67 1032
81cd0474 1033
1e262141 1034 // CSN followed by two CRC bytes
1e262141 1035 uint8_t response2[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
ff7bb4ef
MHS
1036 uint8_t response3[] = { 0,0,0,0,0,0,0,0,0,0};
1037 memcpy(response3,csn,sizeof(response3));
f83cc126 1038 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1e262141 1039 // e-Purse
1040 uint8_t response4[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1e262141 1041
1e262141 1042 // Construct anticollision-CSN
912a3e94 1043 rotateCSN(response3,response2);
1e262141 1044
1045 // Compute CRC on both CSNs
1046 ComputeCrc14443(CRC_ICLASS, response2, 8, &response2[8], &response2[9]);
1047 ComputeCrc14443(CRC_ICLASS, response3, 8, &response3[8], &response3[9]);
1048
ff7bb4ef 1049 int exitLoop = 0;
1e262141 1050 // Reader 0a
1051 // Tag 0f
1052 // Reader 0c
1053 // Tag anticoll. CSN
1054 // Reader 81 anticoll. CSN
1055 // Tag CSN
1056
81cd0474 1057 uint8_t *resp;
1058 int respLen;
1059 uint8_t* respdata = NULL;
1060 int respsize = 0;
1061 uint8_t sof = 0x0f;
1e262141 1062
1063 // Respond SOF -- takes 8 bytes
81cd0474 1064 uint8_t *resp1 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
1e262141 1065 int resp1Len;
1066
1067 // Anticollision CSN (rotated CSN)
1068 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
81cd0474 1069 uint8_t *resp2 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 10);
1e262141 1070 int resp2Len;
1071
1072 // CSN
1073 // 176: Takes 16 bytes for SOF/EOF and 10 * 16 = 160 bytes (2 bytes/bit)
81cd0474 1074 uint8_t *resp3 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 190);
912a3e94 1075 int resp3Len;
1e262141 1076
1077 // e-Purse
1078 // 144: Takes 16 bytes for SOF/EOF and 8 * 16 = 128 bytes (2 bytes/bit)
81cd0474 1079 uint8_t *resp4 = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + 370);
1e262141 1080 int resp4Len;
1081
1082 // + 1720..
ff7bb4ef 1083 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
81cd0474 1084 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
1e262141 1085 int len;
1086
1e262141 1087 // Prepare card messages
1088 ToSendMax = 0;
1089
1090 // First card answer: SOF
1091 CodeIClassTagSOF();
1092 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
1093
1094 // Anticollision CSN
1095 CodeIClassTagAnswer(response2, sizeof(response2));
1096 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
1097
1098 // CSN
1099 CodeIClassTagAnswer(response3, sizeof(response3));
912a3e94 1100 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
1e262141 1101
1102 // e-Purse
1103 CodeIClassTagAnswer(response4, sizeof(response4));
1104 memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
1105
e3dc1e4c
MHS
1106
1107 // Start from off (no field generated)
fa541aca
MHS
1108 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1109 //SpinDelay(200);
1110 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1111 SpinDelay(100);
1112 StartCountSspClk();
1e262141 1113 // We need to listen to the high-frequency, peak-detected path.
1114 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1115 FpgaSetupSsc();
1116
1117 // To control where we are in the protocol
1e262141 1118 int cmdsRecvd = 0;
81012e67
MHS
1119 uint32_t time_0 = GetCountSspClk();
1120 uint32_t t2r_time =0;
1121 uint32_t r2t_time =0;
912a3e94 1122
1e262141 1123 LED_A_ON();
f83cc126 1124 bool buttonPressed = false;
9f6e9d15
MHS
1125
1126 /** Hack for testing
1127 memcpy(reader_mac_buf,csn,8);
1128 exitLoop = true;
1129 end hack **/
1130
ff7bb4ef 1131 while(!exitLoop) {
81012e67 1132
1e262141 1133 LED_B_OFF();
e3dc1e4c
MHS
1134 //Signal tracer
1135 // Can be used to get a trigger for an oscilloscope..
1136 LED_C_OFF();
1137
1e262141 1138 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
f83cc126 1139 buttonPressed = true;
1e262141 1140 break;
81cd0474 1141 }
81012e67 1142 r2t_time = GetCountSspClk();
e3dc1e4c
MHS
1143 //Signal tracer
1144 LED_C_ON();
1e262141 1145
81cd0474 1146 // Okay, look at the command now.
f83cc126 1147 if(receivedCmd[0] == 0x0a ) {
1e262141 1148 // Reader in anticollission phase
1149 resp = resp1; respLen = resp1Len; //order = 1;
81cd0474 1150 respdata = &sof;
1151 respsize = sizeof(sof);
1e262141 1152 } else if(receivedCmd[0] == 0x0c) {
1153 // Reader asks for anticollission CSN
1154 resp = resp2; respLen = resp2Len; //order = 2;
81cd0474 1155 respdata = response2;
1156 respsize = sizeof(response2);
1e262141 1157 //DbpString("Reader requests anticollission CSN:");
1158 } else if(receivedCmd[0] == 0x81) {
1159 // Reader selects anticollission CSN.
1160 // Tag sends the corresponding real CSN
912a3e94 1161 resp = resp3; respLen = resp3Len; //order = 3;
81cd0474 1162 respdata = response3;
1163 respsize = sizeof(response3);
1e262141 1164 //DbpString("Reader selects anticollission CSN:");
1165 } else if(receivedCmd[0] == 0x88) {
1166 // Read e-purse (88 02)
1167 resp = resp4; respLen = resp4Len; //order = 4;
81cd0474 1168 respdata = response4;
1169 respsize = sizeof(response4);
1e262141 1170 LED_B_ON();
1171 } else if(receivedCmd[0] == 0x05) {
1172 // Reader random and reader MAC!!!
1e262141 1173 // Do not respond
f38a1528 1174 // We do not know what to answer, so lets keep quiet
1e262141 1175 resp = resp1; respLen = 0; //order = 5;
81cd0474 1176 respdata = NULL;
1177 respsize = 0;
ff7bb4ef 1178 if (breakAfterMacReceived){
ff7bb4ef 1179 // dbprintf:ing ...
9f6e9d15 1180 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
ff7bb4ef
MHS
1181 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1182 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1183 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1184 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
9f6e9d15
MHS
1185 if (reader_mac_buf != NULL)
1186 {
1187 memcpy(reader_mac_buf,receivedCmd+1,8);
1188 }
ff7bb4ef
MHS
1189 exitLoop = true;
1190 }
1e262141 1191 } else if(receivedCmd[0] == 0x00 && len == 1) {
1192 // Reader ends the session
1193 resp = resp1; respLen = 0; //order = 0;
81cd0474 1194 respdata = NULL;
1195 respsize = 0;
1196 } else {
17cba269 1197 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1e262141 1198 // Never seen this command before
1199 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1200 len,
1201 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1202 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1203 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1204 // Do not respond
1205 resp = resp1; respLen = 0; //order = 0;
81cd0474 1206 respdata = NULL;
1207 respsize = 0;
1e262141 1208 }
1209
81012e67
MHS
1210 if(cmdsRecvd > 100) {
1211 //DbpString("100 commands later...");
9f6e9d15 1212 //break;
1e262141 1213 }
1214 else {
1215 cmdsRecvd++;
1216 }
1217
81cd0474 1218 if(respLen > 0) {
1219 SendIClassAnswer(resp, respLen, 21);
81012e67 1220 t2r_time = GetCountSspClk();
81cd0474 1221 }
f83cc126 1222
81cd0474 1223 if (tracing) {
81012e67
MHS
1224 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, Uart.parityBits,TRUE);
1225 LogTrace(NULL,0, (r2t_time-time_0) << 4, 0,TRUE);
17cba269
MHS
1226
1227 if (respdata != NULL) {
81012e67
MHS
1228 LogTrace(respdata,respsize, (t2r_time-time_0) << 4,SwapBits(GetParity(respdata,respsize),respsize),FALSE);
1229 LogTrace(NULL,0, (t2r_time-time_0) << 4,0,FALSE);
1230
1231
17cba269 1232 }
81012e67
MHS
1233 if(!tracing) {
1234 DbpString("Trace full");
1235 //break;
1236 }
1237
81cd0474 1238 }
81cd0474 1239 memset(receivedCmd, 0x44, RECV_CMD_SIZE);
1240 }
1e262141 1241
9f6e9d15 1242 //Dbprintf("%x", cmdsRecvd);
1e262141 1243 LED_A_OFF();
1244 LED_B_OFF();
f83cc126
MHS
1245 if(buttonPressed)
1246 {
1247 DbpString("Button pressed");
1248 }
f83cc126 1249 return buttonPressed;
1e262141 1250}
1251
1252static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1253{
e3dc1e4c 1254 int i = 0, d=0;//, u = 0, d = 0;
1e262141 1255 uint8_t b = 0;
e3dc1e4c
MHS
1256
1257 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1258
1e262141 1259 AT91C_BASE_SSC->SSC_THR = 0x00;
1260 FpgaSetupSsc();
e3dc1e4c
MHS
1261 while(!BUTTON_PRESS()) {
1262 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1263 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1e262141 1264 }
e3dc1e4c
MHS
1265 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1266 b = 0x00;
1e262141 1267 if(d < delay) {
1e262141 1268 d++;
1269 }
e3dc1e4c
MHS
1270 else {
1271 if( i < respLen){
1272 b = resp[i];
1273 //Hack
1274 //b = 0xAC;
1275 }
1276 i++;
1e262141 1277 }
1278 AT91C_BASE_SSC->SSC_THR = b;
1e262141 1279 }
e3dc1e4c
MHS
1280
1281 if (i > respLen +4) break;
1e262141 1282 }
1283
1284 return 0;
1285}
1286
1287/// THE READER CODE
1288
1289//-----------------------------------------------------------------------------
1290// Transmit the command (to the tag) that was placed in ToSend[].
1291//-----------------------------------------------------------------------------
1292static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1293{
1294 int c;
1e262141 1295 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1296 AT91C_BASE_SSC->SSC_THR = 0x00;
1297 FpgaSetupSsc();
1298
1299 if (wait)
1300 if(*wait < 10)
1301 *wait = 10;
1302
1303 for(c = 0; c < *wait;) {
1304 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1305 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1306 c++;
1307 }
1308 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1309 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1310 (void)r;
1311 }
1312 WDT_HIT();
1313 }
1314
1315 uint8_t sendbyte;
1316 bool firstpart = TRUE;
1317 c = 0;
1318 for(;;) {
1319 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1320
1321 // DOUBLE THE SAMPLES!
1322 if(firstpart) {
1323 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1324 }
1325 else {
1326 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1327 c++;
1328 }
1329 if(sendbyte == 0xff) {
1330 sendbyte = 0xfe;
1331 }
1332 AT91C_BASE_SSC->SSC_THR = sendbyte;
1333 firstpart = !firstpart;
1334
1335 if(c >= len) {
1336 break;
1337 }
1338 }
1339 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1340 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1341 (void)r;
1342 }
1343 WDT_HIT();
1344 }
1345 if (samples) *samples = (c + *wait) << 3;
1346}
1347
1348
1349//-----------------------------------------------------------------------------
1350// Prepare iClass reader command to send to FPGA
1351//-----------------------------------------------------------------------------
1352void CodeIClassCommand(const uint8_t * cmd, int len)
1353{
1354 int i, j, k;
1355 uint8_t b;
1356
1357 ToSendReset();
1358
1359 // Start of Communication: 1 out of 4
1360 ToSend[++ToSendMax] = 0xf0;
1361 ToSend[++ToSendMax] = 0x00;
1362 ToSend[++ToSendMax] = 0x0f;
1363 ToSend[++ToSendMax] = 0x00;
1364
1365 // Modulate the bytes
1366 for (i = 0; i < len; i++) {
1367 b = cmd[i];
1368 for(j = 0; j < 4; j++) {
1369 for(k = 0; k < 4; k++) {
e3dc1e4c
MHS
1370 if(k == (b & 3)) {
1371 ToSend[++ToSendMax] = 0x0f;
1372 }
1373 else {
1374 ToSend[++ToSendMax] = 0x00;
1375 }
1e262141 1376 }
1377 b >>= 2;
1378 }
1379 }
1380
1381 // End of Communication
1382 ToSend[++ToSendMax] = 0x00;
1383 ToSend[++ToSendMax] = 0x00;
1384 ToSend[++ToSendMax] = 0xf0;
1385 ToSend[++ToSendMax] = 0x00;
1386
1387 // Convert from last character reference to length
1388 ToSendMax++;
1389}
1390
1391void ReaderTransmitIClass(uint8_t* frame, int len)
1392{
1393 int wait = 0;
1394 int samples = 0;
1395 int par = 0;
1396
1397 // This is tied to other size changes
1398 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1399 CodeIClassCommand(frame,len);
1400
1401 // Select the card
1402 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1403 if(trigger)
1404 LED_A_ON();
1405
1406 // Store reader command in buffer
7bc95e2e 1407 if (tracing) LogTrace(frame,len,rsamples,par,TRUE);
1e262141 1408}
1409
1410//-----------------------------------------------------------------------------
1411// Wait a certain time for tag response
1412// If a response is captured return TRUE
1413// If it takes too long return FALSE
1414//-----------------------------------------------------------------------------
1415static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1416{
1417 // buffer needs to be 512 bytes
1418 int c;
1419
1420 // Set FPGA mode to "reader listen mode", no modulation (listen
1421 // only, since we are receiving, not transmitting).
1422 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1423
1424 // Now get the answer from the card
1425 Demod.output = receivedResponse;
1426 Demod.len = 0;
1427 Demod.state = DEMOD_UNSYNCD;
1428
1429 uint8_t b;
1430 if (elapsed) *elapsed = 0;
1431
1432 bool skip = FALSE;
1433
1434 c = 0;
1435 for(;;) {
1436 WDT_HIT();
1437
1438 if(BUTTON_PRESS()) return FALSE;
1439
1440 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1441 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1442 if (elapsed) (*elapsed)++;
1443 }
1444 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1445 if(c < timeout) { c++; } else { return FALSE; }
1446 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1447 skip = !skip;
1448 if(skip) continue;
1449 /*if(ManchesterDecoding((b>>4) & 0xf)) {
1450 *samples = ((c - 1) << 3) + 4;
1451 return TRUE;
1452 }*/
1453 if(ManchesterDecoding(b & 0x0f)) {
1454 *samples = c << 3;
1455 return TRUE;
1456 }
1457 }
1458 }
1459}
1460
1461int ReaderReceiveIClass(uint8_t* receivedAnswer)
1462{
1463 int samples = 0;
1464 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
7bc95e2e 1465 rsamples += samples;
1466 if (tracing) LogTrace(receivedAnswer,Demod.len,rsamples,Demod.parityBits,FALSE);
1e262141 1467 if(samples == 0) return FALSE;
1468 return Demod.len;
1469}
1470
f38a1528 1471void setupIclassReader()
1472{
1473 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1474 // Reset trace buffer
1475 iso14a_set_tracing(TRUE);
1476 iso14a_clear_trace();
1477
1478 // Setup SSC
1479 FpgaSetupSsc();
1480 // Start from off (no field generated)
1481 // Signal field is off with the appropriate LED
1482 LED_D_OFF();
1483 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1484 SpinDelay(200);
1485
1486 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1487
1488 // Now give it time to spin up.
1489 // Signal field is on with the appropriate LED
1490 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1491 SpinDelay(200);
1492 LED_A_ON();
1493
1494}
1495
1e262141 1496// Reader iClass Anticollission
1497void ReaderIClass(uint8_t arg0) {
1e262141 1498 uint8_t act_all[] = { 0x0a };
1499 uint8_t identify[] = { 0x0c };
4ab4336a 1500 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
f38a1528 1501 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1502
1503 uint8_t card_data[24]={0};
1504 uint8_t last_csn[8]={0};
1e262141 1505
1506 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1507
f38a1528 1508 int read_status= 0;
1509 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
1510
1511 setupIclassReader();
1512
1513 size_t datasize = 0;
1514 while(!BUTTON_PRESS())
1515 {
1516 WDT_HIT();
1517
aa41c605
MHS
1518 // Send act_all
1519 ReaderTransmitIClass(act_all, 1);
1520 // Card present?
1521 if(ReaderReceiveIClass(resp)) {
f38a1528 1522
aa41c605 1523 ReaderTransmitIClass(identify, 1);
f38a1528 1524
aa41c605 1525 if(ReaderReceiveIClass(resp) == 10) {
f38a1528 1526 //Copy the Anti-collision CSN to our select-packet
aa41c605 1527 memcpy(&select[1],resp,8);
f38a1528 1528 //Dbprintf("Anti-collision CSN: %02x %02x %02x %02x %02x %02x %02x %02x",resp[0], resp[1], resp[2],
1529 // resp[3], resp[4], resp[5],
1530 // resp[6], resp[7]);
1531 //Select the card
aa41c605 1532 ReaderTransmitIClass(select, sizeof(select));
f38a1528 1533
aa41c605 1534 if(ReaderReceiveIClass(resp) == 10) {
f38a1528 1535 //Save CSN in response data
1536 memcpy(card_data,resp,8);
1537 datasize += 8;
1538 //Flag that we got to at least stage 1, read CSN
1539 read_status = 1;
1540
1541 // Card selected
1542 //Dbprintf("Readcheck on Sector 2");
1543 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1544 if(ReaderReceiveIClass(resp) == 8) {
1545 //Save CC (e-purse) in response data
1546 memcpy(card_data+8,resp,8);
1547 datasize += 8;
1548 //Got both
1549 read_status = 2;
1550 }
1551
1552 LED_B_ON();
1553 //Send back to client, but don't bother if we already sent this
1554 if(memcmp(last_csn, card_data, 8) != 0)
1555 cmd_send(CMD_ACK,read_status,0,0,card_data,datasize);
1556
1557 //Save that we already sent this....
1558 if(read_status == 2)
1559 memcpy(last_csn, card_data, 8);
1560
1561 LED_B_OFF();
1562
1563 if(abort_after_read) break;
1564 }
1565 }
1566 }
1567
1568 if(traceLen > TRACE_SIZE) {
1569 DbpString("Trace full");
1570 break;
1571 }
1572 }
aa41c605 1573 LED_A_OFF();
f38a1528 1574}
1575
1576void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
1577 uint8_t act_all[] = { 0x0a };
1578 uint8_t identify[] = { 0x0c };
1579 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1580 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1581 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1582 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1583
fecd8202 1584 uint16_t crc = 0;
f38a1528 1585 uint8_t cardsize=0;
1586 bool read_success=false;
1587 uint8_t mem=0;
1588
1589 static struct memory_t{
1590 int k16;
1591 int book;
1592 int k2;
1593 int lockauth;
1594 int keyaccess;
1595 } memory;
1596
1597 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1598
1599 setupIclassReader();
1600
1601
1602 for(int i=0;i<1;i++) {
1603
1604 if(traceLen > TRACE_SIZE) {
1605 DbpString("Trace full");
1606 break;
1607 }
1608
1609 if (BUTTON_PRESS()) break;
1610
1611 // Send act_all
1612 ReaderTransmitIClass(act_all, 1);
1613 // Card present?
1614 if(ReaderReceiveIClass(resp)) {
1615 ReaderTransmitIClass(identify, 1);
1616 if(ReaderReceiveIClass(resp) == 10) {
1617 // Select card
1618 memcpy(&select[1],resp,8);
1619 ReaderTransmitIClass(select, sizeof(select));
1620
1621 if(ReaderReceiveIClass(resp) == 10) {
1622 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1623 resp[0], resp[1], resp[2],
1624 resp[3], resp[4], resp[5],
1625 resp[6], resp[7]);
1626 }
1627 // Card selected
1628 Dbprintf("Readcheck on Sector 2");
1629 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1630 if(ReaderReceiveIClass(resp) == 8) {
1631 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1632 resp[0], resp[1], resp[2],
1633 resp[3], resp[4], resp[5],
1634 resp[6], resp[7]);
1635 }else return;
1636 Dbprintf("Authenticate");
1637 //for now replay captured auth (as cc not updated)
1638 memcpy(check+5,MAC,4);
1639 //Dbprintf(" AA: %02x %02x %02x %02x",
1640 // check[5], check[6], check[7],check[8]);
1641 ReaderTransmitIClass(check, sizeof(check));
1642 if(ReaderReceiveIClass(resp) == 4) {
1643 Dbprintf(" AR: %02x %02x %02x %02x",
1644 resp[0], resp[1], resp[2],resp[3]);
1645 }else {
1646 Dbprintf("Error: Authentication Fail!");
1647 return;
1648 }
1649 Dbprintf("Dump Contents");
1650 //first get configuration block
1651 read_success=false;
1652 read[1]=1;
1653 uint8_t *blockno=&read[1];
1654 crc = iclass_crc16((char *)blockno,1);
1655 read[2] = crc >> 8;
1656 read[3] = crc & 0xff;
1657 while(!read_success){
1658 ReaderTransmitIClass(read, sizeof(read));
1659 if(ReaderReceiveIClass(resp) == 10) {
1660 read_success=true;
1661 mem=resp[5];
1662 memory.k16= (mem & 0x80);
1663 memory.book= (mem & 0x20);
1664 memory.k2= (mem & 0x8);
1665 memory.lockauth= (mem & 0x2);
1666 memory.keyaccess= (mem & 0x1);
1667
1668 }
1669 }
1670 if (memory.k16){
1671 cardsize=255;
1672 }else cardsize=32;
1673 //then loop around remaining blocks
1674 for(uint8_t j=0; j<cardsize; j++){
1675 read_success=false;
1676 uint8_t *blockno=&j;
1677 //crc_data[0]=j;
1678 read[1]=j;
1679 crc = iclass_crc16((char *)blockno,1);
1680 read[2] = crc >> 8;
1681 read[3] = crc & 0xff;
1682 while(!read_success){
1683 ReaderTransmitIClass(read, sizeof(read));
1684 if(ReaderReceiveIClass(resp) == 10) {
1685 read_success=true;
1686 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1687 j, resp[0], resp[1], resp[2],
1688 resp[3], resp[4], resp[5],
1689 resp[6], resp[7]);
1690 }
1691 }
1692 }
1693 }
1694 }
1695 WDT_HIT();
1696 }
1697
1698 LED_A_OFF();
1699}
1700
1701//2. Create Read method (cut-down from above) based off responses from 1.
1702// Since we have the MAC could continue to use replay function.
1703//3. Create Write method
1704/*
1705void IClass_iso14443A_write(uint8_t arg0, uint8_t blockNo, uint8_t *data, uint8_t *MAC) {
1706 uint8_t act_all[] = { 0x0a };
1707 uint8_t identify[] = { 0x0c };
1708 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1709 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1710 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1711 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1712 uint8_t write[] = { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1713
1714 uint16_t crc = 0;
1715
1716 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
7cc204bf 1717
1e262141 1718 // Reset trace buffer
ff7bb4ef 1719 memset(trace, 0x44, RECV_CMD_OFFSET);
1e262141 1720 traceLen = 0;
1721
1722 // Setup SSC
1723 FpgaSetupSsc();
1724 // Start from off (no field generated)
1725 // Signal field is off with the appropriate LED
cee5a30d 1726 LED_D_OFF();
1e262141 1727 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1728 SpinDelay(200);
1729
1730 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1731
1732 // Now give it time to spin up.
1733 // Signal field is on with the appropriate LED
1734 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1735 SpinDelay(200);
1736
1737 LED_A_ON();
1738
f38a1528 1739 for(int i=0;i<1;i++) {
4ab4336a 1740
1741 if(traceLen > TRACE_SIZE) {
1742 DbpString("Trace full");
1743 break;
1744 }
1745
1746 if (BUTTON_PRESS()) break;
1e262141 1747
1748 // Send act_all
1749 ReaderTransmitIClass(act_all, 1);
1750 // Card present?
1751 if(ReaderReceiveIClass(resp)) {
1752 ReaderTransmitIClass(identify, 1);
4ab4336a 1753 if(ReaderReceiveIClass(resp) == 10) {
1754 // Select card
1755 memcpy(&select[1],resp,8);
1756 ReaderTransmitIClass(select, sizeof(select));
1757
1758 if(ReaderReceiveIClass(resp) == 10) {
1759 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1760 resp[0], resp[1], resp[2],
1761 resp[3], resp[4], resp[5],
1762 resp[6], resp[7]);
1763 }
f38a1528 1764 // Card selected
1765 Dbprintf("Readcheck on Sector 2");
1766 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1767 if(ReaderReceiveIClass(resp) == 8) {
1768 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1769 resp[0], resp[1], resp[2],
1770 resp[3], resp[4], resp[5],
1771 resp[6], resp[7]);
1772 }else return;
1773 Dbprintf("Authenticate");
1774 //for now replay captured auth (as cc not updated)
1775 memcpy(check+5,MAC,4);
1776 Dbprintf(" AA: %02x %02x %02x %02x",
1777 check[5], check[6], check[7],check[8]);
1778 ReaderTransmitIClass(check, sizeof(check));
1779 if(ReaderReceiveIClass(resp) == 4) {
1780 Dbprintf(" AR: %02x %02x %02x %02x",
1781 resp[0], resp[1], resp[2],resp[3]);
1782 }else {
1783 Dbprintf("Error: Authentication Fail!");
1784 return;
1785 }
1786 Dbprintf("Write Block");
1787
1788 //read configuration for max block number
1789 read_success=false;
1790 read[1]=1;
1791 uint8_t *blockno=&read[1];
1792 crc = iclass_crc16((char *)blockno,1);
1793 read[2] = crc >> 8;
1794 read[3] = crc & 0xff;
1795 while(!read_success){
1796 ReaderTransmitIClass(read, sizeof(read));
1797 if(ReaderReceiveIClass(resp) == 10) {
1798 read_success=true;
1799 mem=resp[5];
1800 memory.k16= (mem & 0x80);
1801 memory.book= (mem & 0x20);
1802 memory.k2= (mem & 0x8);
1803 memory.lockauth= (mem & 0x2);
1804 memory.keyaccess= (mem & 0x1);
1805
1806 }
1807 }
1808 if (memory.k16){
1809 cardsize=255;
1810 }else cardsize=32;
1811 //check card_size
1812
1813 memcpy(write+1,blockNo,1);
1814 memcpy(write+2,data,8);
1815 memcpy(write+10,mac,4);
1816 while(!send_success){
1817 ReaderTransmitIClass(write, sizeof(write));
fecd8202 1818 if(ReaderReceiveIClass(resp) == 10) {
f38a1528 1819 write_success=true;
1820 }
1821 }//
1e262141 1822 }
1823 WDT_HIT();
1824 }
1825
1826 LED_A_OFF();
f38a1528 1827}*/
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