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15c4dc5a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
12 | ||
e30c654b | 13 | #include "proxmark3.h" |
15c4dc5a | 14 | #include "apps.h" |
f7e3ed82 | 15 | #include "util.h" |
9ab7a6c7 | 16 | #include "string.h" |
902cb3c0 | 17 | #include "cmd.h" |
9ab7a6c7 | 18 | |
15c4dc5a | 19 | #include "iso14443crc.h" |
534983d7 | 20 | #include "iso14443a.h" |
20f9a2a1 M |
21 | #include "crapto1.h" |
22 | #include "mifareutil.h" | |
15c4dc5a | 23 | |
534983d7 | 24 | static uint32_t iso14a_timeout; |
d19929cb | 25 | uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET; |
1e262141 | 26 | int rsamples = 0; |
7bc95e2e | 27 | int traceLen = 0; |
1e262141 | 28 | int tracing = TRUE; |
29 | uint8_t trigger = 0; | |
b0127e65 | 30 | // the block number for the ISO14443-4 PCB |
31 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 32 | |
7bc95e2e | 33 | // |
34 | // ISO14443 timing: | |
35 | // | |
36 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
37 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
38 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
39 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
40 | // bool LastCommandWasRequest = FALSE; | |
41 | ||
42 | // | |
43 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
44 | // | |
d714d3ef | 45 | // When the PM acts as reader and is receiving tag data, it takes |
46 | // 3 ticks delay in the AD converter | |
47 | // 16 ticks until the modulation detector completes and sets curbit | |
48 | // 8 ticks until bit_to_arm is assigned from curbit | |
49 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 50 | // 4*16 ticks until we measure the time |
51 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 52 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 53 | |
54 | // When the PM acts as a reader and is sending, it takes | |
55 | // 4*16 ticks until we can write data to the sending hold register | |
56 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
57 | // 8 ticks until the first transfer starts | |
58 | // 8 ticks later the FPGA samples the data | |
59 | // 1 tick to assign mod_sig_coil | |
60 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
61 | ||
62 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 63 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 64 | // 3 ticks for the A/D conversion, |
65 | // 8 ticks on average until the start of the SSC transfer, | |
66 | // 8 ticks until the SSC samples the first data | |
67 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
68 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 69 | // 4*16 ticks until we measure the time |
7bc95e2e | 70 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 71 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 72 | |
73 | // The FPGA will report its internal sending delay in | |
74 | uint16_t FpgaSendQueueDelay; | |
75 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
76 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
77 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
78 | ||
79 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 80 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 81 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
82 | // 8 ticks until the first transfer starts | |
83 | // 8 ticks later the FPGA samples the data | |
84 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
85 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 86 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 87 | |
88 | // When the PM acts as sniffer and is receiving tag data, it takes | |
89 | // 3 ticks A/D conversion | |
d714d3ef | 90 | // 14 ticks to complete the modulation detection |
91 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 92 | // + the delays in transferring data - which is the same for |
93 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 94 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 95 | |
d714d3ef | 96 | // When the PM acts as sniffer and is receiving reader data, it takes |
97 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
98 | // start bit, which marks the start of the communication) | |
7bc95e2e | 99 | // 3 ticks A/D conversion |
d714d3ef | 100 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 101 | // + the delays in transferring data - which is the same for |
102 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 103 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 104 | |
105 | //variables used for timing purposes: | |
106 | //these are in ssp_clk cycles: | |
6a1f2d82 | 107 | static uint32_t NextTransferTime; |
108 | static uint32_t LastTimeProxToAirStart; | |
109 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 110 | |
111 | ||
112 | ||
8f51ddb0 | 113 | // CARD TO READER - manchester |
72934aa3 | 114 | // Sequence D: 11110000 modulation with subcarrier during first half |
115 | // Sequence E: 00001111 modulation with subcarrier during second half | |
116 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 117 | // READER TO CARD - miller |
72934aa3 | 118 | // Sequence X: 00001100 drop after half a period |
119 | // Sequence Y: 00000000 no drop | |
120 | // Sequence Z: 11000000 drop at start | |
121 | #define SEC_D 0xf0 | |
122 | #define SEC_E 0x0f | |
123 | #define SEC_F 0x00 | |
124 | #define SEC_X 0x0c | |
125 | #define SEC_Y 0x00 | |
126 | #define SEC_Z 0xc0 | |
15c4dc5a | 127 | |
1e262141 | 128 | const uint8_t OddByteParity[256] = { |
15c4dc5a | 129 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, |
130 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
131 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
132 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
133 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
134 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
135 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
136 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
137 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
138 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
139 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
140 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
141 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
142 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
143 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
144 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 | |
145 | }; | |
146 | ||
1e262141 | 147 | |
902cb3c0 | 148 | void iso14a_set_trigger(bool enable) { |
534983d7 | 149 | trigger = enable; |
150 | } | |
151 | ||
902cb3c0 | 152 | void iso14a_clear_trace() { |
7bc95e2e | 153 | memset(trace, 0x44, TRACE_SIZE); |
8556b852 M |
154 | traceLen = 0; |
155 | } | |
d19929cb | 156 | |
902cb3c0 | 157 | void iso14a_set_tracing(bool enable) { |
8556b852 M |
158 | tracing = enable; |
159 | } | |
d19929cb | 160 | |
b0127e65 | 161 | void iso14a_set_timeout(uint32_t timeout) { |
162 | iso14a_timeout = timeout; | |
163 | } | |
8556b852 | 164 | |
15c4dc5a | 165 | //----------------------------------------------------------------------------- |
166 | // Generate the parity value for a byte sequence | |
e30c654b | 167 | // |
15c4dc5a | 168 | //----------------------------------------------------------------------------- |
20f9a2a1 M |
169 | byte_t oddparity (const byte_t bt) |
170 | { | |
5f6d6c90 | 171 | return OddByteParity[bt]; |
20f9a2a1 M |
172 | } |
173 | ||
6a1f2d82 | 174 | void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) |
15c4dc5a | 175 | { |
6a1f2d82 | 176 | uint16_t paritybit_cnt = 0; |
177 | uint16_t paritybyte_cnt = 0; | |
178 | uint8_t parityBits = 0; | |
179 | ||
180 | for (uint16_t i = 0; i < iLen; i++) { | |
181 | // Generate the parity bits | |
182 | parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt)); | |
183 | if (paritybit_cnt == 7) { | |
184 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
185 | parityBits = 0; // and advance to next Parity Byte | |
186 | paritybyte_cnt++; | |
187 | paritybit_cnt = 0; | |
188 | } else { | |
189 | paritybit_cnt++; | |
190 | } | |
5f6d6c90 | 191 | } |
6a1f2d82 | 192 | |
193 | // save remaining parity bits | |
194 | par[paritybyte_cnt] = parityBits; | |
195 | ||
15c4dc5a | 196 | } |
197 | ||
534983d7 | 198 | void AppendCrc14443a(uint8_t* data, int len) |
15c4dc5a | 199 | { |
5f6d6c90 | 200 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 201 | } |
202 | ||
1e262141 | 203 | // The function LogTrace() is also used by the iClass implementation in iClass.c |
6a1f2d82 | 204 | bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) |
15c4dc5a | 205 | { |
fdcd43eb | 206 | if (!tracing) return FALSE; |
6a1f2d82 | 207 | |
208 | uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity | |
209 | uint16_t duration = timestamp_end - timestamp_start; | |
210 | ||
7bc95e2e | 211 | // Return when trace is full |
6a1f2d82 | 212 | if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) { |
7bc95e2e | 213 | tracing = FALSE; // don't trace any more |
214 | return FALSE; | |
215 | } | |
216 | ||
6a1f2d82 | 217 | // Traceformat: |
218 | // 32 bits timestamp (little endian) | |
219 | // 16 bits duration (little endian) | |
220 | // 16 bits data length (little endian, Highest Bit used as readerToTag flag) | |
221 | // y Bytes data | |
222 | // x Bytes parity (one byte per 8 bytes data) | |
223 | ||
224 | // timestamp (start) | |
225 | trace[traceLen++] = ((timestamp_start >> 0) & 0xff); | |
226 | trace[traceLen++] = ((timestamp_start >> 8) & 0xff); | |
227 | trace[traceLen++] = ((timestamp_start >> 16) & 0xff); | |
228 | trace[traceLen++] = ((timestamp_start >> 24) & 0xff); | |
229 | ||
230 | // duration | |
231 | trace[traceLen++] = ((duration >> 0) & 0xff); | |
232 | trace[traceLen++] = ((duration >> 8) & 0xff); | |
233 | ||
234 | // data length | |
235 | trace[traceLen++] = ((iLen >> 0) & 0xff); | |
236 | trace[traceLen++] = ((iLen >> 8) & 0xff); | |
17cba269 | 237 | |
6a1f2d82 | 238 | // readerToTag flag |
17cba269 | 239 | if (!readerToTag) { |
7bc95e2e | 240 | trace[traceLen - 1] |= 0x80; |
241 | } | |
6a1f2d82 | 242 | |
243 | // data bytes | |
7bc95e2e | 244 | if (btBytes != NULL && iLen != 0) { |
245 | memcpy(trace + traceLen, btBytes, iLen); | |
246 | } | |
247 | traceLen += iLen; | |
6a1f2d82 | 248 | |
249 | // parity bytes | |
250 | if (parity != NULL && iLen != 0) { | |
251 | memcpy(trace + traceLen, parity, num_paritybytes); | |
252 | } | |
253 | traceLen += num_paritybytes; | |
254 | ||
7bc95e2e | 255 | return TRUE; |
15c4dc5a | 256 | } |
257 | ||
7bc95e2e | 258 | //============================================================================= |
259 | // ISO 14443 Type A - Miller decoder | |
260 | //============================================================================= | |
261 | // Basics: | |
262 | // This decoder is used when the PM3 acts as a tag. | |
263 | // The reader will generate "pauses" by temporarily switching of the field. | |
264 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
265 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
266 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
267 | // The Miller decoder needs to identify the following sequences: | |
268 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
269 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
270 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
271 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
272 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 273 | //----------------------------------------------------------------------------- |
b62a5a84 | 274 | static tUart Uart; |
15c4dc5a | 275 | |
d7aa3739 | 276 | // Lookup-Table to decide if 4 raw bits are a modulation. |
277 | // We accept two or three consecutive "0" in any position with the rest "1" | |
278 | const bool Mod_Miller_LUT[] = { | |
279 | TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, | |
280 | TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE | |
281 | }; | |
282 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4]) | |
283 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)]) | |
284 | ||
7bc95e2e | 285 | void UartReset() |
15c4dc5a | 286 | { |
7bc95e2e | 287 | Uart.state = STATE_UNSYNCD; |
288 | Uart.bitCount = 0; | |
289 | Uart.len = 0; // number of decoded data bytes | |
6a1f2d82 | 290 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 291 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
6a1f2d82 | 292 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 293 | Uart.twoBits = 0x0000; // buffer for 2 Bits |
294 | Uart.highCnt = 0; | |
295 | Uart.startTime = 0; | |
296 | Uart.endTime = 0; | |
297 | } | |
15c4dc5a | 298 | |
6a1f2d82 | 299 | void UartInit(uint8_t *data, uint8_t *parity) |
300 | { | |
301 | Uart.output = data; | |
302 | Uart.parity = parity; | |
303 | UartReset(); | |
304 | } | |
d714d3ef | 305 | |
7bc95e2e | 306 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
307 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) | |
308 | { | |
15c4dc5a | 309 | |
7bc95e2e | 310 | Uart.twoBits = (Uart.twoBits << 8) | bit; |
311 | ||
312 | if (Uart.state == STATE_UNSYNCD) { // not yet synced | |
313 | if (Uart.highCnt < 7) { // wait for a stable unmodulated signal | |
314 | if (Uart.twoBits == 0xffff) { | |
315 | Uart.highCnt++; | |
316 | } else { | |
317 | Uart.highCnt = 0; | |
15c4dc5a | 318 | } |
7bc95e2e | 319 | } else { |
320 | Uart.syncBit = 0xFFFF; // not set | |
321 | // look for 00xx1111 (the start bit) | |
322 | if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7; | |
323 | else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6; | |
324 | else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5; | |
325 | else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4; | |
326 | else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3; | |
327 | else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2; | |
328 | else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1; | |
329 | else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0; | |
330 | if (Uart.syncBit != 0xFFFF) { | |
331 | Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); | |
332 | Uart.startTime -= Uart.syncBit; | |
d7aa3739 | 333 | Uart.endTime = Uart.startTime; |
7bc95e2e | 334 | Uart.state = STATE_START_OF_COMMUNICATION; |
15c4dc5a | 335 | } |
7bc95e2e | 336 | } |
15c4dc5a | 337 | |
7bc95e2e | 338 | } else { |
15c4dc5a | 339 | |
d7aa3739 | 340 | if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) { |
341 | if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error | |
342 | UartReset(); | |
343 | Uart.highCnt = 6; | |
344 | } else { // Modulation in first half = Sequence Z = logic "0" | |
7bc95e2e | 345 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
346 | UartReset(); | |
347 | Uart.highCnt = 6; | |
348 | } else { | |
349 | Uart.bitCount++; | |
350 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
351 | Uart.state = STATE_MILLER_Z; | |
352 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
353 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
354 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
355 | Uart.parityBits <<= 1; // make room for the parity bit | |
356 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
357 | Uart.bitCount = 0; | |
358 | Uart.shiftReg = 0; | |
6a1f2d82 | 359 | if((Uart.len&0x0007) == 0) { // every 8 data bytes |
360 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
361 | Uart.parityBits = 0; | |
362 | } | |
15c4dc5a | 363 | } |
7bc95e2e | 364 | } |
d7aa3739 | 365 | } |
366 | } else { | |
367 | if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" | |
7bc95e2e | 368 | Uart.bitCount++; |
369 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
370 | Uart.state = STATE_MILLER_X; | |
371 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
372 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
373 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
374 | Uart.parityBits <<= 1; // make room for the new parity bit | |
375 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
376 | Uart.bitCount = 0; | |
377 | Uart.shiftReg = 0; | |
6a1f2d82 | 378 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
379 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
380 | Uart.parityBits = 0; | |
381 | } | |
7bc95e2e | 382 | } |
d7aa3739 | 383 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 384 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 385 | Uart.state = STATE_UNSYNCD; |
6a1f2d82 | 386 | Uart.bitCount--; // last "0" was part of EOC sequence |
387 | Uart.shiftReg <<= 1; // drop it | |
388 | if(Uart.bitCount > 0) { // if we decoded some bits | |
389 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
390 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
391 | Uart.parityBits <<= 1; // add a (void) parity bit | |
392 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits | |
393 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
394 | return TRUE; | |
395 | } else if (Uart.len & 0x0007) { // there are some parity bits to store | |
396 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits | |
397 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
398 | return TRUE; // we are finished with decoding the raw data sequence | |
7bc95e2e | 399 | } |
15c4dc5a | 400 | } |
7bc95e2e | 401 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
402 | UartReset(); | |
403 | Uart.highCnt = 6; | |
404 | } else { // a logic "0" | |
405 | Uart.bitCount++; | |
406 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
407 | Uart.state = STATE_MILLER_Y; | |
408 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
409 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
410 | Uart.parityBits <<= 1; // make room for the parity bit | |
411 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
412 | Uart.bitCount = 0; | |
413 | Uart.shiftReg = 0; | |
6a1f2d82 | 414 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
415 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
416 | Uart.parityBits = 0; | |
417 | } | |
15c4dc5a | 418 | } |
419 | } | |
d7aa3739 | 420 | } |
15c4dc5a | 421 | } |
7bc95e2e | 422 | |
423 | } | |
15c4dc5a | 424 | |
7bc95e2e | 425 | return FALSE; // not finished yet, need more data |
15c4dc5a | 426 | } |
427 | ||
7bc95e2e | 428 | |
429 | ||
15c4dc5a | 430 | //============================================================================= |
e691fc45 | 431 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 432 | //============================================================================= |
e691fc45 | 433 | // Basics: |
7bc95e2e | 434 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 435 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
436 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
437 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
438 | // The Manchester decoder needs to identify the following sequences: | |
439 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
440 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
441 | // 8 ticks unmodulated: Sequence F = end of communication | |
442 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 443 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 444 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 445 | static tDemod Demod; |
15c4dc5a | 446 | |
d7aa3739 | 447 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 448 | // We accept three or four "1" in any position |
7bc95e2e | 449 | const bool Mod_Manchester_LUT[] = { |
d7aa3739 | 450 | FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, |
d714d3ef | 451 | FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE |
7bc95e2e | 452 | }; |
453 | ||
454 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
455 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 456 | |
2f2d9fc5 | 457 | |
7bc95e2e | 458 | void DemodReset() |
e691fc45 | 459 | { |
7bc95e2e | 460 | Demod.state = DEMOD_UNSYNCD; |
461 | Demod.len = 0; // number of decoded data bytes | |
6a1f2d82 | 462 | Demod.parityLen = 0; |
7bc95e2e | 463 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
464 | Demod.parityBits = 0; // | |
465 | Demod.collisionPos = 0; // Position of collision bit | |
466 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
467 | Demod.highCnt = 0; | |
468 | Demod.startTime = 0; | |
469 | Demod.endTime = 0; | |
e691fc45 | 470 | } |
15c4dc5a | 471 | |
6a1f2d82 | 472 | |
473 | void DemodInit(uint8_t *data, uint8_t *parity) | |
474 | { | |
475 | Demod.output = data; | |
476 | Demod.parity = parity; | |
477 | DemodReset(); | |
478 | } | |
479 | ||
7bc95e2e | 480 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
481 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) | |
e691fc45 | 482 | { |
7bc95e2e | 483 | |
484 | Demod.twoBits = (Demod.twoBits << 8) | bit; | |
e691fc45 | 485 | |
7bc95e2e | 486 | if (Demod.state == DEMOD_UNSYNCD) { |
487 | ||
488 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
489 | if (Demod.twoBits == 0x0000) { | |
490 | Demod.highCnt++; | |
491 | } else { | |
492 | Demod.highCnt = 0; | |
493 | } | |
494 | } else { | |
495 | Demod.syncBit = 0xFFFF; // not set | |
496 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
497 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
498 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
499 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
500 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
501 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
502 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
503 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 504 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 505 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
506 | Demod.startTime -= Demod.syncBit; | |
507 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 508 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 509 | } |
7bc95e2e | 510 | } |
15c4dc5a | 511 | |
7bc95e2e | 512 | } else { |
15c4dc5a | 513 | |
7bc95e2e | 514 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
515 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 516 | if (!Demod.collisionPos) { |
517 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
518 | } | |
519 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 520 | Demod.bitCount++; |
521 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
522 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 523 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 524 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 525 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
526 | Demod.bitCount = 0; | |
527 | Demod.shiftReg = 0; | |
6a1f2d82 | 528 | if((Demod.len&0x0007) == 0) { // every 8 data bytes |
529 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
530 | Demod.parityBits = 0; | |
531 | } | |
15c4dc5a | 532 | } |
7bc95e2e | 533 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
534 | } else { // no modulation in first half | |
535 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 536 | Demod.bitCount++; |
7bc95e2e | 537 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 538 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 539 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 540 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 541 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
542 | Demod.bitCount = 0; | |
543 | Demod.shiftReg = 0; | |
6a1f2d82 | 544 | if ((Demod.len&0x0007) == 0) { // every 8 data bytes |
545 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
546 | Demod.parityBits = 0; | |
547 | } | |
15c4dc5a | 548 | } |
7bc95e2e | 549 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 550 | } else { // no modulation in both halves - End of communication |
6a1f2d82 | 551 | if(Demod.bitCount > 0) { // there are some remaining data bits |
552 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
553 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
554 | Demod.parityBits <<= 1; // add a (void) parity bit | |
555 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
556 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
557 | return TRUE; | |
558 | } else if (Demod.len & 0x0007) { // there are some parity bits to store | |
559 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
560 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
d7aa3739 | 561 | return TRUE; // we are finished with decoding the raw data sequence |
562 | } else { // nothing received. Start over | |
563 | DemodReset(); | |
e691fc45 | 564 | } |
15c4dc5a | 565 | } |
7bc95e2e | 566 | } |
e691fc45 | 567 | |
568 | } | |
15c4dc5a | 569 | |
e691fc45 | 570 | return FALSE; // not finished yet, need more data |
15c4dc5a | 571 | } |
572 | ||
573 | //============================================================================= | |
574 | // Finally, a `sniffer' for ISO 14443 Type A | |
575 | // Both sides of communication! | |
576 | //============================================================================= | |
577 | ||
578 | //----------------------------------------------------------------------------- | |
579 | // Record the sequence of commands sent by the reader to the tag, with | |
580 | // triggering so that we start recording at the point that the tag is moved | |
581 | // near the reader. | |
582 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
583 | void RAMFUNC SnoopIso14443a(uint8_t param) { |
584 | // param: | |
585 | // bit 0 - trigger from first card answer | |
586 | // bit 1 - trigger from first reader 7-bit request | |
587 | ||
588 | LEDsoff(); | |
589 | // init trace buffer | |
5f6d6c90 | 590 | iso14a_clear_trace(); |
991f13f2 | 591 | iso14a_set_tracing(TRUE); |
5cd9ec01 M |
592 | |
593 | // We won't start recording the frames that we acquire until we trigger; | |
594 | // a good trigger condition to get started is probably when we see a | |
595 | // response from the tag. | |
596 | // triggered == FALSE -- to wait first for card | |
7bc95e2e | 597 | bool triggered = !(param & 0x03); |
598 | ||
5cd9ec01 | 599 | // The command (reader -> tag) that we're receiving. |
15c4dc5a | 600 | // The length of a received command will in most cases be no more than 18 bytes. |
601 | // So 32 should be enough! | |
6a1f2d82 | 602 | uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET; |
603 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; | |
604 | ||
5cd9ec01 | 605 | // The response (tag -> reader) that we're receiving. |
6a1f2d82 | 606 | uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET; |
607 | uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
608 | ||
5cd9ec01 M |
609 | // As we receive stuff, we copy it from receivedCmd or receivedResponse |
610 | // into trace, along with its length and other annotations. | |
611 | //uint8_t *trace = (uint8_t *)BigBuf; | |
612 | ||
613 | // The DMA buffer, used to stream samples from the FPGA | |
7bc95e2e | 614 | uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET; |
615 | uint8_t *data = dmaBuf; | |
616 | uint8_t previous_data = 0; | |
5cd9ec01 M |
617 | int maxDataLen = 0; |
618 | int dataLen = 0; | |
7bc95e2e | 619 | bool TagIsActive = FALSE; |
620 | bool ReaderIsActive = FALSE; | |
621 | ||
622 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
15c4dc5a | 623 | |
5cd9ec01 | 624 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 625 | DemodInit(receivedResponse, receivedResponsePar); |
626 | ||
5cd9ec01 | 627 | // Set up the demodulator for the reader -> tag commands |
6a1f2d82 | 628 | UartInit(receivedCmd, receivedCmdPar); |
629 | ||
7bc95e2e | 630 | // Setup and start DMA. |
5cd9ec01 | 631 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); |
7bc95e2e | 632 | |
5cd9ec01 | 633 | // And now we loop, receiving samples. |
7bc95e2e | 634 | for(uint32_t rsamples = 0; TRUE; ) { |
635 | ||
5cd9ec01 M |
636 | if(BUTTON_PRESS()) { |
637 | DbpString("cancelled by button"); | |
7bc95e2e | 638 | break; |
5cd9ec01 | 639 | } |
15c4dc5a | 640 | |
5cd9ec01 M |
641 | LED_A_ON(); |
642 | WDT_HIT(); | |
15c4dc5a | 643 | |
5cd9ec01 M |
644 | int register readBufDataP = data - dmaBuf; |
645 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
646 | if (readBufDataP <= dmaBufDataP){ | |
647 | dataLen = dmaBufDataP - readBufDataP; | |
648 | } else { | |
7bc95e2e | 649 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
650 | } |
651 | // test for length of buffer | |
652 | if(dataLen > maxDataLen) { | |
653 | maxDataLen = dataLen; | |
654 | if(dataLen > 400) { | |
7bc95e2e | 655 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
656 | break; | |
5cd9ec01 M |
657 | } |
658 | } | |
659 | if(dataLen < 1) continue; | |
660 | ||
661 | // primary buffer was stopped( <-- we lost data! | |
662 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
663 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
664 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 665 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
666 | } |
667 | // secondary buffer sets as primary, secondary buffer was stopped | |
668 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
669 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
670 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
671 | } | |
672 | ||
673 | LED_A_OFF(); | |
7bc95e2e | 674 | |
675 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 676 | |
7bc95e2e | 677 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
678 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
679 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
680 | LED_C_ON(); | |
5cd9ec01 | 681 | |
7bc95e2e | 682 | // check - if there is a short 7bit request from reader |
683 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE; | |
5cd9ec01 | 684 | |
7bc95e2e | 685 | if(triggered) { |
6a1f2d82 | 686 | if (!LogTrace(receivedCmd, |
687 | Uart.len, | |
688 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
689 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
690 | Uart.parity, | |
691 | TRUE)) break; | |
7bc95e2e | 692 | } |
693 | /* And ready to receive another command. */ | |
694 | UartReset(); | |
695 | /* And also reset the demod code, which might have been */ | |
696 | /* false-triggered by the commands from the reader. */ | |
697 | DemodReset(); | |
698 | LED_B_OFF(); | |
699 | } | |
700 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 701 | } |
3be2a5ae | 702 | |
7bc95e2e | 703 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
704 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
705 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
706 | LED_B_ON(); | |
5cd9ec01 | 707 | |
6a1f2d82 | 708 | if (!LogTrace(receivedResponse, |
709 | Demod.len, | |
710 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
711 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
712 | Demod.parity, | |
713 | FALSE)) break; | |
5cd9ec01 | 714 | |
7bc95e2e | 715 | if ((!triggered) && (param & 0x01)) triggered = TRUE; |
5cd9ec01 | 716 | |
7bc95e2e | 717 | // And ready to receive another response. |
718 | DemodReset(); | |
719 | LED_C_OFF(); | |
720 | } | |
721 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
722 | } | |
5cd9ec01 M |
723 | } |
724 | ||
7bc95e2e | 725 | previous_data = *data; |
726 | rsamples++; | |
5cd9ec01 | 727 | data++; |
d714d3ef | 728 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
729 | data = dmaBuf; |
730 | } | |
731 | } // main cycle | |
732 | ||
733 | DbpString("COMMAND FINISHED"); | |
15c4dc5a | 734 | |
7bc95e2e | 735 | FpgaDisableSscDma(); |
736 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); | |
737 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]); | |
5cd9ec01 | 738 | LEDsoff(); |
15c4dc5a | 739 | } |
740 | ||
15c4dc5a | 741 | //----------------------------------------------------------------------------- |
742 | // Prepare tag messages | |
743 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 744 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) |
15c4dc5a | 745 | { |
8f51ddb0 | 746 | ToSendReset(); |
15c4dc5a | 747 | |
748 | // Correction bit, might be removed when not needed | |
749 | ToSendStuffBit(0); | |
750 | ToSendStuffBit(0); | |
751 | ToSendStuffBit(0); | |
752 | ToSendStuffBit(0); | |
753 | ToSendStuffBit(1); // 1 | |
754 | ToSendStuffBit(0); | |
755 | ToSendStuffBit(0); | |
756 | ToSendStuffBit(0); | |
8f51ddb0 | 757 | |
15c4dc5a | 758 | // Send startbit |
72934aa3 | 759 | ToSend[++ToSendMax] = SEC_D; |
6a1f2d82 | 760 | |
7bc95e2e | 761 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 762 | |
6a1f2d82 | 763 | for(uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 764 | uint8_t b = cmd[i]; |
15c4dc5a | 765 | |
766 | // Data bits | |
6a1f2d82 | 767 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 768 | if(b & 1) { |
72934aa3 | 769 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 770 | } else { |
72934aa3 | 771 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
772 | } |
773 | b >>= 1; | |
774 | } | |
15c4dc5a | 775 | |
0014cb46 | 776 | // Get the parity bit |
6a1f2d82 | 777 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 778 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 779 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 780 | } else { |
72934aa3 | 781 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 782 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 783 | } |
8f51ddb0 | 784 | } |
15c4dc5a | 785 | |
8f51ddb0 M |
786 | // Send stopbit |
787 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 788 | |
8f51ddb0 M |
789 | // Convert from last byte pos to length |
790 | ToSendMax++; | |
8f51ddb0 M |
791 | } |
792 | ||
6a1f2d82 | 793 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) |
794 | { | |
795 | uint8_t par[MAX_PARITY_SIZE]; | |
796 | ||
797 | GetParity(cmd, len, par); | |
798 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 799 | } |
800 | ||
15c4dc5a | 801 | |
8f51ddb0 M |
802 | static void Code4bitAnswerAsTag(uint8_t cmd) |
803 | { | |
804 | int i; | |
805 | ||
5f6d6c90 | 806 | ToSendReset(); |
8f51ddb0 M |
807 | |
808 | // Correction bit, might be removed when not needed | |
809 | ToSendStuffBit(0); | |
810 | ToSendStuffBit(0); | |
811 | ToSendStuffBit(0); | |
812 | ToSendStuffBit(0); | |
813 | ToSendStuffBit(1); // 1 | |
814 | ToSendStuffBit(0); | |
815 | ToSendStuffBit(0); | |
816 | ToSendStuffBit(0); | |
817 | ||
818 | // Send startbit | |
819 | ToSend[++ToSendMax] = SEC_D; | |
820 | ||
821 | uint8_t b = cmd; | |
822 | for(i = 0; i < 4; i++) { | |
823 | if(b & 1) { | |
824 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 825 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
826 | } else { |
827 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 828 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
829 | } |
830 | b >>= 1; | |
831 | } | |
832 | ||
833 | // Send stopbit | |
834 | ToSend[++ToSendMax] = SEC_F; | |
835 | ||
5f6d6c90 | 836 | // Convert from last byte pos to length |
837 | ToSendMax++; | |
15c4dc5a | 838 | } |
839 | ||
840 | //----------------------------------------------------------------------------- | |
841 | // Wait for commands from reader | |
842 | // Stop when button is pressed | |
843 | // Or return TRUE when command is captured | |
844 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 845 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) |
15c4dc5a | 846 | { |
847 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
848 | // only, since we are receiving, not transmitting). | |
849 | // Signal field is off with the appropriate LED | |
850 | LED_D_OFF(); | |
851 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
852 | ||
853 | // Now run a `software UART' on the stream of incoming samples. | |
6a1f2d82 | 854 | UartInit(received, parity); |
7bc95e2e | 855 | |
856 | // clear RXRDY: | |
857 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 858 | |
859 | for(;;) { | |
860 | WDT_HIT(); | |
861 | ||
862 | if(BUTTON_PRESS()) return FALSE; | |
7bc95e2e | 863 | |
15c4dc5a | 864 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 865 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
866 | if(MillerDecoding(b, 0)) { | |
867 | *len = Uart.len; | |
15c4dc5a | 868 | return TRUE; |
869 | } | |
7bc95e2e | 870 | } |
15c4dc5a | 871 | } |
872 | } | |
28afbd2b | 873 | |
6a1f2d82 | 874 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded); |
7bc95e2e | 875 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded); |
28afbd2b | 876 | int EmSend4bit(uint8_t resp); |
6a1f2d82 | 877 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par); |
878 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded); | |
879 | int EmSendCmd(uint8_t *resp, uint16_t respLen); | |
880 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par); | |
881 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, | |
882 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity); | |
15c4dc5a | 883 | |
ce02f6f9 | 884 | static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); |
885 | ||
886 | typedef struct { | |
887 | uint8_t* response; | |
888 | size_t response_n; | |
889 | uint8_t* modulation; | |
890 | size_t modulation_n; | |
7bc95e2e | 891 | uint32_t ProxToAirDuration; |
ce02f6f9 | 892 | } tag_response_info_t; |
893 | ||
894 | void reset_free_buffer() { | |
895 | free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET); | |
896 | } | |
897 | ||
898 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { | |
7bc95e2e | 899 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 900 | // This will need the following byte array for a modulation sequence |
901 | // 144 data bits (18 * 8) | |
902 | // 18 parity bits | |
903 | // 2 Start and stop | |
904 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
905 | // 1 just for the case | |
906 | // ----------- + | |
907 | // 166 bytes, since every bit that needs to be send costs us a byte | |
908 | // | |
909 | ||
910 | // Prepare the tag modulation bits from the message | |
911 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
912 | ||
913 | // Make sure we do not exceed the free buffer space | |
914 | if (ToSendMax > max_buffer_size) { | |
915 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
916 | Dbhexdump(response_info->response_n,response_info->response,false); | |
917 | return false; | |
918 | } | |
919 | ||
920 | // Copy the byte array, used for this modulation to the buffer position | |
921 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
922 | ||
7bc95e2e | 923 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them |
ce02f6f9 | 924 | response_info->modulation_n = ToSendMax; |
7bc95e2e | 925 | response_info->ProxToAirDuration = LastProxToAirDuration; |
ce02f6f9 | 926 | |
927 | return true; | |
928 | } | |
929 | ||
930 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { | |
931 | // Retrieve and store the current buffer index | |
932 | response_info->modulation = free_buffer_pointer; | |
933 | ||
934 | // Determine the maximum size we can use from our buffer | |
6a1f2d82 | 935 | size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer; |
ce02f6f9 | 936 | |
937 | // Forward the prepare tag modulation function to the inner function | |
938 | if (prepare_tag_modulation(response_info,max_buffer_size)) { | |
939 | // Update the free buffer offset | |
940 | free_buffer_pointer += ToSendMax; | |
941 | return true; | |
942 | } else { | |
943 | return false; | |
944 | } | |
945 | } | |
946 | ||
15c4dc5a | 947 | //----------------------------------------------------------------------------- |
948 | // Main loop of simulated tag: receive commands from reader, decide what | |
949 | // response to send, and send it. | |
950 | //----------------------------------------------------------------------------- | |
28afbd2b | 951 | void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data) |
15c4dc5a | 952 | { |
5f6d6c90 | 953 | // Enable and clear the trace |
5f6d6c90 | 954 | iso14a_clear_trace(); |
7bc95e2e | 955 | iso14a_set_tracing(TRUE); |
81cd0474 | 956 | |
81cd0474 | 957 | uint8_t sak; |
958 | ||
959 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). | |
960 | uint8_t response1[2]; | |
961 | ||
962 | switch (tagType) { | |
963 | case 1: { // MIFARE Classic | |
964 | // Says: I am Mifare 1k - original line | |
965 | response1[0] = 0x04; | |
966 | response1[1] = 0x00; | |
967 | sak = 0x08; | |
968 | } break; | |
969 | case 2: { // MIFARE Ultralight | |
970 | // Says: I am a stupid memory tag, no crypto | |
971 | response1[0] = 0x04; | |
972 | response1[1] = 0x00; | |
973 | sak = 0x00; | |
974 | } break; | |
975 | case 3: { // MIFARE DESFire | |
976 | // Says: I am a DESFire tag, ph33r me | |
977 | response1[0] = 0x04; | |
978 | response1[1] = 0x03; | |
979 | sak = 0x20; | |
980 | } break; | |
981 | case 4: { // ISO/IEC 14443-4 | |
982 | // Says: I am a javacard (JCOP) | |
983 | response1[0] = 0x04; | |
984 | response1[1] = 0x00; | |
985 | sak = 0x28; | |
986 | } break; | |
987 | default: { | |
988 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
989 | return; | |
990 | } break; | |
991 | } | |
992 | ||
993 | // The second response contains the (mandatory) first 24 bits of the UID | |
994 | uint8_t response2[5]; | |
995 | ||
996 | // Check if the uid uses the (optional) part | |
997 | uint8_t response2a[5]; | |
998 | if (uid_2nd) { | |
999 | response2[0] = 0x88; | |
1000 | num_to_bytes(uid_1st,3,response2+1); | |
1001 | num_to_bytes(uid_2nd,4,response2a); | |
1002 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; | |
1003 | ||
1004 | // Configure the ATQA and SAK accordingly | |
1005 | response1[0] |= 0x40; | |
1006 | sak |= 0x04; | |
1007 | } else { | |
1008 | num_to_bytes(uid_1st,4,response2); | |
1009 | // Configure the ATQA and SAK accordingly | |
1010 | response1[0] &= 0xBF; | |
1011 | sak &= 0xFB; | |
1012 | } | |
1013 | ||
1014 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
1015 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
1016 | ||
1017 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
1018 | uint8_t response3[3]; | |
1019 | response3[0] = sak; | |
1020 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); | |
1021 | ||
1022 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
1023 | uint8_t response3a[3]; | |
1024 | response3a[0] = sak & 0xFB; | |
1025 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
1026 | ||
254b70a4 | 1027 | uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce |
6a1f2d82 | 1028 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: |
1029 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, | |
1030 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
1031 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
1032 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 1033 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
1034 | ||
7bc95e2e | 1035 | #define TAG_RESPONSE_COUNT 7 |
1036 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { | |
1037 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
1038 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
1039 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
1040 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
1041 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
1042 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1043 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
1044 | }; | |
1045 | ||
1046 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1047 | // Such a response is less time critical, so we can prepare them on the fly | |
1048 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1049 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1050 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1051 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1052 | tag_response_info_t dynamic_response_info = { | |
1053 | .response = dynamic_response_buffer, | |
1054 | .response_n = 0, | |
1055 | .modulation = dynamic_modulation_buffer, | |
1056 | .modulation_n = 0 | |
1057 | }; | |
ce02f6f9 | 1058 | |
7bc95e2e | 1059 | // Reset the offset pointer of the free buffer |
1060 | reset_free_buffer(); | |
ce02f6f9 | 1061 | |
7bc95e2e | 1062 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1063 | // there will be not enough time to do this at the moment the reader sends it REQA |
7bc95e2e | 1064 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) { |
1065 | prepare_allocated_tag_modulation(&responses[i]); | |
1066 | } | |
15c4dc5a | 1067 | |
7bc95e2e | 1068 | int len = 0; |
15c4dc5a | 1069 | |
1070 | // To control where we are in the protocol | |
1071 | int order = 0; | |
1072 | int lastorder; | |
1073 | ||
1074 | // Just to allow some checks | |
1075 | int happened = 0; | |
1076 | int happened2 = 0; | |
81cd0474 | 1077 | int cmdsRecvd = 0; |
15c4dc5a | 1078 | |
254b70a4 | 1079 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 1080 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
15c4dc5a | 1081 | |
6a1f2d82 | 1082 | // buffers used on software Uart: |
1083 | uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET; | |
1084 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; | |
1085 | ||
254b70a4 | 1086 | cmdsRecvd = 0; |
7bc95e2e | 1087 | tag_response_info_t* p_response; |
15c4dc5a | 1088 | |
254b70a4 | 1089 | LED_A_ON(); |
1090 | for(;;) { | |
7bc95e2e | 1091 | // Clean receive command buffer |
1092 | ||
6a1f2d82 | 1093 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1094 | DbpString("Button press"); |
254b70a4 | 1095 | break; |
1096 | } | |
7bc95e2e | 1097 | |
1098 | p_response = NULL; | |
1099 | ||
254b70a4 | 1100 | // Okay, look at the command now. |
1101 | lastorder = order; | |
1102 | if(receivedCmd[0] == 0x26) { // Received a REQUEST | |
ce02f6f9 | 1103 | p_response = &responses[0]; order = 1; |
254b70a4 | 1104 | } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP |
ce02f6f9 | 1105 | p_response = &responses[0]; order = 6; |
254b70a4 | 1106 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1) |
ce02f6f9 | 1107 | p_response = &responses[1]; order = 2; |
6a1f2d82 | 1108 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2) |
ce02f6f9 | 1109 | p_response = &responses[2]; order = 20; |
254b70a4 | 1110 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1111 | p_response = &responses[3]; order = 3; |
254b70a4 | 1112 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2) |
ce02f6f9 | 1113 | p_response = &responses[4]; order = 30; |
254b70a4 | 1114 | } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ |
6a1f2d82 | 1115 | EmSendCmdEx(data+(4*receivedCmd[1]),16,false); |
7bc95e2e | 1116 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
5f6d6c90 | 1117 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
7bc95e2e | 1118 | p_response = NULL; |
254b70a4 | 1119 | } else if(receivedCmd[0] == 0x50) { // Received a HALT |
17331e14 | 1120 | // DbpString("Reader requested we HALT!:"); |
7bc95e2e | 1121 | if (tracing) { |
6a1f2d82 | 1122 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1123 | } |
1124 | p_response = NULL; | |
254b70a4 | 1125 | } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request |
ce02f6f9 | 1126 | p_response = &responses[5]; order = 7; |
254b70a4 | 1127 | } else if(receivedCmd[0] == 0xE0) { // Received a RATS request |
7bc95e2e | 1128 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1129 | EmSend4bit(CARD_NACK_NA); | |
1130 | p_response = NULL; | |
1131 | } else { | |
1132 | p_response = &responses[6]; order = 70; | |
1133 | } | |
6a1f2d82 | 1134 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
7bc95e2e | 1135 | if (tracing) { |
6a1f2d82 | 1136 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1137 | } |
1138 | uint32_t nr = bytes_to_num(receivedCmd,4); | |
1139 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
1140 | Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar); | |
1141 | } else { | |
1142 | // Check for ISO 14443A-4 compliant commands, look at left nibble | |
1143 | switch (receivedCmd[0]) { | |
1144 | ||
1145 | case 0x0B: | |
1146 | case 0x0A: { // IBlock (command) | |
1147 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1148 | dynamic_response_info.response[1] = 0x00; | |
1149 | dynamic_response_info.response[2] = 0x90; | |
1150 | dynamic_response_info.response[3] = 0x00; | |
1151 | dynamic_response_info.response_n = 4; | |
1152 | } break; | |
1153 | ||
1154 | case 0x1A: | |
1155 | case 0x1B: { // Chaining command | |
1156 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1157 | dynamic_response_info.response_n = 2; | |
1158 | } break; | |
1159 | ||
1160 | case 0xaa: | |
1161 | case 0xbb: { | |
1162 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1163 | dynamic_response_info.response_n = 2; | |
1164 | } break; | |
1165 | ||
1166 | case 0xBA: { // | |
1167 | memcpy(dynamic_response_info.response,"\xAB\x00",2); | |
1168 | dynamic_response_info.response_n = 2; | |
1169 | } break; | |
1170 | ||
1171 | case 0xCA: | |
1172 | case 0xC2: { // Readers sends deselect command | |
1173 | memcpy(dynamic_response_info.response,"\xCA\x00",2); | |
1174 | dynamic_response_info.response_n = 2; | |
1175 | } break; | |
1176 | ||
1177 | default: { | |
1178 | // Never seen this command before | |
1179 | if (tracing) { | |
6a1f2d82 | 1180 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1181 | } |
1182 | Dbprintf("Received unknown command (len=%d):",len); | |
1183 | Dbhexdump(len,receivedCmd,false); | |
1184 | // Do not respond | |
1185 | dynamic_response_info.response_n = 0; | |
1186 | } break; | |
1187 | } | |
ce02f6f9 | 1188 | |
7bc95e2e | 1189 | if (dynamic_response_info.response_n > 0) { |
1190 | // Copy the CID from the reader query | |
1191 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1192 | |
7bc95e2e | 1193 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1194 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1195 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1196 | |
7bc95e2e | 1197 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1198 | Dbprintf("Error preparing tag response"); | |
1199 | if (tracing) { | |
6a1f2d82 | 1200 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1201 | } |
1202 | break; | |
1203 | } | |
1204 | p_response = &dynamic_response_info; | |
1205 | } | |
81cd0474 | 1206 | } |
15c4dc5a | 1207 | |
1208 | // Count number of wakeups received after a halt | |
1209 | if(order == 6 && lastorder == 5) { happened++; } | |
1210 | ||
1211 | // Count number of other messages after a halt | |
1212 | if(order != 6 && lastorder == 5) { happened2++; } | |
1213 | ||
15c4dc5a | 1214 | if(cmdsRecvd > 999) { |
1215 | DbpString("1000 commands later..."); | |
254b70a4 | 1216 | break; |
15c4dc5a | 1217 | } |
ce02f6f9 | 1218 | cmdsRecvd++; |
1219 | ||
1220 | if (p_response != NULL) { | |
7bc95e2e | 1221 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1222 | // do the tracing for the previous reader request and this tag answer: | |
6a1f2d82 | 1223 | uint8_t par[MAX_PARITY_SIZE]; |
1224 | GetParity(p_response->response, p_response->response_n, par); | |
7bc95e2e | 1225 | EmLogTrace(Uart.output, |
1226 | Uart.len, | |
1227 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1228 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1229 | Uart.parity, |
7bc95e2e | 1230 | p_response->response, |
1231 | p_response->response_n, | |
1232 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1233 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1234 | par); |
7bc95e2e | 1235 | } |
1236 | ||
1237 | if (!tracing) { | |
1238 | Dbprintf("Trace Full. Simulation stopped."); | |
1239 | break; | |
1240 | } | |
1241 | } | |
15c4dc5a | 1242 | |
1243 | Dbprintf("%x %x %x", happened, happened2, cmdsRecvd); | |
1244 | LED_A_OFF(); | |
1245 | } | |
1246 | ||
9492e0b0 | 1247 | |
1248 | // prepare a delayed transfer. This simply shifts ToSend[] by a number | |
1249 | // of bits specified in the delay parameter. | |
1250 | void PrepareDelayedTransfer(uint16_t delay) | |
1251 | { | |
1252 | uint8_t bitmask = 0; | |
1253 | uint8_t bits_to_shift = 0; | |
1254 | uint8_t bits_shifted = 0; | |
1255 | ||
1256 | delay &= 0x07; | |
1257 | if (delay) { | |
1258 | for (uint16_t i = 0; i < delay; i++) { | |
1259 | bitmask |= (0x01 << i); | |
1260 | } | |
7bc95e2e | 1261 | ToSend[ToSendMax++] = 0x00; |
9492e0b0 | 1262 | for (uint16_t i = 0; i < ToSendMax; i++) { |
1263 | bits_to_shift = ToSend[i] & bitmask; | |
1264 | ToSend[i] = ToSend[i] >> delay; | |
1265 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1266 | bits_shifted = bits_to_shift; | |
1267 | } | |
1268 | } | |
1269 | } | |
1270 | ||
7bc95e2e | 1271 | |
1272 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1273 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1274 | // Parameter timing: |
7bc95e2e | 1275 | // if NULL: transfer at next possible time, taking into account |
1276 | // request guard time and frame delay time | |
1277 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1278 | // if != 0: delay transfer until time specified |
7bc95e2e | 1279 | //------------------------------------------------------------------------------------- |
6a1f2d82 | 1280 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) |
15c4dc5a | 1281 | { |
7bc95e2e | 1282 | |
9492e0b0 | 1283 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1284 | |
7bc95e2e | 1285 | uint32_t ThisTransferTime = 0; |
e30c654b | 1286 | |
9492e0b0 | 1287 | if (timing) { |
1288 | if(*timing == 0) { // Measure time | |
7bc95e2e | 1289 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
9492e0b0 | 1290 | } else { |
1291 | PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1292 | } | |
7bc95e2e | 1293 | if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing"); |
1294 | while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks) | |
1295 | LastTimeProxToAirStart = *timing; | |
1296 | } else { | |
1297 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
1298 | while(GetCountSspClk() < ThisTransferTime); | |
1299 | LastTimeProxToAirStart = ThisTransferTime; | |
9492e0b0 | 1300 | } |
1301 | ||
7bc95e2e | 1302 | // clear TXRDY |
1303 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1304 | ||
1305 | // for(uint16_t c = 0; c < 10;) { // standard delay for each transfer (allow tag to be ready after last transmission) | |
1306 | // if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1307 | // AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1308 | // c++; | |
1309 | // } | |
1310 | // } | |
1311 | ||
1312 | uint16_t c = 0; | |
9492e0b0 | 1313 | for(;;) { |
1314 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1315 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
1316 | c++; | |
1317 | if(c >= len) { | |
1318 | break; | |
1319 | } | |
1320 | } | |
1321 | } | |
7bc95e2e | 1322 | |
1323 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); | |
1324 | ||
15c4dc5a | 1325 | } |
1326 | ||
7bc95e2e | 1327 | |
15c4dc5a | 1328 | //----------------------------------------------------------------------------- |
195af472 | 1329 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1330 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1331 | void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) |
15c4dc5a | 1332 | { |
7bc95e2e | 1333 | int i, j; |
1334 | int last; | |
1335 | uint8_t b; | |
e30c654b | 1336 | |
7bc95e2e | 1337 | ToSendReset(); |
e30c654b | 1338 | |
7bc95e2e | 1339 | // Start of Communication (Seq. Z) |
1340 | ToSend[++ToSendMax] = SEC_Z; | |
1341 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1342 | last = 0; | |
1343 | ||
1344 | size_t bytecount = nbytes(bits); | |
1345 | // Generate send structure for the data bits | |
1346 | for (i = 0; i < bytecount; i++) { | |
1347 | // Get the current byte to send | |
1348 | b = cmd[i]; | |
1349 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1350 | ||
1351 | for (j = 0; j < bitsleft; j++) { | |
1352 | if (b & 1) { | |
1353 | // Sequence X | |
1354 | ToSend[++ToSendMax] = SEC_X; | |
1355 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1356 | last = 1; | |
1357 | } else { | |
1358 | if (last == 0) { | |
1359 | // Sequence Z | |
1360 | ToSend[++ToSendMax] = SEC_Z; | |
1361 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1362 | } else { | |
1363 | // Sequence Y | |
1364 | ToSend[++ToSendMax] = SEC_Y; | |
1365 | last = 0; | |
1366 | } | |
1367 | } | |
1368 | b >>= 1; | |
1369 | } | |
1370 | ||
6a1f2d82 | 1371 | // Only transmit parity bit if we transmitted a complete byte |
7bc95e2e | 1372 | if (j == 8) { |
1373 | // Get the parity bit | |
6a1f2d82 | 1374 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1375 | // Sequence X |
1376 | ToSend[++ToSendMax] = SEC_X; | |
1377 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1378 | last = 1; | |
1379 | } else { | |
1380 | if (last == 0) { | |
1381 | // Sequence Z | |
1382 | ToSend[++ToSendMax] = SEC_Z; | |
1383 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1384 | } else { | |
1385 | // Sequence Y | |
1386 | ToSend[++ToSendMax] = SEC_Y; | |
1387 | last = 0; | |
1388 | } | |
1389 | } | |
1390 | } | |
1391 | } | |
e30c654b | 1392 | |
7bc95e2e | 1393 | // End of Communication: Logic 0 followed by Sequence Y |
1394 | if (last == 0) { | |
1395 | // Sequence Z | |
1396 | ToSend[++ToSendMax] = SEC_Z; | |
1397 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1398 | } else { | |
1399 | // Sequence Y | |
1400 | ToSend[++ToSendMax] = SEC_Y; | |
1401 | last = 0; | |
1402 | } | |
1403 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1404 | |
7bc95e2e | 1405 | // Convert to length of command: |
1406 | ToSendMax++; | |
15c4dc5a | 1407 | } |
1408 | ||
195af472 | 1409 | //----------------------------------------------------------------------------- |
1410 | // Prepare reader command to send to FPGA | |
1411 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1412 | void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) |
195af472 | 1413 | { |
6a1f2d82 | 1414 | CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
195af472 | 1415 | } |
1416 | ||
9ca155ba M |
1417 | //----------------------------------------------------------------------------- |
1418 | // Wait for commands from reader | |
1419 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1420 | // Or return 0 when command is captured | |
1421 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1422 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) |
9ca155ba M |
1423 | { |
1424 | *len = 0; | |
1425 | ||
1426 | uint32_t timer = 0, vtime = 0; | |
1427 | int analogCnt = 0; | |
1428 | int analogAVG = 0; | |
1429 | ||
1430 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1431 | // only, since we are receiving, not transmitting). | |
1432 | // Signal field is off with the appropriate LED | |
1433 | LED_D_OFF(); | |
1434 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1435 | ||
1436 | // Set ADC to read field strength | |
1437 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1438 | AT91C_BASE_ADC->ADC_MR = | |
1439 | ADC_MODE_PRESCALE(32) | | |
1440 | ADC_MODE_STARTUP_TIME(16) | | |
1441 | ADC_MODE_SAMPLE_HOLD_TIME(8); | |
1442 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); | |
1443 | // start ADC | |
1444 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1445 | ||
1446 | // Now run a 'software UART' on the stream of incoming samples. | |
6a1f2d82 | 1447 | UartInit(received, parity); |
7bc95e2e | 1448 | |
1449 | // Clear RXRDY: | |
1450 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba M |
1451 | |
1452 | for(;;) { | |
1453 | WDT_HIT(); | |
1454 | ||
1455 | if (BUTTON_PRESS()) return 1; | |
1456 | ||
1457 | // test if the field exists | |
1458 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1459 | analogCnt++; | |
1460 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1461 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1462 | if (analogCnt >= 32) { | |
1463 | if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { | |
1464 | vtime = GetTickCount(); | |
1465 | if (!timer) timer = vtime; | |
1466 | // 50ms no field --> card to idle state | |
1467 | if (vtime - timer > 50) return 2; | |
1468 | } else | |
1469 | if (timer) timer = 0; | |
1470 | analogCnt = 0; | |
1471 | analogAVG = 0; | |
1472 | } | |
1473 | } | |
7bc95e2e | 1474 | |
9ca155ba | 1475 | // receive and test the miller decoding |
7bc95e2e | 1476 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1477 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1478 | if(MillerDecoding(b, 0)) { | |
1479 | *len = Uart.len; | |
9ca155ba M |
1480 | return 0; |
1481 | } | |
7bc95e2e | 1482 | } |
1483 | ||
9ca155ba M |
1484 | } |
1485 | } | |
1486 | ||
9ca155ba | 1487 | |
6a1f2d82 | 1488 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) |
7bc95e2e | 1489 | { |
1490 | uint8_t b; | |
1491 | uint16_t i = 0; | |
1492 | uint32_t ThisTransferTime; | |
1493 | ||
9ca155ba M |
1494 | // Modulate Manchester |
1495 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1496 | |
1497 | // include correction bit if necessary | |
1498 | if (Uart.parityBits & 0x01) { | |
1499 | correctionNeeded = TRUE; | |
1500 | } | |
1501 | if(correctionNeeded) { | |
9ca155ba M |
1502 | // 1236, so correction bit needed |
1503 | i = 0; | |
7bc95e2e | 1504 | } else { |
1505 | i = 1; | |
9ca155ba | 1506 | } |
7bc95e2e | 1507 | |
d714d3ef | 1508 | // clear receiving shift register and holding register |
7bc95e2e | 1509 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1510 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1511 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1512 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1513 | |
7bc95e2e | 1514 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
1515 | for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never | |
1516 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1517 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1518 | } | |
1519 | ||
1520 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1521 | ||
1522 | // Clear TXRDY: | |
1523 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1524 | ||
9ca155ba | 1525 | // send cycle |
7bc95e2e | 1526 | for(; i <= respLen; ) { |
9ca155ba | 1527 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1528 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1529 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1530 | } |
7bc95e2e | 1531 | |
9ca155ba M |
1532 | if(BUTTON_PRESS()) { |
1533 | break; | |
1534 | } | |
1535 | } | |
1536 | ||
7bc95e2e | 1537 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
1538 | for (i = 0; i < 2 ; ) { | |
1539 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1540 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1541 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1542 | i++; | |
1543 | } | |
1544 | } | |
1545 | ||
1546 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); | |
1547 | ||
9ca155ba M |
1548 | return 0; |
1549 | } | |
1550 | ||
7bc95e2e | 1551 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1552 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1553 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1554 | // do the tracing for the previous reader request and this tag answer: |
6a1f2d82 | 1555 | uint8_t par[1]; |
1556 | GetParity(&resp, 1, par); | |
7bc95e2e | 1557 | EmLogTrace(Uart.output, |
1558 | Uart.len, | |
1559 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1560 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1561 | Uart.parity, |
7bc95e2e | 1562 | &resp, |
1563 | 1, | |
1564 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1565 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1566 | par); |
0a39986e | 1567 | return res; |
9ca155ba M |
1568 | } |
1569 | ||
8f51ddb0 | 1570 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1571 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1572 | } |
1573 | ||
6a1f2d82 | 1574 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1575 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1576 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1577 | // do the tracing for the previous reader request and this tag answer: |
1578 | EmLogTrace(Uart.output, | |
1579 | Uart.len, | |
1580 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1581 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1582 | Uart.parity, |
7bc95e2e | 1583 | resp, |
1584 | respLen, | |
1585 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1586 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1587 | par); |
8f51ddb0 M |
1588 | return res; |
1589 | } | |
1590 | ||
6a1f2d82 | 1591 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
1592 | uint8_t par[MAX_PARITY_SIZE]; | |
1593 | GetParity(resp, respLen, par); | |
1594 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 M |
1595 | } |
1596 | ||
6a1f2d82 | 1597 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ |
1598 | uint8_t par[MAX_PARITY_SIZE]; | |
1599 | GetParity(resp, respLen, par); | |
1600 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1601 | } |
1602 | ||
6a1f2d82 | 1603 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1604 | return EmSendCmdExPar(resp, respLen, false, par); |
1605 | } | |
1606 | ||
6a1f2d82 | 1607 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1608 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1609 | { |
1610 | if (tracing) { | |
1611 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from | |
1612 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1613 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1614 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1615 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1616 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1617 | reader_EndTime = tag_StartTime - exact_fdt; | |
1618 | reader_StartTime = reader_EndTime - reader_modlen; | |
6a1f2d82 | 1619 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) { |
7bc95e2e | 1620 | return FALSE; |
6a1f2d82 | 1621 | } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE)); |
7bc95e2e | 1622 | } else { |
1623 | return TRUE; | |
1624 | } | |
9ca155ba M |
1625 | } |
1626 | ||
15c4dc5a | 1627 | //----------------------------------------------------------------------------- |
1628 | // Wait a certain time for tag response | |
1629 | // If a response is captured return TRUE | |
e691fc45 | 1630 | // If it takes too long return FALSE |
15c4dc5a | 1631 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1632 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) |
15c4dc5a | 1633 | { |
7bc95e2e | 1634 | uint16_t c; |
e691fc45 | 1635 | |
15c4dc5a | 1636 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1637 | // only, since we are receiving, not transmitting). |
1638 | // Signal field is on with the appropriate LED | |
1639 | LED_D_ON(); | |
1640 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1641 | |
534983d7 | 1642 | // Now get the answer from the card |
6a1f2d82 | 1643 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 1644 | |
7bc95e2e | 1645 | // clear RXRDY: |
1646 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1647 | ||
15c4dc5a | 1648 | c = 0; |
1649 | for(;;) { | |
534983d7 | 1650 | WDT_HIT(); |
15c4dc5a | 1651 | |
534983d7 | 1652 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1653 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1654 | if(ManchesterDecoding(b, offset, 0)) { |
1655 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
15c4dc5a | 1656 | return TRUE; |
6a1f2d82 | 1657 | } else if (c++ > iso14a_timeout) { |
7bc95e2e | 1658 | return FALSE; |
15c4dc5a | 1659 | } |
534983d7 | 1660 | } |
1661 | } | |
15c4dc5a | 1662 | } |
1663 | ||
6a1f2d82 | 1664 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) |
15c4dc5a | 1665 | { |
981bd429 | 1666 | |
6a1f2d82 | 1667 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
dfc3c505 | 1668 | |
7bc95e2e | 1669 | // Send command to tag |
1670 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
1671 | if(trigger) | |
1672 | LED_A_ON(); | |
dfc3c505 | 1673 | |
7bc95e2e | 1674 | // Log reader command in trace buffer |
1675 | if (tracing) { | |
6a1f2d82 | 1676 | LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE); |
7bc95e2e | 1677 | } |
15c4dc5a | 1678 | } |
1679 | ||
6a1f2d82 | 1680 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) |
dfc3c505 | 1681 | { |
6a1f2d82 | 1682 | ReaderTransmitBitsPar(frame, len*8, par, timing); |
dfc3c505 | 1683 | } |
15c4dc5a | 1684 | |
6a1f2d82 | 1685 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) |
e691fc45 | 1686 | { |
1687 | // Generate parity and redirect | |
6a1f2d82 | 1688 | uint8_t par[MAX_PARITY_SIZE]; |
1689 | GetParity(frame, len/8, par); | |
1690 | ReaderTransmitBitsPar(frame, len, par, timing); | |
e691fc45 | 1691 | } |
1692 | ||
6a1f2d82 | 1693 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) |
15c4dc5a | 1694 | { |
1695 | // Generate parity and redirect | |
6a1f2d82 | 1696 | uint8_t par[MAX_PARITY_SIZE]; |
1697 | GetParity(frame, len, par); | |
1698 | ReaderTransmitBitsPar(frame, len*8, par, timing); | |
15c4dc5a | 1699 | } |
1700 | ||
6a1f2d82 | 1701 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) |
e691fc45 | 1702 | { |
6a1f2d82 | 1703 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE; |
7bc95e2e | 1704 | if (tracing) { |
6a1f2d82 | 1705 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1706 | } |
e691fc45 | 1707 | return Demod.len; |
1708 | } | |
1709 | ||
6a1f2d82 | 1710 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) |
15c4dc5a | 1711 | { |
6a1f2d82 | 1712 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE; |
7bc95e2e | 1713 | if (tracing) { |
6a1f2d82 | 1714 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1715 | } |
e691fc45 | 1716 | return Demod.len; |
f89c7050 M |
1717 | } |
1718 | ||
e691fc45 | 1719 | /* performs iso14443a anticollision procedure |
534983d7 | 1720 | * fills the uid pointer unless NULL |
1721 | * fills resp_data unless NULL */ | |
6a1f2d82 | 1722 | int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) { |
1723 | uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP | |
1724 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1725 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1726 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
1727 | uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET; | |
1728 | uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
1729 | byte_t uid_resp[4]; | |
1730 | size_t uid_resp_len; | |
1731 | ||
1732 | uint8_t sak = 0x04; // cascade uid | |
1733 | int cascade_level = 0; | |
1734 | int len; | |
1735 | ||
1736 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field | |
9492e0b0 | 1737 | ReaderTransmitBitsPar(wupa,7,0, NULL); |
7bc95e2e | 1738 | |
6a1f2d82 | 1739 | // Receive the ATQA |
1740 | if(!ReaderReceive(resp, resp_par)) return 0; | |
1741 | //Dbprintf("atqa: %02x %02x",resp[1],resp[0]); | |
1742 | ||
1743 | if(p_hi14a_card) { | |
1744 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1745 | p_hi14a_card->uidlen = 0; | |
1746 | memset(p_hi14a_card->uid,0,10); | |
1747 | } | |
5f6d6c90 | 1748 | |
6a1f2d82 | 1749 | // clear uid |
1750 | if (uid_ptr) { | |
1751 | memset(uid_ptr,0,10); | |
1752 | } | |
79a73ab2 | 1753 | |
6a1f2d82 | 1754 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1755 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1756 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1757 | for(; sak & 0x04; cascade_level++) { | |
1758 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1759 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1760 | ||
1761 | // SELECT_ALL | |
1762 | ReaderTransmit(sel_all, sizeof(sel_all), NULL); | |
1763 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1764 | ||
1765 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit | |
1766 | memset(uid_resp, 0, 4); | |
1767 | uint16_t uid_resp_bits = 0; | |
1768 | uint16_t collision_answer_offset = 0; | |
1769 | // anti-collision-loop: | |
1770 | while (Demod.collisionPos) { | |
1771 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1772 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1773 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
1774 | uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8); | |
1775 | } | |
1776 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1777 | uid_resp_bits++; | |
1778 | // construct anticollosion command: | |
1779 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1780 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1781 | sel_uid[2+i] = uid_resp[i]; | |
1782 | } | |
1783 | collision_answer_offset = uid_resp_bits%8; | |
1784 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
1785 | if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0; | |
e691fc45 | 1786 | } |
6a1f2d82 | 1787 | // finally, add the last bits and BCC of the UID |
1788 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1789 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1790 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
e691fc45 | 1791 | } |
e691fc45 | 1792 | |
6a1f2d82 | 1793 | } else { // no collision, use the response to SELECT_ALL as current uid |
1794 | memcpy(uid_resp, resp, 4); | |
1795 | } | |
1796 | uid_resp_len = 4; | |
1797 | //Dbprintf("uid: %02x %02x %02x %02x",uid_resp[0],uid_resp[1],uid_resp[2],uid_resp[3]); | |
5f6d6c90 | 1798 | |
6a1f2d82 | 1799 | // calculate crypto UID. Always use last 4 Bytes. |
1800 | if(cuid_ptr) { | |
1801 | *cuid_ptr = bytes_to_num(uid_resp, 4); | |
1802 | } | |
e30c654b | 1803 | |
6a1f2d82 | 1804 | // Construct SELECT UID command |
1805 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) | |
1806 | memcpy(sel_uid+2, uid_resp, 4); // the UID | |
1807 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC | |
1808 | AppendCrc14443a(sel_uid, 7); // calculate and add CRC | |
1809 | ReaderTransmit(sel_uid, sizeof(sel_uid), NULL); | |
1810 | ||
1811 | // Receive the SAK | |
1812 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1813 | sak = resp[0]; | |
1814 | ||
1815 | // Test if more parts of the uid are comming | |
1816 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { | |
1817 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: | |
1818 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
1819 | // This was earlier: | |
1820 | //memcpy(uid_resp, uid_resp + 1, 3); | |
1821 | // But memcpy should not be used for overlapping arrays, | |
1822 | // and memmove appears to not be available in the arm build. | |
1823 | // Therefore: | |
1824 | uid_resp[0] = uid_resp[1]; | |
1825 | uid_resp[1] = uid_resp[2]; | |
1826 | uid_resp[2] = uid_resp[3]; | |
1827 | ||
1828 | uid_resp_len = 3; | |
1829 | } | |
5f6d6c90 | 1830 | |
6a1f2d82 | 1831 | if(uid_ptr) { |
1832 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); | |
1833 | } | |
5f6d6c90 | 1834 | |
6a1f2d82 | 1835 | if(p_hi14a_card) { |
1836 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
1837 | p_hi14a_card->uidlen += uid_resp_len; | |
1838 | } | |
1839 | } | |
79a73ab2 | 1840 | |
6a1f2d82 | 1841 | if(p_hi14a_card) { |
1842 | p_hi14a_card->sak = sak; | |
1843 | p_hi14a_card->ats_len = 0; | |
1844 | } | |
534983d7 | 1845 | |
6a1f2d82 | 1846 | if( (sak & 0x20) == 0) { |
1847 | return 2; // non iso14443a compliant tag | |
1848 | } | |
534983d7 | 1849 | |
6a1f2d82 | 1850 | // Request for answer to select |
1851 | AppendCrc14443a(rats, 2); | |
1852 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 1853 | |
6a1f2d82 | 1854 | if (!(len = ReaderReceive(resp, resp_par))) return 0; |
5191b3d1 | 1855 | |
6a1f2d82 | 1856 | if(p_hi14a_card) { |
1857 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
1858 | p_hi14a_card->ats_len = len; | |
1859 | } | |
5f6d6c90 | 1860 | |
6a1f2d82 | 1861 | // reset the PCB block number |
1862 | iso14_pcb_blocknum = 0; | |
1863 | ||
1864 | return 1; | |
7e758047 | 1865 | } |
15c4dc5a | 1866 | |
7bc95e2e | 1867 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 1868 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 1869 | // Set up the synchronous serial port |
1870 | FpgaSetupSsc(); | |
7bc95e2e | 1871 | // connect Demodulated Signal to ADC: |
7e758047 | 1872 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
e30c654b | 1873 | |
7e758047 | 1874 | // Signal field is on with the appropriate LED |
7bc95e2e | 1875 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD |
1876 | || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) { | |
1877 | LED_D_ON(); | |
1878 | } else { | |
1879 | LED_D_OFF(); | |
1880 | } | |
1881 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
534983d7 | 1882 | |
7bc95e2e | 1883 | // Start the timer |
1884 | StartCountSspClk(); | |
1885 | ||
1886 | DemodReset(); | |
1887 | UartReset(); | |
1888 | NextTransferTime = 2*DELAY_ARM2AIR_AS_READER; | |
1889 | iso14a_set_timeout(1050); // 10ms default | |
7e758047 | 1890 | } |
15c4dc5a | 1891 | |
6a1f2d82 | 1892 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
1893 | uint8_t parity[MAX_PARITY_SIZE]; | |
534983d7 | 1894 | uint8_t real_cmd[cmd_len+4]; |
1895 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 1896 | // put block number into the PCB |
1897 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 1898 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
1899 | memcpy(real_cmd+2, cmd, cmd_len); | |
1900 | AppendCrc14443a(real_cmd,cmd_len+2); | |
1901 | ||
9492e0b0 | 1902 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
6a1f2d82 | 1903 | size_t len = ReaderReceive(data, parity); |
1904 | uint8_t *data_bytes = (uint8_t *) data; | |
b0127e65 | 1905 | if (!len) |
1906 | return 0; //DATA LINK ERROR | |
1907 | // if we received an I- or R(ACK)-Block with a block number equal to the | |
1908 | // current block number, toggle the current block number | |
1909 | else if (len >= 4 // PCB+CID+CRC = 4 bytes | |
1910 | && ((data_bytes[0] & 0xC0) == 0 // I-Block | |
1911 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
1912 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
1913 | { | |
1914 | iso14_pcb_blocknum ^= 1; | |
1915 | } | |
1916 | ||
534983d7 | 1917 | return len; |
1918 | } | |
1919 | ||
7e758047 | 1920 | //----------------------------------------------------------------------------- |
1921 | // Read an ISO 14443a tag. Send out commands and store answers. | |
1922 | // | |
1923 | //----------------------------------------------------------------------------- | |
7bc95e2e | 1924 | void ReaderIso14443a(UsbCommand *c) |
7e758047 | 1925 | { |
534983d7 | 1926 | iso14a_command_t param = c->arg[0]; |
7bc95e2e | 1927 | uint8_t *cmd = c->d.asBytes; |
534983d7 | 1928 | size_t len = c->arg[1]; |
5f6d6c90 | 1929 | size_t lenbits = c->arg[2]; |
9492e0b0 | 1930 | uint32_t arg0 = 0; |
1931 | byte_t buf[USB_CMD_DATA_SIZE]; | |
6a1f2d82 | 1932 | uint8_t par[MAX_PARITY_SIZE]; |
902cb3c0 | 1933 | |
5f6d6c90 | 1934 | if(param & ISO14A_CONNECT) { |
1935 | iso14a_clear_trace(); | |
1936 | } | |
e691fc45 | 1937 | |
7bc95e2e | 1938 | iso14a_set_tracing(TRUE); |
e30c654b | 1939 | |
79a73ab2 | 1940 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1941 | iso14a_set_trigger(TRUE); |
9492e0b0 | 1942 | } |
15c4dc5a | 1943 | |
534983d7 | 1944 | if(param & ISO14A_CONNECT) { |
7bc95e2e | 1945 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 1946 | if(!(param & ISO14A_NO_SELECT)) { |
1947 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
1948 | arg0 = iso14443a_select_card(NULL,card,NULL); | |
1949 | cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t)); | |
1950 | } | |
534983d7 | 1951 | } |
e30c654b | 1952 | |
534983d7 | 1953 | if(param & ISO14A_SET_TIMEOUT) { |
1954 | iso14a_timeout = c->arg[2]; | |
1955 | } | |
e30c654b | 1956 | |
534983d7 | 1957 | if(param & ISO14A_APDU) { |
902cb3c0 | 1958 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 1959 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1960 | } |
e30c654b | 1961 | |
534983d7 | 1962 | if(param & ISO14A_RAW) { |
1963 | if(param & ISO14A_APPEND_CRC) { | |
1964 | AppendCrc14443a(cmd,len); | |
1965 | len += 2; | |
c7324bef | 1966 | if (lenbits) lenbits += 16; |
15c4dc5a | 1967 | } |
5f6d6c90 | 1968 | if(lenbits>0) { |
6a1f2d82 | 1969 | GetParity(cmd, lenbits/8, par); |
1970 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); | |
5f6d6c90 | 1971 | } else { |
1972 | ReaderTransmit(cmd,len, NULL); | |
1973 | } | |
6a1f2d82 | 1974 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 1975 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1976 | } |
15c4dc5a | 1977 | |
79a73ab2 | 1978 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1979 | iso14a_set_trigger(FALSE); |
9492e0b0 | 1980 | } |
15c4dc5a | 1981 | |
79a73ab2 | 1982 | if(param & ISO14A_NO_DISCONNECT) { |
534983d7 | 1983 | return; |
9492e0b0 | 1984 | } |
15c4dc5a | 1985 | |
15c4dc5a | 1986 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
1987 | LEDsoff(); | |
15c4dc5a | 1988 | } |
b0127e65 | 1989 | |
1c611bbd | 1990 | |
1c611bbd | 1991 | // Determine the distance between two nonces. |
1992 | // Assume that the difference is small, but we don't know which is first. | |
1993 | // Therefore try in alternating directions. | |
1994 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
1995 | ||
1996 | uint16_t i; | |
1997 | uint32_t nttmp1, nttmp2; | |
e772353f | 1998 | |
1c611bbd | 1999 | if (nt1 == nt2) return 0; |
2000 | ||
2001 | nttmp1 = nt1; | |
2002 | nttmp2 = nt2; | |
2003 | ||
2004 | for (i = 1; i < 32768; i++) { | |
2005 | nttmp1 = prng_successor(nttmp1, 1); | |
2006 | if (nttmp1 == nt2) return i; | |
2007 | nttmp2 = prng_successor(nttmp2, 1); | |
2008 | if (nttmp2 == nt1) return -i; | |
2009 | } | |
2010 | ||
2011 | return(-99999); // either nt1 or nt2 are invalid nonces | |
e772353f | 2012 | } |
2013 | ||
e772353f | 2014 | |
1c611bbd | 2015 | //----------------------------------------------------------------------------- |
2016 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2017 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2018 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2019 | // (article by Nicolas T. Courtois, 2009) | |
2020 | //----------------------------------------------------------------------------- | |
2021 | void ReaderMifare(bool first_try) | |
2022 | { | |
2023 | // Mifare AUTH | |
2024 | uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b }; | |
2025 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; | |
2026 | static uint8_t mf_nr_ar3; | |
e772353f | 2027 | |
6a1f2d82 | 2028 | uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET); |
2029 | uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET); | |
7bc95e2e | 2030 | |
d2f487af | 2031 | iso14a_clear_trace(); |
7bc95e2e | 2032 | iso14a_set_tracing(TRUE); |
e772353f | 2033 | |
1c611bbd | 2034 | byte_t nt_diff = 0; |
6a1f2d82 | 2035 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
1c611bbd | 2036 | static byte_t par_low = 0; |
2037 | bool led_on = TRUE; | |
ca4714cd | 2038 | uint8_t uid[10] ={0}; |
1c611bbd | 2039 | uint32_t cuid; |
e772353f | 2040 | |
6a1f2d82 | 2041 | uint32_t nt = 0; |
2ed270a8 | 2042 | uint32_t previous_nt = 0; |
1c611bbd | 2043 | static uint32_t nt_attacked = 0; |
2044 | byte_t par_list[8] = {0,0,0,0,0,0,0,0}; | |
2045 | byte_t ks_list[8] = {0,0,0,0,0,0,0,0}; | |
e772353f | 2046 | |
1c611bbd | 2047 | static uint32_t sync_time; |
2048 | static uint32_t sync_cycles; | |
2049 | int catch_up_cycles = 0; | |
2050 | int last_catch_up = 0; | |
2051 | uint16_t consecutive_resyncs = 0; | |
2052 | int isOK = 0; | |
e772353f | 2053 | |
e772353f | 2054 | |
e772353f | 2055 | |
1c611bbd | 2056 | if (first_try) { |
1c611bbd | 2057 | mf_nr_ar3 = 0; |
7bc95e2e | 2058 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); |
2059 | sync_time = GetCountSspClk() & 0xfffffff8; | |
1c611bbd | 2060 | sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces). |
2061 | nt_attacked = 0; | |
2062 | nt = 0; | |
6a1f2d82 | 2063 | par[0] = 0; |
1c611bbd | 2064 | } |
2065 | else { | |
2066 | // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same) | |
1c611bbd | 2067 | mf_nr_ar3++; |
2068 | mf_nr_ar[3] = mf_nr_ar3; | |
6a1f2d82 | 2069 | par[0] = par_low; |
1c611bbd | 2070 | } |
e30c654b | 2071 | |
15c4dc5a | 2072 | LED_A_ON(); |
2073 | LED_B_OFF(); | |
2074 | LED_C_OFF(); | |
1c611bbd | 2075 | |
7bc95e2e | 2076 | |
1c611bbd | 2077 | for(uint16_t i = 0; TRUE; i++) { |
2078 | ||
2079 | WDT_HIT(); | |
e30c654b | 2080 | |
1c611bbd | 2081 | // Test if the action was cancelled |
2082 | if(BUTTON_PRESS()) { | |
2083 | break; | |
2084 | } | |
2085 | ||
2086 | LED_C_ON(); | |
e30c654b | 2087 | |
1c611bbd | 2088 | if(!iso14443a_select_card(uid, NULL, &cuid)) { |
9492e0b0 | 2089 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card"); |
1c611bbd | 2090 | continue; |
2091 | } | |
2092 | ||
9492e0b0 | 2093 | sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles; |
1c611bbd | 2094 | catch_up_cycles = 0; |
2095 | ||
2096 | // if we missed the sync time already, advance to the next nonce repeat | |
7bc95e2e | 2097 | while(GetCountSspClk() > sync_time) { |
9492e0b0 | 2098 | sync_time = (sync_time & 0xfffffff8) + sync_cycles; |
1c611bbd | 2099 | } |
e30c654b | 2100 | |
9492e0b0 | 2101 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) |
2102 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
f89c7050 | 2103 | |
1c611bbd | 2104 | // Receive the (4 Byte) "random" nonce |
6a1f2d82 | 2105 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2106 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce"); |
1c611bbd | 2107 | continue; |
2108 | } | |
2109 | ||
1c611bbd | 2110 | previous_nt = nt; |
2111 | nt = bytes_to_num(receivedAnswer, 4); | |
2112 | ||
2113 | // Transmit reader nonce with fake par | |
9492e0b0 | 2114 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); |
1c611bbd | 2115 | |
2116 | if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet | |
2117 | int nt_distance = dist_nt(previous_nt, nt); | |
2118 | if (nt_distance == 0) { | |
2119 | nt_attacked = nt; | |
2120 | } | |
2121 | else { | |
2122 | if (nt_distance == -99999) { // invalid nonce received, try again | |
2123 | continue; | |
2124 | } | |
2125 | sync_cycles = (sync_cycles - nt_distance); | |
9492e0b0 | 2126 | if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles); |
1c611bbd | 2127 | continue; |
2128 | } | |
2129 | } | |
2130 | ||
2131 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
2132 | catch_up_cycles = -dist_nt(nt_attacked, nt); | |
2133 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. | |
2134 | catch_up_cycles = 0; | |
2135 | continue; | |
2136 | } | |
2137 | if (catch_up_cycles == last_catch_up) { | |
2138 | consecutive_resyncs++; | |
2139 | } | |
2140 | else { | |
2141 | last_catch_up = catch_up_cycles; | |
2142 | consecutive_resyncs = 0; | |
2143 | } | |
2144 | if (consecutive_resyncs < 3) { | |
9492e0b0 | 2145 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs); |
1c611bbd | 2146 | } |
2147 | else { | |
2148 | sync_cycles = sync_cycles + catch_up_cycles; | |
9492e0b0 | 2149 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles); |
1c611bbd | 2150 | } |
2151 | continue; | |
2152 | } | |
2153 | ||
2154 | consecutive_resyncs = 0; | |
2155 | ||
2156 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding | |
6a1f2d82 | 2157 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) |
1c611bbd | 2158 | { |
9492e0b0 | 2159 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2160 | |
2161 | if (nt_diff == 0) | |
2162 | { | |
6a1f2d82 | 2163 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2164 | } |
2165 | ||
2166 | led_on = !led_on; | |
2167 | if(led_on) LED_B_ON(); else LED_B_OFF(); | |
2168 | ||
6a1f2d82 | 2169 | par_list[nt_diff] = SwapBits(par[0], 8); |
1c611bbd | 2170 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; |
2171 | ||
2172 | // Test if the information is complete | |
2173 | if (nt_diff == 0x07) { | |
2174 | isOK = 1; | |
2175 | break; | |
2176 | } | |
2177 | ||
2178 | nt_diff = (nt_diff + 1) & 0x07; | |
2179 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
6a1f2d82 | 2180 | par[0] = par_low; |
1c611bbd | 2181 | } else { |
2182 | if (nt_diff == 0 && first_try) | |
2183 | { | |
6a1f2d82 | 2184 | par[0]++; |
1c611bbd | 2185 | } else { |
6a1f2d82 | 2186 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2187 | } |
2188 | } | |
2189 | } | |
2190 | ||
1c611bbd | 2191 | |
2192 | mf_nr_ar[3] &= 0x1F; | |
2193 | ||
2194 | byte_t buf[28]; | |
2195 | memcpy(buf + 0, uid, 4); | |
2196 | num_to_bytes(nt, 4, buf + 4); | |
2197 | memcpy(buf + 8, par_list, 8); | |
2198 | memcpy(buf + 16, ks_list, 8); | |
2199 | memcpy(buf + 24, mf_nr_ar, 4); | |
2200 | ||
2201 | cmd_send(CMD_ACK,isOK,0,0,buf,28); | |
2202 | ||
2203 | // Thats it... | |
2204 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2205 | LEDsoff(); | |
7bc95e2e | 2206 | |
2207 | iso14a_set_tracing(FALSE); | |
20f9a2a1 | 2208 | } |
1c611bbd | 2209 | |
d2f487af | 2210 | /** |
2211 | *MIFARE 1K simulate. | |
2212 | * | |
2213 | *@param flags : | |
2214 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK | |
2215 | * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that | |
2216 | * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that | |
2217 | * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later | |
2218 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite | |
2219 | */ | |
2220 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) | |
20f9a2a1 | 2221 | { |
50193c1e | 2222 | int cardSTATE = MFEMUL_NOFIELD; |
8556b852 | 2223 | int _7BUID = 0; |
9ca155ba | 2224 | int vHf = 0; // in mV |
8f51ddb0 | 2225 | int res; |
0a39986e M |
2226 | uint32_t selTimer = 0; |
2227 | uint32_t authTimer = 0; | |
6a1f2d82 | 2228 | uint16_t len = 0; |
8f51ddb0 | 2229 | uint8_t cardWRBL = 0; |
9ca155ba M |
2230 | uint8_t cardAUTHSC = 0; |
2231 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
51969283 | 2232 | uint32_t cardRr = 0; |
9ca155ba | 2233 | uint32_t cuid = 0; |
d2f487af | 2234 | //uint32_t rn_enc = 0; |
51969283 | 2235 | uint32_t ans = 0; |
0014cb46 M |
2236 | uint32_t cardINTREG = 0; |
2237 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2238 | struct Crypto1State mpcs = {0, 0}; |
2239 | struct Crypto1State *pcs; | |
2240 | pcs = &mpcs; | |
d2f487af | 2241 | uint32_t numReads = 0;//Counts numer of times reader read a block |
6a1f2d82 | 2242 | uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf(); |
2243 | uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE; | |
2244 | uint8_t* response = get_bigbufptr_recvrespbuf(); | |
2245 | uint8_t* response_par = response + MAX_FRAME_SIZE; | |
9ca155ba | 2246 | |
d2f487af | 2247 | uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID |
2248 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2249 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!! | |
2250 | uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; | |
2251 | uint8_t rSAK1[] = {0x04, 0xda, 0x17}; | |
9ca155ba | 2252 | |
d2f487af | 2253 | uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04}; |
2254 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; | |
7bc95e2e | 2255 | |
d2f487af | 2256 | //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2 |
2257 | // This can be used in a reader-only attack. | |
2258 | // (it can also be retrieved via 'hf 14a list', but hey... | |
2259 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0}; | |
2260 | uint8_t ar_nr_collected = 0; | |
0014cb46 | 2261 | |
0a39986e | 2262 | // clear trace |
7bc95e2e | 2263 | iso14a_clear_trace(); |
2264 | iso14a_set_tracing(TRUE); | |
51969283 | 2265 | |
7bc95e2e | 2266 | // Authenticate response - nonce |
51969283 | 2267 | uint32_t nonce = bytes_to_num(rAUTH_NT, 4); |
7bc95e2e | 2268 | |
d2f487af | 2269 | //-- Determine the UID |
2270 | // Can be set from emulator memory, incoming data | |
2271 | // and can be 7 or 4 bytes long | |
7bc95e2e | 2272 | if (flags & FLAG_4B_UID_IN_DATA) |
d2f487af | 2273 | { |
2274 | // 4B uid comes from data-portion of packet | |
2275 | memcpy(rUIDBCC1,datain,4); | |
8556b852 | 2276 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
8556b852 | 2277 | |
7bc95e2e | 2278 | } else if (flags & FLAG_7B_UID_IN_DATA) { |
d2f487af | 2279 | // 7B uid comes from data-portion of packet |
2280 | memcpy(&rUIDBCC1[1],datain,3); | |
2281 | memcpy(rUIDBCC2, datain+3, 4); | |
2282 | _7BUID = true; | |
7bc95e2e | 2283 | } else { |
d2f487af | 2284 | // get UID from emul memory |
2285 | emlGetMemBt(receivedCmd, 7, 1); | |
2286 | _7BUID = !(receivedCmd[0] == 0x00); | |
2287 | if (!_7BUID) { // ---------- 4BUID | |
2288 | emlGetMemBt(rUIDBCC1, 0, 4); | |
2289 | } else { // ---------- 7BUID | |
2290 | emlGetMemBt(&rUIDBCC1[1], 0, 3); | |
2291 | emlGetMemBt(rUIDBCC2, 3, 4); | |
2292 | } | |
2293 | } | |
7bc95e2e | 2294 | |
d2f487af | 2295 | /* |
2296 | * Regardless of what method was used to set the UID, set fifth byte and modify | |
2297 | * the ATQA for 4 or 7-byte UID | |
2298 | */ | |
d2f487af | 2299 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
7bc95e2e | 2300 | if (_7BUID) { |
d2f487af | 2301 | rATQA[0] = 0x44; |
8556b852 | 2302 | rUIDBCC1[0] = 0x88; |
8556b852 M |
2303 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; |
2304 | } | |
2305 | ||
9ca155ba | 2306 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 2307 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
9ca155ba | 2308 | |
9ca155ba | 2309 | |
d2f487af | 2310 | if (MF_DBGLEVEL >= 1) { |
2311 | if (!_7BUID) { | |
b03c0f2d | 2312 | Dbprintf("4B UID: %02x%02x%02x%02x", |
2313 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]); | |
7bc95e2e | 2314 | } else { |
b03c0f2d | 2315 | Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x", |
2316 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3], | |
2317 | rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]); | |
d2f487af | 2318 | } |
2319 | } | |
7bc95e2e | 2320 | |
2321 | bool finished = FALSE; | |
d2f487af | 2322 | while (!BUTTON_PRESS() && !finished) { |
9ca155ba | 2323 | WDT_HIT(); |
9ca155ba M |
2324 | |
2325 | // find reader field | |
2326 | // Vref = 3300mV, and an 10:1 voltage divider on the input | |
2327 | // can measure voltages up to 33000 mV | |
2328 | if (cardSTATE == MFEMUL_NOFIELD) { | |
2329 | vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10; | |
2330 | if (vHf > MF_MINFIELDV) { | |
0014cb46 | 2331 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2332 | LED_A_ON(); |
2333 | } | |
2334 | } | |
d2f487af | 2335 | if(cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2336 | |
d2f487af | 2337 | //Now, get data |
2338 | ||
6a1f2d82 | 2339 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2340 | if (res == 2) { //Field is off! |
2341 | cardSTATE = MFEMUL_NOFIELD; | |
2342 | LEDsoff(); | |
2343 | continue; | |
7bc95e2e | 2344 | } else if (res == 1) { |
2345 | break; //return value 1 means button press | |
2346 | } | |
2347 | ||
d2f487af | 2348 | // REQ or WUP request in ANY state and WUP in HALTED state |
2349 | if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) { | |
2350 | selTimer = GetTickCount(); | |
2351 | EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52)); | |
2352 | cardSTATE = MFEMUL_SELECT1; | |
2353 | ||
2354 | // init crypto block | |
2355 | LED_B_OFF(); | |
2356 | LED_C_OFF(); | |
2357 | crypto1_destroy(pcs); | |
2358 | cardAUTHKEY = 0xff; | |
2359 | continue; | |
0a39986e | 2360 | } |
7bc95e2e | 2361 | |
50193c1e | 2362 | switch (cardSTATE) { |
d2f487af | 2363 | case MFEMUL_NOFIELD: |
2364 | case MFEMUL_HALTED: | |
50193c1e | 2365 | case MFEMUL_IDLE:{ |
6a1f2d82 | 2366 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
50193c1e M |
2367 | break; |
2368 | } | |
2369 | case MFEMUL_SELECT1:{ | |
9ca155ba M |
2370 | // select all |
2371 | if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) { | |
d2f487af | 2372 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2373 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2374 | break; |
9ca155ba M |
2375 | } |
2376 | ||
d2f487af | 2377 | if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 ) |
2378 | { | |
2379 | Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]); | |
2380 | } | |
9ca155ba | 2381 | // select card |
0a39986e M |
2382 | if (len == 9 && |
2383 | (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
bfb6a143 | 2384 | EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK)); |
9ca155ba | 2385 | cuid = bytes_to_num(rUIDBCC1, 4); |
8556b852 M |
2386 | if (!_7BUID) { |
2387 | cardSTATE = MFEMUL_WORK; | |
0014cb46 M |
2388 | LED_B_ON(); |
2389 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
2390 | break; | |
8556b852 M |
2391 | } else { |
2392 | cardSTATE = MFEMUL_SELECT2; | |
8556b852 | 2393 | } |
9ca155ba | 2394 | } |
50193c1e M |
2395 | break; |
2396 | } | |
d2f487af | 2397 | case MFEMUL_AUTH1:{ |
2398 | if( len != 8) | |
2399 | { | |
2400 | cardSTATE_TO_IDLE(); | |
6a1f2d82 | 2401 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2402 | break; |
2403 | } | |
2404 | uint32_t ar = bytes_to_num(receivedCmd, 4); | |
6a1f2d82 | 2405 | uint32_t nr = bytes_to_num(&receivedCmd[4], 4); |
d2f487af | 2406 | |
2407 | //Collect AR/NR | |
2408 | if(ar_nr_collected < 2){ | |
273b57a7 | 2409 | if(ar_nr_responses[2] != ar) |
2410 | {// Avoid duplicates... probably not necessary, ar should vary. | |
d2f487af | 2411 | ar_nr_responses[ar_nr_collected*4] = cuid; |
2412 | ar_nr_responses[ar_nr_collected*4+1] = nonce; | |
2413 | ar_nr_responses[ar_nr_collected*4+2] = ar; | |
2414 | ar_nr_responses[ar_nr_collected*4+3] = nr; | |
273b57a7 | 2415 | ar_nr_collected++; |
d2f487af | 2416 | } |
2417 | } | |
2418 | ||
2419 | // --- crypto | |
2420 | crypto1_word(pcs, ar , 1); | |
2421 | cardRr = nr ^ crypto1_word(pcs, 0, 0); | |
2422 | ||
2423 | // test if auth OK | |
2424 | if (cardRr != prng_successor(nonce, 64)){ | |
b03c0f2d | 2425 | if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", |
2426 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2427 | cardRr, prng_successor(nonce, 64)); | |
7bc95e2e | 2428 | // Shouldn't we respond anything here? |
d2f487af | 2429 | // Right now, we don't nack or anything, which causes the |
2430 | // reader to do a WUPA after a while. /Martin | |
b03c0f2d | 2431 | // -- which is the correct response. /piwi |
d2f487af | 2432 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2433 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2434 | break; |
2435 | } | |
2436 | ||
2437 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); | |
2438 | ||
2439 | num_to_bytes(ans, 4, rAUTH_AT); | |
2440 | // --- crypto | |
2441 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2442 | LED_C_ON(); | |
2443 | cardSTATE = MFEMUL_WORK; | |
b03c0f2d | 2444 | if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", |
2445 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2446 | GetTickCount() - authTimer); | |
d2f487af | 2447 | break; |
2448 | } | |
50193c1e | 2449 | case MFEMUL_SELECT2:{ |
7bc95e2e | 2450 | if (!len) { |
6a1f2d82 | 2451 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2452 | break; |
2453 | } | |
8556b852 | 2454 | if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) { |
9ca155ba | 2455 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); |
8556b852 M |
2456 | break; |
2457 | } | |
9ca155ba | 2458 | |
8556b852 M |
2459 | // select 2 card |
2460 | if (len == 9 && | |
2461 | (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) { | |
2462 | EmSendCmd(rSAK, sizeof(rSAK)); | |
8556b852 M |
2463 | cuid = bytes_to_num(rUIDBCC2, 4); |
2464 | cardSTATE = MFEMUL_WORK; | |
2465 | LED_B_ON(); | |
0014cb46 | 2466 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); |
8556b852 M |
2467 | break; |
2468 | } | |
0014cb46 M |
2469 | |
2470 | // i guess there is a command). go into the work state. | |
7bc95e2e | 2471 | if (len != 4) { |
6a1f2d82 | 2472 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2473 | break; |
2474 | } | |
0014cb46 | 2475 | cardSTATE = MFEMUL_WORK; |
d2f487af | 2476 | //goto lbWORK; |
2477 | //intentional fall-through to the next case-stmt | |
50193c1e | 2478 | } |
51969283 | 2479 | |
7bc95e2e | 2480 | case MFEMUL_WORK:{ |
2481 | if (len == 0) { | |
6a1f2d82 | 2482 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2483 | break; |
2484 | } | |
2485 | ||
d2f487af | 2486 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2487 | ||
7bc95e2e | 2488 | if(encrypted_data) { |
51969283 M |
2489 | // decrypt seqence |
2490 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
d2f487af | 2491 | } |
7bc95e2e | 2492 | |
d2f487af | 2493 | if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) { |
2494 | authTimer = GetTickCount(); | |
2495 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
2496 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
2497 | crypto1_destroy(pcs);//Added by martin | |
2498 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); | |
51969283 | 2499 | |
d2f487af | 2500 | if (!encrypted_data) { // first authentication |
b03c0f2d | 2501 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
51969283 | 2502 | |
d2f487af | 2503 | crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state |
2504 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce | |
7bc95e2e | 2505 | } else { // nested authentication |
b03c0f2d | 2506 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
7bc95e2e | 2507 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2508 | num_to_bytes(ans, 4, rAUTH_AT); |
2509 | } | |
2510 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2511 | //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]); | |
2512 | cardSTATE = MFEMUL_AUTH1; | |
2513 | break; | |
51969283 | 2514 | } |
7bc95e2e | 2515 | |
8f51ddb0 M |
2516 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2517 | // BUT... ACK --> NACK | |
2518 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2519 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2520 | break; | |
2521 | } | |
2522 | ||
2523 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2524 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2525 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2526 | break; | |
0a39986e M |
2527 | } |
2528 | ||
7bc95e2e | 2529 | if(len != 4) { |
6a1f2d82 | 2530 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2531 | break; |
2532 | } | |
d2f487af | 2533 | |
2534 | if(receivedCmd[0] == 0x30 // read block | |
2535 | || receivedCmd[0] == 0xA0 // write block | |
b03c0f2d | 2536 | || receivedCmd[0] == 0xC0 // inc |
2537 | || receivedCmd[0] == 0xC1 // dec | |
2538 | || receivedCmd[0] == 0xC2 // restore | |
7bc95e2e | 2539 | || receivedCmd[0] == 0xB0) { // transfer |
2540 | if (receivedCmd[1] >= 16 * 4) { | |
d2f487af | 2541 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2542 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); | |
2543 | break; | |
2544 | } | |
2545 | ||
7bc95e2e | 2546 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2547 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
d2f487af | 2548 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2549 | break; |
2550 | } | |
d2f487af | 2551 | } |
2552 | // read block | |
2553 | if (receivedCmd[0] == 0x30) { | |
b03c0f2d | 2554 | if (MF_DBGLEVEL >= 4) { |
d2f487af | 2555 | Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]); |
2556 | } | |
8f51ddb0 M |
2557 | emlGetMem(response, receivedCmd[1], 1); |
2558 | AppendCrc14443a(response, 16); | |
6a1f2d82 | 2559 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2560 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2561 | numReads++; |
7bc95e2e | 2562 | if(exitAfterNReads > 0 && numReads == exitAfterNReads) { |
d2f487af | 2563 | Dbprintf("%d reads done, exiting", numReads); |
2564 | finished = true; | |
2565 | } | |
0a39986e M |
2566 | break; |
2567 | } | |
0a39986e | 2568 | // write block |
d2f487af | 2569 | if (receivedCmd[0] == 0xA0) { |
b03c0f2d | 2570 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]); |
8f51ddb0 | 2571 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2572 | cardSTATE = MFEMUL_WRITEBL2; |
2573 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2574 | break; |
7bc95e2e | 2575 | } |
0014cb46 | 2576 | // increment, decrement, restore |
d2f487af | 2577 | if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) { |
b03c0f2d | 2578 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2579 | if (emlCheckValBl(receivedCmd[1])) { |
2580 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); | |
0014cb46 M |
2581 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2582 | break; | |
2583 | } | |
2584 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2585 | if (receivedCmd[0] == 0xC1) | |
2586 | cardSTATE = MFEMUL_INTREG_INC; | |
2587 | if (receivedCmd[0] == 0xC0) | |
2588 | cardSTATE = MFEMUL_INTREG_DEC; | |
2589 | if (receivedCmd[0] == 0xC2) | |
2590 | cardSTATE = MFEMUL_INTREG_REST; | |
2591 | cardWRBL = receivedCmd[1]; | |
0014cb46 M |
2592 | break; |
2593 | } | |
0014cb46 | 2594 | // transfer |
d2f487af | 2595 | if (receivedCmd[0] == 0xB0) { |
b03c0f2d | 2596 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
0014cb46 M |
2597 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2598 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2599 | else | |
2600 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2601 | break; |
2602 | } | |
9ca155ba | 2603 | // halt |
d2f487af | 2604 | if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) { |
9ca155ba | 2605 | LED_B_OFF(); |
0a39986e | 2606 | LED_C_OFF(); |
0014cb46 M |
2607 | cardSTATE = MFEMUL_HALTED; |
2608 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
6a1f2d82 | 2609 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0a39986e | 2610 | break; |
9ca155ba | 2611 | } |
d2f487af | 2612 | // RATS |
2613 | if (receivedCmd[0] == 0xe0) {//RATS | |
8f51ddb0 M |
2614 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2615 | break; | |
2616 | } | |
d2f487af | 2617 | // command not allowed |
2618 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2619 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2620 | break; |
8f51ddb0 M |
2621 | } |
2622 | case MFEMUL_WRITEBL2:{ | |
2623 | if (len == 18){ | |
2624 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2625 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2626 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2627 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2628 | } else { |
0014cb46 | 2629 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2630 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
8f51ddb0 | 2631 | } |
8f51ddb0 | 2632 | break; |
50193c1e | 2633 | } |
0014cb46 M |
2634 | |
2635 | case MFEMUL_INTREG_INC:{ | |
2636 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2637 | memcpy(&ans, receivedCmd, 4); | |
2638 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2639 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2640 | cardSTATE_TO_IDLE(); | |
2641 | break; | |
7bc95e2e | 2642 | } |
6a1f2d82 | 2643 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2644 | cardINTREG = cardINTREG + ans; |
2645 | cardSTATE = MFEMUL_WORK; | |
2646 | break; | |
2647 | } | |
2648 | case MFEMUL_INTREG_DEC:{ | |
2649 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2650 | memcpy(&ans, receivedCmd, 4); | |
2651 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2652 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2653 | cardSTATE_TO_IDLE(); | |
2654 | break; | |
2655 | } | |
6a1f2d82 | 2656 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2657 | cardINTREG = cardINTREG - ans; |
2658 | cardSTATE = MFEMUL_WORK; | |
2659 | break; | |
2660 | } | |
2661 | case MFEMUL_INTREG_REST:{ | |
2662 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2663 | memcpy(&ans, receivedCmd, 4); | |
2664 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2665 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2666 | cardSTATE_TO_IDLE(); | |
2667 | break; | |
2668 | } | |
6a1f2d82 | 2669 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2670 | cardSTATE = MFEMUL_WORK; |
2671 | break; | |
2672 | } | |
50193c1e | 2673 | } |
50193c1e M |
2674 | } |
2675 | ||
9ca155ba M |
2676 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2677 | LEDsoff(); | |
2678 | ||
d2f487af | 2679 | if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK |
2680 | { | |
2681 | //May just aswell send the collected ar_nr in the response aswell | |
2682 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4); | |
2683 | } | |
d714d3ef | 2684 | |
d2f487af | 2685 | if(flags & FLAG_NR_AR_ATTACK) |
2686 | { | |
7bc95e2e | 2687 | if(ar_nr_collected > 1) { |
d2f487af | 2688 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); |
d714d3ef | 2689 | Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x", |
d2f487af | 2690 | ar_nr_responses[0], // UID |
2691 | ar_nr_responses[1], //NT | |
2692 | ar_nr_responses[2], //AR1 | |
2693 | ar_nr_responses[3], //NR1 | |
2694 | ar_nr_responses[6], //AR2 | |
2695 | ar_nr_responses[7] //NR2 | |
2696 | ); | |
7bc95e2e | 2697 | } else { |
d2f487af | 2698 | Dbprintf("Failed to obtain two AR/NR pairs!"); |
7bc95e2e | 2699 | if(ar_nr_collected >0) { |
d714d3ef | 2700 | Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x", |
d2f487af | 2701 | ar_nr_responses[0], // UID |
2702 | ar_nr_responses[1], //NT | |
2703 | ar_nr_responses[2], //AR1 | |
2704 | ar_nr_responses[3] //NR1 | |
2705 | ); | |
2706 | } | |
2707 | } | |
2708 | } | |
0014cb46 | 2709 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen); |
15c4dc5a | 2710 | } |
b62a5a84 | 2711 | |
d2f487af | 2712 | |
2713 | ||
b62a5a84 M |
2714 | //----------------------------------------------------------------------------- |
2715 | // MIFARE sniffer. | |
2716 | // | |
2717 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
2718 | void RAMFUNC SniffMifare(uint8_t param) { |
2719 | // param: | |
2720 | // bit 0 - trigger from first card answer | |
2721 | // bit 1 - trigger from first reader 7-bit request | |
39864b0b M |
2722 | |
2723 | // C(red) A(yellow) B(green) | |
b62a5a84 M |
2724 | LEDsoff(); |
2725 | // init trace buffer | |
991f13f2 | 2726 | iso14a_clear_trace(); |
2727 | iso14a_set_tracing(TRUE); | |
b62a5a84 | 2728 | |
b62a5a84 M |
2729 | // The command (reader -> tag) that we're receiving. |
2730 | // The length of a received command will in most cases be no more than 18 bytes. | |
2731 | // So 32 should be enough! | |
2732 | uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET); | |
6a1f2d82 | 2733 | uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET; |
b62a5a84 | 2734 | // The response (tag -> reader) that we're receiving. |
6a1f2d82 | 2735 | uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET); |
2736 | uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET; | |
b62a5a84 M |
2737 | |
2738 | // As we receive stuff, we copy it from receivedCmd or receivedResponse | |
2739 | // into trace, along with its length and other annotations. | |
2740 | //uint8_t *trace = (uint8_t *)BigBuf; | |
2741 | ||
2742 | // The DMA buffer, used to stream samples from the FPGA | |
7bc95e2e | 2743 | uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET; |
2744 | uint8_t *data = dmaBuf; | |
2745 | uint8_t previous_data = 0; | |
5cd9ec01 M |
2746 | int maxDataLen = 0; |
2747 | int dataLen = 0; | |
7bc95e2e | 2748 | bool ReaderIsActive = FALSE; |
2749 | bool TagIsActive = FALSE; | |
2750 | ||
2751 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
b62a5a84 M |
2752 | |
2753 | // Set up the demodulator for tag -> reader responses. | |
6a1f2d82 | 2754 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
2755 | |
2756 | // Set up the demodulator for the reader -> tag commands | |
6a1f2d82 | 2757 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 M |
2758 | |
2759 | // Setup for the DMA. | |
7bc95e2e | 2760 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
b62a5a84 | 2761 | |
b62a5a84 | 2762 | LED_D_OFF(); |
39864b0b M |
2763 | |
2764 | // init sniffer | |
2765 | MfSniffInit(); | |
b62a5a84 | 2766 | |
b62a5a84 | 2767 | // And now we loop, receiving samples. |
7bc95e2e | 2768 | for(uint32_t sniffCounter = 0; TRUE; ) { |
2769 | ||
5cd9ec01 M |
2770 | if(BUTTON_PRESS()) { |
2771 | DbpString("cancelled by button"); | |
7bc95e2e | 2772 | break; |
5cd9ec01 M |
2773 | } |
2774 | ||
b62a5a84 M |
2775 | LED_A_ON(); |
2776 | WDT_HIT(); | |
39864b0b | 2777 | |
7bc95e2e | 2778 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
2779 | // check if a transaction is completed (timeout after 2000ms). | |
2780 | // if yes, stop the DMA transfer and send what we have so far to the client | |
2781 | if (MfSniffSend(2000)) { | |
2782 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
2783 | sniffCounter = 0; | |
2784 | data = dmaBuf; | |
2785 | maxDataLen = 0; | |
2786 | ReaderIsActive = FALSE; | |
2787 | TagIsActive = FALSE; | |
2788 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. | |
39864b0b | 2789 | } |
39864b0b | 2790 | } |
7bc95e2e | 2791 | |
2792 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
2793 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
2794 | if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred | |
2795 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed | |
2796 | } else { | |
2797 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed | |
5cd9ec01 M |
2798 | } |
2799 | // test for length of buffer | |
7bc95e2e | 2800 | if(dataLen > maxDataLen) { // we are more behind than ever... |
2801 | maxDataLen = dataLen; | |
5cd9ec01 M |
2802 | if(dataLen > 400) { |
2803 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); | |
7bc95e2e | 2804 | break; |
b62a5a84 M |
2805 | } |
2806 | } | |
5cd9ec01 | 2807 | if(dataLen < 1) continue; |
b62a5a84 | 2808 | |
7bc95e2e | 2809 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
2810 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
2811 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
2812 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
55acbb2a | 2813 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
2814 | } |
2815 | // secondary buffer sets as primary, secondary buffer was stopped | |
2816 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
2817 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
2818 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
2819 | } | |
5cd9ec01 M |
2820 | |
2821 | LED_A_OFF(); | |
b62a5a84 | 2822 | |
7bc95e2e | 2823 | if (sniffCounter & 0x01) { |
b62a5a84 | 2824 | |
7bc95e2e | 2825 | if(!TagIsActive) { // no need to try decoding tag data if the reader is sending |
2826 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
2827 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
2828 | LED_C_INV(); | |
6a1f2d82 | 2829 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break; |
b62a5a84 | 2830 | |
7bc95e2e | 2831 | /* And ready to receive another command. */ |
2832 | UartReset(); | |
2833 | ||
2834 | /* And also reset the demod code */ | |
2835 | DemodReset(); | |
2836 | } | |
2837 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
2838 | } | |
2839 | ||
2840 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending | |
2841 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
2842 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
2843 | LED_C_INV(); | |
b62a5a84 | 2844 | |
6a1f2d82 | 2845 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break; |
39864b0b | 2846 | |
7bc95e2e | 2847 | // And ready to receive another response. |
2848 | DemodReset(); | |
2849 | } | |
2850 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
2851 | } | |
b62a5a84 M |
2852 | } |
2853 | ||
7bc95e2e | 2854 | previous_data = *data; |
2855 | sniffCounter++; | |
5cd9ec01 | 2856 | data++; |
d714d3ef | 2857 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 | 2858 | data = dmaBuf; |
b62a5a84 | 2859 | } |
7bc95e2e | 2860 | |
b62a5a84 M |
2861 | } // main cycle |
2862 | ||
2863 | DbpString("COMMAND FINISHED"); | |
2864 | ||
55acbb2a | 2865 | FpgaDisableSscDma(); |
39864b0b M |
2866 | MfSniffEnd(); |
2867 | ||
7bc95e2e | 2868 | Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); |
b62a5a84 | 2869 | LEDsoff(); |
3803d529 | 2870 | } |