]>
Commit | Line | Data |
---|---|---|
a126332a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
534983d7 | 12 | #include "iso14443a.h" |
f8ada309 | 13 | |
534983d7 | 14 | static uint32_t iso14a_timeout; |
1e262141 | 15 | int rsamples = 0; |
1e262141 | 16 | uint8_t trigger = 0; |
b0127e65 | 17 | // the block number for the ISO14443-4 PCB |
18 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 19 | |
0194ce8f | 20 | static uint8_t* free_buffer_pointer; |
21 | ||
7bc95e2e | 22 | // |
23 | // ISO14443 timing: | |
24 | // | |
25 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
26 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
27 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
28 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
29 | // bool LastCommandWasRequest = FALSE; | |
30 | ||
31 | // | |
32 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
33 | // | |
d714d3ef | 34 | // When the PM acts as reader and is receiving tag data, it takes |
35 | // 3 ticks delay in the AD converter | |
36 | // 16 ticks until the modulation detector completes and sets curbit | |
37 | // 8 ticks until bit_to_arm is assigned from curbit | |
38 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 39 | // 4*16 ticks until we measure the time |
40 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 41 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 42 | |
43 | // When the PM acts as a reader and is sending, it takes | |
44 | // 4*16 ticks until we can write data to the sending hold register | |
45 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
46 | // 8 ticks until the first transfer starts | |
47 | // 8 ticks later the FPGA samples the data | |
48 | // 1 tick to assign mod_sig_coil | |
49 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
50 | ||
51 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 52 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 53 | // 3 ticks for the A/D conversion, |
54 | // 8 ticks on average until the start of the SSC transfer, | |
55 | // 8 ticks until the SSC samples the first data | |
56 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
57 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 58 | // 4*16 ticks until we measure the time |
7bc95e2e | 59 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 60 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 61 | |
62 | // The FPGA will report its internal sending delay in | |
63 | uint16_t FpgaSendQueueDelay; | |
64 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
65 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
66 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
67 | ||
68 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 69 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 70 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
71 | // 8 ticks until the first transfer starts | |
72 | // 8 ticks later the FPGA samples the data | |
73 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
74 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 75 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 76 | |
77 | // When the PM acts as sniffer and is receiving tag data, it takes | |
78 | // 3 ticks A/D conversion | |
d714d3ef | 79 | // 14 ticks to complete the modulation detection |
80 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 81 | // + the delays in transferring data - which is the same for |
82 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 83 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 84 | |
d714d3ef | 85 | // When the PM acts as sniffer and is receiving reader data, it takes |
86 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
87 | // start bit, which marks the start of the communication) | |
7bc95e2e | 88 | // 3 ticks A/D conversion |
d714d3ef | 89 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 90 | // + the delays in transferring data - which is the same for |
91 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 92 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 93 | |
94 | //variables used for timing purposes: | |
95 | //these are in ssp_clk cycles: | |
6a1f2d82 | 96 | static uint32_t NextTransferTime; |
97 | static uint32_t LastTimeProxToAirStart; | |
98 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 99 | |
8f51ddb0 | 100 | // CARD TO READER - manchester |
72934aa3 | 101 | // Sequence D: 11110000 modulation with subcarrier during first half |
102 | // Sequence E: 00001111 modulation with subcarrier during second half | |
103 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 104 | // READER TO CARD - miller |
72934aa3 | 105 | // Sequence X: 00001100 drop after half a period |
106 | // Sequence Y: 00000000 no drop | |
107 | // Sequence Z: 11000000 drop at start | |
108 | #define SEC_D 0xf0 | |
109 | #define SEC_E 0x0f | |
110 | #define SEC_F 0x00 | |
111 | #define SEC_X 0x0c | |
112 | #define SEC_Y 0x00 | |
113 | #define SEC_Z 0xc0 | |
15c4dc5a | 114 | |
902cb3c0 | 115 | void iso14a_set_trigger(bool enable) { |
534983d7 | 116 | trigger = enable; |
117 | } | |
118 | ||
b0127e65 | 119 | void iso14a_set_timeout(uint32_t timeout) { |
120 | iso14a_timeout = timeout; | |
19a700a8 | 121 | if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106); |
b0127e65 | 122 | } |
8556b852 | 123 | |
19a700a8 | 124 | void iso14a_set_ATS_timeout(uint8_t *ats) { |
19a700a8 | 125 | uint8_t tb1; |
126 | uint8_t fwi; | |
127 | uint32_t fwt; | |
128 | ||
129 | if (ats[0] > 1) { // there is a format byte T0 | |
130 | if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1) | |
4c0cf2d2 | 131 | |
132 | if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1) | |
19a700a8 | 133 | tb1 = ats[3]; |
4c0cf2d2 | 134 | else |
19a700a8 | 135 | tb1 = ats[2]; |
4c0cf2d2 | 136 | |
19a700a8 | 137 | fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI) |
ca5bad3d | 138 | fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc |
139 | //fwt = 4096 * (1 << fwi); | |
19a700a8 | 140 | |
ca5bad3d | 141 | iso14a_set_timeout(fwt/(8*16)); |
142 | //iso14a_set_timeout(fwt/128); | |
19a700a8 | 143 | } |
144 | } | |
145 | } | |
146 | ||
15c4dc5a | 147 | //----------------------------------------------------------------------------- |
148 | // Generate the parity value for a byte sequence | |
e30c654b | 149 | // |
15c4dc5a | 150 | //----------------------------------------------------------------------------- |
91c7a7cc | 151 | void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) { |
6a1f2d82 | 152 | uint16_t paritybit_cnt = 0; |
153 | uint16_t paritybyte_cnt = 0; | |
154 | uint8_t parityBits = 0; | |
155 | ||
156 | for (uint16_t i = 0; i < iLen; i++) { | |
157 | // Generate the parity bits | |
f8ada309 | 158 | parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt)); |
6a1f2d82 | 159 | if (paritybit_cnt == 7) { |
160 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
161 | parityBits = 0; // and advance to next Parity Byte | |
162 | paritybyte_cnt++; | |
163 | paritybit_cnt = 0; | |
164 | } else { | |
165 | paritybit_cnt++; | |
166 | } | |
5f6d6c90 | 167 | } |
6a1f2d82 | 168 | |
169 | // save remaining parity bits | |
91c7a7cc | 170 | par[paritybyte_cnt] = parityBits; |
15c4dc5a | 171 | } |
172 | ||
91c7a7cc | 173 | void AppendCrc14443a(uint8_t* data, int len) { |
5f6d6c90 | 174 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 175 | } |
176 | ||
7bc95e2e | 177 | //============================================================================= |
178 | // ISO 14443 Type A - Miller decoder | |
179 | //============================================================================= | |
180 | // Basics: | |
181 | // This decoder is used when the PM3 acts as a tag. | |
182 | // The reader will generate "pauses" by temporarily switching of the field. | |
183 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
184 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
185 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
186 | // The Miller decoder needs to identify the following sequences: | |
187 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
188 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
189 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
190 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
191 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 192 | //----------------------------------------------------------------------------- |
b62a5a84 | 193 | static tUart Uart; |
15c4dc5a | 194 | |
d7aa3739 | 195 | // Lookup-Table to decide if 4 raw bits are a modulation. |
0ec548dc | 196 | // We accept the following: |
197 | // 0001 - a 3 tick wide pause | |
198 | // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left | |
199 | // 0111 - a 2 tick wide pause shifted left | |
200 | // 1001 - a 2 tick wide pause shifted right | |
d7aa3739 | 201 | const bool Mod_Miller_LUT[] = { |
0ec548dc | 202 | FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, |
203 | FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE | |
d7aa3739 | 204 | }; |
0ec548dc | 205 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4]) |
206 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)]) | |
d7aa3739 | 207 | |
91c7a7cc | 208 | void UartReset() { |
7bc95e2e | 209 | Uart.state = STATE_UNSYNCD; |
210 | Uart.bitCount = 0; | |
211 | Uart.len = 0; // number of decoded data bytes | |
6a1f2d82 | 212 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 213 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
6a1f2d82 | 214 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 215 | Uart.startTime = 0; |
216 | Uart.endTime = 0; | |
46c65fed | 217 | |
218 | Uart.byteCntMax = 0; | |
219 | Uart.posCnt = 0; | |
220 | Uart.syncBit = 9999; | |
7bc95e2e | 221 | } |
15c4dc5a | 222 | |
91c7a7cc | 223 | void UartInit(uint8_t *data, uint8_t *parity) { |
6a1f2d82 | 224 | Uart.output = data; |
225 | Uart.parity = parity; | |
0ec548dc | 226 | Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits |
6a1f2d82 | 227 | UartReset(); |
228 | } | |
d714d3ef | 229 | |
7bc95e2e | 230 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
91c7a7cc | 231 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) { |
0ec548dc | 232 | Uart.fourBits = (Uart.fourBits << 8) | bit; |
7bc95e2e | 233 | |
0c8d25eb | 234 | if (Uart.state == STATE_UNSYNCD) { // not yet synced |
91c7a7cc | 235 | Uart.syncBit = 9999; // not set |
46c65fed | 236 | |
237 | // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication") | |
238 | // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information") | |
239 | // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1") | |
240 | ||
0ec548dc | 241 | // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from |
46c65fed | 242 | // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111) |
243 | // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern | |
0ec548dc | 244 | // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's) |
46c65fed | 245 | // |
246 | #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000 | |
247 | #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000 | |
248 | ||
0ec548dc | 249 | if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7; |
250 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6; | |
251 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5; | |
252 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4; | |
253 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3; | |
254 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2; | |
255 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1; | |
256 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0; | |
257 | ||
258 | if (Uart.syncBit != 9999) { // found a sync bit | |
91c7a7cc | 259 | Uart.startTime = non_real_time ? non_real_time : (GetCountSspClk() & 0xfffffff8); |
260 | Uart.startTime -= Uart.syncBit; | |
261 | Uart.endTime = Uart.startTime; | |
262 | Uart.state = STATE_START_OF_COMMUNICATION; | |
263 | } | |
7bc95e2e | 264 | } else { |
15c4dc5a | 265 | |
0ec548dc | 266 | if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) { |
267 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error | |
d7aa3739 | 268 | UartReset(); |
d7aa3739 | 269 | } else { // Modulation in first half = Sequence Z = logic "0" |
7bc95e2e | 270 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
271 | UartReset(); | |
7bc95e2e | 272 | } else { |
273 | Uart.bitCount++; | |
274 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
275 | Uart.state = STATE_MILLER_Z; | |
276 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
277 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
278 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
279 | Uart.parityBits <<= 1; // make room for the parity bit | |
280 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
281 | Uart.bitCount = 0; | |
282 | Uart.shiftReg = 0; | |
6a1f2d82 | 283 | if((Uart.len&0x0007) == 0) { // every 8 data bytes |
284 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
285 | Uart.parityBits = 0; | |
286 | } | |
15c4dc5a | 287 | } |
7bc95e2e | 288 | } |
d7aa3739 | 289 | } |
290 | } else { | |
0ec548dc | 291 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" |
7bc95e2e | 292 | Uart.bitCount++; |
293 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
294 | Uart.state = STATE_MILLER_X; | |
295 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
296 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
297 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
298 | Uart.parityBits <<= 1; // make room for the new parity bit | |
299 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
300 | Uart.bitCount = 0; | |
301 | Uart.shiftReg = 0; | |
6a1f2d82 | 302 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
303 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
304 | Uart.parityBits = 0; | |
305 | } | |
7bc95e2e | 306 | } |
d7aa3739 | 307 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 308 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 309 | Uart.state = STATE_UNSYNCD; |
6a1f2d82 | 310 | Uart.bitCount--; // last "0" was part of EOC sequence |
311 | Uart.shiftReg <<= 1; // drop it | |
312 | if(Uart.bitCount > 0) { // if we decoded some bits | |
313 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
314 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
315 | Uart.parityBits <<= 1; // add a (void) parity bit | |
316 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits | |
317 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
318 | return TRUE; | |
319 | } else if (Uart.len & 0x0007) { // there are some parity bits to store | |
320 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits | |
321 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
52bfb955 | 322 | } |
323 | if (Uart.len) { | |
6a1f2d82 | 324 | return TRUE; // we are finished with decoding the raw data sequence |
52bfb955 | 325 | } else { |
0c8d25eb | 326 | UartReset(); // Nothing received - start over |
7bc95e2e | 327 | } |
15c4dc5a | 328 | } |
7bc95e2e | 329 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
330 | UartReset(); | |
7bc95e2e | 331 | } else { // a logic "0" |
332 | Uart.bitCount++; | |
333 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
334 | Uart.state = STATE_MILLER_Y; | |
335 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
336 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
337 | Uart.parityBits <<= 1; // make room for the parity bit | |
338 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
339 | Uart.bitCount = 0; | |
340 | Uart.shiftReg = 0; | |
6a1f2d82 | 341 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
342 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
343 | Uart.parityBits = 0; | |
344 | } | |
15c4dc5a | 345 | } |
346 | } | |
d7aa3739 | 347 | } |
15c4dc5a | 348 | } |
7bc95e2e | 349 | } |
7bc95e2e | 350 | return FALSE; // not finished yet, need more data |
15c4dc5a | 351 | } |
352 | ||
353 | //============================================================================= | |
e691fc45 | 354 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 355 | //============================================================================= |
e691fc45 | 356 | // Basics: |
7bc95e2e | 357 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 358 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
359 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
360 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
361 | // The Manchester decoder needs to identify the following sequences: | |
362 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
363 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
364 | // 8 ticks unmodulated: Sequence F = end of communication | |
365 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 366 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 367 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 368 | static tDemod Demod; |
15c4dc5a | 369 | |
d7aa3739 | 370 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 371 | // We accept three or four "1" in any position |
7bc95e2e | 372 | const bool Mod_Manchester_LUT[] = { |
d7aa3739 | 373 | FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, |
d714d3ef | 374 | FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE |
7bc95e2e | 375 | }; |
376 | ||
377 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
378 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 379 | |
91c7a7cc | 380 | void DemodReset() { |
7bc95e2e | 381 | Demod.state = DEMOD_UNSYNCD; |
382 | Demod.len = 0; // number of decoded data bytes | |
6a1f2d82 | 383 | Demod.parityLen = 0; |
7bc95e2e | 384 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
385 | Demod.parityBits = 0; // | |
386 | Demod.collisionPos = 0; // Position of collision bit | |
387 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
388 | Demod.highCnt = 0; | |
389 | Demod.startTime = 0; | |
91c7a7cc | 390 | Demod.endTime = 0; |
46c65fed | 391 | Demod.bitCount = 0; |
392 | Demod.syncBit = 0xFFFF; | |
393 | Demod.samples = 0; | |
e691fc45 | 394 | } |
15c4dc5a | 395 | |
91c7a7cc | 396 | void DemodInit(uint8_t *data, uint8_t *parity) { |
6a1f2d82 | 397 | Demod.output = data; |
398 | Demod.parity = parity; | |
399 | DemodReset(); | |
400 | } | |
401 | ||
7bc95e2e | 402 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
91c7a7cc | 403 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) { |
7bc95e2e | 404 | Demod.twoBits = (Demod.twoBits << 8) | bit; |
e691fc45 | 405 | |
7bc95e2e | 406 | if (Demod.state == DEMOD_UNSYNCD) { |
407 | ||
408 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
409 | if (Demod.twoBits == 0x0000) { | |
410 | Demod.highCnt++; | |
411 | } else { | |
412 | Demod.highCnt = 0; | |
413 | } | |
414 | } else { | |
415 | Demod.syncBit = 0xFFFF; // not set | |
416 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
417 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
418 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
419 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
420 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
421 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
422 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
423 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 424 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 425 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
426 | Demod.startTime -= Demod.syncBit; | |
427 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 428 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 429 | } |
7bc95e2e | 430 | } |
7bc95e2e | 431 | } else { |
15c4dc5a | 432 | |
7bc95e2e | 433 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
434 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 435 | if (!Demod.collisionPos) { |
436 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
437 | } | |
438 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 439 | Demod.bitCount++; |
440 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
441 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 442 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 443 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 444 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
445 | Demod.bitCount = 0; | |
446 | Demod.shiftReg = 0; | |
6a1f2d82 | 447 | if((Demod.len&0x0007) == 0) { // every 8 data bytes |
448 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
449 | Demod.parityBits = 0; | |
450 | } | |
15c4dc5a | 451 | } |
7bc95e2e | 452 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
453 | } else { // no modulation in first half | |
454 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 455 | Demod.bitCount++; |
7bc95e2e | 456 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 457 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 458 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 459 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 460 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
461 | Demod.bitCount = 0; | |
462 | Demod.shiftReg = 0; | |
6a1f2d82 | 463 | if ((Demod.len&0x0007) == 0) { // every 8 data bytes |
464 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
465 | Demod.parityBits = 0; | |
466 | } | |
15c4dc5a | 467 | } |
7bc95e2e | 468 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 469 | } else { // no modulation in both halves - End of communication |
6a1f2d82 | 470 | if(Demod.bitCount > 0) { // there are some remaining data bits |
471 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
472 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
473 | Demod.parityBits <<= 1; // add a (void) parity bit | |
474 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
475 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
476 | return TRUE; | |
477 | } else if (Demod.len & 0x0007) { // there are some parity bits to store | |
478 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
479 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
52bfb955 | 480 | } |
481 | if (Demod.len) { | |
d7aa3739 | 482 | return TRUE; // we are finished with decoding the raw data sequence |
483 | } else { // nothing received. Start over | |
484 | DemodReset(); | |
e691fc45 | 485 | } |
15c4dc5a | 486 | } |
7bc95e2e | 487 | } |
e691fc45 | 488 | } |
e691fc45 | 489 | return FALSE; // not finished yet, need more data |
15c4dc5a | 490 | } |
491 | ||
492 | //============================================================================= | |
493 | // Finally, a `sniffer' for ISO 14443 Type A | |
494 | // Both sides of communication! | |
495 | //============================================================================= | |
496 | ||
497 | //----------------------------------------------------------------------------- | |
498 | // Record the sequence of commands sent by the reader to the tag, with | |
499 | // triggering so that we start recording at the point that the tag is moved | |
500 | // near the reader. | |
bc939371 | 501 | // "hf 14a sniff" |
15c4dc5a | 502 | //----------------------------------------------------------------------------- |
d26849d4 | 503 | void RAMFUNC SniffIso14443a(uint8_t param) { |
5cd9ec01 M |
504 | // param: |
505 | // bit 0 - trigger from first card answer | |
506 | // bit 1 - trigger from first reader 7-bit request | |
5cd9ec01 | 507 | LEDsoff(); |
5cd9ec01 | 508 | |
99cf19d9 | 509 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
7bc95e2e | 510 | |
f71f4deb | 511 | // Allocate memory from BigBuf for some buffers |
512 | // free all previous allocations first | |
aaa1a9a2 | 513 | BigBuf_free(); BigBuf_Clear_ext(false); |
7838f4be | 514 | clear_trace(); |
515 | set_tracing(TRUE); | |
516 | ||
5cd9ec01 | 517 | // The command (reader -> tag) that we're receiving. |
f71f4deb | 518 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
519 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
6a1f2d82 | 520 | |
5cd9ec01 | 521 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 522 | uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE); |
523 | uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE); | |
5cd9ec01 M |
524 | |
525 | // The DMA buffer, used to stream samples from the FPGA | |
f71f4deb | 526 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); |
527 | ||
7bc95e2e | 528 | uint8_t *data = dmaBuf; |
529 | uint8_t previous_data = 0; | |
5cd9ec01 M |
530 | int maxDataLen = 0; |
531 | int dataLen = 0; | |
7bc95e2e | 532 | bool TagIsActive = FALSE; |
533 | bool ReaderIsActive = FALSE; | |
534 | ||
5cd9ec01 | 535 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 536 | DemodInit(receivedResponse, receivedResponsePar); |
537 | ||
5cd9ec01 | 538 | // Set up the demodulator for the reader -> tag commands |
6a1f2d82 | 539 | UartInit(receivedCmd, receivedCmdPar); |
540 | ||
7bc95e2e | 541 | // Setup and start DMA. |
57850d9d | 542 | if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){ |
543 | if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); | |
544 | return; | |
545 | } | |
7bc95e2e | 546 | |
99cf19d9 | 547 | // We won't start recording the frames that we acquire until we trigger; |
548 | // a good trigger condition to get started is probably when we see a | |
549 | // response from the tag. | |
550 | // triggered == FALSE -- to wait first for card | |
551 | bool triggered = !(param & 0x03); | |
552 | ||
5cd9ec01 | 553 | // And now we loop, receiving samples. |
7bc95e2e | 554 | for(uint32_t rsamples = 0; TRUE; ) { |
555 | ||
5cd9ec01 M |
556 | if(BUTTON_PRESS()) { |
557 | DbpString("cancelled by button"); | |
7bc95e2e | 558 | break; |
5cd9ec01 | 559 | } |
15c4dc5a | 560 | |
5cd9ec01 M |
561 | LED_A_ON(); |
562 | WDT_HIT(); | |
15c4dc5a | 563 | |
5cd9ec01 M |
564 | int register readBufDataP = data - dmaBuf; |
565 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
566 | if (readBufDataP <= dmaBufDataP){ | |
567 | dataLen = dmaBufDataP - readBufDataP; | |
568 | } else { | |
7bc95e2e | 569 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
570 | } |
571 | // test for length of buffer | |
572 | if(dataLen > maxDataLen) { | |
573 | maxDataLen = dataLen; | |
f71f4deb | 574 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
7bc95e2e | 575 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
576 | break; | |
5cd9ec01 M |
577 | } |
578 | } | |
579 | if(dataLen < 1) continue; | |
580 | ||
581 | // primary buffer was stopped( <-- we lost data! | |
582 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
583 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
584 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 585 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
586 | } |
587 | // secondary buffer sets as primary, secondary buffer was stopped | |
588 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
589 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
590 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
591 | } | |
592 | ||
593 | LED_A_OFF(); | |
7bc95e2e | 594 | |
595 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 596 | |
7bc95e2e | 597 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
598 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
599 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
600 | LED_C_ON(); | |
5cd9ec01 | 601 | |
7bc95e2e | 602 | // check - if there is a short 7bit request from reader |
603 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE; | |
5cd9ec01 | 604 | |
7bc95e2e | 605 | if(triggered) { |
6a1f2d82 | 606 | if (!LogTrace(receivedCmd, |
607 | Uart.len, | |
608 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
609 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
610 | Uart.parity, | |
611 | TRUE)) break; | |
7bc95e2e | 612 | } |
613 | /* And ready to receive another command. */ | |
614 | UartReset(); | |
615 | /* And also reset the demod code, which might have been */ | |
616 | /* false-triggered by the commands from the reader. */ | |
617 | DemodReset(); | |
618 | LED_B_OFF(); | |
619 | } | |
620 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 621 | } |
3be2a5ae | 622 | |
7bc95e2e | 623 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
624 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
625 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
626 | LED_B_ON(); | |
5cd9ec01 | 627 | |
6a1f2d82 | 628 | if (!LogTrace(receivedResponse, |
629 | Demod.len, | |
630 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
631 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
632 | Demod.parity, | |
633 | FALSE)) break; | |
5cd9ec01 | 634 | |
7bc95e2e | 635 | if ((!triggered) && (param & 0x01)) triggered = TRUE; |
5cd9ec01 | 636 | |
7bc95e2e | 637 | // And ready to receive another response. |
638 | DemodReset(); | |
0ec548dc | 639 | // And reset the Miller decoder including itS (now outdated) input buffer |
640 | UartInit(receivedCmd, receivedCmdPar); | |
7bc95e2e | 641 | LED_C_OFF(); |
642 | } | |
643 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
644 | } | |
5cd9ec01 M |
645 | } |
646 | ||
7bc95e2e | 647 | previous_data = *data; |
648 | rsamples++; | |
5cd9ec01 | 649 | data++; |
d714d3ef | 650 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
651 | data = dmaBuf; |
652 | } | |
653 | } // main cycle | |
654 | ||
bc939371 | 655 | if (MF_DBGLEVEL >= 1) { |
656 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); | |
657 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]); | |
658 | } | |
7bc95e2e | 659 | FpgaDisableSscDma(); |
91c7a7cc | 660 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
bc939371 | 661 | LEDsoff(); |
5ee53a0e | 662 | set_tracing(FALSE); |
15c4dc5a | 663 | } |
664 | ||
15c4dc5a | 665 | //----------------------------------------------------------------------------- |
666 | // Prepare tag messages | |
667 | //----------------------------------------------------------------------------- | |
91c7a7cc | 668 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) { |
8f51ddb0 | 669 | ToSendReset(); |
15c4dc5a | 670 | |
671 | // Correction bit, might be removed when not needed | |
672 | ToSendStuffBit(0); | |
673 | ToSendStuffBit(0); | |
674 | ToSendStuffBit(0); | |
675 | ToSendStuffBit(0); | |
676 | ToSendStuffBit(1); // 1 | |
677 | ToSendStuffBit(0); | |
678 | ToSendStuffBit(0); | |
679 | ToSendStuffBit(0); | |
8f51ddb0 | 680 | |
15c4dc5a | 681 | // Send startbit |
72934aa3 | 682 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 683 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 684 | |
6a1f2d82 | 685 | for(uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 686 | uint8_t b = cmd[i]; |
15c4dc5a | 687 | |
688 | // Data bits | |
6a1f2d82 | 689 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 690 | if(b & 1) { |
72934aa3 | 691 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 692 | } else { |
72934aa3 | 693 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
694 | } |
695 | b >>= 1; | |
696 | } | |
15c4dc5a | 697 | |
0014cb46 | 698 | // Get the parity bit |
6a1f2d82 | 699 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 700 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 701 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 702 | } else { |
72934aa3 | 703 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 704 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 705 | } |
8f51ddb0 | 706 | } |
15c4dc5a | 707 | |
8f51ddb0 M |
708 | // Send stopbit |
709 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 710 | |
8f51ddb0 | 711 | // Convert from last byte pos to length |
6fc68747 | 712 | ++ToSendMax; |
8f51ddb0 M |
713 | } |
714 | ||
91c7a7cc | 715 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) { |
7504dc50 | 716 | uint8_t par[MAX_PARITY_SIZE] = {0}; |
6a1f2d82 | 717 | GetParity(cmd, len, par); |
718 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 719 | } |
720 | ||
91c7a7cc | 721 | static void Code4bitAnswerAsTag(uint8_t cmd) { |
91c7a7cc | 722 | uint8_t b = cmd; |
8f51ddb0 | 723 | |
5f6d6c90 | 724 | ToSendReset(); |
8f51ddb0 M |
725 | |
726 | // Correction bit, might be removed when not needed | |
727 | ToSendStuffBit(0); | |
728 | ToSendStuffBit(0); | |
729 | ToSendStuffBit(0); | |
730 | ToSendStuffBit(0); | |
731 | ToSendStuffBit(1); // 1 | |
732 | ToSendStuffBit(0); | |
733 | ToSendStuffBit(0); | |
734 | ToSendStuffBit(0); | |
735 | ||
736 | // Send startbit | |
737 | ToSend[++ToSendMax] = SEC_D; | |
738 | ||
0194ce8f | 739 | for(uint8_t i = 0; i < 4; i++) { |
8f51ddb0 M |
740 | if(b & 1) { |
741 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 742 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
743 | } else { |
744 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 745 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
746 | } |
747 | b >>= 1; | |
748 | } | |
749 | ||
750 | // Send stopbit | |
751 | ToSend[++ToSendMax] = SEC_F; | |
752 | ||
5f6d6c90 | 753 | // Convert from last byte pos to length |
754 | ToSendMax++; | |
15c4dc5a | 755 | } |
756 | ||
757 | //----------------------------------------------------------------------------- | |
758 | // Wait for commands from reader | |
759 | // Stop when button is pressed | |
760 | // Or return TRUE when command is captured | |
761 | //----------------------------------------------------------------------------- | |
91c7a7cc | 762 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) { |
15c4dc5a | 763 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen |
764 | // only, since we are receiving, not transmitting). | |
765 | // Signal field is off with the appropriate LED | |
766 | LED_D_OFF(); | |
767 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
768 | ||
ca5bad3d | 769 | // Now run a `software UART` on the stream of incoming samples. |
6a1f2d82 | 770 | UartInit(received, parity); |
7bc95e2e | 771 | |
772 | // clear RXRDY: | |
773 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 774 | |
775 | for(;;) { | |
776 | WDT_HIT(); | |
777 | ||
778 | if(BUTTON_PRESS()) return FALSE; | |
7bc95e2e | 779 | |
15c4dc5a | 780 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 781 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
782 | if(MillerDecoding(b, 0)) { | |
783 | *len = Uart.len; | |
15c4dc5a | 784 | return TRUE; |
785 | } | |
7bc95e2e | 786 | } |
15c4dc5a | 787 | } |
788 | } | |
28afbd2b | 789 | |
ce02f6f9 | 790 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { |
7bc95e2e | 791 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 792 | // This will need the following byte array for a modulation sequence |
793 | // 144 data bits (18 * 8) | |
794 | // 18 parity bits | |
795 | // 2 Start and stop | |
796 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
797 | // 1 just for the case | |
798 | // ----------- + | |
799 | // 166 bytes, since every bit that needs to be send costs us a byte | |
800 | // | |
91c7a7cc | 801 | // Prepare the tag modulation bits from the message |
802 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
803 | ||
804 | // Make sure we do not exceed the free buffer space | |
805 | if (ToSendMax > max_buffer_size) { | |
806 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
807 | Dbhexdump(response_info->response_n,response_info->response,false); | |
808 | return FALSE; | |
809 | } | |
810 | ||
811 | // Copy the byte array, used for this modulation to the buffer position | |
812 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
813 | ||
814 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them | |
815 | response_info->modulation_n = ToSendMax; | |
816 | response_info->ProxToAirDuration = LastProxToAirDuration; | |
817 | return TRUE; | |
ce02f6f9 | 818 | } |
819 | ||
f71f4deb | 820 | // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit. |
821 | // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction) | |
822 | // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits | |
823 | // -> need 273 bytes buffer | |
c9216a92 | 824 | // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370 |
825 | // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits | |
826 | #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453 | |
f71f4deb | 827 | |
ce02f6f9 | 828 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { |
ca5bad3d | 829 | // Retrieve and store the current buffer index |
830 | response_info->modulation = free_buffer_pointer; | |
831 | ||
832 | // Determine the maximum size we can use from our buffer | |
833 | size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE; | |
834 | ||
835 | // Forward the prepare tag modulation function to the inner function | |
836 | if (prepare_tag_modulation(response_info, max_buffer_size)) { | |
837 | // Update the free buffer offset | |
838 | free_buffer_pointer += ToSendMax; | |
839 | return true; | |
840 | } else { | |
841 | return false; | |
842 | } | |
ce02f6f9 | 843 | } |
844 | ||
15c4dc5a | 845 | //----------------------------------------------------------------------------- |
846 | // Main loop of simulated tag: receive commands from reader, decide what | |
847 | // response to send, and send it. | |
0a856e29 | 848 | // 'hf 14a sim' |
15c4dc5a | 849 | //----------------------------------------------------------------------------- |
91c7a7cc | 850 | void SimulateIso14443aTag(int tagType, int flags, byte_t* data) { |
0194ce8f | 851 | |
0194ce8f | 852 | uint8_t sak = 0; |
bc939371 | 853 | uint32_t cuid = 0; |
854 | uint32_t nonce = 0; | |
855 | ||
32719adf | 856 | // PACK response to PWD AUTH for EV1/NTAG |
0194ce8f | 857 | uint8_t response8[4] = {0,0,0,0}; |
858 | // Counter for EV1/NTAG | |
859 | uint32_t counters[] = {0,0,0}; | |
32719adf | 860 | |
81cd0474 | 861 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). |
0194ce8f | 862 | uint8_t response1[] = {0,0}; |
6b23be6b | 863 | |
864 | // Here, we collect CUID, block1, keytype1, NT1, NR1, AR1, CUID, block2, keytyp2, NT2, NR2, AR2 | |
865 | // it should also collect block, keytype. | |
866 | uint8_t cardAUTHSC = 0; | |
867 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
868 | // allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys | |
869 | #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack() | |
6067df30 | 870 | nonces_t ar_nr_resp[ATTACK_KEY_COUNT*2]; // for 2 separate attack types (nml, moebius) |
6b23be6b | 871 | memset(ar_nr_resp, 0x00, sizeof(ar_nr_resp)); |
872 | ||
6067df30 | 873 | uint8_t ar_nr_collected[ATTACK_KEY_COUNT*2]; // for 2nd attack type (moebius) |
6b23be6b | 874 | memset(ar_nr_collected, 0x00, sizeof(ar_nr_collected)); |
875 | uint8_t nonce1_count = 0; | |
876 | uint8_t nonce2_count = 0; | |
877 | uint8_t moebius_n_count = 0; | |
878 | bool gettingMoebius = false; | |
f38cfd66 | 879 | uint8_t mM = 0; // moebius_modifier for collection storage |
6b23be6b | 880 | |
81cd0474 | 881 | |
882 | switch (tagType) { | |
0194ce8f | 883 | case 1: { // MIFARE Classic 1k |
81cd0474 | 884 | response1[0] = 0x04; |
81cd0474 | 885 | sak = 0x08; |
886 | } break; | |
887 | case 2: { // MIFARE Ultralight | |
32719adf | 888 | response1[0] = 0x44; |
81cd0474 | 889 | sak = 0x00; |
890 | } break; | |
891 | case 3: { // MIFARE DESFire | |
81cd0474 | 892 | response1[0] = 0x04; |
893 | response1[1] = 0x03; | |
894 | sak = 0x20; | |
895 | } break; | |
0194ce8f | 896 | case 4: { // ISO/IEC 14443-4 - javacard (JCOP) |
81cd0474 | 897 | response1[0] = 0x04; |
81cd0474 | 898 | sak = 0x28; |
899 | } break; | |
3fe4ff4f | 900 | case 5: { // MIFARE TNP3XXX |
3fe4ff4f | 901 | response1[0] = 0x01; |
902 | response1[1] = 0x0f; | |
903 | sak = 0x01; | |
d26849d4 | 904 | } break; |
0194ce8f | 905 | case 6: { // MIFARE Mini 320b |
d26849d4 | 906 | response1[0] = 0x44; |
d26849d4 | 907 | sak = 0x09; |
908 | } break; | |
0194ce8f | 909 | case 7: { // NTAG |
32719adf | 910 | response1[0] = 0x44; |
32719adf | 911 | sak = 0x00; |
912 | // PACK | |
913 | response8[0] = 0x80; | |
914 | response8[1] = 0x80; | |
915 | ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]); | |
2b1f4228 | 916 | // uid not supplied then get from emulator memory |
917 | if (data[0]==0) { | |
918 | uint16_t start = 4 * (0+12); | |
919 | uint8_t emdata[8]; | |
920 | emlGetMemBt( emdata, start, sizeof(emdata)); | |
f38cfd66 | 921 | memcpy(data, emdata, 3); // uid bytes 0-2 |
922 | memcpy(data+3, emdata+4, 4); // uid bytes 3-7 | |
2b1f4228 | 923 | flags |= FLAG_7B_UID_IN_DATA; |
924 | } | |
32719adf | 925 | } break; |
81cd0474 | 926 | default: { |
927 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
928 | return; | |
929 | } break; | |
930 | } | |
931 | ||
932 | // The second response contains the (mandatory) first 24 bits of the UID | |
c8b6da22 | 933 | uint8_t response2[5] = {0x00}; |
81cd0474 | 934 | |
0194ce8f | 935 | // For UID size 7, |
c8b6da22 | 936 | uint8_t response2a[5] = {0x00}; |
937 | ||
bc939371 | 938 | if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA ) { |
0194ce8f | 939 | response2[0] = 0x88; // Cascade Tag marker |
d26849d4 | 940 | response2[1] = data[0]; |
941 | response2[2] = data[1]; | |
942 | response2[3] = data[2]; | |
943 | ||
944 | response2a[0] = data[3]; | |
945 | response2a[1] = data[4]; | |
946 | response2a[2] = data[5]; | |
c3c241f3 | 947 | response2a[3] = data[6]; //?? |
81cd0474 | 948 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; |
949 | ||
950 | // Configure the ATQA and SAK accordingly | |
951 | response1[0] |= 0x40; | |
952 | sak |= 0x04; | |
bc939371 | 953 | |
954 | cuid = bytes_to_num(data+3, 4); | |
81cd0474 | 955 | } else { |
d26849d4 | 956 | memcpy(response2, data, 4); |
81cd0474 | 957 | // Configure the ATQA and SAK accordingly |
958 | response1[0] &= 0xBF; | |
959 | sak &= 0xFB; | |
bc939371 | 960 | cuid = bytes_to_num(data, 4); |
81cd0474 | 961 | } |
962 | ||
963 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
964 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
965 | ||
966 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
0194ce8f | 967 | uint8_t response3[3] = {sak, 0x00, 0x00}; |
81cd0474 | 968 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); |
969 | ||
970 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
c8b6da22 | 971 | uint8_t response3a[3] = {0x00}; |
81cd0474 | 972 | response3a[0] = sak & 0xFB; |
973 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
974 | ||
0194ce8f | 975 | uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce |
976 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: | |
6a1f2d82 | 977 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, |
978 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
979 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
980 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 981 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
982 | ||
bc939371 | 983 | // the randon nonce |
984 | nonce = bytes_to_num(response5, 4); | |
985 | ||
2b1f4228 | 986 | // Prepare GET_VERSION (different for UL EV-1 / NTAG) |
f38cfd66 | 987 | // uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION. |
988 | // uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215 | |
c9216a92 | 989 | // Prepare CHK_TEARING |
f38cfd66 | 990 | // uint8_t response9[] = {0xBD,0x90,0x3f}; |
c9216a92 | 991 | |
992 | #define TAG_RESPONSE_COUNT 10 | |
7bc95e2e | 993 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { |
994 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
995 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
996 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
997 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
998 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
999 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1000 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
4c0cf2d2 | 1001 | |
495d7f13 | 1002 | { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response |
4c0cf2d2 | 1003 | }; |
f38cfd66 | 1004 | // { .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response |
1005 | // { .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response | |
4c0cf2d2 | 1006 | |
7bc95e2e | 1007 | |
1008 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1009 | // Such a response is less time critical, so we can prepare them on the fly | |
1010 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1011 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1012 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1013 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1014 | tag_response_info_t dynamic_response_info = { | |
1015 | .response = dynamic_response_buffer, | |
1016 | .response_n = 0, | |
1017 | .modulation = dynamic_modulation_buffer, | |
1018 | .modulation_n = 0 | |
1019 | }; | |
ce02f6f9 | 1020 | |
99cf19d9 | 1021 | // We need to listen to the high-frequency, peak-detected path. |
1022 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1023 | ||
f71f4deb | 1024 | BigBuf_free_keep_EM(); |
0194ce8f | 1025 | clear_trace(); |
1026 | set_tracing(TRUE); | |
f71f4deb | 1027 | |
1028 | // allocate buffers: | |
1029 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
1030 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
1031 | free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE); | |
1032 | ||
7bc95e2e | 1033 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1034 | // there will be not enough time to do this at the moment the reader sends it REQA |
495d7f13 | 1035 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) |
7bc95e2e | 1036 | prepare_allocated_tag_modulation(&responses[i]); |
15c4dc5a | 1037 | |
7bc95e2e | 1038 | int len = 0; |
15c4dc5a | 1039 | |
1040 | // To control where we are in the protocol | |
1041 | int order = 0; | |
1042 | int lastorder; | |
1043 | ||
1044 | // Just to allow some checks | |
1045 | int happened = 0; | |
1046 | int happened2 = 0; | |
81cd0474 | 1047 | int cmdsRecvd = 0; |
7bc95e2e | 1048 | tag_response_info_t* p_response; |
15c4dc5a | 1049 | |
254b70a4 | 1050 | LED_A_ON(); |
0194ce8f | 1051 | for(;;) { |
4c0cf2d2 | 1052 | WDT_HIT(); |
1053 | ||
7bc95e2e | 1054 | // Clean receive command buffer |
6a1f2d82 | 1055 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1056 | DbpString("Button press"); |
254b70a4 | 1057 | break; |
1058 | } | |
bc939371 | 1059 | |
1060 | // incease nonce at every command recieved | |
1061 | nonce++; | |
1062 | num_to_bytes(nonce, 4, response5); | |
1063 | ||
7bc95e2e | 1064 | p_response = NULL; |
1065 | ||
254b70a4 | 1066 | // Okay, look at the command now. |
1067 | lastorder = order; | |
0194ce8f | 1068 | if(receivedCmd[0] == ISO14443A_CMD_REQA) { // Received a REQUEST |
ce02f6f9 | 1069 | p_response = &responses[0]; order = 1; |
0194ce8f | 1070 | } else if(receivedCmd[0] == ISO14443A_CMD_WUPA) { // Received a WAKEUP |
ce02f6f9 | 1071 | p_response = &responses[0]; order = 6; |
0194ce8f | 1072 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received request for UID (cascade 1) |
ce02f6f9 | 1073 | p_response = &responses[1]; order = 2; |
0194ce8f | 1074 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received request for UID (cascade 2) |
ce02f6f9 | 1075 | p_response = &responses[2]; order = 20; |
0194ce8f | 1076 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1077 | p_response = &responses[3]; order = 3; |
0194ce8f | 1078 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2) { // Received a SELECT (cascade 2) |
1079 | p_response = &responses[4]; order = 30; | |
1080 | } else if(receivedCmd[0] == ISO14443A_CMD_READBLOCK) { // Received a (plain) READ | |
32719adf | 1081 | uint8_t block = receivedCmd[1]; |
2b1f4228 | 1082 | // if Ultralight or NTAG (4 byte blocks) |
1083 | if ( tagType == 7 || tagType == 2 ) { | |
f38cfd66 | 1084 | // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
2b1f4228 | 1085 | uint16_t start = 4 * (block+12); |
6b23be6b | 1086 | uint8_t emdata[MAX_MIFARE_FRAME_SIZE]; |
1087 | emlGetMemBt( emdata, start, 16); | |
1088 | AppendCrc14443a(emdata, 16); | |
1089 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
2b1f4228 | 1090 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
32719adf | 1091 | p_response = NULL; |
2b1f4228 | 1092 | } else { // all other tags (16 byte block tags) |
6b23be6b | 1093 | uint8_t emdata[MAX_MIFARE_FRAME_SIZE]; |
1094 | emlGetMemBt( emdata, block, 16); | |
1095 | AppendCrc14443a(emdata, 16); | |
1096 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
f38cfd66 | 1097 | // EmSendCmdEx(data+(4*receivedCmd[1]),16,false); |
32719adf | 1098 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
1099 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below | |
1100 | p_response = NULL; | |
1101 | } | |
0194ce8f | 1102 | } else if(receivedCmd[0] == MIFARE_ULEV1_FASTREAD) { // Received a FAST READ (ranged read) |
91c7a7cc | 1103 | uint8_t emdata[MAX_FRAME_SIZE]; |
f38cfd66 | 1104 | // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
91c7a7cc | 1105 | int start = (receivedCmd[1]+12) * 4; |
1106 | int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4; | |
1107 | emlGetMemBt( emdata, start, len); | |
1108 | AppendCrc14443a(emdata, len); | |
1109 | EmSendCmdEx(emdata, len+2, false); | |
1110 | p_response = NULL; | |
0194ce8f | 1111 | } else if(receivedCmd[0] == MIFARE_ULEV1_READSIG && tagType == 7) { // Received a READ SIGNATURE -- |
f38cfd66 | 1112 | // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
91c7a7cc | 1113 | uint16_t start = 4 * 4; |
1114 | uint8_t emdata[34]; | |
1115 | emlGetMemBt( emdata, start, 32); | |
1116 | AppendCrc14443a(emdata, 32); | |
1117 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
1118 | p_response = NULL; | |
0194ce8f | 1119 | } else if (receivedCmd[0] == MIFARE_ULEV1_READ_CNT && tagType == 7) { // Received a READ COUNTER -- |
e9a92fe2 | 1120 | uint8_t index = receivedCmd[1]; |
a126332a | 1121 | uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5}; |
e9a92fe2 | 1122 | if ( counters[index] > 0) { |
1123 | num_to_bytes(counters[index], 3, data); | |
1124 | AppendCrc14443a(data, sizeof(data)-2); | |
1125 | } | |
a126332a | 1126 | EmSendCmdEx(data,sizeof(data),false); |
1127 | p_response = NULL; | |
0194ce8f | 1128 | } else if (receivedCmd[0] == MIFARE_ULEV1_INCR_CNT && tagType == 7) { // Received a INC COUNTER -- |
ce3d6bd2 | 1129 | // number of counter |
a126332a | 1130 | uint8_t counter = receivedCmd[1]; |
1131 | uint32_t val = bytes_to_num(receivedCmd+2,4); | |
1132 | counters[counter] = val; | |
1133 | ||
ce3d6bd2 | 1134 | // send ACK |
1135 | uint8_t ack[] = {0x0a}; | |
1136 | EmSendCmdEx(ack,sizeof(ack),false); | |
91c7a7cc | 1137 | p_response = NULL; |
0194ce8f | 1138 | } else if(receivedCmd[0] == MIFARE_ULEV1_CHECKTEAR && tagType == 7) { // Received a CHECK_TEARING_EVENT -- |
f38cfd66 | 1139 | // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature] |
2b1f4228 | 1140 | uint8_t emdata[3]; |
1141 | uint8_t counter=0; | |
1142 | if (receivedCmd[1]<3) counter = receivedCmd[1]; | |
1143 | emlGetMemBt( emdata, 10+counter, 1); | |
1144 | AppendCrc14443a(emdata, sizeof(emdata)-2); | |
1145 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
b0300679 | 1146 | p_response = NULL; |
0194ce8f | 1147 | } else if(receivedCmd[0] == ISO14443A_CMD_HALT) { // Received a HALT |
810f5379 | 1148 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1149 | p_response = NULL; |
57850d9d | 1150 | } else if(receivedCmd[0] == MIFARE_AUTH_KEYA || receivedCmd[0] == MIFARE_AUTH_KEYB) { // Received an authentication request |
32719adf | 1151 | if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request. |
2b1f4228 | 1152 | uint8_t emdata[10]; |
1153 | emlGetMemBt( emdata, 0, 8 ); | |
1154 | AppendCrc14443a(emdata, sizeof(emdata)-2); | |
6b23be6b | 1155 | EmSendCmdEx(emdata, sizeof(emdata), false); |
2b1f4228 | 1156 | p_response = NULL; |
32719adf | 1157 | } else { |
6b23be6b | 1158 | cardAUTHSC = receivedCmd[1] / 4; // received block num |
1159 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
32719adf | 1160 | p_response = &responses[5]; order = 7; |
1161 | } | |
0194ce8f | 1162 | } else if(receivedCmd[0] == ISO14443A_CMD_RATS) { // Received a RATS request |
7bc95e2e | 1163 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1164 | EmSend4bit(CARD_NACK_NA); | |
1165 | p_response = NULL; | |
1166 | } else { | |
1167 | p_response = &responses[6]; order = 70; | |
1168 | } | |
6a1f2d82 | 1169 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
810f5379 | 1170 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1171 | uint32_t nr = bytes_to_num(receivedCmd,4); |
1172 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
d26849d4 | 1173 | |
6b23be6b | 1174 | // Collect AR/NR per keytype & sector |
bc939371 | 1175 | if ( (flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) { |
6b23be6b | 1176 | for (uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) { |
1177 | if ( ar_nr_collected[i+mM]==0 || ((cardAUTHSC == ar_nr_resp[i+mM].sector) && (cardAUTHKEY == ar_nr_resp[i+mM].keytype) && (ar_nr_collected[i+mM] > 0)) ) { | |
1178 | // if first auth for sector, or matches sector and keytype of previous auth | |
1179 | if (ar_nr_collected[i+mM] < 2) { | |
1180 | // if we haven't already collected 2 nonces for this sector | |
1181 | if (ar_nr_resp[ar_nr_collected[i+mM]].ar != ar) { | |
1182 | // Avoid duplicates... probably not necessary, ar should vary. | |
1183 | if (ar_nr_collected[i+mM]==0) { | |
1184 | // first nonce collect | |
1185 | ar_nr_resp[i+mM].cuid = cuid; | |
1186 | ar_nr_resp[i+mM].sector = cardAUTHSC; | |
1187 | ar_nr_resp[i+mM].keytype = cardAUTHKEY; | |
1188 | ar_nr_resp[i+mM].nonce = nonce; | |
1189 | ar_nr_resp[i+mM].nr = nr; | |
1190 | ar_nr_resp[i+mM].ar = ar; | |
1191 | nonce1_count++; | |
1192 | // add this nonce to first moebius nonce | |
1193 | ar_nr_resp[i+ATTACK_KEY_COUNT].cuid = cuid; | |
1194 | ar_nr_resp[i+ATTACK_KEY_COUNT].sector = cardAUTHSC; | |
1195 | ar_nr_resp[i+ATTACK_KEY_COUNT].keytype = cardAUTHKEY; | |
1196 | ar_nr_resp[i+ATTACK_KEY_COUNT].nonce = nonce; | |
1197 | ar_nr_resp[i+ATTACK_KEY_COUNT].nr = nr; | |
1198 | ar_nr_resp[i+ATTACK_KEY_COUNT].ar = ar; | |
1199 | ar_nr_collected[i+ATTACK_KEY_COUNT]++; | |
1200 | } else { // second nonce collect (std and moebius) | |
1201 | ar_nr_resp[i+mM].nonce2 = nonce; | |
1202 | ar_nr_resp[i+mM].nr2 = nr; | |
1203 | ar_nr_resp[i+mM].ar2 = ar; | |
1204 | if (!gettingMoebius) { | |
1205 | nonce2_count++; | |
1206 | // check if this was the last second nonce we need for std attack | |
1207 | if ( nonce2_count == nonce1_count ) { | |
1208 | // done collecting std test switch to moebius | |
1209 | // first finish incrementing last sample | |
1210 | ar_nr_collected[i+mM]++; | |
1211 | // switch to moebius collection | |
1212 | gettingMoebius = true; | |
1213 | mM = ATTACK_KEY_COUNT; | |
1214 | break; | |
1215 | } | |
1216 | } else { | |
1217 | moebius_n_count++; | |
1218 | // if we've collected all the nonces we need - finish. | |
1219 | if (nonce1_count == moebius_n_count) { | |
1220 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_resp,sizeof(ar_nr_resp)); | |
1221 | nonce1_count = 0; | |
1222 | nonce2_count = 0; | |
1223 | moebius_n_count = 0; | |
1224 | gettingMoebius = false; | |
1225 | } | |
1226 | } | |
1227 | } | |
1228 | ar_nr_collected[i+mM]++; | |
1229 | } | |
1230 | } | |
1231 | // we found right spot for this nonce stop looking | |
1232 | break; | |
1233 | } | |
d26849d4 | 1234 | } |
d26849d4 | 1235 | } |
57850d9d | 1236 | |
0194ce8f | 1237 | } else if (receivedCmd[0] == MIFARE_ULC_AUTH_1 ) { // ULC authentication, or Desfire Authentication |
1238 | } else if (receivedCmd[0] == MIFARE_ULEV1_AUTH) { // NTAG / EV-1 authentication | |
32719adf | 1239 | if ( tagType == 7 ) { |
f38cfd66 | 1240 | uint16_t start = 13; // first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00] |
2b1f4228 | 1241 | uint8_t emdata[4]; |
1242 | emlGetMemBt( emdata, start, 2); | |
1243 | AppendCrc14443a(emdata, 2); | |
1244 | EmSendCmdEx(emdata, sizeof(emdata), false); | |
1245 | p_response = NULL; | |
ce3d6bd2 | 1246 | uint32_t pwd = bytes_to_num(receivedCmd+1,4); |
e98572a1 | 1247 | |
91c7a7cc | 1248 | if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd); |
32719adf | 1249 | } |
2b1f4228 | 1250 | } else { |
7bc95e2e | 1251 | // Check for ISO 14443A-4 compliant commands, look at left nibble |
1252 | switch (receivedCmd[0]) { | |
7838f4be | 1253 | case 0x02: |
1254 | case 0x03: { // IBlock (command no CID) | |
1255 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1256 | dynamic_response_info.response[1] = 0x90; | |
1257 | dynamic_response_info.response[2] = 0x00; | |
1258 | dynamic_response_info.response_n = 3; | |
1259 | } break; | |
7bc95e2e | 1260 | case 0x0B: |
7838f4be | 1261 | case 0x0A: { // IBlock (command CID) |
7bc95e2e | 1262 | dynamic_response_info.response[0] = receivedCmd[0]; |
1263 | dynamic_response_info.response[1] = 0x00; | |
1264 | dynamic_response_info.response[2] = 0x90; | |
1265 | dynamic_response_info.response[3] = 0x00; | |
1266 | dynamic_response_info.response_n = 4; | |
1267 | } break; | |
1268 | ||
1269 | case 0x1A: | |
1270 | case 0x1B: { // Chaining command | |
1271 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1272 | dynamic_response_info.response_n = 2; | |
1273 | } break; | |
1274 | ||
1275 | case 0xaa: | |
1276 | case 0xbb: { | |
1277 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1278 | dynamic_response_info.response_n = 2; | |
1279 | } break; | |
1280 | ||
7838f4be | 1281 | case 0xBA: { // ping / pong |
1282 | dynamic_response_info.response[0] = 0xAB; | |
1283 | dynamic_response_info.response[1] = 0x00; | |
1284 | dynamic_response_info.response_n = 2; | |
7bc95e2e | 1285 | } break; |
1286 | ||
1287 | case 0xCA: | |
1288 | case 0xC2: { // Readers sends deselect command | |
7838f4be | 1289 | dynamic_response_info.response[0] = 0xCA; |
1290 | dynamic_response_info.response[1] = 0x00; | |
1291 | dynamic_response_info.response_n = 2; | |
7bc95e2e | 1292 | } break; |
1293 | ||
1294 | default: { | |
1295 | // Never seen this command before | |
810f5379 | 1296 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1297 | Dbprintf("Received unknown command (len=%d):",len); |
1298 | Dbhexdump(len,receivedCmd,false); | |
1299 | // Do not respond | |
1300 | dynamic_response_info.response_n = 0; | |
1301 | } break; | |
1302 | } | |
ce02f6f9 | 1303 | |
7bc95e2e | 1304 | if (dynamic_response_info.response_n > 0) { |
1305 | // Copy the CID from the reader query | |
1306 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1307 | |
7bc95e2e | 1308 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1309 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1310 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1311 | |
7bc95e2e | 1312 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1313 | Dbprintf("Error preparing tag response"); | |
810f5379 | 1314 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1315 | break; |
1316 | } | |
1317 | p_response = &dynamic_response_info; | |
1318 | } | |
81cd0474 | 1319 | } |
15c4dc5a | 1320 | |
1321 | // Count number of wakeups received after a halt | |
1322 | if(order == 6 && lastorder == 5) { happened++; } | |
1323 | ||
1324 | // Count number of other messages after a halt | |
1325 | if(order != 6 && lastorder == 5) { happened2++; } | |
1326 | ||
bc939371 | 1327 | // comment this limit if you want to simulation longer |
1328 | if (!tracing) { | |
1329 | Dbprintf("Trace Full. Simulation stopped."); | |
1330 | break; | |
1331 | } | |
91c7a7cc | 1332 | // comment this limit if you want to simulation longer |
15c4dc5a | 1333 | if(cmdsRecvd > 999) { |
1334 | DbpString("1000 commands later..."); | |
254b70a4 | 1335 | break; |
15c4dc5a | 1336 | } |
ce02f6f9 | 1337 | cmdsRecvd++; |
1338 | ||
1339 | if (p_response != NULL) { | |
7bc95e2e | 1340 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1341 | // do the tracing for the previous reader request and this tag answer: | |
810f5379 | 1342 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1343 | GetParity(p_response->response, p_response->response_n, par); |
3fe4ff4f | 1344 | |
7bc95e2e | 1345 | EmLogTrace(Uart.output, |
1346 | Uart.len, | |
1347 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1348 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1349 | Uart.parity, |
7bc95e2e | 1350 | p_response->response, |
1351 | p_response->response_n, | |
1352 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1353 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1354 | par); |
7bc95e2e | 1355 | } |
7bc95e2e | 1356 | } |
15c4dc5a | 1357 | |
d26849d4 | 1358 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
5ee53a0e | 1359 | set_tracing(FALSE); |
f71f4deb | 1360 | BigBuf_free_keep_EM(); |
c9216a92 | 1361 | LED_A_OFF(); |
1362 | ||
6b23be6b | 1363 | if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1) { |
1364 | for ( uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) { | |
1365 | if (ar_nr_collected[i] == 2) { | |
1366 | Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector); | |
1367 | Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x", | |
1368 | ar_nr_resp[i].cuid, //UID | |
1369 | ar_nr_resp[i].nonce, //NT | |
1370 | ar_nr_resp[i].nr, //NR1 | |
1371 | ar_nr_resp[i].ar, //AR1 | |
1372 | ar_nr_resp[i].nr2, //NR2 | |
1373 | ar_nr_resp[i].ar2 //AR2 | |
1374 | ); | |
1375 | } | |
1376 | } | |
1377 | for ( uint8_t i = ATTACK_KEY_COUNT; i < ATTACK_KEY_COUNT*2; i++) { | |
1378 | if (ar_nr_collected[i] == 2) { | |
1379 | Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector); | |
1380 | Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x", | |
1381 | ar_nr_resp[i].cuid, //UID | |
1382 | ar_nr_resp[i].nonce, //NT | |
1383 | ar_nr_resp[i].nr, //NR1 | |
1384 | ar_nr_resp[i].ar, //AR1 | |
1385 | ar_nr_resp[i].nonce2,//NT2 | |
1386 | ar_nr_resp[i].nr2, //NR2 | |
1387 | ar_nr_resp[i].ar2 //AR2 | |
1388 | ); | |
1389 | } | |
1390 | } | |
1391 | } | |
1392 | ||
0de8e387 | 1393 | if (MF_DBGLEVEL >= 4){ |
5ee53a0e | 1394 | Dbprintf("-[ Wake ups after halt [%d]", happened); |
1395 | Dbprintf("-[ Messages after halt [%d]", happened2); | |
1396 | Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd); | |
0de8e387 | 1397 | } |
15c4dc5a | 1398 | } |
1399 | ||
9492e0b0 | 1400 | // prepare a delayed transfer. This simply shifts ToSend[] by a number |
1401 | // of bits specified in the delay parameter. | |
0194ce8f | 1402 | void PrepareDelayedTransfer(uint16_t delay) { |
7504dc50 | 1403 | delay &= 0x07; |
1404 | if (!delay) return; | |
1405 | ||
9492e0b0 | 1406 | uint8_t bitmask = 0; |
1407 | uint8_t bits_to_shift = 0; | |
1408 | uint8_t bits_shifted = 0; | |
7504dc50 | 1409 | uint16_t i = 0; |
1410 | ||
1411 | for (i = 0; i < delay; ++i) | |
1412 | bitmask |= (0x01 << i); | |
2285d9dd | 1413 | |
6fc68747 | 1414 | ToSend[++ToSendMax] = 0x00; |
7504dc50 | 1415 | |
1416 | for (i = 0; i < ToSendMax; ++i) { | |
9492e0b0 | 1417 | bits_to_shift = ToSend[i] & bitmask; |
1418 | ToSend[i] = ToSend[i] >> delay; | |
1419 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1420 | bits_shifted = bits_to_shift; | |
1421 | } | |
1422 | } | |
9492e0b0 | 1423 | |
7bc95e2e | 1424 | |
1425 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1426 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1427 | // Parameter timing: |
7bc95e2e | 1428 | // if NULL: transfer at next possible time, taking into account |
1429 | // request guard time and frame delay time | |
1430 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1431 | // if != 0: delay transfer until time specified |
7bc95e2e | 1432 | //------------------------------------------------------------------------------------- |
0194ce8f | 1433 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) { |
9492e0b0 | 1434 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1435 | |
7bc95e2e | 1436 | uint32_t ThisTransferTime = 0; |
e30c654b | 1437 | |
9492e0b0 | 1438 | if (timing) { |
ca5bad3d | 1439 | if(*timing == 0) { // Measure time |
7bc95e2e | 1440 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
ca5bad3d | 1441 | } else { |
1442 | PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1443 | } | |
1444 | if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing"); | |
1445 | while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks) | |
7bc95e2e | 1446 | LastTimeProxToAirStart = *timing; |
1447 | } else { | |
1448 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
7504dc50 | 1449 | |
7bc95e2e | 1450 | while(GetCountSspClk() < ThisTransferTime); |
7504dc50 | 1451 | |
7bc95e2e | 1452 | LastTimeProxToAirStart = ThisTransferTime; |
9492e0b0 | 1453 | } |
1454 | ||
7bc95e2e | 1455 | // clear TXRDY |
1456 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1457 | ||
7bc95e2e | 1458 | uint16_t c = 0; |
9492e0b0 | 1459 | for(;;) { |
1460 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1461 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
4c0cf2d2 | 1462 | ++c; |
5ebcb867 | 1463 | if(c >= len) |
9492e0b0 | 1464 | break; |
9492e0b0 | 1465 | } |
1466 | } | |
7bc95e2e | 1467 | |
1468 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); | |
15c4dc5a | 1469 | } |
1470 | ||
15c4dc5a | 1471 | //----------------------------------------------------------------------------- |
195af472 | 1472 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1473 | //----------------------------------------------------------------------------- |
6b23be6b | 1474 | void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) { |
7bc95e2e | 1475 | int i, j; |
5ebcb867 | 1476 | int last = 0; |
7bc95e2e | 1477 | uint8_t b; |
e30c654b | 1478 | |
7bc95e2e | 1479 | ToSendReset(); |
e30c654b | 1480 | |
7bc95e2e | 1481 | // Start of Communication (Seq. Z) |
1482 | ToSend[++ToSendMax] = SEC_Z; | |
1483 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
7bc95e2e | 1484 | |
1485 | size_t bytecount = nbytes(bits); | |
1486 | // Generate send structure for the data bits | |
1487 | for (i = 0; i < bytecount; i++) { | |
1488 | // Get the current byte to send | |
1489 | b = cmd[i]; | |
1490 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1491 | ||
1492 | for (j = 0; j < bitsleft; j++) { | |
1493 | if (b & 1) { | |
1494 | // Sequence X | |
1495 | ToSend[++ToSendMax] = SEC_X; | |
1496 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1497 | last = 1; | |
1498 | } else { | |
1499 | if (last == 0) { | |
1500 | // Sequence Z | |
1501 | ToSend[++ToSendMax] = SEC_Z; | |
1502 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1503 | } else { | |
1504 | // Sequence Y | |
1505 | ToSend[++ToSendMax] = SEC_Y; | |
1506 | last = 0; | |
1507 | } | |
1508 | } | |
1509 | b >>= 1; | |
1510 | } | |
1511 | ||
6a1f2d82 | 1512 | // Only transmit parity bit if we transmitted a complete byte |
0ec548dc | 1513 | if (j == 8 && parity != NULL) { |
7bc95e2e | 1514 | // Get the parity bit |
6a1f2d82 | 1515 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1516 | // Sequence X |
1517 | ToSend[++ToSendMax] = SEC_X; | |
1518 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1519 | last = 1; | |
1520 | } else { | |
1521 | if (last == 0) { | |
1522 | // Sequence Z | |
1523 | ToSend[++ToSendMax] = SEC_Z; | |
1524 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1525 | } else { | |
1526 | // Sequence Y | |
1527 | ToSend[++ToSendMax] = SEC_Y; | |
1528 | last = 0; | |
1529 | } | |
1530 | } | |
1531 | } | |
1532 | } | |
e30c654b | 1533 | |
7bc95e2e | 1534 | // End of Communication: Logic 0 followed by Sequence Y |
1535 | if (last == 0) { | |
1536 | // Sequence Z | |
1537 | ToSend[++ToSendMax] = SEC_Z; | |
1538 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1539 | } else { | |
1540 | // Sequence Y | |
1541 | ToSend[++ToSendMax] = SEC_Y; | |
1542 | last = 0; | |
1543 | } | |
1544 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1545 | |
7bc95e2e | 1546 | // Convert to length of command: |
4b78d6b3 | 1547 | ++ToSendMax; |
15c4dc5a | 1548 | } |
1549 | ||
195af472 | 1550 | //----------------------------------------------------------------------------- |
1551 | // Prepare reader command to send to FPGA | |
1552 | //----------------------------------------------------------------------------- | |
0194ce8f | 1553 | void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) { |
ca5bad3d | 1554 | CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
195af472 | 1555 | } |
1556 | ||
9ca155ba M |
1557 | //----------------------------------------------------------------------------- |
1558 | // Wait for commands from reader | |
1559 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1560 | // Or return 0 when command is captured | |
1561 | //----------------------------------------------------------------------------- | |
0194ce8f | 1562 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) { |
9ca155ba M |
1563 | *len = 0; |
1564 | ||
1565 | uint32_t timer = 0, vtime = 0; | |
1566 | int analogCnt = 0; | |
1567 | int analogAVG = 0; | |
1568 | ||
1569 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1570 | // only, since we are receiving, not transmitting). | |
1571 | // Signal field is off with the appropriate LED | |
1572 | LED_D_OFF(); | |
1573 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1574 | ||
1575 | // Set ADC to read field strength | |
1576 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1577 | AT91C_BASE_ADC->ADC_MR = | |
0c8d25eb | 1578 | ADC_MODE_PRESCALE(63) | |
1579 | ADC_MODE_STARTUP_TIME(1) | | |
1580 | ADC_MODE_SAMPLE_HOLD_TIME(15); | |
9ca155ba M |
1581 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); |
1582 | // start ADC | |
1583 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1584 | ||
1585 | // Now run a 'software UART' on the stream of incoming samples. | |
6a1f2d82 | 1586 | UartInit(received, parity); |
7bc95e2e | 1587 | |
1588 | // Clear RXRDY: | |
1589 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1590 | |
9ca155ba M |
1591 | for(;;) { |
1592 | WDT_HIT(); | |
1593 | ||
1594 | if (BUTTON_PRESS()) return 1; | |
1595 | ||
1596 | // test if the field exists | |
1597 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1598 | analogCnt++; | |
1599 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1600 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1601 | if (analogCnt >= 32) { | |
0c8d25eb | 1602 | if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { |
9ca155ba M |
1603 | vtime = GetTickCount(); |
1604 | if (!timer) timer = vtime; | |
1605 | // 50ms no field --> card to idle state | |
1606 | if (vtime - timer > 50) return 2; | |
1607 | } else | |
1608 | if (timer) timer = 0; | |
1609 | analogCnt = 0; | |
1610 | analogAVG = 0; | |
1611 | } | |
1612 | } | |
7bc95e2e | 1613 | |
9ca155ba | 1614 | // receive and test the miller decoding |
7bc95e2e | 1615 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1616 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1617 | if(MillerDecoding(b, 0)) { | |
1618 | *len = Uart.len; | |
9ca155ba M |
1619 | return 0; |
1620 | } | |
7bc95e2e | 1621 | } |
9ca155ba M |
1622 | } |
1623 | } | |
1624 | ||
0194ce8f | 1625 | int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) { |
7bc95e2e | 1626 | uint8_t b; |
1627 | uint16_t i = 0; | |
1628 | uint32_t ThisTransferTime; | |
1629 | ||
9ca155ba M |
1630 | // Modulate Manchester |
1631 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1632 | |
1633 | // include correction bit if necessary | |
1634 | if (Uart.parityBits & 0x01) { | |
1635 | correctionNeeded = TRUE; | |
1636 | } | |
0194ce8f | 1637 | // 1236, so correction bit needed |
1638 | i = (correctionNeeded) ? 0 : 1; | |
7bc95e2e | 1639 | |
d714d3ef | 1640 | // clear receiving shift register and holding register |
7bc95e2e | 1641 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1642 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1643 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1644 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1645 | |
7bc95e2e | 1646 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
b070f4e4 | 1647 | for (uint8_t j = 0; j < 5; j++) { // allow timeout - better late than never |
7bc95e2e | 1648 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1649 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1650 | } | |
1651 | ||
1652 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1653 | ||
1654 | // Clear TXRDY: | |
1655 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1656 | ||
9ca155ba | 1657 | // send cycle |
bb42a03e | 1658 | for(; i < respLen; ) { |
9ca155ba | 1659 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1660 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1661 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1662 | } |
7bc95e2e | 1663 | |
17ad0e09 | 1664 | if(BUTTON_PRESS()) break; |
9ca155ba M |
1665 | } |
1666 | ||
7bc95e2e | 1667 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
4b78d6b3 | 1668 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; // twich /8 ?? >>3, |
0c8d25eb | 1669 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { |
7bc95e2e | 1670 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
1671 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1672 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1673 | i++; | |
1674 | } | |
1675 | } | |
7bc95e2e | 1676 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); |
9ca155ba M |
1677 | return 0; |
1678 | } | |
1679 | ||
7bc95e2e | 1680 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1681 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1682 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1683 | // do the tracing for the previous reader request and this tag answer: |
5ebcb867 | 1684 | uint8_t par[1] = {0x00}; |
6a1f2d82 | 1685 | GetParity(&resp, 1, par); |
7bc95e2e | 1686 | EmLogTrace(Uart.output, |
1687 | Uart.len, | |
1688 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1689 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1690 | Uart.parity, |
7bc95e2e | 1691 | &resp, |
1692 | 1, | |
1693 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1694 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1695 | par); |
0a39986e | 1696 | return res; |
9ca155ba M |
1697 | } |
1698 | ||
8f51ddb0 | 1699 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1700 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1701 | } |
1702 | ||
6a1f2d82 | 1703 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1704 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1705 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1706 | // do the tracing for the previous reader request and this tag answer: |
1707 | EmLogTrace(Uart.output, | |
1708 | Uart.len, | |
1709 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1710 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1711 | Uart.parity, |
7bc95e2e | 1712 | resp, |
1713 | respLen, | |
1714 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1715 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1716 | par); |
8f51ddb0 M |
1717 | return res; |
1718 | } | |
1719 | ||
6a1f2d82 | 1720 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
5ebcb867 | 1721 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1722 | GetParity(resp, respLen, par); |
1723 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 M |
1724 | } |
1725 | ||
6a1f2d82 | 1726 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ |
5ebcb867 | 1727 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; |
6a1f2d82 | 1728 | GetParity(resp, respLen, par); |
1729 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1730 | } |
1731 | ||
6a1f2d82 | 1732 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1733 | return EmSendCmdExPar(resp, respLen, false, par); |
1734 | } | |
1735 | ||
6a1f2d82 | 1736 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1737 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1738 | { |
810f5379 | 1739 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from |
1740 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1741 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1742 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1743 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1744 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1745 | reader_EndTime = tag_StartTime - exact_fdt; | |
1746 | reader_StartTime = reader_EndTime - reader_modlen; | |
5ebcb867 | 1747 | |
810f5379 | 1748 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) |
1749 | return FALSE; | |
1750 | else | |
1751 | return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE)); | |
1752 | ||
9ca155ba M |
1753 | } |
1754 | ||
15c4dc5a | 1755 | //----------------------------------------------------------------------------- |
1756 | // Wait a certain time for tag response | |
1757 | // If a response is captured return TRUE | |
e691fc45 | 1758 | // If it takes too long return FALSE |
15c4dc5a | 1759 | //----------------------------------------------------------------------------- |
0194ce8f | 1760 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) { |
46c65fed | 1761 | uint32_t c = 0x00; |
e691fc45 | 1762 | |
15c4dc5a | 1763 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1764 | // only, since we are receiving, not transmitting). |
1765 | // Signal field is on with the appropriate LED | |
1766 | LED_D_ON(); | |
1767 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1768 | |
534983d7 | 1769 | // Now get the answer from the card |
6a1f2d82 | 1770 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 1771 | |
7bc95e2e | 1772 | // clear RXRDY: |
1773 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1774 | |
15c4dc5a | 1775 | for(;;) { |
534983d7 | 1776 | WDT_HIT(); |
15c4dc5a | 1777 | |
534983d7 | 1778 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1779 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1780 | if(ManchesterDecoding(b, offset, 0)) { |
1781 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
15c4dc5a | 1782 | return TRUE; |
19a700a8 | 1783 | } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) { |
7bc95e2e | 1784 | return FALSE; |
15c4dc5a | 1785 | } |
534983d7 | 1786 | } |
1787 | } | |
15c4dc5a | 1788 | } |
1789 | ||
0194ce8f | 1790 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) { |
72e6d462 | 1791 | |
6a1f2d82 | 1792 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
7bc95e2e | 1793 | // Send command to tag |
1794 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
0194ce8f | 1795 | if(trigger) LED_A_ON(); |
dfc3c505 | 1796 | |
4b78d6b3 | 1797 | LogTrace(frame, nbytes(bits), (LastTimeProxToAirStart<<4) + DELAY_ARM2AIR_AS_READER, ((LastTimeProxToAirStart + LastProxToAirDuration)<<4) + DELAY_ARM2AIR_AS_READER, par, TRUE); |
15c4dc5a | 1798 | } |
1799 | ||
0194ce8f | 1800 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) { |
ca5bad3d | 1801 | ReaderTransmitBitsPar(frame, len*8, par, timing); |
dfc3c505 | 1802 | } |
15c4dc5a | 1803 | |
0194ce8f | 1804 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) { |
72e6d462 | 1805 | // Generate parity and redirect |
1806 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; | |
1807 | GetParity(frame, len/8, par); | |
1808 | ReaderTransmitBitsPar(frame, len, par, timing); | |
e691fc45 | 1809 | } |
1810 | ||
0194ce8f | 1811 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) { |
72e6d462 | 1812 | // Generate parity and redirect |
1813 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; | |
1814 | GetParity(frame, len, par); | |
1815 | ReaderTransmitBitsPar(frame, len*8, par, timing); | |
15c4dc5a | 1816 | } |
1817 | ||
0194ce8f | 1818 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) { |
1819 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) | |
1820 | return FALSE; | |
1821 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); | |
e691fc45 | 1822 | return Demod.len; |
1823 | } | |
1824 | ||
91c7a7cc | 1825 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) { |
0194ce8f | 1826 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) |
1827 | return FALSE; | |
91c7a7cc | 1828 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
e691fc45 | 1829 | return Demod.len; |
f89c7050 M |
1830 | } |
1831 | ||
c188b1b9 | 1832 | // performs iso14443a anticollision (optional) and card select procedure |
1833 | // fills the uid and cuid pointer unless NULL | |
1834 | // fills the card info record unless NULL | |
1835 | // if anticollision is false, then the UID must be provided in uid_ptr[] | |
1836 | // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID) | |
1837 | int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) { | |
6a1f2d82 | 1838 | uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP |
1839 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1840 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1841 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
4c0cf2d2 | 1842 | uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller |
1843 | uint8_t resp_par[MAX_PARITY_SIZE] = {0}; | |
1844 | byte_t uid_resp[4] = {0}; | |
1845 | size_t uid_resp_len = 0; | |
6a1f2d82 | 1846 | |
1847 | uint8_t sak = 0x04; // cascade uid | |
1848 | int cascade_level = 0; | |
1849 | int len; | |
1850 | ||
1851 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field | |
c188b1b9 | 1852 | ReaderTransmitBitsPar(wupa, 7, NULL, NULL); |
7bc95e2e | 1853 | |
6a1f2d82 | 1854 | // Receive the ATQA |
1855 | if(!ReaderReceive(resp, resp_par)) return 0; | |
6a1f2d82 | 1856 | |
1857 | if(p_hi14a_card) { | |
1858 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1859 | p_hi14a_card->uidlen = 0; | |
1860 | memset(p_hi14a_card->uid,0,10); | |
1861 | } | |
5f6d6c90 | 1862 | |
c188b1b9 | 1863 | if (anticollision) { |
4c0cf2d2 | 1864 | // clear uid |
1865 | if (uid_ptr) | |
1866 | memset(uid_ptr,0,10); | |
c188b1b9 | 1867 | } |
79a73ab2 | 1868 | |
0ec548dc | 1869 | // check for proprietary anticollision: |
4c0cf2d2 | 1870 | if ((resp[0] & 0x1F) == 0) return 3; |
0ec548dc | 1871 | |
6a1f2d82 | 1872 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1873 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1874 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1875 | for(; sak & 0x04; cascade_level++) { | |
1876 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1877 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1878 | ||
c188b1b9 | 1879 | if (anticollision) { |
6a1f2d82 | 1880 | // SELECT_ALL |
4c0cf2d2 | 1881 | ReaderTransmit(sel_all, sizeof(sel_all), NULL); |
1882 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1883 | ||
1884 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit | |
1885 | memset(uid_resp, 0, 4); | |
1886 | uint16_t uid_resp_bits = 0; | |
1887 | uint16_t collision_answer_offset = 0; | |
1888 | // anti-collision-loop: | |
1889 | while (Demod.collisionPos) { | |
1890 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1891 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1892 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
1893 | uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8); | |
1894 | } | |
1895 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1896 | uid_resp_bits++; | |
1897 | // construct anticollosion command: | |
1898 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1899 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1900 | sel_uid[2+i] = uid_resp[i]; | |
1901 | } | |
1902 | collision_answer_offset = uid_resp_bits%8; | |
1903 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
1904 | if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0; | |
6a1f2d82 | 1905 | } |
4c0cf2d2 | 1906 | // finally, add the last bits and BCC of the UID |
1907 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1908 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1909 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
6a1f2d82 | 1910 | } |
e691fc45 | 1911 | |
4c0cf2d2 | 1912 | } else { // no collision, use the response to SELECT_ALL as current uid |
1913 | memcpy(uid_resp, resp, 4); | |
1914 | } | |
1915 | ||
c188b1b9 | 1916 | } else { |
1917 | if (cascade_level < num_cascades - 1) { | |
1918 | uid_resp[0] = 0x88; | |
1919 | memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3); | |
1920 | } else { | |
1921 | memcpy(uid_resp, uid_ptr+cascade_level*3, 4); | |
1922 | } | |
1923 | } | |
6a1f2d82 | 1924 | uid_resp_len = 4; |
5f6d6c90 | 1925 | |
6a1f2d82 | 1926 | // calculate crypto UID. Always use last 4 Bytes. |
4c0cf2d2 | 1927 | if(cuid_ptr) |
6a1f2d82 | 1928 | *cuid_ptr = bytes_to_num(uid_resp, 4); |
e30c654b | 1929 | |
6a1f2d82 | 1930 | // Construct SELECT UID command |
1931 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) | |
c188b1b9 | 1932 | memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID |
6a1f2d82 | 1933 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC |
1934 | AppendCrc14443a(sel_uid, 7); // calculate and add CRC | |
1935 | ReaderTransmit(sel_uid, sizeof(sel_uid), NULL); | |
1936 | ||
1937 | // Receive the SAK | |
1938 | if (!ReaderReceive(resp, resp_par)) return 0; | |
4c0cf2d2 | 1939 | |
6a1f2d82 | 1940 | sak = resp[0]; |
1941 | ||
810f5379 | 1942 | // Test if more parts of the uid are coming |
6a1f2d82 | 1943 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { |
1944 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: | |
1945 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
6a1f2d82 | 1946 | uid_resp[0] = uid_resp[1]; |
1947 | uid_resp[1] = uid_resp[2]; | |
1948 | uid_resp[2] = uid_resp[3]; | |
6a1f2d82 | 1949 | uid_resp_len = 3; |
1950 | } | |
5f6d6c90 | 1951 | |
4c0cf2d2 | 1952 | if(uid_ptr && anticollision) |
6a1f2d82 | 1953 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); |
5f6d6c90 | 1954 | |
6a1f2d82 | 1955 | if(p_hi14a_card) { |
1956 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
1957 | p_hi14a_card->uidlen += uid_resp_len; | |
1958 | } | |
1959 | } | |
79a73ab2 | 1960 | |
6a1f2d82 | 1961 | if(p_hi14a_card) { |
1962 | p_hi14a_card->sak = sak; | |
1963 | p_hi14a_card->ats_len = 0; | |
1964 | } | |
534983d7 | 1965 | |
3fe4ff4f | 1966 | // non iso14443a compliant tag |
1967 | if( (sak & 0x20) == 0) return 2; | |
534983d7 | 1968 | |
6a1f2d82 | 1969 | // Request for answer to select |
1970 | AppendCrc14443a(rats, 2); | |
1971 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 1972 | |
6a1f2d82 | 1973 | if (!(len = ReaderReceive(resp, resp_par))) return 0; |
3fe4ff4f | 1974 | |
6a1f2d82 | 1975 | if(p_hi14a_card) { |
1976 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
1977 | p_hi14a_card->ats_len = len; | |
1978 | } | |
5f6d6c90 | 1979 | |
6a1f2d82 | 1980 | // reset the PCB block number |
1981 | iso14_pcb_blocknum = 0; | |
19a700a8 | 1982 | |
1983 | // set default timeout based on ATS | |
1984 | iso14a_set_ATS_timeout(resp); | |
1985 | ||
6a1f2d82 | 1986 | return 1; |
7e758047 | 1987 | } |
15c4dc5a | 1988 | |
7bc95e2e | 1989 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 1990 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 1991 | // Set up the synchronous serial port |
1992 | FpgaSetupSsc(); | |
7bc95e2e | 1993 | // connect Demodulated Signal to ADC: |
7e758047 | 1994 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
91c7a7cc | 1995 | |
1996 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
ca5bad3d | 1997 | |
1998 | LED_D_OFF(); | |
7e758047 | 1999 | // Signal field is on with the appropriate LED |
ca5bad3d | 2000 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || |
2001 | fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) | |
7bc95e2e | 2002 | LED_D_ON(); |
6fc68747 | 2003 | |
91c7a7cc | 2004 | // Prepare the demodulation functions |
7bc95e2e | 2005 | DemodReset(); |
2006 | UartReset(); | |
6fc68747 | 2007 | |
46c65fed | 2008 | iso14a_set_timeout(10*106); // 10ms default |
91c7a7cc | 2009 | |
2010 | //NextTransferTime = 2 * DELAY_ARM2AIR_AS_READER; | |
2011 | NextTransferTime = DELAY_ARM2AIR_AS_READER << 1; | |
6fc68747 | 2012 | |
2013 | // Start the timer | |
2014 | StartCountSspClk(); | |
7e758047 | 2015 | } |
15c4dc5a | 2016 | |
6a1f2d82 | 2017 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
810f5379 | 2018 | uint8_t parity[MAX_PARITY_SIZE] = {0x00}; |
534983d7 | 2019 | uint8_t real_cmd[cmd_len+4]; |
2020 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 2021 | // put block number into the PCB |
2022 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 2023 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
2024 | memcpy(real_cmd+2, cmd, cmd_len); | |
2025 | AppendCrc14443a(real_cmd,cmd_len+2); | |
2026 | ||
9492e0b0 | 2027 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
6a1f2d82 | 2028 | size_t len = ReaderReceive(data, parity); |
ca5bad3d | 2029 | //DATA LINK ERROR |
2030 | if (!len) return 0; | |
2031 | ||
6a1f2d82 | 2032 | uint8_t *data_bytes = (uint8_t *) data; |
ca5bad3d | 2033 | |
b0127e65 | 2034 | // if we received an I- or R(ACK)-Block with a block number equal to the |
2035 | // current block number, toggle the current block number | |
ca5bad3d | 2036 | if (len >= 4 // PCB+CID+CRC = 4 bytes |
b0127e65 | 2037 | && ((data_bytes[0] & 0xC0) == 0 // I-Block |
2038 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
2039 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
2040 | { | |
2041 | iso14_pcb_blocknum ^= 1; | |
2042 | } | |
2043 | ||
534983d7 | 2044 | return len; |
2045 | } | |
2046 | ||
7e758047 | 2047 | //----------------------------------------------------------------------------- |
2048 | // Read an ISO 14443a tag. Send out commands and store answers. | |
2049 | // | |
2050 | //----------------------------------------------------------------------------- | |
91c7a7cc | 2051 | void ReaderIso14443a(UsbCommand *c) { |
534983d7 | 2052 | iso14a_command_t param = c->arg[0]; |
04bc1c66 | 2053 | size_t len = c->arg[1] & 0xffff; |
2054 | size_t lenbits = c->arg[1] >> 16; | |
2055 | uint32_t timeout = c->arg[2]; | |
91c7a7cc | 2056 | uint8_t *cmd = c->d.asBytes; |
9492e0b0 | 2057 | uint32_t arg0 = 0; |
810f5379 | 2058 | byte_t buf[USB_CMD_DATA_SIZE] = {0x00}; |
2059 | uint8_t par[MAX_PARITY_SIZE] = {0x00}; | |
902cb3c0 | 2060 | |
810f5379 | 2061 | if (param & ISO14A_CONNECT) |
3000dc4e | 2062 | clear_trace(); |
e691fc45 | 2063 | |
3000dc4e | 2064 | set_tracing(TRUE); |
e30c654b | 2065 | |
810f5379 | 2066 | if (param & ISO14A_REQUEST_TRIGGER) |
7bc95e2e | 2067 | iso14a_set_trigger(TRUE); |
15c4dc5a | 2068 | |
810f5379 | 2069 | if (param & ISO14A_CONNECT) { |
7bc95e2e | 2070 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 2071 | if(!(param & ISO14A_NO_SELECT)) { |
2072 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
c188b1b9 | 2073 | arg0 = iso14443a_select_card(NULL,card,NULL, true, 0); |
91c7a7cc | 2074 | cmd_send(CMD_ACK, arg0, card->uidlen, 0, buf, sizeof(iso14a_card_select_t)); |
6fc68747 | 2075 | // if it fails, the cmdhf14a.c client quites.. however this one still executes. |
2076 | if ( arg0 == 0 ) return; | |
5f6d6c90 | 2077 | } |
534983d7 | 2078 | } |
e30c654b | 2079 | |
810f5379 | 2080 | if (param & ISO14A_SET_TIMEOUT) |
04bc1c66 | 2081 | iso14a_set_timeout(timeout); |
e30c654b | 2082 | |
810f5379 | 2083 | if (param & ISO14A_APDU) { |
902cb3c0 | 2084 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 2085 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 2086 | } |
e30c654b | 2087 | |
810f5379 | 2088 | if (param & ISO14A_RAW) { |
534983d7 | 2089 | if(param & ISO14A_APPEND_CRC) { |
0ec548dc | 2090 | if(param & ISO14A_TOPAZMODE) { |
2091 | AppendCrc14443b(cmd,len); | |
2092 | } else { | |
d26849d4 | 2093 | AppendCrc14443a(cmd,len); |
0ec548dc | 2094 | } |
534983d7 | 2095 | len += 2; |
c7324bef | 2096 | if (lenbits) lenbits += 16; |
15c4dc5a | 2097 | } |
0ec548dc | 2098 | if(lenbits>0) { // want to send a specific number of bits (e.g. short commands) |
2099 | if(param & ISO14A_TOPAZMODE) { | |
2100 | int bits_to_send = lenbits; | |
2101 | uint16_t i = 0; | |
2102 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity | |
2103 | bits_to_send -= 7; | |
2104 | while (bits_to_send > 0) { | |
2105 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity | |
2106 | bits_to_send -= 8; | |
2107 | } | |
2108 | } else { | |
6a1f2d82 | 2109 | GetParity(cmd, lenbits/8, par); |
0ec548dc | 2110 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity |
2111 | } | |
2112 | } else { // want to send complete bytes only | |
2113 | if(param & ISO14A_TOPAZMODE) { | |
2114 | uint16_t i = 0; | |
2115 | ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy | |
2116 | while (i < len) { | |
2117 | ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy | |
2118 | } | |
5f6d6c90 | 2119 | } else { |
0ec548dc | 2120 | ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity |
2121 | } | |
5f6d6c90 | 2122 | } |
6a1f2d82 | 2123 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 2124 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 2125 | } |
15c4dc5a | 2126 | |
810f5379 | 2127 | if (param & ISO14A_REQUEST_TRIGGER) |
7bc95e2e | 2128 | iso14a_set_trigger(FALSE); |
15c4dc5a | 2129 | |
810f5379 | 2130 | if (param & ISO14A_NO_DISCONNECT) |
534983d7 | 2131 | return; |
15c4dc5a | 2132 | |
15c4dc5a | 2133 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
5ee53a0e | 2134 | set_tracing(FALSE); |
15c4dc5a | 2135 | LEDsoff(); |
15c4dc5a | 2136 | } |
b0127e65 | 2137 | |
1c611bbd | 2138 | // Determine the distance between two nonces. |
2139 | // Assume that the difference is small, but we don't know which is first. | |
2140 | // Therefore try in alternating directions. | |
2141 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
2142 | ||
ca5bad3d | 2143 | if (nt1 == nt2) return 0; |
ca5bad3d | 2144 | |
91c7a7cc | 2145 | uint32_t nttmp1 = nt1; |
2146 | uint32_t nttmp2 = nt2; | |
2147 | ||
f38cfd66 | 2148 | for (uint16_t i = 1; i < 0xFFFF; ++i) { |
bc939371 | 2149 | nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i; |
2150 | nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -i; | |
91c7a7cc | 2151 | } |
2152 | // either nt1 or nt2 are invalid nonces | |
2153 | return(-99999); | |
e772353f | 2154 | } |
2155 | ||
1c611bbd | 2156 | //----------------------------------------------------------------------------- |
2157 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2158 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2159 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2160 | // (article by Nicolas T. Courtois, 2009) | |
2161 | //----------------------------------------------------------------------------- | |
f38cfd66 | 2162 | |
df007486 | 2163 | void ReaderMifare(bool first_try, uint8_t block, uint8_t keytype ) { |
2164 | ||
2165 | uint8_t mf_auth[] = { keytype, block, 0x00, 0x00 }; | |
b0300679 | 2166 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; |
2167 | uint8_t uid[10] = {0,0,0,0,0,0,0,0,0,0}; | |
2168 | uint8_t par_list[8] = {0,0,0,0,0,0,0,0}; | |
2169 | uint8_t ks_list[8] = {0,0,0,0,0,0,0,0}; | |
495d7f13 | 2170 | uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
2171 | uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
b0300679 | 2172 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
1c611bbd | 2173 | byte_t nt_diff = 0; |
6a1f2d82 | 2174 | uint32_t nt = 0; |
b0300679 | 2175 | uint32_t previous_nt = 0; |
b0300679 | 2176 | uint32_t cuid = 0; |
2177 | ||
91c7a7cc | 2178 | int32_t catch_up_cycles = 0; |
2179 | int32_t last_catch_up = 0; | |
2180 | int32_t isOK = 0; | |
2181 | int32_t nt_distance = 0; | |
b0300679 | 2182 | |
4c0cf2d2 | 2183 | uint16_t elapsed_prng_sequences = 1; |
1c611bbd | 2184 | uint16_t consecutive_resyncs = 0; |
0de8e387 | 2185 | uint16_t unexpected_random = 0; |
2186 | uint16_t sync_tries = 0; | |
b0300679 | 2187 | |
bc939371 | 2188 | // static variables here, is re-used in the next call |
b0300679 | 2189 | static uint32_t nt_attacked = 0; |
2190 | static uint32_t sync_time = 0; | |
91c7a7cc | 2191 | static uint32_t sync_cycles = 0; |
b0300679 | 2192 | static uint8_t par_low = 0; |
2193 | static uint8_t mf_nr_ar3 = 0; | |
91c7a7cc | 2194 | |
b0300679 | 2195 | #define PRNG_SEQUENCE_LENGTH (1 << 16) |
2196 | #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up. | |
2197 | #define MAX_SYNC_TRIES 32 | |
df007486 | 2198 | |
2199 | AppendCrc14443a(mf_auth, 2); | |
2200 | ||
91c7a7cc | 2201 | BigBuf_free(); BigBuf_Clear_ext(false); |
4b78d6b3 | 2202 | clear_trace(); |
91c7a7cc | 2203 | set_tracing(TRUE); |
2204 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); | |
4c0cf2d2 | 2205 | |
6067df30 | 2206 | sync_time = GetCountSspClk() & 0xfffffff8; |
2207 | // iceman, i add 1130 because during my observations this makse the syncronization much fast to sync. | |
2208 | sync_cycles = PRNG_SEQUENCE_LENGTH + 1130; //65536; // Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces). | |
f38cfd66 | 2209 | nt_attacked = 0; |
2210 | ||
2211 | if (MF_DBGLEVEL >= 4) Dbprintf("Mifare::Sync %08x", sync_time); | |
2212 | ||
6067df30 | 2213 | if (first_try) { |
f38cfd66 | 2214 | mf_nr_ar3 = 0; |
91c7a7cc | 2215 | par_low = 0; |
4c0cf2d2 | 2216 | } else { |
b0300679 | 2217 | // we were unsuccessful on a previous call. |
2218 | // Try another READER nonce (first 3 parity bits remain the same) | |
2219 | ++mf_nr_ar3; | |
4c0cf2d2 | 2220 | mf_nr_ar[3] = mf_nr_ar3; |
2221 | par[0] = par_low; | |
2222 | } | |
91c7a7cc | 2223 | |
2224 | bool have_uid = FALSE; | |
2225 | uint8_t cascade_levels = 0; | |
2226 | ||
4c0cf2d2 | 2227 | LED_C_ON(); |
91c7a7cc | 2228 | uint16_t i; |
2229 | for(i = 0; TRUE; ++i) { | |
4c0cf2d2 | 2230 | |
1c611bbd | 2231 | WDT_HIT(); |
e30c654b | 2232 | |
1c611bbd | 2233 | // Test if the action was cancelled |
c830303d | 2234 | if(BUTTON_PRESS()) { |
2235 | isOK = -1; | |
1c611bbd | 2236 | break; |
2237 | } | |
2238 | ||
91c7a7cc | 2239 | // this part is from Piwi's faster nonce collecting part in Hardnested. |
2240 | if (!have_uid) { // need a full select cycle to get the uid first | |
2241 | iso14a_card_select_t card_info; | |
2242 | if(!iso14443a_select_card(uid, &card_info, &cuid, true, 0)) { | |
2243 | if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (ALL)"); | |
2244 | break; | |
2245 | } | |
2246 | switch (card_info.uidlen) { | |
2247 | case 4 : cascade_levels = 1; break; | |
2248 | case 7 : cascade_levels = 2; break; | |
2249 | case 10: cascade_levels = 3; break; | |
2250 | default: break; | |
2251 | } | |
2252 | have_uid = TRUE; | |
2253 | } else { // no need for anticollision. We can directly select the card | |
2254 | if(!iso14443a_select_card(uid, NULL, &cuid, false, cascade_levels)) { | |
2255 | if (MF_DBGLEVEL >= 4) Dbprintf("Mifare: Can't select card (UID)"); | |
2256 | continue; | |
2257 | } | |
1c611bbd | 2258 | } |
4c0cf2d2 | 2259 | |
91c7a7cc | 2260 | // Sending timeslot of ISO14443a frame |
2261 | sync_time = (sync_time & 0xfffffff8 ) + sync_cycles + catch_up_cycles; | |
4b78d6b3 | 2262 | catch_up_cycles = 0; |
2263 | ||
2264 | // if we missed the sync time already, advance to the next nonce repeat | |
91c7a7cc | 2265 | while( GetCountSspClk() > sync_time) { |
4b78d6b3 | 2266 | ++elapsed_prng_sequences; |
91c7a7cc | 2267 | sync_time = (sync_time & 0xfffffff8 ) + sync_cycles; |
2268 | } | |
2269 | ||
2270 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) | |
2271 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
f89c7050 | 2272 | |
91c7a7cc | 2273 | // Receive the (4 Byte) "random" nonce from TAG |
4c0cf2d2 | 2274 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) |
1c611bbd | 2275 | continue; |
1c611bbd | 2276 | |
4b78d6b3 | 2277 | previous_nt = nt; |
2278 | nt = bytes_to_num(receivedAnswer, 4); | |
2279 | ||
91c7a7cc | 2280 | // Transmit reader nonce with fake par |
2281 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); | |
2282 | ||
6067df30 | 2283 | // we didn't calibrate our clock yet, |
2284 | // iceman: has to be calibrated every time. | |
f38cfd66 | 2285 | if (first_try && previous_nt && !nt_attacked) { |
91c7a7cc | 2286 | |
2287 | nt_distance = dist_nt(previous_nt, nt); | |
2288 | ||
2289 | // if no distance between, then we are in sync. | |
1c611bbd | 2290 | if (nt_distance == 0) { |
2291 | nt_attacked = nt; | |
0de8e387 | 2292 | } else { |
c830303d | 2293 | if (nt_distance == -99999) { // invalid nonce received |
91c7a7cc | 2294 | ++unexpected_random; |
3bc7b13d | 2295 | if (unexpected_random > MAX_UNEXPECTED_RANDOM) { |
c830303d | 2296 | isOK = -3; // Card has an unpredictable PRNG. Give up |
2297 | break; | |
91c7a7cc | 2298 | } else { |
2299 | if (sync_cycles <= 0) sync_cycles += PRNG_SEQUENCE_LENGTH; | |
2300 | LED_B_OFF(); | |
c830303d | 2301 | continue; // continue trying... |
2302 | } | |
1c611bbd | 2303 | } |
4c0cf2d2 | 2304 | |
0de8e387 | 2305 | if (++sync_tries > MAX_SYNC_TRIES) { |
91c7a7cc | 2306 | isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly |
2307 | break; | |
0de8e387 | 2308 | } |
4c0cf2d2 | 2309 | |
4b78d6b3 | 2310 | sync_cycles = (sync_cycles - nt_distance)/elapsed_prng_sequences; |
91c7a7cc | 2311 | |
4c0cf2d2 | 2312 | if (sync_cycles <= 0) |
0de8e387 | 2313 | sync_cycles += PRNG_SEQUENCE_LENGTH; |
4c0cf2d2 | 2314 | |
91c7a7cc | 2315 | if (MF_DBGLEVEL >= 4) |
3bc7b13d | 2316 | Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles); |
4c0cf2d2 | 2317 | |
91c7a7cc | 2318 | LED_B_OFF(); |
1c611bbd | 2319 | continue; |
2320 | } | |
2321 | } | |
91c7a7cc | 2322 | LED_B_OFF(); |
1c611bbd | 2323 | |
2324 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
4c0cf2d2 | 2325 | |
91c7a7cc | 2326 | catch_up_cycles = ABS(dist_nt(nt_attacked, nt)); |
c830303d | 2327 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. |
1c611bbd | 2328 | catch_up_cycles = 0; |
2329 | continue; | |
91c7a7cc | 2330 | } |
4c0cf2d2 | 2331 | // average? |
3bc7b13d | 2332 | catch_up_cycles /= elapsed_prng_sequences; |
4c0cf2d2 | 2333 | |
1c611bbd | 2334 | if (catch_up_cycles == last_catch_up) { |
4a71da5a | 2335 | ++consecutive_resyncs; |
4c0cf2d2 | 2336 | } else { |
1c611bbd | 2337 | last_catch_up = catch_up_cycles; |
2338 | consecutive_resyncs = 0; | |
4b78d6b3 | 2339 | } |
4c0cf2d2 | 2340 | |
1c611bbd | 2341 | if (consecutive_resyncs < 3) { |
91c7a7cc | 2342 | if (MF_DBGLEVEL >= 4) |
2343 | Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, catch_up_cycles, consecutive_resyncs); | |
4c0cf2d2 | 2344 | } else { |
2345 | sync_cycles += catch_up_cycles; | |
2346 | ||
91c7a7cc | 2347 | if (MF_DBGLEVEL >= 4) |
2348 | Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, catch_up_cycles, sync_cycles); | |
4c0cf2d2 | 2349 | |
3bc7b13d | 2350 | last_catch_up = 0; |
2351 | catch_up_cycles = 0; | |
2352 | consecutive_resyncs = 0; | |
1c611bbd | 2353 | } |
2354 | continue; | |
2355 | } | |
2356 | ||
1c611bbd | 2357 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding |
91c7a7cc | 2358 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2359 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2360 | |
495d7f13 | 2361 | if (nt_diff == 0) |
6a1f2d82 | 2362 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2363 | |
6a1f2d82 | 2364 | par_list[nt_diff] = SwapBits(par[0], 8); |
91c7a7cc | 2365 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; // xor with NACK value to get keystream |
1c611bbd | 2366 | |
2367 | // Test if the information is complete | |
2368 | if (nt_diff == 0x07) { | |
2369 | isOK = 1; | |
2370 | break; | |
2371 | } | |
2372 | ||
2373 | nt_diff = (nt_diff + 1) & 0x07; | |
2374 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
6a1f2d82 | 2375 | par[0] = par_low; |
4b78d6b3 | 2376 | |
1c611bbd | 2377 | } else { |
b0300679 | 2378 | // No NACK. |
495d7f13 | 2379 | if (nt_diff == 0 && first_try) { |
6a1f2d82 | 2380 | par[0]++; |
5ebcb867 | 2381 | if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK. |
c830303d | 2382 | isOK = -2; |
2383 | break; | |
2384 | } | |
1c611bbd | 2385 | } else { |
b0300679 | 2386 | // Why this? |
6a1f2d82 | 2387 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2388 | } |
2389 | } | |
4b78d6b3 | 2390 | |
91c7a7cc | 2391 | // reset the resyncs since we got a complete transaction on right time. |
4b78d6b3 | 2392 | consecutive_resyncs = 0; |
91c7a7cc | 2393 | } // end for loop |
1c611bbd | 2394 | |
1c611bbd | 2395 | mf_nr_ar[3] &= 0x1F; |
5ebcb867 | 2396 | |
bc939371 | 2397 | if (MF_DBGLEVEL >= 4) Dbprintf("Number of sent auth requestes: %u", i); |
d26849d4 | 2398 | |
b0300679 | 2399 | uint8_t buf[28] = {0x00}; |
91c7a7cc | 2400 | memset(buf, 0x00, sizeof(buf)); |
b0300679 | 2401 | num_to_bytes(cuid, 4, buf); |
1c611bbd | 2402 | num_to_bytes(nt, 4, buf + 4); |
2403 | memcpy(buf + 8, par_list, 8); | |
2404 | memcpy(buf + 16, ks_list, 8); | |
2405 | memcpy(buf + 24, mf_nr_ar, 4); | |
2406 | ||
91c7a7cc | 2407 | cmd_send(CMD_ACK, isOK, 0, 0, buf, sizeof(buf) ); |
1c611bbd | 2408 | |
1c611bbd | 2409 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2410 | LEDsoff(); | |
99cf19d9 | 2411 | set_tracing(FALSE); |
20f9a2a1 | 2412 | } |
1c611bbd | 2413 | |
f38cfd66 | 2414 | |
0de8e387 | 2415 | /** |
d2f487af | 2416 | *MIFARE 1K simulate. |
2417 | * | |
2418 | *@param flags : | |
0194ce8f | 2419 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK |
2420 | * FLAG_4B_UID_IN_DATA - use 4-byte UID in the data-section | |
2421 | * FLAG_7B_UID_IN_DATA - use 7-byte UID in the data-section | |
2422 | * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section | |
2423 | * FLAG_UID_IN_EMUL - use 4-byte UID from emulator memory | |
2424 | * FLAG_NR_AR_ATTACK - collect NR_AR responses for bruteforcing later | |
d2f487af | 2425 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite |
2426 | */ | |
91c7a7cc | 2427 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) { |
50193c1e | 2428 | int cardSTATE = MFEMUL_NOFIELD; |
0194ce8f | 2429 | int _UID_LEN = 0; // 4, 7, 10 |
9ca155ba | 2430 | int vHf = 0; // in mV |
0194ce8f | 2431 | int res = 0; |
0a39986e M |
2432 | uint32_t selTimer = 0; |
2433 | uint32_t authTimer = 0; | |
6a1f2d82 | 2434 | uint16_t len = 0; |
8f51ddb0 | 2435 | uint8_t cardWRBL = 0; |
9ca155ba M |
2436 | uint8_t cardAUTHSC = 0; |
2437 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
2438 | uint32_t cuid = 0; | |
51969283 | 2439 | uint32_t ans = 0; |
0014cb46 M |
2440 | uint32_t cardINTREG = 0; |
2441 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2442 | struct Crypto1State mpcs = {0, 0}; |
2443 | struct Crypto1State *pcs; | |
2444 | pcs = &mpcs; | |
f38cfd66 | 2445 | uint32_t numReads = 0; // Counts numer of times reader read a block |
5ebcb867 | 2446 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
2447 | uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
2448 | uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00}; | |
2449 | uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
9ca155ba | 2450 | |
bc939371 | 2451 | uint8_t atqa[] = {0x04, 0x00}; // Mifare classic 1k |
2452 | uint8_t sak_4[] = {0x0C, 0x00, 0x00}; // CL1 - 4b uid | |
2453 | uint8_t sak_7[] = {0x0C, 0x00, 0x00}; // CL2 - 7b uid | |
2454 | uint8_t sak_10[] = {0x0C, 0x00, 0x00}; // CL3 - 10b uid | |
f38cfd66 | 2455 | // uint8_t sak[] = {0x09, 0x3f, 0xcc }; // Mifare Mini |
0194ce8f | 2456 | |
2457 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2458 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2459 | uint8_t rUIDBCC3[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2460 | ||
2461 | uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01}; // very random nonce | |
f38cfd66 | 2462 | // uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};// nonce from nested? why this? |
d2f487af | 2463 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; |
7bc95e2e | 2464 | |
bc939371 | 2465 | // Here, we collect CUID, NT, NR, AR, CUID2, NT2, NR2, AR2 |
d2f487af | 2466 | // This can be used in a reader-only attack. |
bc939371 | 2467 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0}; |
d2f487af | 2468 | uint8_t ar_nr_collected = 0; |
0014cb46 | 2469 | |
7bc95e2e | 2470 | // Authenticate response - nonce |
51969283 | 2471 | uint32_t nonce = bytes_to_num(rAUTH_NT, 4); |
bc939371 | 2472 | ar_nr_responses[1] = nonce; |
7bc95e2e | 2473 | |
f38cfd66 | 2474 | // -- Determine the UID |
0194ce8f | 2475 | // Can be set from emulator memory or incoming data |
2476 | // Length: 4,7,or 10 bytes | |
bc939371 | 2477 | if ( (flags & FLAG_UID_IN_EMUL) == FLAG_UID_IN_EMUL) |
2478 | emlGetMemBt(datain, 0, 10); // load 10bytes from EMUL to the datain pointer. to be used below. | |
2479 | ||
2480 | if ( (flags & FLAG_4B_UID_IN_DATA) == FLAG_4B_UID_IN_DATA) { | |
0194ce8f | 2481 | memcpy(rUIDBCC1, datain, 4); |
2482 | _UID_LEN = 4; | |
bc939371 | 2483 | } else if ( (flags & FLAG_7B_UID_IN_DATA) == FLAG_7B_UID_IN_DATA) { |
0194ce8f | 2484 | memcpy(&rUIDBCC1[1], datain, 3); |
2485 | memcpy( rUIDBCC2, datain+3, 4); | |
2486 | _UID_LEN = 7; | |
bc939371 | 2487 | } else if ( (flags & FLAG_10B_UID_IN_DATA) == FLAG_10B_UID_IN_DATA) { |
0194ce8f | 2488 | memcpy(&rUIDBCC1[1], datain, 3); |
bc939371 | 2489 | memcpy(&rUIDBCC2[1], datain+3, 3); |
2490 | memcpy( rUIDBCC3, datain+6, 4); | |
0194ce8f | 2491 | _UID_LEN = 10; |
d2f487af | 2492 | } |
7bc95e2e | 2493 | |
0194ce8f | 2494 | switch (_UID_LEN) { |
2495 | case 4: | |
bc939371 | 2496 | sak_4[0] &= 0xFB; |
0194ce8f | 2497 | // save CUID |
2498 | ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC1, 4); | |
2499 | // BCC | |
2500 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
bc939371 | 2501 | if (MF_DBGLEVEL >= 2) { |
0194ce8f | 2502 | Dbprintf("4B UID: %02x%02x%02x%02x", |
2503 | rUIDBCC1[0], | |
2504 | rUIDBCC1[1], | |
2505 | rUIDBCC1[2], | |
2506 | rUIDBCC1[3] | |
2507 | ); | |
2508 | } | |
2509 | break; | |
2510 | case 7: | |
2511 | atqa[0] |= 0x40; | |
bc939371 | 2512 | sak_7[0] &= 0xFB; |
0194ce8f | 2513 | // save CUID |
bc939371 | 2514 | ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC2, 4); |
2515 | // CascadeTag, CT | |
2516 | rUIDBCC1[0] = 0x88; | |
0194ce8f | 2517 | // BCC |
2518 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
2519 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; | |
bc939371 | 2520 | if (MF_DBGLEVEL >= 2) { |
0194ce8f | 2521 | Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x", |
0194ce8f | 2522 | rUIDBCC1[1], |
2523 | rUIDBCC1[2], | |
2524 | rUIDBCC1[3], | |
2525 | rUIDBCC2[0], | |
2526 | rUIDBCC2[1], | |
2527 | rUIDBCC2[2], | |
2528 | rUIDBCC2[3] | |
2529 | ); | |
2530 | } | |
2531 | break; | |
2532 | case 10: | |
bc939371 | 2533 | atqa[0] |= 0x80; |
2534 | sak_10[0] &= 0xFB; | |
0194ce8f | 2535 | // save CUID |
2536 | ar_nr_responses[0] = cuid = bytes_to_num(rUIDBCC3, 4); | |
bc939371 | 2537 | // CascadeTag, CT |
2538 | rUIDBCC1[0] = 0x88; | |
2539 | rUIDBCC2[0] = 0x88; | |
0194ce8f | 2540 | // BCC |
2541 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; | |
0194ce8f | 2542 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; |
2543 | rUIDBCC3[4] = rUIDBCC3[0] ^ rUIDBCC3[1] ^ rUIDBCC3[2] ^ rUIDBCC3[3]; | |
bc939371 | 2544 | |
2545 | if (MF_DBGLEVEL >= 2) { | |
0194ce8f | 2546 | Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x", |
0194ce8f | 2547 | rUIDBCC1[1], |
2548 | rUIDBCC1[2], | |
2549 | rUIDBCC1[3], | |
0194ce8f | 2550 | rUIDBCC2[1], |
2551 | rUIDBCC2[2], | |
2552 | rUIDBCC2[3], | |
2553 | rUIDBCC3[0], | |
2554 | rUIDBCC3[1], | |
2555 | rUIDBCC3[2], | |
2556 | rUIDBCC3[3] | |
2557 | ); | |
2558 | } | |
2559 | break; | |
2560 | default: | |
2561 | break; | |
d2f487af | 2562 | } |
bc939371 | 2563 | // calc some crcs |
2564 | ComputeCrc14443(CRC_14443_A, sak_4, 1, &sak_4[1], &sak_4[2]); | |
2565 | ComputeCrc14443(CRC_14443_A, sak_7, 1, &sak_7[1], &sak_7[2]); | |
2566 | ComputeCrc14443(CRC_14443_A, sak_10, 1, &sak_10[1], &sak_10[2]); | |
2567 | ||
99cf19d9 | 2568 | // We need to listen to the high-frequency, peak-detected path. |
2569 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
2570 | ||
2571 | // free eventually allocated BigBuf memory but keep Emulator Memory | |
2572 | BigBuf_free_keep_EM(); | |
99cf19d9 | 2573 | clear_trace(); |
2574 | set_tracing(TRUE); | |
2575 | ||
7bc95e2e | 2576 | bool finished = FALSE; |
2b1f4228 | 2577 | while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) { |
9ca155ba | 2578 | WDT_HIT(); |
9ca155ba M |
2579 | |
2580 | // find reader field | |
9ca155ba | 2581 | if (cardSTATE == MFEMUL_NOFIELD) { |
0c8d25eb | 2582 | vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10; |
9ca155ba | 2583 | if (vHf > MF_MINFIELDV) { |
0014cb46 | 2584 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2585 | LED_A_ON(); |
2586 | } | |
2587 | } | |
0194ce8f | 2588 | if (cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2589 | |
f38cfd66 | 2590 | // Now, get data |
6a1f2d82 | 2591 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2592 | if (res == 2) { //Field is off! |
2593 | cardSTATE = MFEMUL_NOFIELD; | |
2594 | LEDsoff(); | |
2595 | continue; | |
7bc95e2e | 2596 | } else if (res == 1) { |
f38cfd66 | 2597 | break; // return value 1 means button press |
7bc95e2e | 2598 | } |
2599 | ||
d2f487af | 2600 | // REQ or WUP request in ANY state and WUP in HALTED state |
57850d9d | 2601 | // this if-statement doesn't match the specification above. (iceman) |
0194ce8f | 2602 | if (len == 1 && ((receivedCmd[0] == ISO14443A_CMD_REQA && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == ISO14443A_CMD_WUPA)) { |
d2f487af | 2603 | selTimer = GetTickCount(); |
0194ce8f | 2604 | EmSendCmdEx(atqa, sizeof(atqa), (receivedCmd[0] == ISO14443A_CMD_WUPA)); |
d2f487af | 2605 | cardSTATE = MFEMUL_SELECT1; |
d2f487af | 2606 | crypto1_destroy(pcs); |
2607 | cardAUTHKEY = 0xff; | |
0194ce8f | 2608 | LEDsoff(); |
bc939371 | 2609 | nonce++; |
d2f487af | 2610 | continue; |
0a39986e | 2611 | } |
7bc95e2e | 2612 | |
50193c1e | 2613 | switch (cardSTATE) { |
d2f487af | 2614 | case MFEMUL_NOFIELD: |
2615 | case MFEMUL_HALTED: | |
50193c1e | 2616 | case MFEMUL_IDLE:{ |
6a1f2d82 | 2617 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
50193c1e M |
2618 | break; |
2619 | } | |
2620 | case MFEMUL_SELECT1:{ | |
0194ce8f | 2621 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && receivedCmd[1] == 0x20)) { |
d2f487af | 2622 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2623 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2624 | break; |
9ca155ba | 2625 | } |
9ca155ba | 2626 | // select card |
0a39986e | 2627 | if (len == 9 && |
0194ce8f | 2628 | ( receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT && |
2629 | receivedCmd[1] == 0x70 && | |
2630 | memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
2631 | ||
2632 | // SAK 4b | |
2633 | EmSendCmd(sak_4, sizeof(sak_4)); | |
2634 | switch(_UID_LEN){ | |
2635 | case 4: | |
2636 | cardSTATE = MFEMUL_WORK; | |
2637 | LED_B_ON(); | |
2638 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
2639 | continue; | |
2640 | case 7: | |
2641 | case 10: | |
2642 | cardSTATE = MFEMUL_SELECT2; | |
2643 | continue; | |
2644 | default:break; | |
8556b852 | 2645 | } |
0194ce8f | 2646 | } else { |
2647 | cardSTATE_TO_IDLE(); | |
2648 | } | |
2649 | break; | |
2650 | } | |
2651 | case MFEMUL_SELECT2:{ | |
2652 | if (!len) { | |
2653 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); | |
2654 | break; | |
2655 | } | |
2656 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && receivedCmd[1] == 0x20)) { | |
2657 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); | |
2658 | break; | |
2659 | } | |
2660 | if (len == 9 && | |
2661 | (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2 && | |
2662 | receivedCmd[1] == 0x70 && | |
2663 | memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) { | |
2664 | ||
2665 | EmSendCmd(sak_7, sizeof(sak_7)); | |
2666 | switch(_UID_LEN){ | |
2667 | case 7: | |
2668 | cardSTATE = MFEMUL_WORK; | |
2669 | LED_B_ON(); | |
2670 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); | |
2671 | continue; | |
2672 | case 10: | |
2673 | cardSTATE = MFEMUL_SELECT3; | |
2674 | continue; | |
2675 | default:break; | |
2676 | } | |
bc939371 | 2677 | } |
2678 | cardSTATE_TO_IDLE(); | |
0194ce8f | 2679 | break; |
2680 | } | |
2681 | case MFEMUL_SELECT3:{ | |
2682 | if (!len) { | |
2683 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); | |
2684 | break; | |
2685 | } | |
2686 | if (len == 2 && (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && receivedCmd[1] == 0x20)) { | |
2687 | EmSendCmd(rUIDBCC3, sizeof(rUIDBCC3)); | |
2688 | break; | |
2689 | } | |
2690 | if (len == 9 && | |
2691 | (receivedCmd[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3 && | |
2692 | receivedCmd[1] == 0x70 && | |
2693 | memcmp(&receivedCmd[2], rUIDBCC3, 4) == 0) ) { | |
2694 | ||
2695 | EmSendCmd(sak_10, sizeof(sak_10)); | |
2696 | cardSTATE = MFEMUL_WORK; | |
2697 | LED_B_ON(); | |
2698 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer); | |
2699 | break; | |
9ca155ba | 2700 | } |
bc939371 | 2701 | cardSTATE_TO_IDLE(); |
50193c1e M |
2702 | break; |
2703 | } | |
d2f487af | 2704 | case MFEMUL_AUTH1:{ |
495d7f13 | 2705 | if( len != 8) { |
d2f487af | 2706 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2707 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2708 | break; |
2709 | } | |
0c8d25eb | 2710 | |
bc939371 | 2711 | uint32_t nr = bytes_to_num(receivedCmd, 4); |
2712 | uint32_t ar = bytes_to_num(&receivedCmd[4], 4); | |
d2f487af | 2713 | |
f38cfd66 | 2714 | // Collect AR/NR |
2715 | // if(ar_nr_collected < 2 && cardAUTHSC == 2){ | |
bc939371 | 2716 | if(ar_nr_collected < 2) { |
f38cfd66 | 2717 | // if(ar_nr_responses[2] != nr) { |
bc939371 | 2718 | ar_nr_responses[ar_nr_collected*4] = cuid; |
2719 | ar_nr_responses[ar_nr_collected*4+1] = nonce; | |
2720 | ar_nr_responses[ar_nr_collected*4+2] = nr; | |
2721 | ar_nr_responses[ar_nr_collected*4+3] = ar; | |
273b57a7 | 2722 | ar_nr_collected++; |
f38cfd66 | 2723 | // } |
bc939371 | 2724 | |
12d708fe | 2725 | // Interactive mode flag, means we need to send ACK |
bc939371 | 2726 | finished = ( ((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE)&& ar_nr_collected == 2); |
d2f487af | 2727 | } |
0194ce8f | 2728 | /* |
2729 | crypto1_word(pcs, ar , 1); | |
2730 | cardRr = nr ^ crypto1_word(pcs, 0, 0); | |
2731 | ||
2732 | test if auth OK | |
2733 | if (cardRr != prng_successor(nonce, 64)){ | |
c3c241f3 | 2734 | |
0194ce8f | 2735 | if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", |
2736 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2737 | cardRr, prng_successor(nonce, 64)); | |
2738 | Shouldn't we respond anything here? | |
2739 | Right now, we don't nack or anything, which causes the | |
2740 | reader to do a WUPA after a while. /Martin | |
2741 | -- which is the correct response. /piwi | |
2742 | cardSTATE_TO_IDLE(); | |
2743 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); | |
2744 | break; | |
2745 | } | |
2746 | */ | |
2747 | ||
d2f487af | 2748 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); |
d2f487af | 2749 | num_to_bytes(ans, 4, rAUTH_AT); |
d2f487af | 2750 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); |
2751 | LED_C_ON(); | |
bc939371 | 2752 | |
495d7f13 | 2753 | if (MF_DBGLEVEL >= 4) { |
2754 | Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", | |
2755 | cardAUTHSC, | |
2756 | cardAUTHKEY == 0 ? 'A' : 'B', | |
2757 | GetTickCount() - authTimer | |
2758 | ); | |
2759 | } | |
0014cb46 | 2760 | cardSTATE = MFEMUL_WORK; |
0194ce8f | 2761 | break; |
50193c1e | 2762 | } |
7bc95e2e | 2763 | case MFEMUL_WORK:{ |
2764 | if (len == 0) { | |
6a1f2d82 | 2765 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2766 | break; |
0194ce8f | 2767 | } |
d2f487af | 2768 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2769 | ||
495d7f13 | 2770 | if(encrypted_data) |
51969283 | 2771 | mf_crypto1_decrypt(pcs, receivedCmd, len); |
7bc95e2e | 2772 | |
0194ce8f | 2773 | if (len == 4 && (receivedCmd[0] == MIFARE_AUTH_KEYA || |
2774 | receivedCmd[0] == MIFARE_AUTH_KEYB) ) { | |
2775 | ||
d2f487af | 2776 | authTimer = GetTickCount(); |
2777 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
0194ce8f | 2778 | cardAUTHKEY = receivedCmd[0] - 0x60; // & 1 |
2779 | crypto1_destroy(pcs); | |
d2f487af | 2780 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); |
51969283 | 2781 | |
0194ce8f | 2782 | if (!encrypted_data) { |
2783 | // first authentication | |
f38cfd66 | 2784 | crypto1_word(pcs, cuid ^ nonce, 0);// Update crypto state |
d2f487af | 2785 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce |
0194ce8f | 2786 | |
2787 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); | |
2788 | ||
2789 | } else { | |
2790 | // nested authentication | |
7bc95e2e | 2791 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2792 | num_to_bytes(ans, 4, rAUTH_AT); |
0194ce8f | 2793 | |
2794 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); | |
d2f487af | 2795 | } |
0c8d25eb | 2796 | |
d2f487af | 2797 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); |
d2f487af | 2798 | cardSTATE = MFEMUL_AUTH1; |
2799 | break; | |
51969283 | 2800 | } |
7bc95e2e | 2801 | |
8f51ddb0 M |
2802 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2803 | // BUT... ACK --> NACK | |
2804 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2805 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2806 | break; | |
2807 | } | |
2808 | ||
2809 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2810 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2811 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2812 | break; | |
0a39986e M |
2813 | } |
2814 | ||
7bc95e2e | 2815 | if(len != 4) { |
6a1f2d82 | 2816 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2817 | break; |
2818 | } | |
d2f487af | 2819 | |
0194ce8f | 2820 | if ( receivedCmd[0] == ISO14443A_CMD_READBLOCK || |
2821 | receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK || | |
2822 | receivedCmd[0] == MIFARE_CMD_INC || | |
2823 | receivedCmd[0] == MIFARE_CMD_DEC || | |
2824 | receivedCmd[0] == MIFARE_CMD_RESTORE || | |
2825 | receivedCmd[0] == MIFARE_CMD_TRANSFER ) { | |
2826 | ||
7bc95e2e | 2827 | if (receivedCmd[1] >= 16 * 4) { |
d2f487af | 2828 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
c3c241f3 | 2829 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2830 | break; |
2831 | } | |
2832 | ||
7bc95e2e | 2833 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2834 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
c3c241f3 | 2835 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2836 | break; |
2837 | } | |
d2f487af | 2838 | } |
2839 | // read block | |
0194ce8f | 2840 | if (receivedCmd[0] == ISO14443A_CMD_READBLOCK) { |
2841 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)", receivedCmd[1], receivedCmd[1]); | |
495d7f13 | 2842 | |
8f51ddb0 M |
2843 | emlGetMem(response, receivedCmd[1], 1); |
2844 | AppendCrc14443a(response, 16); | |
6a1f2d82 | 2845 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2846 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2847 | numReads++; |
12d708fe | 2848 | if(exitAfterNReads > 0 && numReads >= exitAfterNReads) { |
d2f487af | 2849 | Dbprintf("%d reads done, exiting", numReads); |
2850 | finished = true; | |
2851 | } | |
0a39986e M |
2852 | break; |
2853 | } | |
0a39986e | 2854 | // write block |
0194ce8f | 2855 | if (receivedCmd[0] == ISO14443A_CMD_WRITEBLOCK) { |
2856 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)", receivedCmd[1], receivedCmd[1]); | |
8f51ddb0 | 2857 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2858 | cardSTATE = MFEMUL_WRITEBL2; |
2859 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2860 | break; |
7bc95e2e | 2861 | } |
0014cb46 | 2862 | // increment, decrement, restore |
0194ce8f | 2863 | if ( receivedCmd[0] == MIFARE_CMD_INC || |
2864 | receivedCmd[0] == MIFARE_CMD_DEC || | |
2865 | receivedCmd[0] == MIFARE_CMD_RESTORE) { | |
2866 | ||
2867 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0], receivedCmd[1], receivedCmd[1]); | |
2868 | ||
d2f487af | 2869 | if (emlCheckValBl(receivedCmd[1])) { |
c3c241f3 | 2870 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); |
0014cb46 M |
2871 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2872 | break; | |
2873 | } | |
2874 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0194ce8f | 2875 | if (receivedCmd[0] == MIFARE_CMD_INC) cardSTATE = MFEMUL_INTREG_INC; |
2876 | if (receivedCmd[0] == MIFARE_CMD_DEC) cardSTATE = MFEMUL_INTREG_DEC; | |
2877 | if (receivedCmd[0] == MIFARE_CMD_RESTORE) cardSTATE = MFEMUL_INTREG_REST; | |
0014cb46 | 2878 | cardWRBL = receivedCmd[1]; |
0014cb46 M |
2879 | break; |
2880 | } | |
0014cb46 | 2881 | // transfer |
0194ce8f | 2882 | if (receivedCmd[0] == MIFARE_CMD_TRANSFER) { |
2883 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)", receivedCmd[0], receivedCmd[1], receivedCmd[1]); | |
0014cb46 M |
2884 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2885 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2886 | else | |
2887 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2888 | break; |
2889 | } | |
9ca155ba | 2890 | // halt |
0194ce8f | 2891 | if (receivedCmd[0] == ISO14443A_CMD_HALT && receivedCmd[1] == 0x00) { |
9ca155ba | 2892 | LED_B_OFF(); |
0a39986e | 2893 | LED_C_OFF(); |
0014cb46 M |
2894 | cardSTATE = MFEMUL_HALTED; |
2895 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
6a1f2d82 | 2896 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0a39986e | 2897 | break; |
9ca155ba | 2898 | } |
d2f487af | 2899 | // RATS |
0194ce8f | 2900 | if (receivedCmd[0] == ISO14443A_CMD_RATS) { |
8f51ddb0 M |
2901 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2902 | break; | |
2903 | } | |
d2f487af | 2904 | // command not allowed |
2905 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2906 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2907 | break; |
8f51ddb0 M |
2908 | } |
2909 | case MFEMUL_WRITEBL2:{ | |
495d7f13 | 2910 | if (len == 18) { |
8f51ddb0 M |
2911 | mf_crypto1_decrypt(pcs, receivedCmd, len); |
2912 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2913 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2914 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2915 | } else { |
0014cb46 | 2916 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2917 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
8f51ddb0 | 2918 | } |
8f51ddb0 | 2919 | break; |
50193c1e | 2920 | } |
0014cb46 M |
2921 | case MFEMUL_INTREG_INC:{ |
2922 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2923 | memcpy(&ans, receivedCmd, 4); | |
2924 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2925 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2926 | cardSTATE_TO_IDLE(); | |
2927 | break; | |
7bc95e2e | 2928 | } |
6a1f2d82 | 2929 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2930 | cardINTREG = cardINTREG + ans; |
2931 | cardSTATE = MFEMUL_WORK; | |
2932 | break; | |
2933 | } | |
2934 | case MFEMUL_INTREG_DEC:{ | |
2935 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2936 | memcpy(&ans, receivedCmd, 4); | |
2937 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2938 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2939 | cardSTATE_TO_IDLE(); | |
2940 | break; | |
2941 | } | |
6a1f2d82 | 2942 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2943 | cardINTREG = cardINTREG - ans; |
2944 | cardSTATE = MFEMUL_WORK; | |
2945 | break; | |
2946 | } | |
2947 | case MFEMUL_INTREG_REST:{ | |
2948 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2949 | memcpy(&ans, receivedCmd, 4); | |
2950 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2951 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2952 | cardSTATE_TO_IDLE(); | |
2953 | break; | |
2954 | } | |
6a1f2d82 | 2955 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2956 | cardSTATE = MFEMUL_WORK; |
2957 | break; | |
2958 | } | |
50193c1e | 2959 | } |
50193c1e M |
2960 | } |
2961 | ||
810f5379 | 2962 | // Interactive mode flag, means we need to send ACK |
bc939371 | 2963 | if((flags & FLAG_INTERACTIVE) == FLAG_INTERACTIVE) { |
f38cfd66 | 2964 | // May just aswell send the collected ar_nr in the response aswell |
bc939371 | 2965 | uint8_t len = ar_nr_collected * 4 * 4; |
c3c241f3 | 2966 | cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len); |
d2f487af | 2967 | } |
d714d3ef | 2968 | |
bc939371 | 2969 | if( ((flags & FLAG_NR_AR_ATTACK) == FLAG_NR_AR_ATTACK ) && MF_DBGLEVEL >= 1 ) { |
12d708fe | 2970 | if(ar_nr_collected > 1 ) { |
d2f487af | 2971 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); |
bc939371 | 2972 | Dbprintf("../tools/mfkey/mfkey32v2.exe %08x %08x %08x %08x %08x %08x %08x", |
0194ce8f | 2973 | ar_nr_responses[0], // CUID |
bc939371 | 2974 | ar_nr_responses[1], // NT1 |
2975 | ar_nr_responses[2], // NR1 | |
2976 | ar_nr_responses[3], // AR1 | |
f38cfd66 | 2977 | // ar_nr_responses[4], // CUID2 |
bc939371 | 2978 | ar_nr_responses[5], // NT2 |
2979 | ar_nr_responses[6], // NR2 | |
2980 | ar_nr_responses[7] // AR2 | |
0194ce8f | 2981 | ); |
7bc95e2e | 2982 | } else { |
d2f487af | 2983 | Dbprintf("Failed to obtain two AR/NR pairs!"); |
bc939371 | 2984 | if(ar_nr_collected == 1 ) { |
2985 | Dbprintf("Only got these: UID=%08x, nonce=%08x, NR1=%08x, AR1=%08x", | |
0194ce8f | 2986 | ar_nr_responses[0], // CUID |
2987 | ar_nr_responses[1], // NT | |
bc939371 | 2988 | ar_nr_responses[2], // NR1 |
2989 | ar_nr_responses[3] // AR1 | |
0194ce8f | 2990 | ); |
d2f487af | 2991 | } |
2992 | } | |
2993 | } | |
0194ce8f | 2994 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen()); |
5ee53a0e | 2995 | |
91c7a7cc | 2996 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2997 | LEDsoff(); | |
5ee53a0e | 2998 | set_tracing(FALSE); |
15c4dc5a | 2999 | } |
b62a5a84 | 3000 | |
d2f487af | 3001 | |
b62a5a84 M |
3002 | //----------------------------------------------------------------------------- |
3003 | // MIFARE sniffer. | |
3004 | // | |
0194ce8f | 3005 | // if no activity for 2sec, it sends the collected data to the client. |
b62a5a84 | 3006 | //----------------------------------------------------------------------------- |
bc939371 | 3007 | // "hf mf sniff" |
5cd9ec01 | 3008 | void RAMFUNC SniffMifare(uint8_t param) { |
bc939371 | 3009 | |
b62a5a84 | 3010 | LEDsoff(); |
810f5379 | 3011 | |
aaa1a9a2 | 3012 | // free eventually allocated BigBuf memory |
3013 | BigBuf_free(); BigBuf_Clear_ext(false); | |
3000dc4e MHS |
3014 | clear_trace(); |
3015 | set_tracing(TRUE); | |
b62a5a84 | 3016 | |
b62a5a84 | 3017 | // The command (reader -> tag) that we're receiving. |
810f5379 | 3018 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
495d7f13 | 3019 | uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00}; |
810f5379 | 3020 | |
b62a5a84 | 3021 | // The response (tag -> reader) that we're receiving. |
495d7f13 | 3022 | uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00}; |
3023 | uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00}; | |
b62a5a84 | 3024 | |
99cf19d9 | 3025 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); |
3026 | ||
f71f4deb | 3027 | // allocate the DMA buffer, used to stream samples from the FPGA |
0194ce8f | 3028 | // [iceman] is this sniffed data unsigned? |
f71f4deb | 3029 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); |
7bc95e2e | 3030 | uint8_t *data = dmaBuf; |
3031 | uint8_t previous_data = 0; | |
5cd9ec01 M |
3032 | int maxDataLen = 0; |
3033 | int dataLen = 0; | |
7bc95e2e | 3034 | bool ReaderIsActive = FALSE; |
3035 | bool TagIsActive = FALSE; | |
3036 | ||
b62a5a84 | 3037 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 3038 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
3039 | |
3040 | // Set up the demodulator for the reader -> tag commands | |
6a1f2d82 | 3041 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 | 3042 | |
57850d9d | 3043 | // Setup and start DMA. |
3044 | // set transfer address and number of bytes. Start transfer. | |
3045 | if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){ | |
3046 | if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); | |
3047 | return; | |
3048 | } | |
b62a5a84 | 3049 | |
b62a5a84 | 3050 | LED_D_OFF(); |
0194ce8f | 3051 | |
39864b0b | 3052 | MfSniffInit(); |
b62a5a84 | 3053 | |
b62a5a84 | 3054 | // And now we loop, receiving samples. |
0194ce8f | 3055 | for(uint32_t sniffCounter = 0;; ) { |
91c7a7cc | 3056 | |
3057 | LED_A_ON(); | |
3058 | WDT_HIT(); | |
7bc95e2e | 3059 | |
5cd9ec01 M |
3060 | if(BUTTON_PRESS()) { |
3061 | DbpString("cancelled by button"); | |
7bc95e2e | 3062 | break; |
5cd9ec01 | 3063 | } |
91c7a7cc | 3064 | |
7bc95e2e | 3065 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
3066 | // check if a transaction is completed (timeout after 2000ms). | |
3067 | // if yes, stop the DMA transfer and send what we have so far to the client | |
3068 | if (MfSniffSend(2000)) { | |
3069 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
3070 | sniffCounter = 0; | |
3071 | data = dmaBuf; | |
3072 | maxDataLen = 0; | |
3073 | ReaderIsActive = FALSE; | |
3074 | TagIsActive = FALSE; | |
57850d9d | 3075 | // Setup and start DMA. set transfer address and number of bytes. Start transfer. |
3076 | if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, DMA_BUFFER_SIZE) ){ | |
3077 | if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); | |
3078 | return; | |
3079 | } | |
39864b0b | 3080 | } |
39864b0b | 3081 | } |
7bc95e2e | 3082 | |
3083 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
3084 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
495d7f13 | 3085 | |
3086 | if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred | |
7bc95e2e | 3087 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed |
495d7f13 | 3088 | else |
7bc95e2e | 3089 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed |
495d7f13 | 3090 | |
5cd9ec01 | 3091 | // test for length of buffer |
7bc95e2e | 3092 | if(dataLen > maxDataLen) { // we are more behind than ever... |
3093 | maxDataLen = dataLen; | |
f71f4deb | 3094 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
5cd9ec01 | 3095 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); |
7bc95e2e | 3096 | break; |
b62a5a84 M |
3097 | } |
3098 | } | |
5cd9ec01 | 3099 | if(dataLen < 1) continue; |
b62a5a84 | 3100 | |
7bc95e2e | 3101 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
3102 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
3103 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
3104 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
91c7a7cc | 3105 | Dbprintf("RxEmpty ERROR, data length:%d", dataLen); // temporary |
5cd9ec01 M |
3106 | } |
3107 | // secondary buffer sets as primary, secondary buffer was stopped | |
3108 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
3109 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
3110 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
3111 | } | |
5cd9ec01 M |
3112 | |
3113 | LED_A_OFF(); | |
b62a5a84 | 3114 | |
7bc95e2e | 3115 | if (sniffCounter & 0x01) { |
b62a5a84 | 3116 | |
495d7f13 | 3117 | // no need to try decoding tag data if the reader is sending |
3118 | if(!TagIsActive) { | |
7bc95e2e | 3119 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); |
3120 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
3121 | LED_C_INV(); | |
495d7f13 | 3122 | |
6a1f2d82 | 3123 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break; |
b62a5a84 | 3124 | |
f8ada309 | 3125 | UartInit(receivedCmd, receivedCmdPar); |
7bc95e2e | 3126 | DemodReset(); |
3127 | } | |
3128 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
3129 | } | |
3130 | ||
495d7f13 | 3131 | // no need to try decoding tag data if the reader is sending |
3132 | if(!ReaderIsActive) { | |
7bc95e2e | 3133 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); |
3134 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
3135 | LED_C_INV(); | |
b62a5a84 | 3136 | |
6a1f2d82 | 3137 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break; |
39864b0b | 3138 | |
7bc95e2e | 3139 | DemodReset(); |
0ec548dc | 3140 | UartInit(receivedCmd, receivedCmdPar); |
7bc95e2e | 3141 | } |
3142 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
3143 | } | |
b62a5a84 M |
3144 | } |
3145 | ||
7bc95e2e | 3146 | previous_data = *data; |
3147 | sniffCounter++; | |
5cd9ec01 | 3148 | data++; |
495d7f13 | 3149 | |
3150 | if(data == dmaBuf + DMA_BUFFER_SIZE) | |
5cd9ec01 | 3151 | data = dmaBuf; |
7bc95e2e | 3152 | |
b62a5a84 | 3153 | } // main cycle |
bc939371 | 3154 | |
3155 | if (MF_DBGLEVEL >= 1) Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); | |
3156 | ||
55acbb2a | 3157 | FpgaDisableSscDma(); |
39864b0b | 3158 | MfSniffEnd(); |
91c7a7cc | 3159 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
3160 | LEDsoff(); | |
5ee53a0e | 3161 | set_tracing(FALSE); |
3803d529 | 3162 | } |