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a126332a 1 //-----------------------------------------------------------------------------
b62a5a84 2// Merlok - June 2011, 2012
15c4dc5a 3// Gerhard de Koning Gans - May 2008
534983d7 4// Hagen Fritsch - June 2010
bd20f8f4 5//
6// This code is licensed to you under the terms of the GNU GPL, version 2 or,
7// at your option, any later version. See the LICENSE.txt file for the text of
8// the license.
15c4dc5a 9//-----------------------------------------------------------------------------
bd20f8f4 10// Routines to support ISO 14443 type A.
11//-----------------------------------------------------------------------------
12
e30c654b 13#include "proxmark3.h"
15c4dc5a 14#include "apps.h"
f7e3ed82 15#include "util.h"
9ab7a6c7 16#include "string.h"
902cb3c0 17#include "cmd.h"
15c4dc5a 18#include "iso14443crc.h"
534983d7 19#include "iso14443a.h"
20f9a2a1
M
20#include "crapto1.h"
21#include "mifareutil.h"
3000dc4e 22#include "BigBuf.h"
f8ada309 23#include "parity.h"
24
534983d7 25static uint32_t iso14a_timeout;
1e262141 26int rsamples = 0;
1e262141 27uint8_t trigger = 0;
b0127e65 28// the block number for the ISO14443-4 PCB
29static uint8_t iso14_pcb_blocknum = 0;
15c4dc5a 30
7bc95e2e 31//
32// ISO14443 timing:
33//
34// minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
35#define REQUEST_GUARD_TIME (7000/16 + 1)
36// minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
37#define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
38// bool LastCommandWasRequest = FALSE;
39
40//
41// Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
42//
d714d3ef 43// When the PM acts as reader and is receiving tag data, it takes
44// 3 ticks delay in the AD converter
45// 16 ticks until the modulation detector completes and sets curbit
46// 8 ticks until bit_to_arm is assigned from curbit
47// 8*16 ticks for the transfer from FPGA to ARM
7bc95e2e 48// 4*16 ticks until we measure the time
49// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 50#define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
7bc95e2e 51
52// When the PM acts as a reader and is sending, it takes
53// 4*16 ticks until we can write data to the sending hold register
54// 8*16 ticks until the SHR is transferred to the Sending Shift Register
55// 8 ticks until the first transfer starts
56// 8 ticks later the FPGA samples the data
57// 1 tick to assign mod_sig_coil
58#define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
59
60// When the PM acts as tag and is receiving it takes
d714d3ef 61// 2 ticks delay in the RF part (for the first falling edge),
7bc95e2e 62// 3 ticks for the A/D conversion,
63// 8 ticks on average until the start of the SSC transfer,
64// 8 ticks until the SSC samples the first data
65// 7*16 ticks to complete the transfer from FPGA to ARM
66// 8 ticks until the next ssp_clk rising edge
d714d3ef 67// 4*16 ticks until we measure the time
7bc95e2e 68// - 8*16 ticks because we measure the time of the previous transfer
d714d3ef 69#define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
7bc95e2e 70
71// The FPGA will report its internal sending delay in
72uint16_t FpgaSendQueueDelay;
73// the 5 first bits are the number of bits buffered in mod_sig_buf
74// the last three bits are the remaining ticks/2 after the mod_sig_buf shift
75#define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
76
77// When the PM acts as tag and is sending, it takes
d714d3ef 78// 4*16 ticks until we can write data to the sending hold register
7bc95e2e 79// 8*16 ticks until the SHR is transferred to the Sending Shift Register
80// 8 ticks until the first transfer starts
81// 8 ticks later the FPGA samples the data
82// + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
83// + 1 tick to assign mod_sig_coil
d714d3ef 84#define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
7bc95e2e 85
86// When the PM acts as sniffer and is receiving tag data, it takes
87// 3 ticks A/D conversion
d714d3ef 88// 14 ticks to complete the modulation detection
89// 8 ticks (on average) until the result is stored in to_arm
7bc95e2e 90// + the delays in transferring data - which is the same for
91// sniffing reader and tag data and therefore not relevant
d714d3ef 92#define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
7bc95e2e 93
d714d3ef 94// When the PM acts as sniffer and is receiving reader data, it takes
95// 2 ticks delay in analogue RF receiver (for the falling edge of the
96// start bit, which marks the start of the communication)
7bc95e2e 97// 3 ticks A/D conversion
d714d3ef 98// 8 ticks on average until the data is stored in to_arm.
7bc95e2e 99// + the delays in transferring data - which is the same for
100// sniffing reader and tag data and therefore not relevant
d714d3ef 101#define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
7bc95e2e 102
103//variables used for timing purposes:
104//these are in ssp_clk cycles:
6a1f2d82 105static uint32_t NextTransferTime;
106static uint32_t LastTimeProxToAirStart;
107static uint32_t LastProxToAirDuration;
7bc95e2e 108
8f51ddb0 109// CARD TO READER - manchester
72934aa3 110// Sequence D: 11110000 modulation with subcarrier during first half
111// Sequence E: 00001111 modulation with subcarrier during second half
112// Sequence F: 00000000 no modulation with subcarrier
8f51ddb0 113// READER TO CARD - miller
72934aa3 114// Sequence X: 00001100 drop after half a period
115// Sequence Y: 00000000 no drop
116// Sequence Z: 11000000 drop at start
117#define SEC_D 0xf0
118#define SEC_E 0x0f
119#define SEC_F 0x00
120#define SEC_X 0x0c
121#define SEC_Y 0x00
122#define SEC_Z 0xc0
15c4dc5a 123
902cb3c0 124void iso14a_set_trigger(bool enable) {
534983d7 125 trigger = enable;
126}
127
b0127e65 128void iso14a_set_timeout(uint32_t timeout) {
129 iso14a_timeout = timeout;
19a700a8 130 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
b0127e65 131}
8556b852 132
19a700a8 133void iso14a_set_ATS_timeout(uint8_t *ats) {
134
135 uint8_t tb1;
136 uint8_t fwi;
137 uint32_t fwt;
138
139 if (ats[0] > 1) { // there is a format byte T0
140 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
4c0cf2d2 141
142 if ((ats[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
19a700a8 143 tb1 = ats[3];
4c0cf2d2 144 else
19a700a8 145 tb1 = ats[2];
4c0cf2d2 146
19a700a8 147 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
4c0cf2d2 148 //fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
149 fwt = 4096 * (1 << fwi);
19a700a8 150
4c0cf2d2 151 //iso14a_set_timeout(fwt/(8*16));
152 iso14a_set_timeout(fwt/128);
19a700a8 153 }
154 }
155}
156
15c4dc5a 157//-----------------------------------------------------------------------------
158// Generate the parity value for a byte sequence
e30c654b 159//
15c4dc5a 160//-----------------------------------------------------------------------------
6a1f2d82 161void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
15c4dc5a 162{
6a1f2d82 163 uint16_t paritybit_cnt = 0;
164 uint16_t paritybyte_cnt = 0;
165 uint8_t parityBits = 0;
166
167 for (uint16_t i = 0; i < iLen; i++) {
168 // Generate the parity bits
f8ada309 169 parityBits |= ((oddparity8(pbtCmd[i])) << (7-paritybit_cnt));
6a1f2d82 170 if (paritybit_cnt == 7) {
171 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
172 parityBits = 0; // and advance to next Parity Byte
173 paritybyte_cnt++;
174 paritybit_cnt = 0;
175 } else {
176 paritybit_cnt++;
177 }
5f6d6c90 178 }
6a1f2d82 179
180 // save remaining parity bits
181 par[paritybyte_cnt] = parityBits;
182
15c4dc5a 183}
184
534983d7 185void AppendCrc14443a(uint8_t* data, int len)
15c4dc5a 186{
5f6d6c90 187 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
15c4dc5a 188}
189
0ec548dc 190void AppendCrc14443b(uint8_t* data, int len)
191{
192 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
193}
194
195
7bc95e2e 196//=============================================================================
197// ISO 14443 Type A - Miller decoder
198//=============================================================================
199// Basics:
200// This decoder is used when the PM3 acts as a tag.
201// The reader will generate "pauses" by temporarily switching of the field.
202// At the PM3 antenna we will therefore measure a modulated antenna voltage.
203// The FPGA does a comparison with a threshold and would deliver e.g.:
204// ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
205// The Miller decoder needs to identify the following sequences:
206// 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
207// 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
208// 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
209// Note 1: the bitstream may start at any time. We therefore need to sync.
210// Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
15c4dc5a 211//-----------------------------------------------------------------------------
b62a5a84 212static tUart Uart;
15c4dc5a 213
d7aa3739 214// Lookup-Table to decide if 4 raw bits are a modulation.
0ec548dc 215// We accept the following:
216// 0001 - a 3 tick wide pause
217// 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
218// 0111 - a 2 tick wide pause shifted left
219// 1001 - a 2 tick wide pause shifted right
d7aa3739 220const bool Mod_Miller_LUT[] = {
0ec548dc 221 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
222 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
d7aa3739 223};
0ec548dc 224#define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
225#define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
d7aa3739 226
7bc95e2e 227void UartReset()
15c4dc5a 228{
7bc95e2e 229 Uart.state = STATE_UNSYNCD;
230 Uart.bitCount = 0;
231 Uart.len = 0; // number of decoded data bytes
6a1f2d82 232 Uart.parityLen = 0; // number of decoded parity bytes
7bc95e2e 233 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
6a1f2d82 234 Uart.parityBits = 0; // holds 8 parity bits
7bc95e2e 235 Uart.startTime = 0;
236 Uart.endTime = 0;
46c65fed 237
238 Uart.byteCntMax = 0;
239 Uart.posCnt = 0;
240 Uart.syncBit = 9999;
7bc95e2e 241}
15c4dc5a 242
6a1f2d82 243void UartInit(uint8_t *data, uint8_t *parity)
244{
245 Uart.output = data;
246 Uart.parity = parity;
0ec548dc 247 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
6a1f2d82 248 UartReset();
249}
d714d3ef 250
7bc95e2e 251// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
252static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
253{
15c4dc5a 254
0ec548dc 255 Uart.fourBits = (Uart.fourBits << 8) | bit;
7bc95e2e 256
0c8d25eb 257 if (Uart.state == STATE_UNSYNCD) { // not yet synced
3fe4ff4f 258
0ec548dc 259 Uart.syncBit = 9999; // not set
46c65fed 260
261 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
262 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
263 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
264
0ec548dc 265 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
46c65fed 266 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
267 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
0ec548dc 268 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
46c65fed 269 //
270#define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
271#define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
272
0ec548dc 273 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
274 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
275 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
276 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
277 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
278 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
279 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
280 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
281
282 if (Uart.syncBit != 9999) { // found a sync bit
7bc95e2e 283 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
284 Uart.startTime -= Uart.syncBit;
d7aa3739 285 Uart.endTime = Uart.startTime;
7bc95e2e 286 Uart.state = STATE_START_OF_COMMUNICATION;
15c4dc5a 287 }
288
7bc95e2e 289 } else {
15c4dc5a 290
0ec548dc 291 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
292 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
d7aa3739 293 UartReset();
d7aa3739 294 } else { // Modulation in first half = Sequence Z = logic "0"
7bc95e2e 295 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
296 UartReset();
7bc95e2e 297 } else {
298 Uart.bitCount++;
299 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
300 Uart.state = STATE_MILLER_Z;
301 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
302 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
303 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
304 Uart.parityBits <<= 1; // make room for the parity bit
305 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
306 Uart.bitCount = 0;
307 Uart.shiftReg = 0;
6a1f2d82 308 if((Uart.len&0x0007) == 0) { // every 8 data bytes
309 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
310 Uart.parityBits = 0;
311 }
15c4dc5a 312 }
7bc95e2e 313 }
d7aa3739 314 }
315 } else {
0ec548dc 316 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
7bc95e2e 317 Uart.bitCount++;
318 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
319 Uart.state = STATE_MILLER_X;
320 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
321 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
322 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
323 Uart.parityBits <<= 1; // make room for the new parity bit
324 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
325 Uart.bitCount = 0;
326 Uart.shiftReg = 0;
6a1f2d82 327 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
328 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
329 Uart.parityBits = 0;
330 }
7bc95e2e 331 }
d7aa3739 332 } else { // no modulation in both halves - Sequence Y
7bc95e2e 333 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
15c4dc5a 334 Uart.state = STATE_UNSYNCD;
6a1f2d82 335 Uart.bitCount--; // last "0" was part of EOC sequence
336 Uart.shiftReg <<= 1; // drop it
337 if(Uart.bitCount > 0) { // if we decoded some bits
338 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
339 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
340 Uart.parityBits <<= 1; // add a (void) parity bit
341 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
342 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
343 return TRUE;
344 } else if (Uart.len & 0x0007) { // there are some parity bits to store
345 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
346 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
52bfb955 347 }
348 if (Uart.len) {
6a1f2d82 349 return TRUE; // we are finished with decoding the raw data sequence
52bfb955 350 } else {
0c8d25eb 351 UartReset(); // Nothing received - start over
7bc95e2e 352 }
15c4dc5a 353 }
7bc95e2e 354 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
355 UartReset();
7bc95e2e 356 } else { // a logic "0"
357 Uart.bitCount++;
358 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
359 Uart.state = STATE_MILLER_Y;
360 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
361 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
362 Uart.parityBits <<= 1; // make room for the parity bit
363 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
364 Uart.bitCount = 0;
365 Uart.shiftReg = 0;
6a1f2d82 366 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
367 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
368 Uart.parityBits = 0;
369 }
15c4dc5a 370 }
371 }
d7aa3739 372 }
15c4dc5a 373 }
7bc95e2e 374
375 }
15c4dc5a 376
7bc95e2e 377 return FALSE; // not finished yet, need more data
15c4dc5a 378}
379
7bc95e2e 380
381
15c4dc5a 382//=============================================================================
e691fc45 383// ISO 14443 Type A - Manchester decoder
15c4dc5a 384//=============================================================================
e691fc45 385// Basics:
7bc95e2e 386// This decoder is used when the PM3 acts as a reader.
e691fc45 387// The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
388// at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
389// ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
390// The Manchester decoder needs to identify the following sequences:
391// 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
392// 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
393// 8 ticks unmodulated: Sequence F = end of communication
394// 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
7bc95e2e 395// Note 1: the bitstream may start at any time. We therefore need to sync.
e691fc45 396// Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
b62a5a84 397static tDemod Demod;
15c4dc5a 398
d7aa3739 399// Lookup-Table to decide if 4 raw bits are a modulation.
d714d3ef 400// We accept three or four "1" in any position
7bc95e2e 401const bool Mod_Manchester_LUT[] = {
d7aa3739 402 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
d714d3ef 403 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
7bc95e2e 404};
405
406#define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
407#define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
15c4dc5a 408
2f2d9fc5 409
7bc95e2e 410void DemodReset()
e691fc45 411{
7bc95e2e 412 Demod.state = DEMOD_UNSYNCD;
413 Demod.len = 0; // number of decoded data bytes
6a1f2d82 414 Demod.parityLen = 0;
7bc95e2e 415 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
416 Demod.parityBits = 0; //
417 Demod.collisionPos = 0; // Position of collision bit
418 Demod.twoBits = 0xffff; // buffer for 2 Bits
419 Demod.highCnt = 0;
420 Demod.startTime = 0;
421 Demod.endTime = 0;
46c65fed 422
423 //
424 Demod.bitCount = 0;
425 Demod.syncBit = 0xFFFF;
426 Demod.samples = 0;
e691fc45 427}
15c4dc5a 428
6a1f2d82 429void DemodInit(uint8_t *data, uint8_t *parity)
430{
431 Demod.output = data;
432 Demod.parity = parity;
433 DemodReset();
434}
435
7bc95e2e 436// use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
437static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
e691fc45 438{
7bc95e2e 439
440 Demod.twoBits = (Demod.twoBits << 8) | bit;
e691fc45 441
7bc95e2e 442 if (Demod.state == DEMOD_UNSYNCD) {
443
444 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
445 if (Demod.twoBits == 0x0000) {
446 Demod.highCnt++;
447 } else {
448 Demod.highCnt = 0;
449 }
450 } else {
451 Demod.syncBit = 0xFFFF; // not set
452 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
453 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
454 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
455 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
456 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
457 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
458 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
459 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
d7aa3739 460 if (Demod.syncBit != 0xFFFF) {
7bc95e2e 461 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
462 Demod.startTime -= Demod.syncBit;
463 Demod.bitCount = offset; // number of decoded data bits
e691fc45 464 Demod.state = DEMOD_MANCHESTER_DATA;
2f2d9fc5 465 }
7bc95e2e 466 }
15c4dc5a 467
7bc95e2e 468 } else {
15c4dc5a 469
7bc95e2e 470 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
471 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
e691fc45 472 if (!Demod.collisionPos) {
473 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
474 }
475 } // modulation in first half only - Sequence D = 1
7bc95e2e 476 Demod.bitCount++;
477 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
478 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
e691fc45 479 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 480 Demod.parityBits <<= 1; // make room for the parity bit
e691fc45 481 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
482 Demod.bitCount = 0;
483 Demod.shiftReg = 0;
6a1f2d82 484 if((Demod.len&0x0007) == 0) { // every 8 data bytes
485 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
486 Demod.parityBits = 0;
487 }
15c4dc5a 488 }
7bc95e2e 489 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
490 } else { // no modulation in first half
491 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
e691fc45 492 Demod.bitCount++;
7bc95e2e 493 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
e691fc45 494 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
e691fc45 495 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
7bc95e2e 496 Demod.parityBits <<= 1; // make room for the new parity bit
e691fc45 497 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
498 Demod.bitCount = 0;
499 Demod.shiftReg = 0;
6a1f2d82 500 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
501 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
502 Demod.parityBits = 0;
503 }
15c4dc5a 504 }
7bc95e2e 505 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
e691fc45 506 } else { // no modulation in both halves - End of communication
6a1f2d82 507 if(Demod.bitCount > 0) { // there are some remaining data bits
508 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
509 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
510 Demod.parityBits <<= 1; // add a (void) parity bit
511 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
512 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
513 return TRUE;
514 } else if (Demod.len & 0x0007) { // there are some parity bits to store
515 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
516 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
52bfb955 517 }
518 if (Demod.len) {
d7aa3739 519 return TRUE; // we are finished with decoding the raw data sequence
520 } else { // nothing received. Start over
521 DemodReset();
e691fc45 522 }
15c4dc5a 523 }
7bc95e2e 524 }
e691fc45 525 }
e691fc45 526 return FALSE; // not finished yet, need more data
15c4dc5a 527}
528
529//=============================================================================
530// Finally, a `sniffer' for ISO 14443 Type A
531// Both sides of communication!
532//=============================================================================
533
534//-----------------------------------------------------------------------------
535// Record the sequence of commands sent by the reader to the tag, with
536// triggering so that we start recording at the point that the tag is moved
537// near the reader.
538//-----------------------------------------------------------------------------
d26849d4 539void RAMFUNC SniffIso14443a(uint8_t param) {
5cd9ec01
M
540 // param:
541 // bit 0 - trigger from first card answer
542 // bit 1 - trigger from first reader 7-bit request
5cd9ec01 543 LEDsoff();
5cd9ec01 544
99cf19d9 545 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
7bc95e2e 546
f71f4deb 547 // Allocate memory from BigBuf for some buffers
548 // free all previous allocations first
549 BigBuf_free();
7838f4be 550
551 // init trace buffer
552 clear_trace();
553 set_tracing(TRUE);
554
5cd9ec01 555 // The command (reader -> tag) that we're receiving.
f71f4deb 556 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
557 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
6a1f2d82 558
5cd9ec01 559 // The response (tag -> reader) that we're receiving.
f71f4deb 560 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
561 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
5cd9ec01
M
562
563 // The DMA buffer, used to stream samples from the FPGA
f71f4deb 564 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
565
7bc95e2e 566 uint8_t *data = dmaBuf;
567 uint8_t previous_data = 0;
5cd9ec01
M
568 int maxDataLen = 0;
569 int dataLen = 0;
7bc95e2e 570 bool TagIsActive = FALSE;
571 bool ReaderIsActive = FALSE;
572
5cd9ec01 573 // Set up the demodulator for tag -> reader responses.
6a1f2d82 574 DemodInit(receivedResponse, receivedResponsePar);
575
5cd9ec01 576 // Set up the demodulator for the reader -> tag commands
6a1f2d82 577 UartInit(receivedCmd, receivedCmdPar);
578
7bc95e2e 579 // Setup and start DMA.
5cd9ec01 580 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
7bc95e2e 581
99cf19d9 582 // We won't start recording the frames that we acquire until we trigger;
583 // a good trigger condition to get started is probably when we see a
584 // response from the tag.
585 // triggered == FALSE -- to wait first for card
586 bool triggered = !(param & 0x03);
587
5cd9ec01 588 // And now we loop, receiving samples.
7bc95e2e 589 for(uint32_t rsamples = 0; TRUE; ) {
590
5cd9ec01
M
591 if(BUTTON_PRESS()) {
592 DbpString("cancelled by button");
7bc95e2e 593 break;
5cd9ec01 594 }
15c4dc5a 595
5cd9ec01
M
596 LED_A_ON();
597 WDT_HIT();
15c4dc5a 598
5cd9ec01
M
599 int register readBufDataP = data - dmaBuf;
600 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
601 if (readBufDataP <= dmaBufDataP){
602 dataLen = dmaBufDataP - readBufDataP;
603 } else {
7bc95e2e 604 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
5cd9ec01
M
605 }
606 // test for length of buffer
607 if(dataLen > maxDataLen) {
608 maxDataLen = dataLen;
f71f4deb 609 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
7bc95e2e 610 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
611 break;
5cd9ec01
M
612 }
613 }
614 if(dataLen < 1) continue;
615
616 // primary buffer was stopped( <-- we lost data!
617 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
618 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
619 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
7bc95e2e 620 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
621 }
622 // secondary buffer sets as primary, secondary buffer was stopped
623 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
624 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
625 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
626 }
627
628 LED_A_OFF();
7bc95e2e 629
630 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
3be2a5ae 631
7bc95e2e 632 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
633 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
634 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
635 LED_C_ON();
5cd9ec01 636
7bc95e2e 637 // check - if there is a short 7bit request from reader
638 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
5cd9ec01 639
7bc95e2e 640 if(triggered) {
6a1f2d82 641 if (!LogTrace(receivedCmd,
642 Uart.len,
643 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
644 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
645 Uart.parity,
646 TRUE)) break;
7bc95e2e 647 }
648 /* And ready to receive another command. */
649 UartReset();
650 /* And also reset the demod code, which might have been */
651 /* false-triggered by the commands from the reader. */
652 DemodReset();
653 LED_B_OFF();
654 }
655 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
5cd9ec01 656 }
3be2a5ae 657
7bc95e2e 658 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
659 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
660 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
661 LED_B_ON();
5cd9ec01 662
6a1f2d82 663 if (!LogTrace(receivedResponse,
664 Demod.len,
665 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
666 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
667 Demod.parity,
668 FALSE)) break;
5cd9ec01 669
7bc95e2e 670 if ((!triggered) && (param & 0x01)) triggered = TRUE;
5cd9ec01 671
7bc95e2e 672 // And ready to receive another response.
673 DemodReset();
0ec548dc 674 // And reset the Miller decoder including itS (now outdated) input buffer
675 UartInit(receivedCmd, receivedCmdPar);
676
7bc95e2e 677 LED_C_OFF();
678 }
679 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
680 }
5cd9ec01
M
681 }
682
7bc95e2e 683 previous_data = *data;
684 rsamples++;
5cd9ec01 685 data++;
d714d3ef 686 if(data == dmaBuf + DMA_BUFFER_SIZE) {
5cd9ec01
M
687 data = dmaBuf;
688 }
689 } // main cycle
690
7bc95e2e 691 FpgaDisableSscDma();
7838f4be 692 LEDsoff();
693
7bc95e2e 694 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
3000dc4e 695 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
5ee53a0e 696
697 set_tracing(FALSE);
15c4dc5a 698}
699
15c4dc5a 700//-----------------------------------------------------------------------------
701// Prepare tag messages
702//-----------------------------------------------------------------------------
6a1f2d82 703static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
15c4dc5a 704{
8f51ddb0 705 ToSendReset();
15c4dc5a 706
707 // Correction bit, might be removed when not needed
708 ToSendStuffBit(0);
709 ToSendStuffBit(0);
710 ToSendStuffBit(0);
711 ToSendStuffBit(0);
712 ToSendStuffBit(1); // 1
713 ToSendStuffBit(0);
714 ToSendStuffBit(0);
715 ToSendStuffBit(0);
8f51ddb0 716
15c4dc5a 717 // Send startbit
72934aa3 718 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 719 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 720
6a1f2d82 721 for(uint16_t i = 0; i < len; i++) {
8f51ddb0 722 uint8_t b = cmd[i];
15c4dc5a 723
724 // Data bits
6a1f2d82 725 for(uint16_t j = 0; j < 8; j++) {
15c4dc5a 726 if(b & 1) {
72934aa3 727 ToSend[++ToSendMax] = SEC_D;
15c4dc5a 728 } else {
72934aa3 729 ToSend[++ToSendMax] = SEC_E;
8f51ddb0
M
730 }
731 b >>= 1;
732 }
15c4dc5a 733
0014cb46 734 // Get the parity bit
6a1f2d82 735 if (parity[i>>3] & (0x80>>(i&0x0007))) {
8f51ddb0 736 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 737 LastProxToAirDuration = 8 * ToSendMax - 4;
15c4dc5a 738 } else {
72934aa3 739 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 740 LastProxToAirDuration = 8 * ToSendMax;
15c4dc5a 741 }
8f51ddb0 742 }
15c4dc5a 743
8f51ddb0
M
744 // Send stopbit
745 ToSend[++ToSendMax] = SEC_F;
15c4dc5a 746
8f51ddb0
M
747 // Convert from last byte pos to length
748 ToSendMax++;
8f51ddb0
M
749}
750
6a1f2d82 751static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
752{
753 uint8_t par[MAX_PARITY_SIZE];
754
755 GetParity(cmd, len, par);
756 CodeIso14443aAsTagPar(cmd, len, par);
15c4dc5a 757}
758
15c4dc5a 759
8f51ddb0
M
760static void Code4bitAnswerAsTag(uint8_t cmd)
761{
762 int i;
763
5f6d6c90 764 ToSendReset();
8f51ddb0
M
765
766 // Correction bit, might be removed when not needed
767 ToSendStuffBit(0);
768 ToSendStuffBit(0);
769 ToSendStuffBit(0);
770 ToSendStuffBit(0);
771 ToSendStuffBit(1); // 1
772 ToSendStuffBit(0);
773 ToSendStuffBit(0);
774 ToSendStuffBit(0);
775
776 // Send startbit
777 ToSend[++ToSendMax] = SEC_D;
778
779 uint8_t b = cmd;
780 for(i = 0; i < 4; i++) {
781 if(b & 1) {
782 ToSend[++ToSendMax] = SEC_D;
7bc95e2e 783 LastProxToAirDuration = 8 * ToSendMax - 4;
8f51ddb0
M
784 } else {
785 ToSend[++ToSendMax] = SEC_E;
7bc95e2e 786 LastProxToAirDuration = 8 * ToSendMax;
8f51ddb0
M
787 }
788 b >>= 1;
789 }
790
791 // Send stopbit
792 ToSend[++ToSendMax] = SEC_F;
793
5f6d6c90 794 // Convert from last byte pos to length
795 ToSendMax++;
15c4dc5a 796}
797
798//-----------------------------------------------------------------------------
799// Wait for commands from reader
800// Stop when button is pressed
801// Or return TRUE when command is captured
802//-----------------------------------------------------------------------------
6a1f2d82 803static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
15c4dc5a 804{
805 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
806 // only, since we are receiving, not transmitting).
807 // Signal field is off with the appropriate LED
808 LED_D_OFF();
809 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
810
811 // Now run a `software UART' on the stream of incoming samples.
6a1f2d82 812 UartInit(received, parity);
7bc95e2e 813
814 // clear RXRDY:
815 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
15c4dc5a 816
817 for(;;) {
818 WDT_HIT();
819
820 if(BUTTON_PRESS()) return FALSE;
7bc95e2e 821
15c4dc5a 822 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
7bc95e2e 823 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
824 if(MillerDecoding(b, 0)) {
825 *len = Uart.len;
15c4dc5a 826 return TRUE;
827 }
7bc95e2e 828 }
15c4dc5a 829 }
830}
28afbd2b 831
6a1f2d82 832static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
7bc95e2e 833int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
28afbd2b 834int EmSend4bit(uint8_t resp);
6a1f2d82 835int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
836int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
837int EmSendCmd(uint8_t *resp, uint16_t respLen);
838int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
839bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
840 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
15c4dc5a 841
117d9ec2 842static uint8_t* free_buffer_pointer;
ce02f6f9 843
844typedef struct {
845 uint8_t* response;
846 size_t response_n;
847 uint8_t* modulation;
848 size_t modulation_n;
7bc95e2e 849 uint32_t ProxToAirDuration;
ce02f6f9 850} tag_response_info_t;
851
ce02f6f9 852bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
7bc95e2e 853 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
ce02f6f9 854 // This will need the following byte array for a modulation sequence
855 // 144 data bits (18 * 8)
856 // 18 parity bits
857 // 2 Start and stop
858 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
859 // 1 just for the case
860 // ----------- +
861 // 166 bytes, since every bit that needs to be send costs us a byte
862 //
f71f4deb 863
864
ce02f6f9 865 // Prepare the tag modulation bits from the message
866 CodeIso14443aAsTag(response_info->response,response_info->response_n);
867
868 // Make sure we do not exceed the free buffer space
869 if (ToSendMax > max_buffer_size) {
870 Dbprintf("Out of memory, when modulating bits for tag answer:");
871 Dbhexdump(response_info->response_n,response_info->response,false);
872 return false;
873 }
874
875 // Copy the byte array, used for this modulation to the buffer position
876 memcpy(response_info->modulation,ToSend,ToSendMax);
877
7bc95e2e 878 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
ce02f6f9 879 response_info->modulation_n = ToSendMax;
7bc95e2e 880 response_info->ProxToAirDuration = LastProxToAirDuration;
ce02f6f9 881
882 return true;
883}
884
f71f4deb 885
886// "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
887// Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
888// 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
889// -> need 273 bytes buffer
c9216a92 890// 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
891// 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
892#define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
f71f4deb 893
ce02f6f9 894bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
895 // Retrieve and store the current buffer index
896 response_info->modulation = free_buffer_pointer;
897
898 // Determine the maximum size we can use from our buffer
f71f4deb 899 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
ce02f6f9 900
901 // Forward the prepare tag modulation function to the inner function
f71f4deb 902 if (prepare_tag_modulation(response_info, max_buffer_size)) {
ce02f6f9 903 // Update the free buffer offset
904 free_buffer_pointer += ToSendMax;
905 return true;
906 } else {
907 return false;
908 }
909}
910
15c4dc5a 911//-----------------------------------------------------------------------------
912// Main loop of simulated tag: receive commands from reader, decide what
913// response to send, and send it.
914//-----------------------------------------------------------------------------
0db6ed9a 915void SimulateIso14443aTag(int tagType, int flags, byte_t* data)
15c4dc5a 916{
a126332a 917 uint32_t counters[] = {0,0,0};
d26849d4 918 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
919 // This can be used in a reader-only attack.
920 // (it can also be retrieved via 'hf 14a list', but hey...
921 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
922 uint8_t ar_nr_collected = 0;
923
81cd0474 924 uint8_t sak;
32719adf 925
926 // PACK response to PWD AUTH for EV1/NTAG
e98572a1 927 uint8_t response8[4] = {0,0,0,0};
32719adf 928
81cd0474 929 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
e98572a1 930 uint8_t response1[2] = {0,0};
81cd0474 931
932 switch (tagType) {
933 case 1: { // MIFARE Classic
934 // Says: I am Mifare 1k - original line
935 response1[0] = 0x04;
936 response1[1] = 0x00;
937 sak = 0x08;
938 } break;
939 case 2: { // MIFARE Ultralight
940 // Says: I am a stupid memory tag, no crypto
32719adf 941 response1[0] = 0x44;
81cd0474 942 response1[1] = 0x00;
943 sak = 0x00;
944 } break;
945 case 3: { // MIFARE DESFire
946 // Says: I am a DESFire tag, ph33r me
947 response1[0] = 0x04;
948 response1[1] = 0x03;
949 sak = 0x20;
950 } break;
951 case 4: { // ISO/IEC 14443-4
952 // Says: I am a javacard (JCOP)
953 response1[0] = 0x04;
954 response1[1] = 0x00;
955 sak = 0x28;
956 } break;
3fe4ff4f 957 case 5: { // MIFARE TNP3XXX
958 // Says: I am a toy
959 response1[0] = 0x01;
960 response1[1] = 0x0f;
961 sak = 0x01;
d26849d4 962 } break;
963 case 6: { // MIFARE Mini
964 // Says: I am a Mifare Mini, 320b
965 response1[0] = 0x44;
966 response1[1] = 0x00;
967 sak = 0x09;
968 } break;
32719adf 969 case 7: { // NTAG?
970 // Says: I am a NTAG,
971 response1[0] = 0x44;
972 response1[1] = 0x00;
973 sak = 0x00;
974 // PACK
975 response8[0] = 0x80;
976 response8[1] = 0x80;
977 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
2b1f4228 978 // uid not supplied then get from emulator memory
979 if (data[0]==0) {
980 uint16_t start = 4 * (0+12);
981 uint8_t emdata[8];
982 emlGetMemBt( emdata, start, sizeof(emdata));
983 memcpy(data, emdata, 3); //uid bytes 0-2
984 memcpy(data+3, emdata+4, 4); //uid bytes 3-7
985 flags |= FLAG_7B_UID_IN_DATA;
986 }
32719adf 987 } break;
81cd0474 988 default: {
989 Dbprintf("Error: unkown tagtype (%d)",tagType);
990 return;
991 } break;
992 }
993
994 // The second response contains the (mandatory) first 24 bits of the UID
c8b6da22 995 uint8_t response2[5] = {0x00};
81cd0474 996
997 // Check if the uid uses the (optional) part
c8b6da22 998 uint8_t response2a[5] = {0x00};
999
d26849d4 1000 if (flags & FLAG_7B_UID_IN_DATA) {
81cd0474 1001 response2[0] = 0x88;
d26849d4 1002 response2[1] = data[0];
1003 response2[2] = data[1];
1004 response2[3] = data[2];
1005
1006 response2a[0] = data[3];
1007 response2a[1] = data[4];
1008 response2a[2] = data[5];
c3c241f3 1009 response2a[3] = data[6]; //??
81cd0474 1010 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1011
1012 // Configure the ATQA and SAK accordingly
1013 response1[0] |= 0x40;
1014 sak |= 0x04;
1015 } else {
d26849d4 1016 memcpy(response2, data, 4);
1017 //num_to_bytes(uid_1st,4,response2);
81cd0474 1018 // Configure the ATQA and SAK accordingly
1019 response1[0] &= 0xBF;
1020 sak &= 0xFB;
1021 }
1022
1023 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1024 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1025
1026 // Prepare the mandatory SAK (for 4 and 7 byte UID)
c8b6da22 1027 uint8_t response3[3] = {0x00};
81cd0474 1028 response3[0] = sak;
1029 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1030
1031 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
c8b6da22 1032 uint8_t response3a[3] = {0x00};
81cd0474 1033 response3a[0] = sak & 0xFB;
1034 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1035
0de8e387 1036 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
6a1f2d82 1037 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1038 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1039 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1040 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1041 // TC(1) = 0x02: CID supported, NAD not supported
ce02f6f9 1042 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1043
2b1f4228 1044 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
32719adf 1045 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
2b1f4228 1046 //uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
32719adf 1047
c9216a92 1048 // Prepare CHK_TEARING
2b1f4228 1049 //uint8_t response9[] = {0xBD,0x90,0x3f};
c9216a92 1050
1051 #define TAG_RESPONSE_COUNT 10
7bc95e2e 1052 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1053 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1054 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1055 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1056 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1057 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1058 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1059 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
4c0cf2d2 1060
495d7f13 1061 { .response = response8, .response_n = sizeof(response8) } // EV1/NTAG PACK response
4c0cf2d2 1062 };
1063 //{ .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
2b1f4228 1064 //{ .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
4c0cf2d2 1065
7bc95e2e 1066
1067 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1068 // Such a response is less time critical, so we can prepare them on the fly
1069 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1070 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1071 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1072 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1073 tag_response_info_t dynamic_response_info = {
1074 .response = dynamic_response_buffer,
1075 .response_n = 0,
1076 .modulation = dynamic_modulation_buffer,
1077 .modulation_n = 0
1078 };
ce02f6f9 1079
99cf19d9 1080 // We need to listen to the high-frequency, peak-detected path.
1081 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1082
f71f4deb 1083 BigBuf_free_keep_EM();
1084
1085 // allocate buffers:
1086 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1087 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1088 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1089
1090 // clear trace
3000dc4e
MHS
1091 clear_trace();
1092 set_tracing(TRUE);
f71f4deb 1093
7bc95e2e 1094 // Prepare the responses of the anticollision phase
ce02f6f9 1095 // there will be not enough time to do this at the moment the reader sends it REQA
495d7f13 1096 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++)
7bc95e2e 1097 prepare_allocated_tag_modulation(&responses[i]);
15c4dc5a 1098
7bc95e2e 1099 int len = 0;
15c4dc5a 1100
1101 // To control where we are in the protocol
1102 int order = 0;
1103 int lastorder;
1104
1105 // Just to allow some checks
1106 int happened = 0;
1107 int happened2 = 0;
81cd0474 1108 int cmdsRecvd = 0;
15c4dc5a 1109
254b70a4 1110 cmdsRecvd = 0;
7bc95e2e 1111 tag_response_info_t* p_response;
15c4dc5a 1112
254b70a4 1113 LED_A_ON();
1114 for(;;) {
4c0cf2d2 1115
1116 WDT_HIT();
1117
7bc95e2e 1118 // Clean receive command buffer
6a1f2d82 1119 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
ce02f6f9 1120 DbpString("Button press");
254b70a4 1121 break;
1122 }
7bc95e2e 1123
1124 p_response = NULL;
1125
254b70a4 1126 // Okay, look at the command now.
1127 lastorder = order;
1128 if(receivedCmd[0] == 0x26) { // Received a REQUEST
ce02f6f9 1129 p_response = &responses[0]; order = 1;
254b70a4 1130 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
ce02f6f9 1131 p_response = &responses[0]; order = 6;
254b70a4 1132 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
ce02f6f9 1133 p_response = &responses[1]; order = 2;
6a1f2d82 1134 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
ce02f6f9 1135 p_response = &responses[2]; order = 20;
254b70a4 1136 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
ce02f6f9 1137 p_response = &responses[3]; order = 3;
254b70a4 1138 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
ce02f6f9 1139 p_response = &responses[4]; order = 30;
254b70a4 1140 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
32719adf 1141 uint8_t block = receivedCmd[1];
2b1f4228 1142 // if Ultralight or NTAG (4 byte blocks)
1143 if ( tagType == 7 || tagType == 2 ) {
1144 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1145 uint16_t start = 4 * (block+12);
5e428463 1146 uint8_t emdata[MAX_MIFARE_FRAME_SIZE];
1147 emlGetMemBt( emdata, start, 16);
1148 AppendCrc14443a(emdata, 16);
1149 EmSendCmdEx(emdata, sizeof(emdata), false);
2b1f4228 1150 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
32719adf 1151 p_response = NULL;
2b1f4228 1152 } else { // all other tags (16 byte block tags)
1153 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
32719adf 1154 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1155 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1156 p_response = NULL;
1157 }
a126332a 1158 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read)
5e428463 1159
1160 uint8_t emdata[MAX_FRAME_SIZE];
2b1f4228 1161 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1162 int start = (receivedCmd[1]+12) * 4;
ce3d6bd2 1163 int len = (receivedCmd[2] - receivedCmd[1] + 1) * 4;
5e428463 1164 emlGetMemBt( emdata, start, len);
1165 AppendCrc14443a(emdata, len);
1166 EmSendCmdEx(emdata, len+2, false);
1167 p_response = NULL;
1168
839a53ae 1169 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1170 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
2b1f4228 1171 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1172 uint16_t start = 4 * 4;
1173 uint8_t emdata[34];
1174 emlGetMemBt( emdata, start, 32);
1175 AppendCrc14443a(emdata, 32);
1176 EmSendCmdEx(emdata, sizeof(emdata), false);
1177 //uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1178 // 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1179 // 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1180 // 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1181 // 0x00,0x00};
1182 //AppendCrc14443a(data, sizeof(data)-2);
1183 //EmSendCmdEx(data,sizeof(data),false);
839a53ae 1184 p_response = NULL;
a126332a 1185 } else if (receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
e9a92fe2 1186 uint8_t index = receivedCmd[1];
a126332a 1187 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
e9a92fe2 1188 if ( counters[index] > 0) {
1189 num_to_bytes(counters[index], 3, data);
1190 AppendCrc14443a(data, sizeof(data)-2);
1191 }
a126332a 1192 EmSendCmdEx(data,sizeof(data),false);
1193 p_response = NULL;
1194 } else if (receivedCmd[0] == 0xA5 && tagType == 7) { // Received a INC COUNTER --
ce3d6bd2 1195 // number of counter
a126332a 1196 uint8_t counter = receivedCmd[1];
1197 uint32_t val = bytes_to_num(receivedCmd+2,4);
1198 counters[counter] = val;
1199
ce3d6bd2 1200 // send ACK
1201 uint8_t ack[] = {0x0a};
1202 EmSendCmdEx(ack,sizeof(ack),false);
1203 p_response = NULL;
1204
c9216a92 1205 } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT --
2b1f4228 1206 //first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1207 uint8_t emdata[3];
1208 uint8_t counter=0;
1209 if (receivedCmd[1]<3) counter = receivedCmd[1];
1210 emlGetMemBt( emdata, 10+counter, 1);
1211 AppendCrc14443a(emdata, sizeof(emdata)-2);
1212 EmSendCmdEx(emdata, sizeof(emdata), false);
1213 p_response = NULL;
1214 //p_response = &responses[9];
1215
254b70a4 1216 } else if(receivedCmd[0] == 0x50) { // Received a HALT
810f5379 1217 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1218 p_response = NULL;
254b70a4 1219 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
32719adf 1220
1221 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
2b1f4228 1222 uint8_t emdata[10];
1223 emlGetMemBt( emdata, 0, 8 );
1224 AppendCrc14443a(emdata, sizeof(emdata)-2);
1225 EmSendCmdEx(emdata, sizeof(emdata), false);
1226 p_response = NULL;
1227 //p_response = &responses[7];
32719adf 1228 } else {
1229 p_response = &responses[5]; order = 7;
1230 }
254b70a4 1231 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
7bc95e2e 1232 if (tagType == 1 || tagType == 2) { // RATS not supported
1233 EmSend4bit(CARD_NACK_NA);
1234 p_response = NULL;
1235 } else {
1236 p_response = &responses[6]; order = 70;
1237 }
6a1f2d82 1238 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
810f5379 1239 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
d26849d4 1240 uint32_t nonce = bytes_to_num(response5,4);
7bc95e2e 1241 uint32_t nr = bytes_to_num(receivedCmd,4);
1242 uint32_t ar = bytes_to_num(receivedCmd+4,4);
d26849d4 1243 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1244
1245 if(flags & FLAG_NR_AR_ATTACK )
1246 {
1247 if(ar_nr_collected < 2){
1248 // Avoid duplicates... probably not necessary, nr should vary.
1249 //if(ar_nr_responses[3] != nr){
1250 ar_nr_responses[ar_nr_collected*5] = 0;
1251 ar_nr_responses[ar_nr_collected*5+1] = 0;
1252 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1253 ar_nr_responses[ar_nr_collected*5+3] = nr;
1254 ar_nr_responses[ar_nr_collected*5+4] = ar;
1255 ar_nr_collected++;
1256 //}
1257 }
1258
1259 if(ar_nr_collected > 1 ) {
1260
1261 if (MF_DBGLEVEL >= 2) {
1262 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1263 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1264 ar_nr_responses[0], // UID1
1265 ar_nr_responses[1], // UID2
1266 ar_nr_responses[2], // NT
1267 ar_nr_responses[3], // AR1
1268 ar_nr_responses[4], // NR1
1269 ar_nr_responses[8], // AR2
1270 ar_nr_responses[9] // NR2
1271 );
7838f4be 1272 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
1273 ar_nr_responses[0], // UID1
1274 ar_nr_responses[1], // UID2
1275 ar_nr_responses[2], // NT1
1276 ar_nr_responses[3], // AR1
1277 ar_nr_responses[4], // NR1
1278 ar_nr_responses[7], // NT2
1279 ar_nr_responses[8], // AR2
1280 ar_nr_responses[9] // NR2
1281 );
d26849d4 1282 }
1283 uint8_t len = ar_nr_collected*5*4;
1284 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1285 ar_nr_collected = 0;
1286 memset(ar_nr_responses, 0x00, len);
d26849d4 1287 }
1288 }
32719adf 1289 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1290 {
1291
1292 }
1293 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1294 {
1295 if ( tagType == 7 ) {
2b1f4228 1296 uint16_t start = 13; //first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1297 uint8_t emdata[4];
1298 emlGetMemBt( emdata, start, 2);
1299 AppendCrc14443a(emdata, 2);
1300 EmSendCmdEx(emdata, sizeof(emdata), false);
1301 p_response = NULL;
1302 //p_response = &responses[8]; // PACK response
ce3d6bd2 1303 uint32_t pwd = bytes_to_num(receivedCmd+1,4);
e98572a1 1304
1305 if ( MF_DBGLEVEL >= 3) Dbprintf("Auth attempt: %08x", pwd);
32719adf 1306 }
2b1f4228 1307 } else {
7bc95e2e 1308 // Check for ISO 14443A-4 compliant commands, look at left nibble
1309 switch (receivedCmd[0]) {
7838f4be 1310 case 0x02:
1311 case 0x03: { // IBlock (command no CID)
1312 dynamic_response_info.response[0] = receivedCmd[0];
1313 dynamic_response_info.response[1] = 0x90;
1314 dynamic_response_info.response[2] = 0x00;
1315 dynamic_response_info.response_n = 3;
1316 } break;
7bc95e2e 1317 case 0x0B:
7838f4be 1318 case 0x0A: { // IBlock (command CID)
7bc95e2e 1319 dynamic_response_info.response[0] = receivedCmd[0];
1320 dynamic_response_info.response[1] = 0x00;
1321 dynamic_response_info.response[2] = 0x90;
1322 dynamic_response_info.response[3] = 0x00;
1323 dynamic_response_info.response_n = 4;
1324 } break;
1325
1326 case 0x1A:
1327 case 0x1B: { // Chaining command
1328 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1329 dynamic_response_info.response_n = 2;
1330 } break;
1331
1332 case 0xaa:
1333 case 0xbb: {
1334 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1335 dynamic_response_info.response_n = 2;
1336 } break;
1337
7838f4be 1338 case 0xBA: { // ping / pong
1339 dynamic_response_info.response[0] = 0xAB;
1340 dynamic_response_info.response[1] = 0x00;
1341 dynamic_response_info.response_n = 2;
7bc95e2e 1342 } break;
1343
1344 case 0xCA:
1345 case 0xC2: { // Readers sends deselect command
7838f4be 1346 dynamic_response_info.response[0] = 0xCA;
1347 dynamic_response_info.response[1] = 0x00;
1348 dynamic_response_info.response_n = 2;
7bc95e2e 1349 } break;
1350
1351 default: {
1352 // Never seen this command before
810f5379 1353 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1354 Dbprintf("Received unknown command (len=%d):",len);
1355 Dbhexdump(len,receivedCmd,false);
1356 // Do not respond
1357 dynamic_response_info.response_n = 0;
1358 } break;
1359 }
ce02f6f9 1360
7bc95e2e 1361 if (dynamic_response_info.response_n > 0) {
1362 // Copy the CID from the reader query
1363 dynamic_response_info.response[1] = receivedCmd[1];
ce02f6f9 1364
7bc95e2e 1365 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1366 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1367 dynamic_response_info.response_n += 2;
ce02f6f9 1368
7bc95e2e 1369 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1370 Dbprintf("Error preparing tag response");
810f5379 1371 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 1372 break;
1373 }
1374 p_response = &dynamic_response_info;
1375 }
81cd0474 1376 }
15c4dc5a 1377
1378 // Count number of wakeups received after a halt
1379 if(order == 6 && lastorder == 5) { happened++; }
1380
1381 // Count number of other messages after a halt
1382 if(order != 6 && lastorder == 5) { happened2++; }
1383
15c4dc5a 1384 if(cmdsRecvd > 999) {
1385 DbpString("1000 commands later...");
254b70a4 1386 break;
15c4dc5a 1387 }
ce02f6f9 1388 cmdsRecvd++;
1389
1390 if (p_response != NULL) {
7bc95e2e 1391 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1392 // do the tracing for the previous reader request and this tag answer:
810f5379 1393 uint8_t par[MAX_PARITY_SIZE] = {0x00};
6a1f2d82 1394 GetParity(p_response->response, p_response->response_n, par);
3fe4ff4f 1395
7bc95e2e 1396 EmLogTrace(Uart.output,
1397 Uart.len,
1398 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1399 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
6a1f2d82 1400 Uart.parity,
7bc95e2e 1401 p_response->response,
1402 p_response->response_n,
1403 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1404 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
6a1f2d82 1405 par);
7bc95e2e 1406 }
1407
1408 if (!tracing) {
1409 Dbprintf("Trace Full. Simulation stopped.");
1410 break;
1411 }
1412 }
15c4dc5a 1413
d26849d4 1414 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
5ee53a0e 1415 set_tracing(FALSE);
f71f4deb 1416 BigBuf_free_keep_EM();
c9216a92 1417 LED_A_OFF();
1418
0de8e387 1419 if (MF_DBGLEVEL >= 4){
5ee53a0e 1420 Dbprintf("-[ Wake ups after halt [%d]", happened);
1421 Dbprintf("-[ Messages after halt [%d]", happened2);
1422 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
0de8e387 1423 }
15c4dc5a 1424}
1425
9492e0b0 1426
1427// prepare a delayed transfer. This simply shifts ToSend[] by a number
1428// of bits specified in the delay parameter.
1429void PrepareDelayedTransfer(uint16_t delay)
1430{
1431 uint8_t bitmask = 0;
1432 uint8_t bits_to_shift = 0;
1433 uint8_t bits_shifted = 0;
2285d9dd 1434
9492e0b0 1435 delay &= 0x07;
1436 if (delay) {
1437 for (uint16_t i = 0; i < delay; i++) {
4b78d6b3 1438 bitmask |= (1 << i);
9492e0b0 1439 }
4c0cf2d2 1440 ToSend[++ToSendMax] = 0x00;
9492e0b0 1441 for (uint16_t i = 0; i < ToSendMax; i++) {
1442 bits_to_shift = ToSend[i] & bitmask;
1443 ToSend[i] = ToSend[i] >> delay;
1444 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1445 bits_shifted = bits_to_shift;
1446 }
1447 }
1448}
1449
7bc95e2e 1450
1451//-------------------------------------------------------------------------------------
15c4dc5a 1452// Transmit the command (to the tag) that was placed in ToSend[].
9492e0b0 1453// Parameter timing:
7bc95e2e 1454// if NULL: transfer at next possible time, taking into account
1455// request guard time and frame delay time
1456// if == 0: transfer immediately and return time of transfer
9492e0b0 1457// if != 0: delay transfer until time specified
7bc95e2e 1458//-------------------------------------------------------------------------------------
6a1f2d82 1459static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
15c4dc5a 1460{
9492e0b0 1461 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
e30c654b 1462
7bc95e2e 1463 uint32_t ThisTransferTime = 0;
e30c654b 1464
9492e0b0 1465 if (timing) {
1466 if(*timing == 0) { // Measure time
7bc95e2e 1467 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
9492e0b0 1468 } else {
1469 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1470 }
7bc95e2e 1471 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
4c0cf2d2 1472
7bc95e2e 1473 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1474 LastTimeProxToAirStart = *timing;
1475 } else {
1476 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1477 while(GetCountSspClk() < ThisTransferTime);
1478 LastTimeProxToAirStart = ThisTransferTime;
9492e0b0 1479 }
1480
7bc95e2e 1481 // clear TXRDY
1482 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1483
7bc95e2e 1484 uint16_t c = 0;
9492e0b0 1485 for(;;) {
1486 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1487 AT91C_BASE_SSC->SSC_THR = cmd[c];
4c0cf2d2 1488 ++c;
5ebcb867 1489 if(c >= len)
9492e0b0 1490 break;
9492e0b0 1491 }
1492 }
7bc95e2e 1493
1494 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
15c4dc5a 1495}
1496
7bc95e2e 1497
15c4dc5a 1498//-----------------------------------------------------------------------------
195af472 1499// Prepare reader command (in bits, support short frames) to send to FPGA
15c4dc5a 1500//-----------------------------------------------------------------------------
6a1f2d82 1501void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
15c4dc5a 1502{
7bc95e2e 1503 int i, j;
5ebcb867 1504 int last = 0;
7bc95e2e 1505 uint8_t b;
e30c654b 1506
7bc95e2e 1507 ToSendReset();
e30c654b 1508
7bc95e2e 1509 // Start of Communication (Seq. Z)
1510 ToSend[++ToSendMax] = SEC_Z;
1511 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
7bc95e2e 1512
1513 size_t bytecount = nbytes(bits);
1514 // Generate send structure for the data bits
1515 for (i = 0; i < bytecount; i++) {
1516 // Get the current byte to send
1517 b = cmd[i];
1518 size_t bitsleft = MIN((bits-(i*8)),8);
1519
1520 for (j = 0; j < bitsleft; j++) {
1521 if (b & 1) {
1522 // Sequence X
1523 ToSend[++ToSendMax] = SEC_X;
1524 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1525 last = 1;
1526 } else {
1527 if (last == 0) {
1528 // Sequence Z
1529 ToSend[++ToSendMax] = SEC_Z;
1530 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1531 } else {
1532 // Sequence Y
1533 ToSend[++ToSendMax] = SEC_Y;
1534 last = 0;
1535 }
1536 }
1537 b >>= 1;
1538 }
1539
6a1f2d82 1540 // Only transmit parity bit if we transmitted a complete byte
0ec548dc 1541 if (j == 8 && parity != NULL) {
7bc95e2e 1542 // Get the parity bit
6a1f2d82 1543 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
7bc95e2e 1544 // Sequence X
1545 ToSend[++ToSendMax] = SEC_X;
1546 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1547 last = 1;
1548 } else {
1549 if (last == 0) {
1550 // Sequence Z
1551 ToSend[++ToSendMax] = SEC_Z;
1552 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1553 } else {
1554 // Sequence Y
1555 ToSend[++ToSendMax] = SEC_Y;
1556 last = 0;
1557 }
1558 }
1559 }
1560 }
e30c654b 1561
7bc95e2e 1562 // End of Communication: Logic 0 followed by Sequence Y
1563 if (last == 0) {
1564 // Sequence Z
1565 ToSend[++ToSendMax] = SEC_Z;
1566 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1567 } else {
1568 // Sequence Y
1569 ToSend[++ToSendMax] = SEC_Y;
1570 last = 0;
1571 }
1572 ToSend[++ToSendMax] = SEC_Y;
e30c654b 1573
7bc95e2e 1574 // Convert to length of command:
4b78d6b3 1575 ++ToSendMax;
15c4dc5a 1576}
1577
195af472 1578//-----------------------------------------------------------------------------
1579// Prepare reader command to send to FPGA
1580//-----------------------------------------------------------------------------
6a1f2d82 1581void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
195af472 1582{
4b78d6b3 1583 //CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1584 CodeIso14443aBitsAsReaderPar(cmd, len<<3, parity);
195af472 1585}
1586
0c8d25eb 1587
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1588//-----------------------------------------------------------------------------
1589// Wait for commands from reader
1590// Stop when button is pressed (return 1) or field was gone (return 2)
1591// Or return 0 when command is captured
1592//-----------------------------------------------------------------------------
6a1f2d82 1593static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
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1594{
1595 *len = 0;
1596
1597 uint32_t timer = 0, vtime = 0;
1598 int analogCnt = 0;
1599 int analogAVG = 0;
1600
1601 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1602 // only, since we are receiving, not transmitting).
1603 // Signal field is off with the appropriate LED
1604 LED_D_OFF();
1605 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1606
1607 // Set ADC to read field strength
1608 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1609 AT91C_BASE_ADC->ADC_MR =
0c8d25eb 1610 ADC_MODE_PRESCALE(63) |
1611 ADC_MODE_STARTUP_TIME(1) |
1612 ADC_MODE_SAMPLE_HOLD_TIME(15);
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1613 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1614 // start ADC
1615 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1616
1617 // Now run a 'software UART' on the stream of incoming samples.
6a1f2d82 1618 UartInit(received, parity);
7bc95e2e 1619
1620 // Clear RXRDY:
1621 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
0c8d25eb 1622
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1623 for(;;) {
1624 WDT_HIT();
1625
1626 if (BUTTON_PRESS()) return 1;
1627
1628 // test if the field exists
1629 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1630 analogCnt++;
1631 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1632 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1633 if (analogCnt >= 32) {
0c8d25eb 1634 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
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1635 vtime = GetTickCount();
1636 if (!timer) timer = vtime;
1637 // 50ms no field --> card to idle state
1638 if (vtime - timer > 50) return 2;
1639 } else
1640 if (timer) timer = 0;
1641 analogCnt = 0;
1642 analogAVG = 0;
1643 }
1644 }
7bc95e2e 1645
9ca155ba 1646 // receive and test the miller decoding
7bc95e2e 1647 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1648 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1649 if(MillerDecoding(b, 0)) {
1650 *len = Uart.len;
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1651 return 0;
1652 }
7bc95e2e 1653 }
1654
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1655 }
1656}
1657
9ca155ba 1658
6a1f2d82 1659static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
7bc95e2e 1660{
1661 uint8_t b;
1662 uint16_t i = 0;
1663 uint32_t ThisTransferTime;
1664
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1665 // Modulate Manchester
1666 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
7bc95e2e 1667
1668 // include correction bit if necessary
1669 if (Uart.parityBits & 0x01) {
1670 correctionNeeded = TRUE;
1671 }
1672 if(correctionNeeded) {
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1673 // 1236, so correction bit needed
1674 i = 0;
7bc95e2e 1675 } else {
1676 i = 1;
9ca155ba 1677 }
7bc95e2e 1678
d714d3ef 1679 // clear receiving shift register and holding register
7bc95e2e 1680 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1681 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1682 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1683 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
9ca155ba 1684
7bc95e2e 1685 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1686 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1687 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1688 if (AT91C_BASE_SSC->SSC_RHR) break;
1689 }
1690
1691 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1692
1693 // Clear TXRDY:
1694 AT91C_BASE_SSC->SSC_THR = SEC_F;
1695
9ca155ba 1696 // send cycle
bb42a03e 1697 for(; i < respLen; ) {
9ca155ba 1698 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
7bc95e2e 1699 AT91C_BASE_SSC->SSC_THR = resp[i++];
1700 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
9ca155ba 1701 }
7bc95e2e 1702
17ad0e09 1703 if(BUTTON_PRESS()) break;
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1704 }
1705
7bc95e2e 1706 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
4b78d6b3 1707 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; // twich /8 ?? >>3,
0c8d25eb 1708 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
7bc95e2e 1709 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1710 AT91C_BASE_SSC->SSC_THR = SEC_F;
1711 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1712 i++;
1713 }
1714 }
0c8d25eb 1715
7bc95e2e 1716 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1717
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1718 return 0;
1719}
1720
7bc95e2e 1721int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1722 Code4bitAnswerAsTag(resp);
0a39986e 1723 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1724 // do the tracing for the previous reader request and this tag answer:
5ebcb867 1725 uint8_t par[1] = {0x00};
6a1f2d82 1726 GetParity(&resp, 1, par);
7bc95e2e 1727 EmLogTrace(Uart.output,
1728 Uart.len,
1729 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1730 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
6a1f2d82 1731 Uart.parity,
7bc95e2e 1732 &resp,
1733 1,
1734 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1735 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
6a1f2d82 1736 par);
0a39986e 1737 return res;
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1738}
1739
8f51ddb0 1740int EmSend4bit(uint8_t resp){
7bc95e2e 1741 return EmSend4bitEx(resp, false);
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1742}
1743
6a1f2d82 1744int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
7bc95e2e 1745 CodeIso14443aAsTagPar(resp, respLen, par);
8f51ddb0 1746 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
7bc95e2e 1747 // do the tracing for the previous reader request and this tag answer:
1748 EmLogTrace(Uart.output,
1749 Uart.len,
1750 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1751 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
6a1f2d82 1752 Uart.parity,
7bc95e2e 1753 resp,
1754 respLen,
1755 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1756 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
6a1f2d82 1757 par);
8f51ddb0
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1758 return res;
1759}
1760
6a1f2d82 1761int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
5ebcb867 1762 uint8_t par[MAX_PARITY_SIZE] = {0x00};
6a1f2d82 1763 GetParity(resp, respLen, par);
1764 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
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1765}
1766
6a1f2d82 1767int EmSendCmd(uint8_t *resp, uint16_t respLen){
5ebcb867 1768 uint8_t par[MAX_PARITY_SIZE] = {0x00};
6a1f2d82 1769 GetParity(resp, respLen, par);
1770 return EmSendCmdExPar(resp, respLen, false, par);
8f51ddb0
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1771}
1772
6a1f2d82 1773int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
7bc95e2e 1774 return EmSendCmdExPar(resp, respLen, false, par);
1775}
1776
6a1f2d82 1777bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1778 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
7bc95e2e 1779{
810f5379 1780 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1781 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1782 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1783 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1784 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1785 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1786 reader_EndTime = tag_StartTime - exact_fdt;
1787 reader_StartTime = reader_EndTime - reader_modlen;
5ebcb867 1788
810f5379 1789 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE))
1790 return FALSE;
1791 else
1792 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1793
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1794}
1795
15c4dc5a 1796//-----------------------------------------------------------------------------
1797// Wait a certain time for tag response
1798// If a response is captured return TRUE
e691fc45 1799// If it takes too long return FALSE
15c4dc5a 1800//-----------------------------------------------------------------------------
6a1f2d82 1801static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
15c4dc5a 1802{
46c65fed 1803 uint32_t c = 0x00;
e691fc45 1804
15c4dc5a 1805 // Set FPGA mode to "reader listen mode", no modulation (listen
534983d7 1806 // only, since we are receiving, not transmitting).
1807 // Signal field is on with the appropriate LED
1808 LED_D_ON();
1809 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1c611bbd 1810
534983d7 1811 // Now get the answer from the card
6a1f2d82 1812 DemodInit(receivedResponse, receivedResponsePar);
15c4dc5a 1813
7bc95e2e 1814 // clear RXRDY:
1815 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
0c8d25eb 1816
15c4dc5a 1817 for(;;) {
534983d7 1818 WDT_HIT();
15c4dc5a 1819
534983d7 1820 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
534983d7 1821 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
7bc95e2e 1822 if(ManchesterDecoding(b, offset, 0)) {
1823 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
15c4dc5a 1824 return TRUE;
19a700a8 1825 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
7bc95e2e 1826 return FALSE;
15c4dc5a 1827 }
534983d7 1828 }
1829 }
15c4dc5a 1830}
1831
6a1f2d82 1832void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
15c4dc5a 1833{
6a1f2d82 1834 CodeIso14443aBitsAsReaderPar(frame, bits, par);
dfc3c505 1835
7bc95e2e 1836 // Send command to tag
1837 TransmitFor14443a(ToSend, ToSendMax, timing);
1838 if(trigger)
1839 LED_A_ON();
dfc3c505 1840
7bc95e2e 1841 // Log reader command in trace buffer
4b78d6b3 1842 //LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1843 LogTrace(frame, nbytes(bits), (LastTimeProxToAirStart<<4) + DELAY_ARM2AIR_AS_READER, ((LastTimeProxToAirStart + LastProxToAirDuration)<<4) + DELAY_ARM2AIR_AS_READER, par, TRUE);
15c4dc5a 1844}
1845
6a1f2d82 1846void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
dfc3c505 1847{
4b78d6b3 1848 //ReaderTransmitBitsPar(frame, len*8, par, timing);
1849 ReaderTransmitBitsPar(frame, len<<3, par, timing);
dfc3c505 1850}
15c4dc5a 1851
6a1f2d82 1852void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
e691fc45 1853{
1854 // Generate parity and redirect
5ebcb867 1855 uint8_t par[MAX_PARITY_SIZE] = {0x00};
4b78d6b3 1856 //GetParity(frame, len/8, par);
1857 GetParity(frame, len >> 3, par);
6a1f2d82 1858 ReaderTransmitBitsPar(frame, len, par, timing);
e691fc45 1859}
1860
6a1f2d82 1861void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
15c4dc5a 1862{
1863 // Generate parity and redirect
5ebcb867 1864 uint8_t par[MAX_PARITY_SIZE] = {0x00};
6a1f2d82 1865 GetParity(frame, len, par);
4b78d6b3 1866 //ReaderTransmitBitsPar(frame, len*8, par, timing);
1867 ReaderTransmitBitsPar(frame, len<<3, par, timing);
15c4dc5a 1868}
1869
6a1f2d82 1870int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
e691fc45 1871{
5ebcb867 1872 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset))
1873 return FALSE;
1874
4b78d6b3 1875 //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1876 LogTrace(receivedAnswer, Demod.len, (Demod.startTime<<4) - DELAY_AIR2ARM_AS_READER, (Demod.endTime<<4) - DELAY_AIR2ARM_AS_READER, parity, FALSE);
e691fc45 1877 return Demod.len;
1878}
1879
6a1f2d82 1880int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
15c4dc5a 1881{
5ebcb867 1882 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0))
1883 return FALSE;
1884
4b78d6b3 1885 //LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1886 LogTrace(receivedAnswer, Demod.len, (Demod.startTime<<4) - DELAY_AIR2ARM_AS_READER, (Demod.endTime<<4) - DELAY_AIR2ARM_AS_READER, parity, FALSE);
e691fc45 1887 return Demod.len;
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1888}
1889
c188b1b9 1890// performs iso14443a anticollision (optional) and card select procedure
1891// fills the uid and cuid pointer unless NULL
1892// fills the card info record unless NULL
1893// if anticollision is false, then the UID must be provided in uid_ptr[]
1894// and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1895int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades) {
6a1f2d82 1896 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1897 uint8_t sel_all[] = { 0x93,0x20 };
1898 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1899 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
4c0cf2d2 1900 uint8_t resp[MAX_FRAME_SIZE] = {0}; // theoretically. A usual RATS will be much smaller
1901 uint8_t resp_par[MAX_PARITY_SIZE] = {0};
1902 byte_t uid_resp[4] = {0};
1903 size_t uid_resp_len = 0;
6a1f2d82 1904
1905 uint8_t sak = 0x04; // cascade uid
1906 int cascade_level = 0;
1907 int len;
1908
1909 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
c188b1b9 1910 ReaderTransmitBitsPar(wupa, 7, NULL, NULL);
7bc95e2e 1911
6a1f2d82 1912 // Receive the ATQA
1913 if(!ReaderReceive(resp, resp_par)) return 0;
6a1f2d82 1914
1915 if(p_hi14a_card) {
1916 memcpy(p_hi14a_card->atqa, resp, 2);
1917 p_hi14a_card->uidlen = 0;
1918 memset(p_hi14a_card->uid,0,10);
1919 }
5f6d6c90 1920
c188b1b9 1921 if (anticollision) {
4c0cf2d2 1922 // clear uid
1923 if (uid_ptr)
1924 memset(uid_ptr,0,10);
c188b1b9 1925 }
79a73ab2 1926
0ec548dc 1927 // check for proprietary anticollision:
4c0cf2d2 1928 if ((resp[0] & 0x1F) == 0) return 3;
0ec548dc 1929
6a1f2d82 1930 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1931 // which case we need to make a cascade 2 request and select - this is a long UID
1932 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1933 for(; sak & 0x04; cascade_level++) {
1934 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1935 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1936
c188b1b9 1937 if (anticollision) {
6a1f2d82 1938 // SELECT_ALL
4c0cf2d2 1939 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1940 if (!ReaderReceive(resp, resp_par)) return 0;
1941
1942 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1943 memset(uid_resp, 0, 4);
1944 uint16_t uid_resp_bits = 0;
1945 uint16_t collision_answer_offset = 0;
1946 // anti-collision-loop:
1947 while (Demod.collisionPos) {
1948 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1949 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1950 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1951 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1952 }
1953 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1954 uid_resp_bits++;
1955 // construct anticollosion command:
1956 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1957 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1958 sel_uid[2+i] = uid_resp[i];
1959 }
1960 collision_answer_offset = uid_resp_bits%8;
1961 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1962 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
6a1f2d82 1963 }
4c0cf2d2 1964 // finally, add the last bits and BCC of the UID
1965 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1966 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1967 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
6a1f2d82 1968 }
e691fc45 1969
4c0cf2d2 1970 } else { // no collision, use the response to SELECT_ALL as current uid
1971 memcpy(uid_resp, resp, 4);
1972 }
1973
c188b1b9 1974 } else {
1975 if (cascade_level < num_cascades - 1) {
1976 uid_resp[0] = 0x88;
1977 memcpy(uid_resp+1, uid_ptr+cascade_level*3, 3);
1978 } else {
1979 memcpy(uid_resp, uid_ptr+cascade_level*3, 4);
1980 }
1981 }
6a1f2d82 1982 uid_resp_len = 4;
5f6d6c90 1983
6a1f2d82 1984 // calculate crypto UID. Always use last 4 Bytes.
4c0cf2d2 1985 if(cuid_ptr)
6a1f2d82 1986 *cuid_ptr = bytes_to_num(uid_resp, 4);
e30c654b 1987
6a1f2d82 1988 // Construct SELECT UID command
1989 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
c188b1b9 1990 memcpy(sel_uid+2, uid_resp, 4); // the UID received during anticollision, or the provided UID
6a1f2d82 1991 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1992 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1993 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1994
1995 // Receive the SAK
1996 if (!ReaderReceive(resp, resp_par)) return 0;
4c0cf2d2 1997
6a1f2d82 1998 sak = resp[0];
1999
810f5379 2000 // Test if more parts of the uid are coming
6a1f2d82 2001 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
2002 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
2003 // http://www.nxp.com/documents/application_note/AN10927.pdf
6a1f2d82 2004 uid_resp[0] = uid_resp[1];
2005 uid_resp[1] = uid_resp[2];
2006 uid_resp[2] = uid_resp[3];
6a1f2d82 2007 uid_resp_len = 3;
2008 }
5f6d6c90 2009
4c0cf2d2 2010 if(uid_ptr && anticollision)
6a1f2d82 2011 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
5f6d6c90 2012
6a1f2d82 2013 if(p_hi14a_card) {
2014 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
2015 p_hi14a_card->uidlen += uid_resp_len;
2016 }
2017 }
79a73ab2 2018
6a1f2d82 2019 if(p_hi14a_card) {
2020 p_hi14a_card->sak = sak;
2021 p_hi14a_card->ats_len = 0;
2022 }
534983d7 2023
3fe4ff4f 2024 // non iso14443a compliant tag
2025 if( (sak & 0x20) == 0) return 2;
534983d7 2026
6a1f2d82 2027 // Request for answer to select
2028 AppendCrc14443a(rats, 2);
2029 ReaderTransmit(rats, sizeof(rats), NULL);
1c611bbd 2030
6a1f2d82 2031 if (!(len = ReaderReceive(resp, resp_par))) return 0;
3fe4ff4f 2032
6a1f2d82 2033 if(p_hi14a_card) {
2034 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
2035 p_hi14a_card->ats_len = len;
2036 }
5f6d6c90 2037
6a1f2d82 2038 // reset the PCB block number
2039 iso14_pcb_blocknum = 0;
19a700a8 2040
2041 // set default timeout based on ATS
2042 iso14a_set_ATS_timeout(resp);
2043
6a1f2d82 2044 return 1;
7e758047 2045}
15c4dc5a 2046
7bc95e2e 2047void iso14443a_setup(uint8_t fpga_minor_mode) {
7cc204bf 2048 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
9492e0b0 2049 // Set up the synchronous serial port
2050 FpgaSetupSsc();
7bc95e2e 2051 // connect Demodulated Signal to ADC:
7e758047 2052 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
e30c654b 2053
7e758047 2054 // Signal field is on with the appropriate LED
7bc95e2e 2055 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2056 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2057 LED_D_ON();
2058 } else {
2059 LED_D_OFF();
2060 }
2061 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
534983d7 2062
7bc95e2e 2063 // Start the timer
2064 StartCountSspClk();
2065
2066 DemodReset();
2067 UartReset();
2068 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
46c65fed 2069 iso14a_set_timeout(10*106); // 10ms default
7e758047 2070}
15c4dc5a 2071
6a1f2d82 2072int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
810f5379 2073 uint8_t parity[MAX_PARITY_SIZE] = {0x00};
534983d7 2074 uint8_t real_cmd[cmd_len+4];
2075 real_cmd[0] = 0x0a; //I-Block
b0127e65 2076 // put block number into the PCB
2077 real_cmd[0] |= iso14_pcb_blocknum;
534983d7 2078 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2079 memcpy(real_cmd+2, cmd, cmd_len);
2080 AppendCrc14443a(real_cmd,cmd_len+2);
2081
9492e0b0 2082 ReaderTransmit(real_cmd, cmd_len+4, NULL);
6a1f2d82 2083 size_t len = ReaderReceive(data, parity);
2084 uint8_t *data_bytes = (uint8_t *) data;
b0127e65 2085 if (!len)
2086 return 0; //DATA LINK ERROR
2087 // if we received an I- or R(ACK)-Block with a block number equal to the
2088 // current block number, toggle the current block number
2089 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2090 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2091 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2092 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2093 {
2094 iso14_pcb_blocknum ^= 1;
2095 }
2096
534983d7 2097 return len;
2098}
2099
7e758047 2100//-----------------------------------------------------------------------------
2101// Read an ISO 14443a tag. Send out commands and store answers.
2102//
2103//-----------------------------------------------------------------------------
7bc95e2e 2104void ReaderIso14443a(UsbCommand *c)
7e758047 2105{
534983d7 2106 iso14a_command_t param = c->arg[0];
7bc95e2e 2107 uint8_t *cmd = c->d.asBytes;
04bc1c66 2108 size_t len = c->arg[1] & 0xffff;
2109 size_t lenbits = c->arg[1] >> 16;
2110 uint32_t timeout = c->arg[2];
9492e0b0 2111 uint32_t arg0 = 0;
810f5379 2112 byte_t buf[USB_CMD_DATA_SIZE] = {0x00};
2113 uint8_t par[MAX_PARITY_SIZE] = {0x00};
902cb3c0 2114
810f5379 2115 if (param & ISO14A_CONNECT)
3000dc4e 2116 clear_trace();
e691fc45 2117
3000dc4e 2118 set_tracing(TRUE);
e30c654b 2119
810f5379 2120 if (param & ISO14A_REQUEST_TRIGGER)
7bc95e2e 2121 iso14a_set_trigger(TRUE);
15c4dc5a 2122
810f5379 2123
2124 if (param & ISO14A_CONNECT) {
7bc95e2e 2125 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
5f6d6c90 2126 if(!(param & ISO14A_NO_SELECT)) {
2127 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
c188b1b9 2128 arg0 = iso14443a_select_card(NULL,card,NULL, true, 0);
5f6d6c90 2129 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2130 }
534983d7 2131 }
e30c654b 2132
810f5379 2133 if (param & ISO14A_SET_TIMEOUT)
04bc1c66 2134 iso14a_set_timeout(timeout);
e30c654b 2135
810f5379 2136 if (param & ISO14A_APDU) {
902cb3c0 2137 arg0 = iso14_apdu(cmd, len, buf);
79a73ab2 2138 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 2139 }
e30c654b 2140
810f5379 2141 if (param & ISO14A_RAW) {
534983d7 2142 if(param & ISO14A_APPEND_CRC) {
0ec548dc 2143 if(param & ISO14A_TOPAZMODE) {
2144 AppendCrc14443b(cmd,len);
2145 } else {
d26849d4 2146 AppendCrc14443a(cmd,len);
0ec548dc 2147 }
534983d7 2148 len += 2;
c7324bef 2149 if (lenbits) lenbits += 16;
15c4dc5a 2150 }
0ec548dc 2151 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2152 if(param & ISO14A_TOPAZMODE) {
2153 int bits_to_send = lenbits;
2154 uint16_t i = 0;
2155 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2156 bits_to_send -= 7;
2157 while (bits_to_send > 0) {
2158 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2159 bits_to_send -= 8;
2160 }
2161 } else {
6a1f2d82 2162 GetParity(cmd, lenbits/8, par);
0ec548dc 2163 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2164 }
2165 } else { // want to send complete bytes only
2166 if(param & ISO14A_TOPAZMODE) {
2167 uint16_t i = 0;
2168 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2169 while (i < len) {
2170 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2171 }
5f6d6c90 2172 } else {
0ec548dc 2173 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2174 }
5f6d6c90 2175 }
6a1f2d82 2176 arg0 = ReaderReceive(buf, par);
9492e0b0 2177 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
534983d7 2178 }
15c4dc5a 2179
810f5379 2180 if (param & ISO14A_REQUEST_TRIGGER)
7bc95e2e 2181 iso14a_set_trigger(FALSE);
15c4dc5a 2182
810f5379 2183
2184 if (param & ISO14A_NO_DISCONNECT)
534983d7 2185 return;
15c4dc5a 2186
15c4dc5a 2187 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
5ee53a0e 2188 set_tracing(FALSE);
15c4dc5a 2189 LEDsoff();
15c4dc5a 2190}
b0127e65 2191
1c611bbd 2192
1c611bbd 2193// Determine the distance between two nonces.
2194// Assume that the difference is small, but we don't know which is first.
2195// Therefore try in alternating directions.
2196int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2197
1c611bbd 2198 if (nt1 == nt2) return 0;
4b78d6b3 2199
810f5379 2200 uint32_t nttmp1 = nt1;
2201 uint32_t nttmp2 = nt2;
2202
4b78d6b3 2203 for (uint16_t i = 1; i < 0xFFFF; i += 8) {
2204 nttmp1 = prng_successor(nttmp1, 1); if (nttmp1 == nt2) return i;
2205 nttmp2 = prng_successor(nttmp2, 1); if (nttmp2 == nt1) return -i;
2206
2207 nttmp1 = prng_successor(nttmp1, 2); if (nttmp1 == nt2) return i+1;
2208 nttmp2 = prng_successor(nttmp2, 2); if (nttmp2 == nt1) return -i-1;
2209
2210 nttmp1 = prng_successor(nttmp1, 3); if (nttmp1 == nt2) return i+2;
2211 nttmp2 = prng_successor(nttmp2, 3); if (nttmp2 == nt1) return -i-2;
2212
2213 nttmp1 = prng_successor(nttmp1, 4); if (nttmp1 == nt2) return i+3;
2214 nttmp2 = prng_successor(nttmp2, 4); if (nttmp2 == nt1) return -i-3;
810f5379 2215
4b78d6b3 2216 nttmp1 = prng_successor(nttmp1, 5); if (nttmp1 == nt2) return i+4;
2217 nttmp2 = prng_successor(nttmp2, 5); if (nttmp2 == nt1) return -i-4;
2218
2219 nttmp1 = prng_successor(nttmp1, 6); if (nttmp1 == nt2) return i+5;
2220 nttmp2 = prng_successor(nttmp2, 6); if (nttmp2 == nt1) return -i-5;
2221
2222 nttmp1 = prng_successor(nttmp1, 7); if (nttmp1 == nt2) return i+6;
2223 nttmp2 = prng_successor(nttmp2, 7); if (nttmp2 == nt1) return -i-6;
2224
2225 nttmp1 = prng_successor(nttmp1, 8); if (nttmp1 == nt2) return i+7;
2226 nttmp2 = prng_successor(nttmp2, 8); if (nttmp2 == nt1) return -i-7;
810f5379 2227 }
1c611bbd 2228
2229 return(-99999); // either nt1 or nt2 are invalid nonces
e772353f 2230}
2231
e772353f 2232
1c611bbd 2233//-----------------------------------------------------------------------------
2234// Recover several bits of the cypher stream. This implements (first stages of)
2235// the algorithm described in "The Dark Side of Security by Obscurity and
2236// Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2237// (article by Nicolas T. Courtois, 2009)
2238//-----------------------------------------------------------------------------
810f5379 2239void ReaderMifare(bool first_try, uint8_t block )
c830303d 2240{
2241 // Mifare AUTH
810f5379 2242 //uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2243 //uint8_t mf_auth[] = { 0x60,0x05, 0x58, 0x2c };
2244 uint8_t mf_auth[] = { 0x60,0x00, 0x00, 0x00 };
c830303d 2245 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
4c0cf2d2 2246 static uint8_t mf_nr_ar3 = 0;
c830303d 2247
810f5379 2248 mf_auth[1] = block;
2249 AppendCrc14443a(mf_auth, 2);
2250
495d7f13 2251 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = {0x00};
2252 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
c830303d 2253
1c611bbd 2254 byte_t nt_diff = 0;
6a1f2d82 2255 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
1c611bbd 2256 static byte_t par_low = 0;
495d7f13 2257 uint8_t uid[10] = {0};
4b78d6b3 2258 //uint32_t cuid = 0;
e772353f 2259
6a1f2d82 2260 uint32_t nt = 0;
2ed270a8 2261 uint32_t previous_nt = 0;
1c611bbd 2262 static uint32_t nt_attacked = 0;
3fe4ff4f 2263 byte_t par_list[8] = {0x00};
2264 byte_t ks_list[8] = {0x00};
e772353f 2265
d26849d4 2266 static uint32_t sync_time = 0;
3bc7b13d 2267 static int32_t sync_cycles = 0;
1c611bbd 2268 int catch_up_cycles = 0;
2269 int last_catch_up = 0;
4c0cf2d2 2270 uint16_t elapsed_prng_sequences = 1;
1c611bbd 2271 uint16_t consecutive_resyncs = 0;
2272 int isOK = 0;
e772353f 2273
4c0cf2d2 2274 #define PRNG_SEQUENCE_LENGTH (1 << 16);
3bc7b13d 2275 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2276 #define MAX_SYNC_TRIES 32
2277 #define NUM_DEBUG_INFOS 8 // per strategy
2278 #define MAX_STRATEGY 3
4c0cf2d2 2279
0de8e387 2280 uint16_t unexpected_random = 0;
2281 uint16_t sync_tries = 0;
3bc7b13d 2282 uint16_t strategy = 0;
5ebcb867 2283 uint32_t halt_time = 0;
4c0cf2d2 2284
4b78d6b3 2285 clear_trace();
2286 set_tracing(TRUE);
4c0cf2d2 2287
2288 LED_A_ON();
2289 LED_B_OFF();
2290 LED_C_OFF();
2291
2292 if (first_try)
2293 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2294
2295 // free eventually allocated BigBuf memory. We want all for tracing.
2296 BigBuf_free();
4c0cf2d2 2297
2298 if (first_try) {
2299 sync_time = GetCountSspClk() & 0xfffffff8;
2300 sync_cycles = PRNG_SEQUENCE_LENGTH; //65536; //0x10000 // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2301 mf_nr_ar3 = 0;
2302 nt_attacked = 0;
2303 par[0] = 0;
2304 } else {
2305 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2306 mf_nr_ar3++;
2307 mf_nr_ar[3] = mf_nr_ar3;
2308 par[0] = par_low;
2309 }
1c611bbd 2310
4c0cf2d2 2311 LED_C_ON();
2312 for(uint16_t i = 0; TRUE; ++i) {
2313
1c611bbd 2314 WDT_HIT();
e30c654b 2315
1c611bbd 2316 // Test if the action was cancelled
c830303d 2317 if(BUTTON_PRESS()) {
2318 isOK = -1;
1c611bbd 2319 break;
2320 }
2321
3bc7b13d 2322 if (strategy == 2) {
4c0cf2d2 2323 // test with additional halt command
3bc7b13d 2324 halt_time = 0;
2325 int len = mifare_sendcmd_short(NULL, false, 0x50, 0x00, receivedAnswer, receivedAnswerPar, &halt_time);
4c0cf2d2 2326
2327 if (len && MF_DBGLEVEL >= 3)
4b78d6b3 2328 Dbprintf("Unexpected response of %d bytes to halt command.", len);
3bc7b13d 2329 }
2330
2331 if (strategy == 3) {
2332 // test with FPGA power off/on
2333 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2334 SpinDelay(200);
2335 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2336 SpinDelay(100);
4c0cf2d2 2337 sync_time = GetCountSspClk() & 0xfffffff8;
5ebcb867 2338 WDT_HIT();
3bc7b13d 2339 }
2340
4b78d6b3 2341 if (!iso14443a_select_card(uid, NULL, NULL, true, 0)) {
4c0cf2d2 2342 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card\n");
1c611bbd 2343 continue;
2344 }
4c0cf2d2 2345
4b78d6b3 2346 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2347 catch_up_cycles = 0;
2348
2349 // if we missed the sync time already, advance to the next nonce repeat
2350 while(GetCountSspClk() > sync_time) {
2351 ++elapsed_prng_sequences;
2352 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2353 }
2354 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2355 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
f89c7050 2356
1c611bbd 2357 // Receive the (4 Byte) "random" nonce
4c0cf2d2 2358 if (!ReaderReceive(receivedAnswer, receivedAnswerPar))
1c611bbd 2359 continue;
1c611bbd 2360
1c611bbd 2361 // Transmit reader nonce with fake par
9492e0b0 2362 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
1c611bbd 2363
4b78d6b3 2364 previous_nt = nt;
2365 nt = bytes_to_num(receivedAnswer, 4);
2366
1c611bbd 2367 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2368 int nt_distance = dist_nt(previous_nt, nt);
2369 if (nt_distance == 0) {
2370 nt_attacked = nt;
0de8e387 2371 } else {
c830303d 2372 if (nt_distance == -99999) { // invalid nonce received
0de8e387 2373 unexpected_random++;
3bc7b13d 2374 if (unexpected_random > MAX_UNEXPECTED_RANDOM) {
c830303d 2375 isOK = -3; // Card has an unpredictable PRNG. Give up
2376 break;
2377 } else {
2378 continue; // continue trying...
2379 }
1c611bbd 2380 }
4c0cf2d2 2381
0de8e387 2382 if (++sync_tries > MAX_SYNC_TRIES) {
3bc7b13d 2383 if (strategy > MAX_STRATEGY || MF_DBGLEVEL < 3) {
0de8e387 2384 isOK = -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2385 break;
4b78d6b3 2386 } else {
0de8e387 2387 continue;
2388 }
2389 }
4c0cf2d2 2390
4b78d6b3 2391 sync_cycles = (sync_cycles - nt_distance)/elapsed_prng_sequences;
4c0cf2d2 2392 if (sync_cycles <= 0)
0de8e387 2393 sync_cycles += PRNG_SEQUENCE_LENGTH;
4c0cf2d2 2394
4b78d6b3 2395 if (MF_DBGLEVEL >= 3)
3bc7b13d 2396 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i, nt_distance, elapsed_prng_sequences, sync_cycles);
4c0cf2d2 2397
1c611bbd 2398 continue;
2399 }
2400 }
2401
2402 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
4c0cf2d2 2403
1c611bbd 2404 catch_up_cycles = -dist_nt(nt_attacked, nt);
c830303d 2405 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
1c611bbd 2406 catch_up_cycles = 0;
2407 continue;
2408 }
4c0cf2d2 2409
2410 // average?
3bc7b13d 2411 catch_up_cycles /= elapsed_prng_sequences;
4c0cf2d2 2412
1c611bbd 2413 if (catch_up_cycles == last_catch_up) {
4a71da5a 2414 ++consecutive_resyncs;
4c0cf2d2 2415 } else {
1c611bbd 2416 last_catch_up = catch_up_cycles;
2417 consecutive_resyncs = 0;
4b78d6b3 2418 }
4c0cf2d2 2419
1c611bbd 2420 if (consecutive_resyncs < 3) {
4c0cf2d2 2421 if (MF_DBGLEVEL >= 3)
2422 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2423 } else {
2424 sync_cycles += catch_up_cycles;
2425
2426 if (MF_DBGLEVEL >= 3)
2427 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2428
3bc7b13d 2429 last_catch_up = 0;
2430 catch_up_cycles = 0;
2431 consecutive_resyncs = 0;
1c611bbd 2432 }
2433 continue;
2434 }
2435
1c611bbd 2436 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
3bc7b13d 2437 if (ReaderReceive(receivedAnswer, receivedAnswerPar)) {
9492e0b0 2438 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
1c611bbd 2439
495d7f13 2440 if (nt_diff == 0)
6a1f2d82 2441 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
1c611bbd 2442
6a1f2d82 2443 par_list[nt_diff] = SwapBits(par[0], 8);
1c611bbd 2444 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2445
2446 // Test if the information is complete
2447 if (nt_diff == 0x07) {
2448 isOK = 1;
2449 break;
2450 }
2451
2452 nt_diff = (nt_diff + 1) & 0x07;
2453 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
6a1f2d82 2454 par[0] = par_low;
4b78d6b3 2455
1c611bbd 2456 } else {
495d7f13 2457 if (nt_diff == 0 && first_try) {
6a1f2d82 2458 par[0]++;
5ebcb867 2459 if (par[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
c830303d 2460 isOK = -2;
2461 break;
2462 }
1c611bbd 2463 } else {
6a1f2d82 2464 par[0] = ((par[0] & 0x1F) + 1) | par_low;
1c611bbd 2465 }
2466 }
4b78d6b3 2467
2468 consecutive_resyncs = 0;
1c611bbd 2469 }
2470
1c611bbd 2471 mf_nr_ar[3] &= 0x1F;
5ebcb867 2472
2473 WDT_HIT();
4c0cf2d2 2474
2475 // reset sync_time.
2476 if ( isOK == 1) {
2477 sync_time = 0;
2478 sync_cycles = 0;
2479 mf_nr_ar3 = 0;
2480 nt_attacked = 0;
2481 par[0] = 0;
0de8e387 2482 }
d26849d4 2483
495d7f13 2484 byte_t buf[28] = {0x00};
1c611bbd 2485 memcpy(buf + 0, uid, 4);
2486 num_to_bytes(nt, 4, buf + 4);
2487 memcpy(buf + 8, par_list, 8);
2488 memcpy(buf + 16, ks_list, 8);
2489 memcpy(buf + 24, mf_nr_ar, 4);
2490
2491 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2492
1c611bbd 2493 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2494 LEDsoff();
99cf19d9 2495 set_tracing(FALSE);
20f9a2a1 2496}
1c611bbd 2497
0de8e387 2498/**
d2f487af 2499 *MIFARE 1K simulate.
2500 *
2501 *@param flags :
2502 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2503 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2504 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2505 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2506 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2507 */
2508void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
20f9a2a1 2509{
50193c1e 2510 int cardSTATE = MFEMUL_NOFIELD;
8556b852 2511 int _7BUID = 0;
9ca155ba 2512 int vHf = 0; // in mV
8f51ddb0 2513 int res;
0a39986e
M
2514 uint32_t selTimer = 0;
2515 uint32_t authTimer = 0;
6a1f2d82 2516 uint16_t len = 0;
8f51ddb0 2517 uint8_t cardWRBL = 0;
9ca155ba
M
2518 uint8_t cardAUTHSC = 0;
2519 uint8_t cardAUTHKEY = 0xff; // no authentication
c3c241f3 2520// uint32_t cardRr = 0;
9ca155ba 2521 uint32_t cuid = 0;
d2f487af 2522 //uint32_t rn_enc = 0;
51969283 2523 uint32_t ans = 0;
0014cb46
M
2524 uint32_t cardINTREG = 0;
2525 uint8_t cardINTBLOCK = 0;
9ca155ba
M
2526 struct Crypto1State mpcs = {0, 0};
2527 struct Crypto1State *pcs;
2528 pcs = &mpcs;
d2f487af 2529 uint32_t numReads = 0;//Counts numer of times reader read a block
5ebcb867 2530 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
2531 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
2532 uint8_t response[MAX_MIFARE_FRAME_SIZE] = {0x00};
2533 uint8_t response_par[MAX_MIFARE_PARITY_SIZE] = {0x00};
9ca155ba 2534
d2f487af 2535 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2536 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2537 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
94422fa2 2538 uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2539 //uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
d2f487af 2540 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
9ca155ba 2541
02a40596 2542 //uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2543 uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};
d2f487af 2544 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
7bc95e2e 2545
2b1f4228 2546 //Here, we collect UID1,UID2,NT,AR,NR,0,0,NT2,AR2,NR2
d2f487af 2547 // This can be used in a reader-only attack.
2548 // (it can also be retrieved via 'hf 14a list', but hey...
c3c241f3 2549 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
d2f487af 2550 uint8_t ar_nr_collected = 0;
0014cb46 2551
7bc95e2e 2552 // Authenticate response - nonce
51969283 2553 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
7bc95e2e 2554
d2f487af 2555 //-- Determine the UID
2556 // Can be set from emulator memory, incoming data
2557 // and can be 7 or 4 bytes long
7bc95e2e 2558 if (flags & FLAG_4B_UID_IN_DATA)
d2f487af 2559 {
2560 // 4B uid comes from data-portion of packet
2561 memcpy(rUIDBCC1,datain,4);
8556b852 2562 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
8556b852 2563
7bc95e2e 2564 } else if (flags & FLAG_7B_UID_IN_DATA) {
d2f487af 2565 // 7B uid comes from data-portion of packet
2566 memcpy(&rUIDBCC1[1],datain,3);
2567 memcpy(rUIDBCC2, datain+3, 4);
2568 _7BUID = true;
7bc95e2e 2569 } else {
d2f487af 2570 // get UID from emul memory
2571 emlGetMemBt(receivedCmd, 7, 1);
2572 _7BUID = !(receivedCmd[0] == 0x00);
2573 if (!_7BUID) { // ---------- 4BUID
2574 emlGetMemBt(rUIDBCC1, 0, 4);
2575 } else { // ---------- 7BUID
2576 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2577 emlGetMemBt(rUIDBCC2, 3, 4);
2578 }
2579 }
7bc95e2e 2580
c3c241f3 2581 // save uid.
2582 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2583 if ( _7BUID )
2584 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2585
d2f487af 2586 /*
2587 * Regardless of what method was used to set the UID, set fifth byte and modify
2588 * the ATQA for 4 or 7-byte UID
2589 */
d2f487af 2590 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
7bc95e2e 2591 if (_7BUID) {
d2f487af 2592 rATQA[0] = 0x44;
8556b852 2593 rUIDBCC1[0] = 0x88;
d26849d4 2594 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
8556b852
M
2595 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2596 }
2597
d2f487af 2598 if (MF_DBGLEVEL >= 1) {
2599 if (!_7BUID) {
b03c0f2d 2600 Dbprintf("4B UID: %02x%02x%02x%02x",
2601 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
7bc95e2e 2602 } else {
b03c0f2d 2603 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2604 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2605 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
d2f487af 2606 }
2607 }
7bc95e2e 2608
99cf19d9 2609 // We need to listen to the high-frequency, peak-detected path.
2610 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2611
2612 // free eventually allocated BigBuf memory but keep Emulator Memory
2613 BigBuf_free_keep_EM();
2614
2615 // clear trace
2616 clear_trace();
2617 set_tracing(TRUE);
2618
2619
7bc95e2e 2620 bool finished = FALSE;
2b1f4228 2621 while (!BUTTON_PRESS() && !finished && !usb_poll_validate_length()) {
9ca155ba 2622 WDT_HIT();
9ca155ba
M
2623
2624 // find reader field
9ca155ba 2625 if (cardSTATE == MFEMUL_NOFIELD) {
0c8d25eb 2626 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
9ca155ba 2627 if (vHf > MF_MINFIELDV) {
0014cb46 2628 cardSTATE_TO_IDLE();
9ca155ba
M
2629 LED_A_ON();
2630 }
2631 }
d2f487af 2632 if(cardSTATE == MFEMUL_NOFIELD) continue;
9ca155ba 2633
d2f487af 2634 //Now, get data
6a1f2d82 2635 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
d2f487af 2636 if (res == 2) { //Field is off!
2637 cardSTATE = MFEMUL_NOFIELD;
2638 LEDsoff();
2639 continue;
7bc95e2e 2640 } else if (res == 1) {
2641 break; //return value 1 means button press
2642 }
2643
d2f487af 2644 // REQ or WUP request in ANY state and WUP in HALTED state
2645 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2646 selTimer = GetTickCount();
2647 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2648 cardSTATE = MFEMUL_SELECT1;
2649
2650 // init crypto block
2651 LED_B_OFF();
2652 LED_C_OFF();
2653 crypto1_destroy(pcs);
2654 cardAUTHKEY = 0xff;
2655 continue;
0a39986e 2656 }
7bc95e2e 2657
50193c1e 2658 switch (cardSTATE) {
d2f487af 2659 case MFEMUL_NOFIELD:
2660 case MFEMUL_HALTED:
50193c1e 2661 case MFEMUL_IDLE:{
6a1f2d82 2662 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
50193c1e
M
2663 break;
2664 }
2665 case MFEMUL_SELECT1:{
9ca155ba
M
2666 // select all
2667 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
d2f487af 2668 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
9ca155ba 2669 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
0014cb46 2670 break;
9ca155ba
M
2671 }
2672
d2f487af 2673 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2674 {
2675 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2676 }
9ca155ba 2677 // select card
0a39986e
M
2678 if (len == 9 &&
2679 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
bfb6a143 2680 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
9ca155ba 2681 cuid = bytes_to_num(rUIDBCC1, 4);
8556b852
M
2682 if (!_7BUID) {
2683 cardSTATE = MFEMUL_WORK;
0014cb46
M
2684 LED_B_ON();
2685 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2686 break;
8556b852
M
2687 } else {
2688 cardSTATE = MFEMUL_SELECT2;
8556b852 2689 }
9ca155ba 2690 }
50193c1e
M
2691 break;
2692 }
d2f487af 2693 case MFEMUL_AUTH1:{
495d7f13 2694 if( len != 8) {
d2f487af 2695 cardSTATE_TO_IDLE();
6a1f2d82 2696 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
d2f487af 2697 break;
2698 }
0c8d25eb 2699
d2f487af 2700 uint32_t ar = bytes_to_num(receivedCmd, 4);
6a1f2d82 2701 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
d2f487af 2702
2703 //Collect AR/NR
46cd801c 2704 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
495d7f13 2705 if(ar_nr_collected < 2) {
2706 if(ar_nr_responses[2] != ar) {
2707 // Avoid duplicates... probably not necessary, ar should vary.
c3c241f3 2708 //ar_nr_responses[ar_nr_collected*5] = 0;
2709 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2710 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2711 ar_nr_responses[ar_nr_collected*5+3] = nr;
2712 ar_nr_responses[ar_nr_collected*5+4] = ar;
273b57a7 2713 ar_nr_collected++;
12d708fe 2714 }
2715 // Interactive mode flag, means we need to send ACK
2716 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
12d708fe 2717 finished = true;
d2f487af 2718 }
2719
2720 // --- crypto
c3c241f3 2721 //crypto1_word(pcs, ar , 1);
2722 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2723
2724 //test if auth OK
2725 //if (cardRr != prng_successor(nonce, 64)){
2726
2727 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2728 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2729 // cardRr, prng_successor(nonce, 64));
7bc95e2e 2730 // Shouldn't we respond anything here?
d2f487af 2731 // Right now, we don't nack or anything, which causes the
2732 // reader to do a WUPA after a while. /Martin
b03c0f2d 2733 // -- which is the correct response. /piwi
c3c241f3 2734 //cardSTATE_TO_IDLE();
2735 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2736 //break;
2737 //}
d2f487af 2738
2739 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2740
2741 num_to_bytes(ans, 4, rAUTH_AT);
2742 // --- crypto
2743 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2744 LED_C_ON();
2745 cardSTATE = MFEMUL_WORK;
495d7f13 2746 if (MF_DBGLEVEL >= 4) {
2747 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2748 cardAUTHSC,
2749 cardAUTHKEY == 0 ? 'A' : 'B',
2750 GetTickCount() - authTimer
2751 );
2752 }
d2f487af 2753 break;
2754 }
50193c1e 2755 case MFEMUL_SELECT2:{
7bc95e2e 2756 if (!len) {
6a1f2d82 2757 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2758 break;
2759 }
8556b852 2760 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
9ca155ba 2761 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
8556b852
M
2762 break;
2763 }
9ca155ba 2764
8556b852
M
2765 // select 2 card
2766 if (len == 9 &&
495d7f13 2767 (receivedCmd[0] == 0x95 &&
2768 receivedCmd[1] == 0x70 &&
2769 memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0) ) {
8556b852 2770 EmSendCmd(rSAK, sizeof(rSAK));
8556b852
M
2771 cuid = bytes_to_num(rUIDBCC2, 4);
2772 cardSTATE = MFEMUL_WORK;
2773 LED_B_ON();
0014cb46 2774 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
8556b852
M
2775 break;
2776 }
0014cb46
M
2777
2778 // i guess there is a command). go into the work state.
7bc95e2e 2779 if (len != 4) {
6a1f2d82 2780 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2781 break;
2782 }
0014cb46 2783 cardSTATE = MFEMUL_WORK;
d2f487af 2784 //goto lbWORK;
2785 //intentional fall-through to the next case-stmt
50193c1e 2786 }
51969283 2787
7bc95e2e 2788 case MFEMUL_WORK:{
2789 if (len == 0) {
6a1f2d82 2790 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2791 break;
2792 }
2793
d2f487af 2794 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2795
495d7f13 2796 // decrypt seqence
2797 if(encrypted_data)
51969283 2798 mf_crypto1_decrypt(pcs, receivedCmd, len);
7bc95e2e 2799
d2f487af 2800 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2801 authTimer = GetTickCount();
2802 cardAUTHSC = receivedCmd[1] / 4; // received block num
2803 cardAUTHKEY = receivedCmd[0] - 0x60;
2804 crypto1_destroy(pcs);//Added by martin
2805 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
51969283 2806
d2f487af 2807 if (!encrypted_data) { // first authentication
b03c0f2d 2808 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
51969283 2809
d2f487af 2810 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2811 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
7bc95e2e 2812 } else { // nested authentication
b03c0f2d 2813 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
7bc95e2e 2814 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
d2f487af 2815 num_to_bytes(ans, 4, rAUTH_AT);
2816 }
0c8d25eb 2817
d2f487af 2818 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2819 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2820 cardSTATE = MFEMUL_AUTH1;
2821 break;
51969283 2822 }
7bc95e2e 2823
8f51ddb0
M
2824 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2825 // BUT... ACK --> NACK
2826 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2827 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2828 break;
2829 }
2830
2831 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2832 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2833 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2834 break;
0a39986e
M
2835 }
2836
7bc95e2e 2837 if(len != 4) {
6a1f2d82 2838 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
7bc95e2e 2839 break;
2840 }
d2f487af 2841
2842 if(receivedCmd[0] == 0x30 // read block
2843 || receivedCmd[0] == 0xA0 // write block
b03c0f2d 2844 || receivedCmd[0] == 0xC0 // inc
2845 || receivedCmd[0] == 0xC1 // dec
2846 || receivedCmd[0] == 0xC2 // restore
7bc95e2e 2847 || receivedCmd[0] == 0xB0) { // transfer
2848 if (receivedCmd[1] >= 16 * 4) {
d2f487af 2849 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
c3c241f3 2850 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
d2f487af 2851 break;
2852 }
2853
7bc95e2e 2854 if (receivedCmd[1] / 4 != cardAUTHSC) {
8f51ddb0 2855 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
c3c241f3 2856 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
8f51ddb0
M
2857 break;
2858 }
d2f487af 2859 }
2860 // read block
2861 if (receivedCmd[0] == 0x30) {
495d7f13 2862 if (MF_DBGLEVEL >= 4) Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2863
8f51ddb0
M
2864 emlGetMem(response, receivedCmd[1], 1);
2865 AppendCrc14443a(response, 16);
6a1f2d82 2866 mf_crypto1_encrypt(pcs, response, 18, response_par);
2867 EmSendCmdPar(response, 18, response_par);
d2f487af 2868 numReads++;
12d708fe 2869 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
d2f487af 2870 Dbprintf("%d reads done, exiting", numReads);
2871 finished = true;
2872 }
0a39986e
M
2873 break;
2874 }
0a39986e 2875 // write block
d2f487af 2876 if (receivedCmd[0] == 0xA0) {
b03c0f2d 2877 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
8f51ddb0 2878 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
8f51ddb0
M
2879 cardSTATE = MFEMUL_WRITEBL2;
2880 cardWRBL = receivedCmd[1];
0a39986e 2881 break;
7bc95e2e 2882 }
0014cb46 2883 // increment, decrement, restore
d2f487af 2884 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
b03c0f2d 2885 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
d2f487af 2886 if (emlCheckValBl(receivedCmd[1])) {
c3c241f3 2887 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
0014cb46
M
2888 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2889 break;
2890 }
2891 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2892 if (receivedCmd[0] == 0xC1)
2893 cardSTATE = MFEMUL_INTREG_INC;
2894 if (receivedCmd[0] == 0xC0)
2895 cardSTATE = MFEMUL_INTREG_DEC;
2896 if (receivedCmd[0] == 0xC2)
2897 cardSTATE = MFEMUL_INTREG_REST;
2898 cardWRBL = receivedCmd[1];
0014cb46
M
2899 break;
2900 }
0014cb46 2901 // transfer
d2f487af 2902 if (receivedCmd[0] == 0xB0) {
b03c0f2d 2903 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
0014cb46
M
2904 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2905 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2906 else
2907 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
0014cb46
M
2908 break;
2909 }
9ca155ba 2910 // halt
d2f487af 2911 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
9ca155ba 2912 LED_B_OFF();
0a39986e 2913 LED_C_OFF();
0014cb46
M
2914 cardSTATE = MFEMUL_HALTED;
2915 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
6a1f2d82 2916 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0a39986e 2917 break;
9ca155ba 2918 }
d2f487af 2919 // RATS
2920 if (receivedCmd[0] == 0xe0) {//RATS
8f51ddb0
M
2921 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2922 break;
2923 }
d2f487af 2924 // command not allowed
2925 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2926 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
51969283 2927 break;
8f51ddb0
M
2928 }
2929 case MFEMUL_WRITEBL2:{
495d7f13 2930 if (len == 18) {
8f51ddb0
M
2931 mf_crypto1_decrypt(pcs, receivedCmd, len);
2932 emlSetMem(receivedCmd, cardWRBL, 1);
2933 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2934 cardSTATE = MFEMUL_WORK;
51969283 2935 } else {
0014cb46 2936 cardSTATE_TO_IDLE();
6a1f2d82 2937 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
8f51ddb0 2938 }
8f51ddb0 2939 break;
50193c1e 2940 }
0014cb46
M
2941
2942 case MFEMUL_INTREG_INC:{
2943 mf_crypto1_decrypt(pcs, receivedCmd, len);
2944 memcpy(&ans, receivedCmd, 4);
2945 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2946 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2947 cardSTATE_TO_IDLE();
2948 break;
7bc95e2e 2949 }
6a1f2d82 2950 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2951 cardINTREG = cardINTREG + ans;
2952 cardSTATE = MFEMUL_WORK;
2953 break;
2954 }
2955 case MFEMUL_INTREG_DEC:{
2956 mf_crypto1_decrypt(pcs, receivedCmd, len);
2957 memcpy(&ans, receivedCmd, 4);
2958 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2959 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2960 cardSTATE_TO_IDLE();
2961 break;
2962 }
6a1f2d82 2963 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2964 cardINTREG = cardINTREG - ans;
2965 cardSTATE = MFEMUL_WORK;
2966 break;
2967 }
2968 case MFEMUL_INTREG_REST:{
2969 mf_crypto1_decrypt(pcs, receivedCmd, len);
2970 memcpy(&ans, receivedCmd, 4);
2971 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2972 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2973 cardSTATE_TO_IDLE();
2974 break;
2975 }
6a1f2d82 2976 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
0014cb46
M
2977 cardSTATE = MFEMUL_WORK;
2978 break;
2979 }
50193c1e 2980 }
50193c1e
M
2981 }
2982
9ca155ba
M
2983 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2984 LEDsoff();
2985
810f5379 2986 // Interactive mode flag, means we need to send ACK
2987 if(flags & FLAG_INTERACTIVE) {
d2f487af 2988 //May just aswell send the collected ar_nr in the response aswell
c3c241f3 2989 uint8_t len = ar_nr_collected*5*4;
2990 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
d2f487af 2991 }
d714d3ef 2992
810f5379 2993 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 ) {
12d708fe 2994 if(ar_nr_collected > 1 ) {
d2f487af 2995 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
c3c241f3 2996 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
2997 ar_nr_responses[0], // UID1
2998 ar_nr_responses[1], // UID2
2999 ar_nr_responses[2], // NT
3000 ar_nr_responses[3], // AR1
3001 ar_nr_responses[4], // NR1
3002 ar_nr_responses[8], // AR2
3003 ar_nr_responses[9] // NR2
d2f487af 3004 );
7838f4be 3005 Dbprintf("../tools/mfkey/mfkey32v2 %06x%08x %08x %08x %08x %08x %08x %08x",
3006 ar_nr_responses[0], // UID1
3007 ar_nr_responses[1], // UID2
3008 ar_nr_responses[2], // NT1
3009 ar_nr_responses[3], // AR1
3010 ar_nr_responses[4], // NR1
3011 ar_nr_responses[7], // NT2
3012 ar_nr_responses[8], // AR2
3013 ar_nr_responses[9] // NR2
3014 );
7bc95e2e 3015 } else {
d2f487af 3016 Dbprintf("Failed to obtain two AR/NR pairs!");
12d708fe 3017 if(ar_nr_collected > 0 ) {
2b1f4228 3018 Dbprintf("Only got these: UID=%06x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
c3c241f3 3019 ar_nr_responses[0], // UID1
3020 ar_nr_responses[1], // UID2
3021 ar_nr_responses[2], // NT
3022 ar_nr_responses[3], // AR1
3023 ar_nr_responses[4] // NR1
d2f487af 3024 );
3025 }
3026 }
3027 }
c3c241f3 3028 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
5ee53a0e 3029
3030 set_tracing(FALSE);
15c4dc5a 3031}
b62a5a84 3032
d2f487af 3033
b62a5a84
M
3034//-----------------------------------------------------------------------------
3035// MIFARE sniffer.
3036//
3037//-----------------------------------------------------------------------------
5cd9ec01
M
3038void RAMFUNC SniffMifare(uint8_t param) {
3039 // param:
3040 // bit 0 - trigger from first card answer
3041 // bit 1 - trigger from first reader 7-bit request
b62a5a84 3042 LEDsoff();
810f5379 3043
b62a5a84 3044 // init trace buffer
3000dc4e
MHS
3045 clear_trace();
3046 set_tracing(TRUE);
b62a5a84 3047
b62a5a84
M
3048 // The command (reader -> tag) that we're receiving.
3049 // The length of a received command will in most cases be no more than 18 bytes.
3050 // So 32 should be enough!
810f5379 3051 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE] = {0x00};
495d7f13 3052 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE] = {0x00};
810f5379 3053
b62a5a84 3054 // The response (tag -> reader) that we're receiving.
495d7f13 3055 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE] = {0x00};
3056 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE] = {0x00};
b62a5a84 3057
99cf19d9 3058 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
3059
3060 // free eventually allocated BigBuf memory
3061 BigBuf_free();
810f5379 3062
f71f4deb 3063 // allocate the DMA buffer, used to stream samples from the FPGA
3064 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
7bc95e2e 3065 uint8_t *data = dmaBuf;
3066 uint8_t previous_data = 0;
5cd9ec01
M
3067 int maxDataLen = 0;
3068 int dataLen = 0;
7bc95e2e 3069 bool ReaderIsActive = FALSE;
3070 bool TagIsActive = FALSE;
3071
b62a5a84 3072 // Set up the demodulator for tag -> reader responses.
6a1f2d82 3073 DemodInit(receivedResponse, receivedResponsePar);
b62a5a84
M
3074
3075 // Set up the demodulator for the reader -> tag commands
6a1f2d82 3076 UartInit(receivedCmd, receivedCmdPar);
b62a5a84
M
3077
3078 // Setup for the DMA.
7bc95e2e 3079 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
b62a5a84 3080
b62a5a84 3081 LED_D_OFF();
39864b0b
M
3082
3083 // init sniffer
3084 MfSniffInit();
b62a5a84 3085
b62a5a84 3086 // And now we loop, receiving samples.
7bc95e2e 3087 for(uint32_t sniffCounter = 0; TRUE; ) {
3088
5cd9ec01
M
3089 if(BUTTON_PRESS()) {
3090 DbpString("cancelled by button");
7bc95e2e 3091 break;
5cd9ec01
M
3092 }
3093
b62a5a84
M
3094 LED_A_ON();
3095 WDT_HIT();
39864b0b 3096
7bc95e2e 3097 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
3098 // check if a transaction is completed (timeout after 2000ms).
3099 // if yes, stop the DMA transfer and send what we have so far to the client
3100 if (MfSniffSend(2000)) {
3101 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3102 sniffCounter = 0;
3103 data = dmaBuf;
3104 maxDataLen = 0;
3105 ReaderIsActive = FALSE;
3106 TagIsActive = FALSE;
3107 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
39864b0b 3108 }
39864b0b 3109 }
7bc95e2e 3110
3111 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
3112 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
495d7f13 3113
3114 if (readBufDataP <= dmaBufDataP) // we are processing the same block of data which is currently being transferred
7bc95e2e 3115 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
495d7f13 3116 else
7bc95e2e 3117 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
495d7f13 3118
5cd9ec01 3119 // test for length of buffer
7bc95e2e 3120 if(dataLen > maxDataLen) { // we are more behind than ever...
3121 maxDataLen = dataLen;
f71f4deb 3122 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
5cd9ec01 3123 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
7bc95e2e 3124 break;
b62a5a84
M
3125 }
3126 }
5cd9ec01 3127 if(dataLen < 1) continue;
b62a5a84 3128
7bc95e2e 3129 // primary buffer was stopped ( <-- we lost data!
5cd9ec01
M
3130 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3131 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3132 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
55acbb2a 3133 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
5cd9ec01
M
3134 }
3135 // secondary buffer sets as primary, secondary buffer was stopped
3136 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3137 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
b62a5a84
M
3138 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3139 }
5cd9ec01
M
3140
3141 LED_A_OFF();
b62a5a84 3142
7bc95e2e 3143 if (sniffCounter & 0x01) {
b62a5a84 3144
495d7f13 3145 // no need to try decoding tag data if the reader is sending
3146 if(!TagIsActive) {
7bc95e2e 3147 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3148 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3149 LED_C_INV();
495d7f13 3150
6a1f2d82 3151 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
b62a5a84 3152
7bc95e2e 3153 /* And ready to receive another command. */
f8ada309 3154 UartInit(receivedCmd, receivedCmdPar);
7bc95e2e 3155
3156 /* And also reset the demod code */
3157 DemodReset();
3158 }
3159 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3160 }
3161
495d7f13 3162 // no need to try decoding tag data if the reader is sending
3163 if(!ReaderIsActive) {
7bc95e2e 3164 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3165 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3166 LED_C_INV();
b62a5a84 3167
6a1f2d82 3168 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
39864b0b 3169
7bc95e2e 3170 // And ready to receive another response.
3171 DemodReset();
495d7f13 3172
0ec548dc 3173 // And reset the Miller decoder including its (now outdated) input buffer
3174 UartInit(receivedCmd, receivedCmdPar);
7bc95e2e 3175 }
3176 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3177 }
b62a5a84
M
3178 }
3179
7bc95e2e 3180 previous_data = *data;
3181 sniffCounter++;
5cd9ec01 3182 data++;
495d7f13 3183
3184 if(data == dmaBuf + DMA_BUFFER_SIZE)
5cd9ec01 3185 data = dmaBuf;
7bc95e2e 3186
b62a5a84
M
3187 } // main cycle
3188
55acbb2a 3189 FpgaDisableSscDma();
39864b0b 3190 MfSniffEnd();
b62a5a84 3191 LEDsoff();
7838f4be 3192 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
5ee53a0e 3193 set_tracing(FALSE);
3803d529 3194}
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