[proxmark3-svn] / armsrc / util.c

//-----------------------------------------------------------------------------
// Jonathan Westhues, Sept 2005
//
// This code is licensed to you under the terms of the GNU GPL, version 2 or,
// at your option, any later version. See the LICENSE.txt file for the text of
// the license.
//-----------------------------------------------------------------------------
// Utility functions used in many places, not specific to any piece of code.
//-----------------------------------------------------------------------------

#include "proxmark3.h"
#include "util.h"
#include "string.h"

size_t nbytes(size_t nbits) {
	return (nbits/8)+((nbits%8)>0);
}

uint32_t SwapBits(uint32_t value, int nrbits) {
	int i;
	uint32_t newvalue = 0;
	for(i = 0; i < nrbits; i++) {
		newvalue ^= ((value >> i) & 1) << (nrbits - 1 - i);
	}
	return newvalue;
}

void num_to_bytes(uint64_t n, size_t len, uint8_t* dest)
{
	while (len--) {
		dest[len] = (uint8_t) n;
		n >>= 8;
	}
}

uint64_t bytes_to_num(uint8_t* src, size_t len)
{
	uint64_t num = 0;
	while (len--)
	{
		num = (num << 8) | (*src);
		src++;
	}
	return num;
}

void LEDsoff()
{
	LED_A_OFF();
	LED_B_OFF();
	LED_C_OFF();
	LED_D_OFF();
}

// LEDs: R(C) O(A) G(B) -- R(D) [1, 2, 4 and 8]
void LED(int led, int ms)
{
	if (led & LED_RED)
		LED_C_ON();
	if (led & LED_ORANGE)
		LED_A_ON();
	if (led & LED_GREEN)
		LED_B_ON();
	if (led & LED_RED2)
		LED_D_ON();

	if (!ms)
		return;

	SpinDelay(ms);

	if (led & LED_RED)
		LED_C_OFF();
	if (led & LED_ORANGE)
		LED_A_OFF();
	if (led & LED_GREEN)
		LED_B_OFF();
	if (led & LED_RED2)
		LED_D_OFF();
}


// Determine if a button is double clicked, single clicked,
// not clicked, or held down (for ms || 1sec)
// In general, don't use this function unless you expect a
// double click, otherwise it will waste 500ms -- use BUTTON_HELD instead
int BUTTON_CLICKED(int ms)
{
	// Up to 500ms in between clicks to mean a double click
	int ticks = (48000 * (ms ? ms : 1000)) >> 10;

	// If we're not even pressed, forget about it!
	if (!BUTTON_PRESS())
		return BUTTON_NO_CLICK;

	// Borrow a PWM unit for my real-time clock
	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	// 48 MHz / 1024 gives 46.875 kHz
	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;

	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;

	int letoff = 0;
	for(;;)
	{
		uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;

		// We haven't let off the button yet
		if (!letoff)
		{
			// We just let it off!
			if (!BUTTON_PRESS())
			{
				letoff = 1;

				// reset our timer for 500ms
				start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
				ticks = (48000 * (500)) >> 10;
			}

			// Still haven't let it off
			else
				// Have we held down a full second?
				if (now == (uint16_t)(start + ticks))
					return BUTTON_HOLD;
		}

		// We already let off, did we click again?
		else
			// Sweet, double click!
			if (BUTTON_PRESS())
				return BUTTON_DOUBLE_CLICK;

			// Have we ran out of time to double click?
			else
				if (now == (uint16_t)(start + ticks))
					// At least we did a single click
					return BUTTON_SINGLE_CLICK;

		WDT_HIT();
	}

	// We should never get here
	return BUTTON_ERROR;
}

// Determine if a button is held down
int BUTTON_HELD(int ms)
{
	// If button is held for one second
	int ticks = (48000 * (ms ? ms : 1000)) >> 10;

	// If we're not even pressed, forget about it!
	if (!BUTTON_PRESS())
		return BUTTON_NO_CLICK;

	// Borrow a PWM unit for my real-time clock
	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	// 48 MHz / 1024 gives 46.875 kHz
	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;

	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;

	for(;;)
	{
		uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;

		// As soon as our button let go, we didn't hold long enough
		if (!BUTTON_PRESS())
			return BUTTON_SINGLE_CLICK;

		// Have we waited the full second?
		else
			if (now == (uint16_t)(start + ticks))
				return BUTTON_HOLD;

		WDT_HIT();
	}

	// We should never get here
	return BUTTON_ERROR;
}

// attempt at high resolution microsecond timer
// beware: timer counts in 21.3uS increments (1024/48Mhz)
void SpinDelayUs(int us)
{
	int ticks = (48*us) >> 10;

	// Borrow a PWM unit for my real-time clock
	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	// 48 MHz / 1024 gives 46.875 kHz
	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;

	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;

	for(;;) {
		uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
		if (now == (uint16_t)(start + ticks))
			return;

		WDT_HIT();
	}
}

void SpinDelay(int ms)
{
  // convert to uS and call microsecond delay function
	SpinDelayUs(ms*1000);
}

/* Similar to FpgaGatherVersion this formats stored version information
 * into a string representation. It takes a pointer to the struct version_information,
 * verifies the magic properties, then stores a formatted string, prefixed by
 * prefix in dst.
 */
void FormatVersionInformation(char *dst, int len, const char *prefix, void *version_information)
{
	struct version_information *v = (struct version_information*)version_information;
	dst[0] = 0;
	strncat(dst, prefix, len);
	if(v->magic != VERSION_INFORMATION_MAGIC) {
		strncat(dst, "Missing/Invalid version information", len);
		return;
	}
	if(v->versionversion != 1) {
		strncat(dst, "Version information not understood", len);
		return;
	}
	if(!v->present) {
		strncat(dst, "Version information not available", len);
		return;
	}

	strncat(dst, v->svnversion, len);
	if(v->clean == 0) {
		strncat(dst, "-unclean", len);
	} else if(v->clean == 2) {
		strncat(dst, "-suspect", len);
	}

	strncat(dst, " ", len);
	strncat(dst, v->buildtime, len);
}

//  -------------------------------------------------------------------------
//  timer lib
//  -------------------------------------------------------------------------
//  test procedure:
//
//	ti = GetTickCount();
//	SpinDelay(1000);
//	ti = GetTickCount() - ti;
//	Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());

void StartTickCount()
{
//  must be 0x40, but on my cpu - included divider is optimal
//  0x20 - 1 ms / bit 
//  0x40 - 2 ms / bit

	AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST + 0x001D; // was 0x003B
}

/*
* Get the current count.
*/
uint32_t RAMFUNC GetTickCount(){
	return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
}

//  -------------------------------------------------------------------------
//  microseconds timer 
//  -------------------------------------------------------------------------
void StartCountUS()
{
	AT91C_BASE_PMC->PMC_PCER |= (0x1 << 12) | (0x1 << 13) | (0x1 << 14);
//	AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC1XC1S_TIOA0;
	AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;

	// fast clock
	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
	AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz)/32 -- tick=1.5mks
														AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
														AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
	AT91C_BASE_TC0->TC_RA = 1;
	AT91C_BASE_TC0->TC_RC = 0xBFFF + 1; // 0xC000
	
	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; // timer disable  
	AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_XC1; // from timer 0
	
	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN;
	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN;
	AT91C_BASE_TCB->TCB_BCR = 1;
	}

uint32_t RAMFUNC GetCountUS(){
	return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
}

static uint32_t GlobalUsCounter = 0;

uint32_t RAMFUNC GetDeltaCountUS(){
	uint32_t g_cnt = GetCountUS();
	uint32_t g_res = g_cnt - GlobalUsCounter;
	GlobalUsCounter = g_cnt;
	return g_res;
}


//  -------------------------------------------------------------------------
//  Mifare timer. Uses ssp_clk from FPGA 
//  -------------------------------------------------------------------------
void StartCountMifare()
{
	AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1) | (1 << AT91C_ID_TC2);  // Enable Clock to all timers
	AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1 		// XC0 Clock = TIOA1
							| AT91C_TCB_TC1XC1S_NONE 		// XC1 Clock = none
							| AT91C_TCB_TC2XC2S_TIOA0;		// XC2 Clock = TIOA0

	// configure TC1 to create a short pulse on TIOA1 when a rising edge on TIOB1 (= ssp_clk from FPGA) occurs:
	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; 				// disable TC1
	AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK // TC1 Clock = MCK(48MHz)/2 = 24MHz
							| AT91C_TC_CPCSTOP				// Stop clock on RC compare
							| AT91C_TC_EEVTEDG_RISING		// Trigger on rising edge of Event
							| AT91C_TC_EEVT_TIOB			// Event-Source: TIOB1 (= ssc_clk from FPGA = 13,56MHz / 16)
							| AT91C_TC_ENETRG				// Enable external trigger event
							| AT91C_TC_WAVESEL_UP	 		// Upmode without automatic trigger on RC compare
							| AT91C_TC_WAVE 				// Waveform Mode
							| AT91C_TC_AEEVT_SET 			// Set TIOA1 on external event
							| AT91C_TC_ACPC_CLEAR; 			// Clear TIOA1 on RC Compare
	AT91C_BASE_TC1->TC_RC = 0x04; 							// RC Compare value = 0x04

	// use TC0 to count TIOA1 pulses
	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; 				// disable TC0  
	AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_XC0	 			// TC0 clock = XC0 clock = TIOA1
							| AT91C_TC_WAVE 				// Waveform Mode
							| AT91C_TC_WAVESEL_UP	 		// just count
							| AT91C_TC_ACPA_CLEAR 			// Clear TIOA0 on RA Compare
							| AT91C_TC_ACPC_SET; 			// Set TIOA0 on RC Compare
	AT91C_BASE_TC0->TC_RA = 1;								// RA Compare value = 1; pulse width to TC2
	AT91C_BASE_TC0->TC_RC = 0; 								// RC Compare value = 0; increment TC2 on overflow

	// use TC2 to count TIOA0 pulses (giving us a 32bit counter (TC0/TC2) clocked by ssp_clk)
	AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKDIS; 				// disable TC2  
	AT91C_BASE_TC2->TC_CMR = AT91C_TC_CLKS_XC2	 			// TC2 clock = XC2 clock = TIOA0
							| AT91C_TC_WAVE 				// Waveform Mode
							| AT91C_TC_WAVESEL_UP;	 		// just count
	
	
	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN;				// enable TC0
	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN;				// enable TC1
	AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN;				// enable TC2
	AT91C_BASE_TCB->TCB_BCR = 1;							// assert Sync (set all timers to 0 on next active clock edge)
}


uint32_t RAMFUNC GetCountMifare(){
	uint32_t tmp_count;
	tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
	if ((tmp_count & 0xffff) == 0) { //small chance that we may have missed an increment in TC2
		return (AT91C_BASE_TC2->TC_CV << 16);
	} 
	else {
		return tmp_count;
	}
}
Commit	Line	Data
e30c654b	1	//-----------------------------------------------------------------------------
e30c654b	2	// Jonathan Westhues, Sept 2005
bd20f8f4	3	//
	4	// This code is licensed to you under the terms of the GNU GPL, version 2 or,
	5	// at your option, any later version. See the LICENSE.txt file for the text of
	6	// the license.
	7	//-----------------------------------------------------------------------------
	8	// Utility functions used in many places, not specific to any piece of code.
e30c654b	9	//-----------------------------------------------------------------------------
bd20f8f4	10
e30c654b	11	#include "proxmark3.h"
f7e3ed82	12	#include "util.h"
9ab7a6c7	13	#include "string.h"
e30c654b	14
195af472	15	size_t nbytes(size_t nbits) {
	16	return (nbits/8)+((nbits%8)>0);
	17	}
	18
81cd0474	19	uint32_t SwapBits(uint32_t value, int nrbits) {
	20	int i;
	21	uint32_t newvalue = 0;
	22	for(i = 0; i < nrbits; i++) {
	23	newvalue ^= ((value >> i) & 1) << (nrbits - 1 - i);
	24	}
	25	return newvalue;
	26	}
	27
f7e3ed82	28	void num_to_bytes(uint64_t n, size_t len, uint8_t* dest)
e30c654b	29	{
e30c654b	30	while (len--) {
f7e3ed82	31	dest[len] = (uint8_t) n;
e30c654b	32	n >>= 8;
	33	}
	34	}
	35
f7e3ed82	36	uint64_t bytes_to_num(uint8_t* src, size_t len)
e30c654b	37	{
	38	uint64_t num = 0;
	39	while (len--)
	40	{
	41	num = (num << 8) \| (*src);
	42	src++;
	43	}
	44	return num;
	45	}
	46
	47	void LEDsoff()
	48	{
	49	LED_A_OFF();
	50	LED_B_OFF();
	51	LED_C_OFF();
	52	LED_D_OFF();
	53	}
	54
	55	// LEDs: R(C) O(A) G(B) -- R(D) [1, 2, 4 and 8]
	56	void LED(int led, int ms)
	57	{
	58	if (led & LED_RED)
	59	LED_C_ON();
	60	if (led & LED_ORANGE)
	61	LED_A_ON();
	62	if (led & LED_GREEN)
	63	LED_B_ON();
	64	if (led & LED_RED2)
	65	LED_D_ON();
	66
	67	if (!ms)
	68	return;
	69
	70	SpinDelay(ms);
	71
	72	if (led & LED_RED)
	73	LED_C_OFF();
	74	if (led & LED_ORANGE)
	75	LED_A_OFF();
	76	if (led & LED_GREEN)
	77	LED_B_OFF();
	78	if (led & LED_RED2)
	79	LED_D_OFF();
	80	}
	81
	82
	83	// Determine if a button is double clicked, single clicked,
	84	// not clicked, or held down (for ms \|\| 1sec)
	85	// In general, don't use this function unless you expect a
	86	// double click, otherwise it will waste 500ms -- use BUTTON_HELD instead
	87	int BUTTON_CLICKED(int ms)
	88	{
	89	// Up to 500ms in between clicks to mean a double click
	90	int ticks = (48000 * (ms ? ms : 1000)) >> 10;
	91
	92	// If we're not even pressed, forget about it!
	93	if (!BUTTON_PRESS())
	94	return BUTTON_NO_CLICK;
	95
	96	// Borrow a PWM unit for my real-time clock
	97	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	98	// 48 MHz / 1024 gives 46.875 kHz
	99	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	100	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
101	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;
102
f7e3ed82	103	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
e30c654b	104
	105	int letoff = 0;
	106	for(;;)
	107	{
f7e3ed82	108	uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
e30c654b	109
	110	// We haven't let off the button yet
	111	if (!letoff)
	112	{
	113	// We just let it off!
	114	if (!BUTTON_PRESS())
	115	{
	116	letoff = 1;
	117
	118	// reset our timer for 500ms
	119	start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
	120	ticks = (48000 * (500)) >> 10;
	121	}
	122
	123	// Still haven't let it off
	124	else
	125	// Have we held down a full second?
f7e3ed82	126	if (now == (uint16_t)(start + ticks))
e30c654b	127	return BUTTON_HOLD;
	128	}
	129
	130	// We already let off, did we click again?
	131	else
	132	// Sweet, double click!
	133	if (BUTTON_PRESS())
	134	return BUTTON_DOUBLE_CLICK;
	135
	136	// Have we ran out of time to double click?
	137	else
f7e3ed82	138	if (now == (uint16_t)(start + ticks))
e30c654b	139	// At least we did a single click
	140	return BUTTON_SINGLE_CLICK;
	141
	142	WDT_HIT();
	143	}
	144
	145	// We should never get here
	146	return BUTTON_ERROR;
	147	}
	148
	149	// Determine if a button is held down
	150	int BUTTON_HELD(int ms)
	151	{
	152	// If button is held for one second
	153	int ticks = (48000 * (ms ? ms : 1000)) >> 10;
	154
	155	// If we're not even pressed, forget about it!
	156	if (!BUTTON_PRESS())
	157	return BUTTON_NO_CLICK;
	158
	159	// Borrow a PWM unit for my real-time clock
	160	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	161	// 48 MHz / 1024 gives 46.875 kHz
	162	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	163	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
	164	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;
	165
f7e3ed82	166	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
e30c654b	167
	168	for(;;)
	169	{
f7e3ed82	170	uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
e30c654b	171
	172	// As soon as our button let go, we didn't hold long enough
	173	if (!BUTTON_PRESS())
	174	return BUTTON_SINGLE_CLICK;
	175
	176	// Have we waited the full second?
	177	else
f7e3ed82	178	if (now == (uint16_t)(start + ticks))
e30c654b	179	return BUTTON_HOLD;
	180
	181	WDT_HIT();
	182	}
	183
	184	// We should never get here
	185	return BUTTON_ERROR;
	186	}
	187
	188	// attempt at high resolution microsecond timer
	189	// beware: timer counts in 21.3uS increments (1024/48Mhz)
	190	void SpinDelayUs(int us)
	191	{
	192	int ticks = (48*us) >> 10;
	193
	194	// Borrow a PWM unit for my real-time clock
	195	AT91C_BASE_PWMC->PWMC_ENA = PWM_CHANNEL(0);
	196	// 48 MHz / 1024 gives 46.875 kHz
	197	AT91C_BASE_PWMC_CH0->PWMC_CMR = PWM_CH_MODE_PRESCALER(10);
	198	AT91C_BASE_PWMC_CH0->PWMC_CDTYR = 0;
	199	AT91C_BASE_PWMC_CH0->PWMC_CPRDR = 0xffff;
	200
f7e3ed82	201	uint16_t start = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
e30c654b	202
e30c654b	203	for(;;) {
f7e3ed82	204	uint16_t now = AT91C_BASE_PWMC_CH0->PWMC_CCNTR;
f7e3ed82	205	if (now == (uint16_t)(start + ticks))
e30c654b	206	return;
	207
	208	WDT_HIT();
	209	}
	210	}
	211
	212	void SpinDelay(int ms)
	213	{
	214	// convert to uS and call microsecond delay function
	215	SpinDelayUs(ms*1000);
	216	}
	217
	218	/* Similar to FpgaGatherVersion this formats stored version information
	219	* into a string representation. It takes a pointer to the struct version_information,
	220	* verifies the magic properties, then stores a formatted string, prefixed by
	221	* prefix in dst.
	222	*/
	223	void FormatVersionInformation(char dst, int len, const char prefix, void *version_information)
	224	{
	225	struct version_information v = (struct version_information)version_information;
	226	dst[0] = 0;
	227	strncat(dst, prefix, len);
	228	if(v->magic != VERSION_INFORMATION_MAGIC) {
	229	strncat(dst, "Missing/Invalid version information", len);
	230	return;
	231	}
	232	if(v->versionversion != 1) {
	233	strncat(dst, "Version information not understood", len);
	234	return;
	235	}
	236	if(!v->present) {
	237	strncat(dst, "Version information not available", len);
	238	return;
	239	}
	240
	241	strncat(dst, v->svnversion, len);
	242	if(v->clean == 0) {
	243	strncat(dst, "-unclean", len);
	244	} else if(v->clean == 2) {
	245	strncat(dst, "-suspect", len);
	246	}
	247
	248	strncat(dst, " ", len);
	249	strncat(dst, v->buildtime, len);
	250	}
9ca155ba M	251
	252	// -------------------------------------------------------------------------
	253	// timer lib
	254	// -------------------------------------------------------------------------
	255	// test procedure:
	256	//
	257	// ti = GetTickCount();
	258	// SpinDelay(1000);
	259	// ti = GetTickCount() - ti;
	260	// Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
	261
	262	void StartTickCount()
	263	{
	264	// must be 0x40, but on my cpu - included divider is optimal
	265	// 0x20 - 1 ms / bit
	266	// 0x40 - 2 ms / bit
	267
0a39986e	268	AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST + 0x001D; // was 0x003B
9ca155ba M	269	}
	270
	271	/*
	272	* Get the current count.
	273	*/
	274	uint32_t RAMFUNC GetTickCount(){
8f51ddb0	275	return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
9ca155ba M	276	}
9ca155ba M	277
8f51ddb0 M	278	// -------------------------------------------------------------------------
	279	// microseconds timer
	280	// -------------------------------------------------------------------------
	281	void StartCountUS()
	282	{
	283	AT91C_BASE_PMC->PMC_PCER \|= (0x1 << 12) \| (0x1 << 13) \| (0x1 << 14);
	284	// AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC1XC1S_TIOA0;
	285	AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE \| AT91C_TCB_TC1XC1S_TIOA0 \| AT91C_TCB_TC2XC2S_NONE;
	286
	287	// fast clock
	288	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
	289	AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK \| // MCK(48MHz)/32 -- tick=1.5mks
	290	AT91C_TC_WAVE \| AT91C_TC_WAVESEL_UP_AUTO \| AT91C_TC_ACPA_CLEAR \|
	291	AT91C_TC_ACPC_SET \| AT91C_TC_ASWTRG_SET;
	292	AT91C_BASE_TC0->TC_RA = 1;
	293	AT91C_BASE_TC0->TC_RC = 0xBFFF + 1; // 0xC000
	294
	295	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; // timer disable
	296	AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_XC1; // from timer 0
1c611bbd	297
8f51ddb0 M	298	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN;
	299	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN;
	300	AT91C_BASE_TCB->TCB_BCR = 1;
1c611bbd	301	}
8f51ddb0 M	302
	303	uint32_t RAMFUNC GetCountUS(){
	304	return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
	305	}
	306
	307	static uint32_t GlobalUsCounter = 0;
	308
	309	uint32_t RAMFUNC GetDeltaCountUS(){
	310	uint32_t g_cnt = GetCountUS();
	311	uint32_t g_res = g_cnt - GlobalUsCounter;
	312	GlobalUsCounter = g_cnt;
	313	return g_res;
	314	}
	315
	316
1c611bbd	317	// -------------------------------------------------------------------------
	318	// Mifare timer. Uses ssp_clk from FPGA
	319	// -------------------------------------------------------------------------
	320	void StartCountMifare()
	321	{
	322	AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) \| (1 << AT91C_ID_TC1) \| (1 << AT91C_ID_TC2); // Enable Clock to all timers
	323	AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1 // XC0 Clock = TIOA1
	324	\| AT91C_TCB_TC1XC1S_NONE // XC1 Clock = none
	325	\| AT91C_TCB_TC2XC2S_TIOA0; // XC2 Clock = TIOA0
	326
	327	// configure TC1 to create a short pulse on TIOA1 when a rising edge on TIOB1 (= ssp_clk from FPGA) occurs:
	328	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS; // disable TC1
	329	AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_TIMER_DIV1_CLOCK // TC1 Clock = MCK(48MHz)/2 = 24MHz
	330	\| AT91C_TC_CPCSTOP // Stop clock on RC compare
	331	\| AT91C_TC_EEVTEDG_RISING // Trigger on rising edge of Event
	332	\| AT91C_TC_EEVT_TIOB // Event-Source: TIOB1 (= ssc_clk from FPGA = 13,56MHz / 16)
	333	\| AT91C_TC_ENETRG // Enable external trigger event
	334	\| AT91C_TC_WAVESEL_UP // Upmode without automatic trigger on RC compare
	335	\| AT91C_TC_WAVE // Waveform Mode
	336	\| AT91C_TC_AEEVT_SET // Set TIOA1 on external event
	337	\| AT91C_TC_ACPC_CLEAR; // Clear TIOA1 on RC Compare
	338	AT91C_BASE_TC1->TC_RC = 0x04; // RC Compare value = 0x04
	339
	340	// use TC0 to count TIOA1 pulses
	341	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // disable TC0
	342	AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_XC0 // TC0 clock = XC0 clock = TIOA1
	343	\| AT91C_TC_WAVE // Waveform Mode
	344	\| AT91C_TC_WAVESEL_UP // just count
	345	\| AT91C_TC_ACPA_CLEAR // Clear TIOA0 on RA Compare
	346	\| AT91C_TC_ACPC_SET; // Set TIOA0 on RC Compare
	347	AT91C_BASE_TC0->TC_RA = 1; // RA Compare value = 1; pulse width to TC2
	348	AT91C_BASE_TC0->TC_RC = 0; // RC Compare value = 0; increment TC2 on overflow
	349
	350	// use TC2 to count TIOA0 pulses (giving us a 32bit counter (TC0/TC2) clocked by ssp_clk)
	351	AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKDIS; // disable TC2
	352	AT91C_BASE_TC2->TC_CMR = AT91C_TC_CLKS_XC2 // TC2 clock = XC2 clock = TIOA0
	353	\| AT91C_TC_WAVE // Waveform Mode
	354	\| AT91C_TC_WAVESEL_UP; // just count
	355
	356
	357	AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN; // enable TC0
	358	AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN; // enable TC1
	359	AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN; // enable TC2
	360	AT91C_BASE_TCB->TCB_BCR = 1; // assert Sync (set all timers to 0 on next active clock edge)
	361	}
	362
	363
	364	uint32_t RAMFUNC GetCountMifare(){
	365	uint32_t tmp_count;
	366	tmp_count = (AT91C_BASE_TC2->TC_CV << 16) \| AT91C_BASE_TC0->TC_CV;
	367	if ((tmp_count & 0xffff) == 0) { //small chance that we may have missed an increment in TC2
	368	return (AT91C_BASE_TC2->TC_CV << 16);
	369	}
	370	else {
	371	return tmp_count;
	372	}
	373	}