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Further implementation of iclass 'fullsim'. Moved protocol definitions to shared...
[proxmark3-svn] / armsrc / iclass.c
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cee5a30d 1//-----------------------------------------------------------------------------
2// Gerhard de Koning Gans - May 2008
3// Hagen Fritsch - June 2010
4// Gerhard de Koning Gans - May 2011
1e262141 5// Gerhard de Koning Gans - June 2012 - Added iClass card and reader emulation
cee5a30d 6//
7// This code is licensed to you under the terms of the GNU GPL, version 2 or,
8// at your option, any later version. See the LICENSE.txt file for the text of
9// the license.
10//-----------------------------------------------------------------------------
11// Routines to support iClass.
12//-----------------------------------------------------------------------------
13// Based on ISO14443a implementation. Still in experimental phase.
14// Contribution made during a security research at Radboud University Nijmegen
15//
16// Please feel free to contribute and extend iClass support!!
17//-----------------------------------------------------------------------------
18//
cee5a30d 19// FIX:
20// ====
21// We still have sometimes a demodulation error when snooping iClass communication.
22// The resulting trace of a read-block-03 command may look something like this:
23//
24// + 22279: : 0c 03 e8 01
25//
26// ...with an incorrect answer...
27//
28// + 85: 0: TAG ff! ff! ff! ff! ff! ff! ff! ff! bb 33 bb 00 01! 0e! 04! bb !crc
29//
30// We still left the error signalling bytes in the traces like 0xbb
31//
32// A correct trace should look like this:
33//
34// + 21112: : 0c 03 e8 01
35// + 85: 0: TAG ff ff ff ff ff ff ff ff ea f5
36//
37//-----------------------------------------------------------------------------
38
39#include "proxmark3.h"
40#include "apps.h"
41#include "util.h"
42#include "string.h"
7e67e42f 43#include "common.h"
fecd8202 44#include "cmd.h"
1e262141 45// Needed for CRC in emulation mode;
46// same construction as in ISO 14443;
47// different initial value (CRC_ICLASS)
48#include "iso14443crc.h"
c3963755 49#include "iso15693tools.h"
b67f7ec3
MHS		 50#include "cipher.h"
51#include "protocols.h"
1e262141 52static int timeout = 4096;
cee5a30d 53
cee5a30d 54
1e262141 55static int SendIClassAnswer(uint8_t *resp, int respLen, int delay);
cee5a30d 56
57//-----------------------------------------------------------------------------
58// The software UART that receives commands from the reader, and its state
59// variables.
60//-----------------------------------------------------------------------------
61static struct {
62 enum {
63 STATE_UNSYNCD,
64 STATE_START_OF_COMMUNICATION,
65 STATE_RECEIVING
66 } state;
67 uint16_t shiftReg;
68 int bitCnt;
69 int byteCnt;
70 int byteCntMax;
71 int posCnt;
72 int nOutOfCnt;
73 int OutOfCnt;
74 int syncBit;
1e262141 75 int samples;
cee5a30d 76 int highCnt;
77 int swapper;
78 int counter;
79 int bitBuffer;
80 int dropPosition;
6a1f2d82 81 uint8_t *output;
cee5a30d 82} Uart;
83
1e262141 84static RAMFUNC int OutOfNDecoding(int bit)
cee5a30d 85{
9f693930 86 //int error = 0;
cee5a30d 87 int bitright;
88
89 if(!Uart.bitBuffer) {
90 Uart.bitBuffer = bit ^ 0xFF0;
91 return FALSE;
92 }
93 else {
94 Uart.bitBuffer <<= 4;
95 Uart.bitBuffer ^= bit;
96 }
97
98 /*if(Uart.swapper) {
99 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
100 Uart.byteCnt++;
101 Uart.swapper = 0;
102 if(Uart.byteCnt > 15) { return TRUE; }
103 }
104 else {
105 Uart.swapper = 1;
106 }*/
107
108 if(Uart.state != STATE_UNSYNCD) {
109 Uart.posCnt++;
110
111 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
112 bit = 0x00;
113 }
114 else {
115 bit = 0x01;
116 }
117 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
118 bitright = 0x00;
119 }
120 else {
121 bitright = 0x01;
122 }
123 if(bit != bitright) { bit = bitright; }
124
125
126 // So, now we only have to deal with *bit*, lets see...
127 if(Uart.posCnt == 1) {
128 // measurement first half bitperiod
129 if(!bit) {
130 // Drop in first half means that we are either seeing
131 // an SOF or an EOF.
132
133 if(Uart.nOutOfCnt == 1) {
134 // End of Communication
135 Uart.state = STATE_UNSYNCD;
136 Uart.highCnt = 0;
137 if(Uart.byteCnt == 0) {
138 // Its not straightforward to show single EOFs
139 // So just leave it and do not return TRUE
6a1f2d82 140 Uart.output[0] = 0xf0;
cee5a30d 141 Uart.byteCnt++;
cee5a30d 142 }
143 else {
144 return TRUE;
145 }
146 }
147 else if(Uart.state != STATE_START_OF_COMMUNICATION) {
148 // When not part of SOF or EOF, it is an error
149 Uart.state = STATE_UNSYNCD;
150 Uart.highCnt = 0;
9f693930 151 //error = 4;
cee5a30d 152 }
153 }
154 }
155 else {
156 // measurement second half bitperiod
157 // Count the bitslot we are in... (ISO 15693)
158 Uart.nOutOfCnt++;
159
160 if(!bit) {
161 if(Uart.dropPosition) {
162 if(Uart.state == STATE_START_OF_COMMUNICATION) {
9f693930 163 //error = 1;
cee5a30d 164 }
165 else {
9f693930 166 //error = 7;
cee5a30d 167 }
168 // It is an error if we already have seen a drop in current frame
169 Uart.state = STATE_UNSYNCD;
170 Uart.highCnt = 0;
171 }
172 else {
173 Uart.dropPosition = Uart.nOutOfCnt;
174 }
175 }
176
177 Uart.posCnt = 0;
178
179
180 if(Uart.nOutOfCnt == Uart.OutOfCnt && Uart.OutOfCnt == 4) {
181 Uart.nOutOfCnt = 0;
182
183 if(Uart.state == STATE_START_OF_COMMUNICATION) {
184 if(Uart.dropPosition == 4) {
185 Uart.state = STATE_RECEIVING;
186 Uart.OutOfCnt = 256;
187 }
188 else if(Uart.dropPosition == 3) {
189 Uart.state = STATE_RECEIVING;
190 Uart.OutOfCnt = 4;
191 //Uart.output[Uart.byteCnt] = 0xdd;
192 //Uart.byteCnt++;
193 }
194 else {
195 Uart.state = STATE_UNSYNCD;
196 Uart.highCnt = 0;
197 }
198 Uart.dropPosition = 0;
199 }
200 else {
201 // RECEIVING DATA
202 // 1 out of 4
203 if(!Uart.dropPosition) {
204 Uart.state = STATE_UNSYNCD;
205 Uart.highCnt = 0;
9f693930 206 //error = 9;
cee5a30d 207 }
208 else {
209 Uart.shiftReg >>= 2;
210
211 // Swap bit order
212 Uart.dropPosition--;
213 //if(Uart.dropPosition == 1) { Uart.dropPosition = 2; }
214 //else if(Uart.dropPosition == 2) { Uart.dropPosition = 1; }
215
216 Uart.shiftReg ^= ((Uart.dropPosition & 0x03) << 6);
217 Uart.bitCnt += 2;
218 Uart.dropPosition = 0;
219
220 if(Uart.bitCnt == 8) {
221 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
222 Uart.byteCnt++;
cee5a30d 223 Uart.bitCnt = 0;
224 Uart.shiftReg = 0;
225 }
226 }
227 }
228 }
229 else if(Uart.nOutOfCnt == Uart.OutOfCnt) {
230 // RECEIVING DATA
231 // 1 out of 256
232 if(!Uart.dropPosition) {
233 Uart.state = STATE_UNSYNCD;
234 Uart.highCnt = 0;
9f693930 235 //error = 3;
cee5a30d 236 }
237 else {
238 Uart.dropPosition--;
239 Uart.output[Uart.byteCnt] = (Uart.dropPosition & 0xff);
240 Uart.byteCnt++;
cee5a30d 241 Uart.bitCnt = 0;
242 Uart.shiftReg = 0;
243 Uart.nOutOfCnt = 0;
244 Uart.dropPosition = 0;
245 }
246 }
247
248 /*if(error) {
249 Uart.output[Uart.byteCnt] = 0xAA;
250 Uart.byteCnt++;
251 Uart.output[Uart.byteCnt] = error & 0xFF;
252 Uart.byteCnt++;
253 Uart.output[Uart.byteCnt] = 0xAA;
254 Uart.byteCnt++;
255 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
256 Uart.byteCnt++;
257 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
258 Uart.byteCnt++;
259 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
260 Uart.byteCnt++;
261 Uart.output[Uart.byteCnt] = 0xAA;
262 Uart.byteCnt++;
263 return TRUE;
264 }*/
265 }
266
267 }
268 else {
269 bit = Uart.bitBuffer & 0xf0;
270 bit >>= 4;
271 bit ^= 0x0F; // drops become 1s ;-)
272 if(bit) {
273 // should have been high or at least (4 * 128) / fc
274 // according to ISO this should be at least (9 * 128 + 20) / fc
275 if(Uart.highCnt == 8) {
276 // we went low, so this could be start of communication
277 // it turns out to be safer to choose a less significant
278 // syncbit... so we check whether the neighbour also represents the drop
279 Uart.posCnt = 1; // apparently we are busy with our first half bit period
280 Uart.syncBit = bit & 8;
281 Uart.samples = 3;
282 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
283 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
284 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
285 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
286 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
287 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
288 Uart.syncBit = 8;
289
290 // the first half bit period is expected in next sample
291 Uart.posCnt = 0;
292 Uart.samples = 3;
293 }
294 }
295 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
296
297 Uart.syncBit <<= 4;
298 Uart.state = STATE_START_OF_COMMUNICATION;
299 Uart.bitCnt = 0;
300 Uart.byteCnt = 0;
cee5a30d 301 Uart.nOutOfCnt = 0;
302 Uart.OutOfCnt = 4; // Start at 1/4, could switch to 1/256
303 Uart.dropPosition = 0;
304 Uart.shiftReg = 0;
9f693930 305 //error = 0;
cee5a30d 306 }
307 else {
308 Uart.highCnt = 0;
309 }
310 }
311 else {
312 if(Uart.highCnt < 8) {
313 Uart.highCnt++;
314 }
315 }
316 }
317
318 return FALSE;
319}
320
321//=============================================================================
1e262141 322// Manchester
cee5a30d 323//=============================================================================
324
325static struct {
326 enum {
327 DEMOD_UNSYNCD,
328 DEMOD_START_OF_COMMUNICATION,
329 DEMOD_START_OF_COMMUNICATION2,
330 DEMOD_START_OF_COMMUNICATION3,
331 DEMOD_SOF_COMPLETE,
332 DEMOD_MANCHESTER_D,
333 DEMOD_MANCHESTER_E,
334 DEMOD_END_OF_COMMUNICATION,
335 DEMOD_END_OF_COMMUNICATION2,
336 DEMOD_MANCHESTER_F,
337 DEMOD_ERROR_WAIT
338 } state;
339 int bitCount;
340 int posCount;
341 int syncBit;
cee5a30d 342 uint16_t shiftReg;
343 int buffer;
344 int buffer2;
345 int buffer3;
346 int buff;
347 int samples;
348 int len;
349 enum {
350 SUB_NONE,
351 SUB_FIRST_HALF,
352 SUB_SECOND_HALF,
353 SUB_BOTH
354 } sub;
6a1f2d82 355 uint8_t *output;
cee5a30d 356} Demod;
357
358static RAMFUNC int ManchesterDecoding(int v)
359{
360 int bit;
361 int modulation;
362 int error = 0;
363
364 bit = Demod.buffer;
365 Demod.buffer = Demod.buffer2;
366 Demod.buffer2 = Demod.buffer3;
367 Demod.buffer3 = v;
368
369 if(Demod.buff < 3) {
370 Demod.buff++;
371 return FALSE;
372 }
373
374 if(Demod.state==DEMOD_UNSYNCD) {
375 Demod.output[Demod.len] = 0xfa;
376 Demod.syncBit = 0;
377 //Demod.samples = 0;
378 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
cee5a30d 379
380 if(bit & 0x08) {
381 Demod.syncBit = 0x08;
382 }
383
384 if(bit & 0x04) {
385 if(Demod.syncBit) {
386 bit <<= 4;
387 }
388 Demod.syncBit = 0x04;
389 }
390
391 if(bit & 0x02) {
392 if(Demod.syncBit) {
393 bit <<= 2;
394 }
395 Demod.syncBit = 0x02;
396 }
397
398 if(bit & 0x01 && Demod.syncBit) {
399 Demod.syncBit = 0x01;
400 }
401
402 if(Demod.syncBit) {
403 Demod.len = 0;
404 Demod.state = DEMOD_START_OF_COMMUNICATION;
405 Demod.sub = SUB_FIRST_HALF;
406 Demod.bitCount = 0;
407 Demod.shiftReg = 0;
cee5a30d 408 Demod.samples = 0;
409 if(Demod.posCount) {
410 //if(trigger) LED_A_OFF(); // Not useful in this case...
411 switch(Demod.syncBit) {
412 case 0x08: Demod.samples = 3; break;
413 case 0x04: Demod.samples = 2; break;
414 case 0x02: Demod.samples = 1; break;
415 case 0x01: Demod.samples = 0; break;
416 }
417 // SOF must be long burst... otherwise stay unsynced!!!
418 if(!(Demod.buffer & Demod.syncBit) || !(Demod.buffer2 & Demod.syncBit)) {
419 Demod.state = DEMOD_UNSYNCD;
420 }
421 }
422 else {
423 // SOF must be long burst... otherwise stay unsynced!!!
424 if(!(Demod.buffer2 & Demod.syncBit) || !(Demod.buffer3 & Demod.syncBit)) {
425 Demod.state = DEMOD_UNSYNCD;
426 error = 0x88;
427 }
428
429 }
430 error = 0;
431
432 }
433 }
434 else {
435 modulation = bit & Demod.syncBit;
436 modulation |= ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
cee5a30d 437
438 Demod.samples += 4;
439
440 if(Demod.posCount==0) {
441 Demod.posCount = 1;
442 if(modulation) {
443 Demod.sub = SUB_FIRST_HALF;
444 }
445 else {
446 Demod.sub = SUB_NONE;
447 }
448 }
449 else {
450 Demod.posCount = 0;
451 /*(modulation && (Demod.sub == SUB_FIRST_HALF)) {
452 if(Demod.state!=DEMOD_ERROR_WAIT) {
453 Demod.state = DEMOD_ERROR_WAIT;
454 Demod.output[Demod.len] = 0xaa;
455 error = 0x01;
456 }
457 }*/
458 //else if(modulation) {
459 if(modulation) {
460 if(Demod.sub == SUB_FIRST_HALF) {
461 Demod.sub = SUB_BOTH;
462 }
463 else {
464 Demod.sub = SUB_SECOND_HALF;
465 }
466 }
467 else if(Demod.sub == SUB_NONE) {
468 if(Demod.state == DEMOD_SOF_COMPLETE) {
469 Demod.output[Demod.len] = 0x0f;
470 Demod.len++;
cee5a30d 471 Demod.state = DEMOD_UNSYNCD;
472// error = 0x0f;
473 return TRUE;
474 }
475 else {
476 Demod.state = DEMOD_ERROR_WAIT;
477 error = 0x33;
478 }
479 /*if(Demod.state!=DEMOD_ERROR_WAIT) {
480 Demod.state = DEMOD_ERROR_WAIT;
481 Demod.output[Demod.len] = 0xaa;
482 error = 0x01;
483 }*/
484 }
485
486 switch(Demod.state) {
487 case DEMOD_START_OF_COMMUNICATION:
488 if(Demod.sub == SUB_BOTH) {
489 //Demod.state = DEMOD_MANCHESTER_D;
490 Demod.state = DEMOD_START_OF_COMMUNICATION2;
491 Demod.posCount = 1;
492 Demod.sub = SUB_NONE;
493 }
494 else {
495 Demod.output[Demod.len] = 0xab;
496 Demod.state = DEMOD_ERROR_WAIT;
497 error = 0xd2;
498 }
499 break;
500 case DEMOD_START_OF_COMMUNICATION2:
501 if(Demod.sub == SUB_SECOND_HALF) {
502 Demod.state = DEMOD_START_OF_COMMUNICATION3;
503 }
504 else {
505 Demod.output[Demod.len] = 0xab;
506 Demod.state = DEMOD_ERROR_WAIT;
507 error = 0xd3;
508 }
509 break;
510 case DEMOD_START_OF_COMMUNICATION3:
511 if(Demod.sub == SUB_SECOND_HALF) {
512// Demod.state = DEMOD_MANCHESTER_D;
513 Demod.state = DEMOD_SOF_COMPLETE;
514 //Demod.output[Demod.len] = Demod.syncBit & 0xFF;
515 //Demod.len++;
516 }
517 else {
518 Demod.output[Demod.len] = 0xab;
519 Demod.state = DEMOD_ERROR_WAIT;
520 error = 0xd4;
521 }
522 break;
523 case DEMOD_SOF_COMPLETE:
524 case DEMOD_MANCHESTER_D:
525 case DEMOD_MANCHESTER_E:
526 // OPPOSITE FROM ISO14443 - 11110000 = 0 (1 in 14443)
527 // 00001111 = 1 (0 in 14443)
528 if(Demod.sub == SUB_SECOND_HALF) { // SUB_FIRST_HALF
529 Demod.bitCount++;
530 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
531 Demod.state = DEMOD_MANCHESTER_D;
532 }
533 else if(Demod.sub == SUB_FIRST_HALF) { // SUB_SECOND_HALF
534 Demod.bitCount++;
535 Demod.shiftReg >>= 1;
536 Demod.state = DEMOD_MANCHESTER_E;
537 }
538 else if(Demod.sub == SUB_BOTH) {
539 Demod.state = DEMOD_MANCHESTER_F;
540 }
541 else {
542 Demod.state = DEMOD_ERROR_WAIT;
543 error = 0x55;
544 }
545 break;
546
547 case DEMOD_MANCHESTER_F:
548 // Tag response does not need to be a complete byte!
549 if(Demod.len > 0 || Demod.bitCount > 0) {
550 if(Demod.bitCount > 1) { // was > 0, do not interpret last closing bit, is part of EOF
6a1f2d82 551 Demod.shiftReg >>= (9 - Demod.bitCount); // right align data
cee5a30d 552 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
553 Demod.len++;
cee5a30d 554 }
555
556 Demod.state = DEMOD_UNSYNCD;
557 return TRUE;
558 }
559 else {
560 Demod.output[Demod.len] = 0xad;
561 Demod.state = DEMOD_ERROR_WAIT;
562 error = 0x03;
563 }
564 break;
565
566 case DEMOD_ERROR_WAIT:
567 Demod.state = DEMOD_UNSYNCD;
568 break;
569
570 default:
571 Demod.output[Demod.len] = 0xdd;
572 Demod.state = DEMOD_UNSYNCD;
573 break;
574 }
575
576 /*if(Demod.bitCount>=9) {
577 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
578 Demod.len++;
579
580 Demod.parityBits <<= 1;
581 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
582
583 Demod.bitCount = 0;
584 Demod.shiftReg = 0;
585 }*/
586 if(Demod.bitCount>=8) {
587 Demod.shiftReg >>= 1;
588 Demod.output[Demod.len] = (Demod.shiftReg & 0xff);
589 Demod.len++;
cee5a30d 590 Demod.bitCount = 0;
591 Demod.shiftReg = 0;
592 }
593
594 if(error) {
595 Demod.output[Demod.len] = 0xBB;
596 Demod.len++;
597 Demod.output[Demod.len] = error & 0xFF;
598 Demod.len++;
599 Demod.output[Demod.len] = 0xBB;
600 Demod.len++;
601 Demod.output[Demod.len] = bit & 0xFF;
602 Demod.len++;
603 Demod.output[Demod.len] = Demod.buffer & 0xFF;
604 Demod.len++;
605 // Look harder ;-)
606 Demod.output[Demod.len] = Demod.buffer2 & 0xFF;
607 Demod.len++;
608 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
609 Demod.len++;
610 Demod.output[Demod.len] = 0xBB;
611 Demod.len++;
612 return TRUE;
613 }
614
615 }
616
617 } // end (state != UNSYNCED)
618
619 return FALSE;
620}
621
622//=============================================================================
1e262141 623// Finally, a `sniffer' for iClass communication
cee5a30d 624// Both sides of communication!
625//=============================================================================
626
627//-----------------------------------------------------------------------------
628// Record the sequence of commands sent by the reader to the tag, with
629// triggering so that we start recording at the point that the tag is moved
630// near the reader.
631//-----------------------------------------------------------------------------
632void RAMFUNC SnoopIClass(void)
633{
17cba269 634
cee5a30d 635
636 // We won't start recording the frames that we acquire until we trigger;
637 // a good trigger condition to get started is probably when we see a
638 // response from the tag.
9f693930 639 //int triggered = FALSE; // FALSE to wait first for card
cee5a30d 640
641 // The command (reader -> tag) that we're receiving.
642 // The length of a received command will in most cases be no more than 18 bytes.
643 // So 32 should be enough!
f71f4deb 644 #define ICLASS_BUFFER_SIZE 32
645 uint8_t readerToTagCmd[ICLASS_BUFFER_SIZE];
cee5a30d 646 // The response (tag -> reader) that we're receiving.
f71f4deb 647 uint8_t tagToReaderResponse[ICLASS_BUFFER_SIZE];
6a1f2d82 648
7cc204bf 649 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
650
f71f4deb 651 // free all BigBuf memory
652 BigBuf_free();
653 // The DMA buffer, used to stream samples from the FPGA
654 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
655
3000dc4e
MHS		 656 set_tracing(TRUE);
657 clear_trace();
1e262141 658 iso14a_set_trigger(FALSE);
cee5a30d 659
f71f4deb 660 int lastRxCounter;
117d9ec2 661 uint8_t *upTo;
cee5a30d 662 int smpl;
663 int maxBehindBy = 0;
664
665 // Count of samples received so far, so that we can include timing
666 // information in the trace buffer.
667 int samples = 0;
668 rsamples = 0;
669
cee5a30d 670 // Set up the demodulator for tag -> reader responses.
17cba269 671 Demod.output = tagToReaderResponse;
cee5a30d 672 Demod.len = 0;
673 Demod.state = DEMOD_UNSYNCD;
674
675 // Setup for the DMA.
676 FpgaSetupSsc();
677 upTo = dmaBuf;
678 lastRxCounter = DMA_BUFFER_SIZE;
679 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
680
681 // And the reader -> tag commands
682 memset(&Uart, 0, sizeof(Uart));
17cba269 683 Uart.output = readerToTagCmd;
cee5a30d 684 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
685 Uart.state = STATE_UNSYNCD;
686
687 // And put the FPGA in the appropriate mode
688 // Signal field is off with the appropriate LED
689 LED_D_OFF();
690 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
691 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
692
81012e67 693 uint32_t time_0 = GetCountSspClk();
55eaed8f
MHS		 694 uint32_t time_start = 0;
695 uint32_t time_stop = 0;
81012e67 696
cee5a30d 697 int div = 0;
698 //int div2 = 0;
699 int decbyte = 0;
700 int decbyter = 0;
701
702 // And now we loop, receiving samples.
703 for(;;) {
704 LED_A_ON();
705 WDT_HIT();
706 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
707 (DMA_BUFFER_SIZE-1);
708 if(behindBy > maxBehindBy) {
709 maxBehindBy = behindBy;
f71f4deb 710 if(behindBy > (9 * DMA_BUFFER_SIZE / 10)) {
cee5a30d 711 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
712 goto done;
713 }
714 }
715 if(behindBy < 1) continue;
716
717 LED_A_OFF();
718 smpl = upTo[0];
719 upTo++;
720 lastRxCounter -= 1;
721 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
722 upTo -= DMA_BUFFER_SIZE;
723 lastRxCounter += DMA_BUFFER_SIZE;
724 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
725 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
726 }
727
728 //samples += 4;
729 samples += 1;
cee5a30d 730
cee5a30d 731 if(smpl & 0xF) {
732 decbyte ^= (1 << (3 - div));
733 }
cee5a30d 734
735 // FOR READER SIDE COMMUMICATION...
17cba269 736
cee5a30d 737 decbyter <<= 2;
738 decbyter ^= (smpl & 0x30);
739
740 div++;
741
742 if((div + 1) % 2 == 0) {
743 smpl = decbyter;
1e262141 744 if(OutOfNDecoding((smpl & 0xF0) >> 4)) {
cee5a30d 745 rsamples = samples - Uart.samples;
55eaed8f 746 time_stop = (GetCountSspClk()-time_0) << 4;
cee5a30d 747 LED_C_ON();
17cba269 748
81012e67 749 //if(!LogTrace(Uart.output,Uart.byteCnt, rsamples, Uart.parityBits,TRUE)) break;
17cba269 750 //if(!LogTrace(NULL, 0, Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, 0, TRUE)) break;
6a1f2d82 751 if(tracing) {
752 uint8_t parity[MAX_PARITY_SIZE];
753 GetParity(Uart.output, Uart.byteCnt, parity);
55eaed8f 754 LogTrace(Uart.output,Uart.byteCnt, time_start, time_stop, parity, TRUE);
81012e67
MHS		 755 }
756
17cba269
MHS		 757
758 /* And ready to receive another command. */
cee5a30d 759 Uart.state = STATE_UNSYNCD;
760 /* And also reset the demod code, which might have been */
761 /* false-triggered by the commands from the reader. */
762 Demod.state = DEMOD_UNSYNCD;
763 LED_B_OFF();
764 Uart.byteCnt = 0;
55eaed8f
MHS		 765 }else{
766 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 767 }
768 decbyter = 0;
769 }
770
771 if(div > 3) {
772 smpl = decbyte;
773 if(ManchesterDecoding(smpl & 0x0F)) {
55eaed8f
MHS		 774 time_stop = (GetCountSspClk()-time_0) << 4;
775
776 rsamples = samples - Demod.samples;
cee5a30d 777 LED_B_ON();
778
6a1f2d82 779 if(tracing) {
780 uint8_t parity[MAX_PARITY_SIZE];
781 GetParity(Demod.output, Demod.len, parity);
55eaed8f 782 LogTrace(Demod.output, Demod.len, time_start, time_stop, parity, FALSE);
81012e67 783 }
17cba269 784
cee5a30d 785 // And ready to receive another response.
786 memset(&Demod, 0, sizeof(Demod));
17cba269 787 Demod.output = tagToReaderResponse;
cee5a30d 788 Demod.state = DEMOD_UNSYNCD;
789 LED_C_OFF();
55eaed8f
MHS		 790 }else{
791 time_start = (GetCountSspClk()-time_0) << 4;
cee5a30d 792 }
793
794 div = 0;
795 decbyte = 0x00;
796 }
797 //}
798
799 if(BUTTON_PRESS()) {
800 DbpString("cancelled_a");
801 goto done;
802 }
803 }
804
805 DbpString("COMMAND FINISHED");
806
807 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 808 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 809
810done:
811 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
812 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
3000dc4e 813 Dbprintf("%x %x %x", Uart.byteCntMax, BigBuf_get_traceLen(), (int)Uart.output[0]);
cee5a30d 814 LED_A_OFF();
815 LED_B_OFF();
1e262141 816 LED_C_OFF();
817 LED_D_OFF();
818}
819
912a3e94 820void rotateCSN(uint8_t* originalCSN, uint8_t* rotatedCSN) {
821 int i;
822 for(i = 0; i < 8; i++) {
823 rotatedCSN[i] = (originalCSN[i] >> 3) | (originalCSN[(i+1)%8] << 5);
1e262141 824 }
825}
826
827//-----------------------------------------------------------------------------
828// Wait for commands from reader
829// Stop when button is pressed
830// Or return TRUE when command is captured
831//-----------------------------------------------------------------------------
832static int GetIClassCommandFromReader(uint8_t *received, int *len, int maxLen)
833{
912a3e94 834 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1e262141 835 // only, since we are receiving, not transmitting).
836 // Signal field is off with the appropriate LED
837 LED_D_OFF();
838 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
839
840 // Now run a `software UART' on the stream of incoming samples.
841 Uart.output = received;
842 Uart.byteCntMax = maxLen;
843 Uart.state = STATE_UNSYNCD;
844
845 for(;;) {
846 WDT_HIT();
847
848 if(BUTTON_PRESS()) return FALSE;
849
850 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
851 AT91C_BASE_SSC->SSC_THR = 0x00;
852 }
853 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
854 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
3fe4ff4f 855
1e262141 856 if(OutOfNDecoding(b & 0x0f)) {
857 *len = Uart.byteCnt;
858 return TRUE;
859 }
860 }
861 }
862}
863
645c960f
MHS		 864static uint8_t encode4Bits(const uint8_t b)
865{
866 uint8_t c = b & 0xF;
867 // OTA, the least significant bits first
868 // The columns are
869 // 1 - Bit value to send
870 // 2 - Reversed (big-endian)
871 // 3 - Encoded
872 // 4 - Hex values
873
874 switch(c){
875 // 1 2 3 4
876 case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
877 case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
878 case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
879 case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
880 case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
881 case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
882 case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
883 case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
884 case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
885 case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
886 case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
887 case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
888 case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
889 case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
890 case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
891 default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
892
893 }
894}
1e262141 895
896//-----------------------------------------------------------------------------
897// Prepare tag messages
898//-----------------------------------------------------------------------------
899static void CodeIClassTagAnswer(const uint8_t *cmd, int len)
900{
645c960f
MHS		 901
902 /*
903 * SOF comprises 3 parts;
904 * * An unmodulated time of 56.64 us
905 * * 24 pulses of 423.75 KHz (fc/32)
906 * * A logic 1, which starts with an unmodulated time of 18.88us
907 * followed by 8 pulses of 423.75kHz (fc/32)
908 *
909 *
910 * EOF comprises 3 parts:
911 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
912 * time of 18.88us.
913 * - 24 pulses of fc/32
914 * - An unmodulated time of 56.64 us
915 *
916 *
917 * A logic 0 starts with 8 pulses of fc/32
918 * followed by an unmodulated time of 256/fc (~18,88us).
919 *
920 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
921 * 8 pulses of fc/32 (also 18.88us)
922 *
923 * The mode FPGA_HF_SIMULATOR_MODULATE_424K_8BIT which we use to simulate tag,
924 * works like this.
925 * - A 1-bit input to the FPGA becomes 8 pulses on 423.5kHz (fc/32) (18.88us).
926 * - A 0-bit inptu to the FPGA becomes an unmodulated time of 18.88us
927 *
6b038d19 928 * In this mode the SOF can be written as 00011101 = 0x1D
645c960f
MHS		 929 * The EOF can be written as 10111000 = 0xb8
930 * A logic 1 is 01
931 * A logic 0 is 10
932 *
933 * */
934
1e262141 935 int i;
936
937 ToSendReset();
938
939 // Send SOF
645c960f 940 ToSend[++ToSendMax] = 0x1D;
1e262141 941
942 for(i = 0; i < len; i++) {
1e262141 943 uint8_t b = cmd[i];
645c960f
MHS		 944 ToSend[++ToSendMax] = encode4Bits(b & 0xF); //Least significant half
945 ToSend[++ToSendMax] = encode4Bits((b >>4) & 0xF);//Most significant half
1e262141 946 }
947
948 // Send EOF
645c960f 949 ToSend[++ToSendMax] = 0xB8;
81012e67 950 //lastProxToAirDuration = 8*ToSendMax - 3*8 - 3*8;//Not counting zeroes in the beginning or end
1e262141 951 // Convert from last byte pos to length
952 ToSendMax++;
953}
954
955// Only SOF
956static void CodeIClassTagSOF()
957{
81012e67
MHS		 958 //So far a dummy implementation, not used
959 //int lastProxToAirDuration =0;
1e262141 960
81012e67 961 ToSendReset();
1e262141 962 // Send SOF
645c960f 963 ToSend[++ToSendMax] = 0x1D;
81012e67
MHS		 964// lastProxToAirDuration = 8*ToSendMax - 3*8;//Not counting zeroes in the beginning
965
1e262141 966 // Convert from last byte pos to length
967 ToSendMax++;
968}
b67f7ec3
MHS		 969#define MODE_SIM_CSN 0
970#define MODE_EXIT_AFTER_MAC 1
971#define MODE_FULLSIM 2
55eaed8f 972
b67f7ec3 973int doIClassSimulation(int simulationMode, uint8_t *reader_mac_buf);
ff7bb4ef
MHS		 974/**
975 * @brief SimulateIClass simulates an iClass card.
976 * @param arg0 type of simulation
977 * - 0 uses the first 8 bytes in usb data as CSN
978 * - 2 "dismantling iclass"-attack. This mode iterates through all CSN's specified
979 * in the usb data. This mode collects MAC from the reader, in order to do an offline
980 * attack on the keys. For more info, see "dismantling iclass" and proxclone.com.
981 * - Other : Uses the default CSN (031fec8af7ff12e0)
982 * @param arg1 - number of CSN's contained in datain (applicable for mode 2 only)
983 * @param arg2
984 * @param datain
985 */
986void SimulateIClass(uint32_t arg0, uint32_t arg1, uint32_t arg2, uint8_t *datain)
1e262141 987{
ff7bb4ef
MHS		 988 uint32_t simType = arg0;
989 uint32_t numberOfCSNS = arg1;
7cc204bf 990 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1e262141 991
ff7bb4ef 992 // Enable and clear the trace
3000dc4e
MHS		 993 set_tracing(TRUE);
994 clear_trace();
b67f7ec3
MHS		 995 //Use the emulator memory for SIM
996 uint8_t *emulator = BigBuf_get_EM_addr();
81cd0474 997
ff7bb4ef
MHS		 998 if(simType == 0) {
999 // Use the CSN from commandline
b67f7ec3
MHS		 1000 memcpy(emulator, datain, 8);
1001 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS		 1002 }else if(simType == 1)
1003 {
b67f7ec3
MHS		 1004 //Default CSN
1005 uint8_t csn_crc[] = { 0x03, 0x1f, 0xec, 0x8a, 0xf7, 0xff, 0x12, 0xe0, 0x00, 0x00 };
1006 // Use the CSN from commandline
1007 memcpy(emulator, csn_crc, 8);
1008 doIClassSimulation(MODE_SIM_CSN,NULL);
ff7bb4ef
MHS		 1009 }
1010 else if(simType == 2)
1011 {
9f6e9d15 1012
7b941c8d 1013 uint8_t mac_responses[USB_CMD_DATA_SIZE] = { 0 };
eabba3df 1014 Dbprintf("Going into attack mode, %d CSNS sent", numberOfCSNS);
ff7bb4ef
MHS		 1015 // In this mode, a number of csns are within datain. We'll simulate each one, one at a time
1016 // in order to collect MAC's from the reader. This can later be used in an offlne-attack
1017 // in order to obtain the keys, as in the "dismantling iclass"-paper.
9f6e9d15
MHS		 1018 int i = 0;
1019 for( ; i < numberOfCSNS && i*8+8 < USB_CMD_DATA_SIZE; i++)
ff7bb4ef
MHS		 1020 {
1021 // The usb data is 512 bytes, fitting 65 8-byte CSNs in there.
1022
b67f7ec3
MHS		 1023 memcpy(emulator, datain+(i*8), 8);
1024 if(doIClassSimulation(MODE_EXIT_AFTER_MAC,mac_responses+i*8))
f83cc126 1025 {
645c960f 1026 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
f83cc126
MHS		 1027 return; // Button pressed
1028 }
ff7bb4ef 1029 }
9f6e9d15
MHS		 1030 cmd_send(CMD_ACK,CMD_SIMULATE_TAG_ICLASS,i,0,mac_responses,i*8);
1031
b67f7ec3
MHS		 1032 }else if(simType == 3){
1033 //This is 'full sim' mode, where we use the emulator storage for data.
1034 doIClassSimulation(MODE_FULLSIM, NULL);
81012e67
MHS		 1035 }
1036 else{
ff7bb4ef
MHS		 1037 // We may want a mode here where we hardcode the csns to use (from proxclone).
1038 // That will speed things up a little, but not required just yet.
1039 Dbprintf("The mode is not implemented, reserved for future use");
1040 }
9f6e9d15 1041 Dbprintf("Done...");
ff7bb4ef
MHS		 1042
1043}
b67f7ec3 1044
ff7bb4ef
MHS		 1045/**
1046 * @brief Does the actual simulation
1047 * @param csn - csn to use
1048 * @param breakAfterMacReceived if true, returns after reader MAC has been received.
1049 */
b67f7ec3 1050int doIClassSimulation( int simulationMode, uint8_t *reader_mac_buf)
ff7bb4ef 1051{
b67f7ec3
MHS		 1052 // free eventually allocated BigBuf memory
1053 BigBuf_free_keep_EM();
55eaed8f 1054
b67f7ec3
MHS		 1055 uint8_t *csn = BigBuf_get_EM_addr();
1056 uint8_t *emulator = csn;
1057 uint8_t sof_data[] = { 0x0F} ;
1e262141 1058 // CSN followed by two CRC bytes
b67f7ec3
MHS		 1059 uint8_t anticoll_data[10] = { 0 };
1060 uint8_t csn_data[10] = { 0 };
1061 memcpy(csn_data,csn,sizeof(csn_data));
f83cc126 1062 Dbprintf("Simulating CSN %02x%02x%02x%02x%02x%02x%02x%02x",csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1e262141 1063
1e262141 1064 // Construct anticollision-CSN
b67f7ec3 1065 rotateCSN(csn_data,anticoll_data);
1e262141 1066
1067 // Compute CRC on both CSNs
b67f7ec3
MHS		 1068 ComputeCrc14443(CRC_ICLASS, anticoll_data, 8, &anticoll_data[8], &anticoll_data[9]);
1069 ComputeCrc14443(CRC_ICLASS, csn_data, 8, &csn_data[8], &csn_data[9]);
1070
1071 // e-Purse
1072 uint8_t card_challenge_data[8] = { 0x00 };
1073 if(simulationMode == MODE_FULLSIM)
1074 {
1075 //Card challenge, a.k.a e-purse is on block 2
1076 memcpy(card_challenge_data,emulator + (8 * 2) , 8);
1077 }
1e262141 1078
ff7bb4ef 1079 int exitLoop = 0;
1e262141 1080 // Reader 0a
1081 // Tag 0f
1082 // Reader 0c
1083 // Tag anticoll. CSN
1084 // Reader 81 anticoll. CSN
1085 // Tag CSN
1086
55eaed8f
MHS		 1087 uint8_t *modulated_response;
1088 int modulated_response_size;
1089 uint8_t* trace_data = NULL;
1090 int trace_data_size = 0;
1e262141 1091
b67f7ec3 1092
645c960f 1093 // Respond SOF -- takes 1 bytes
b67f7ec3
MHS		 1094 uint8_t *resp_sof = BigBuf_malloc(2);
1095 int resp_sof_Len;
1e262141 1096
1097 // Anticollision CSN (rotated CSN)
645c960f 1098 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS		 1099 uint8_t *resp_anticoll = BigBuf_malloc(28);
1100 int resp_anticoll_len;
1e262141 1101
1102 // CSN
645c960f 1103 // 22: Takes 2 bytes for SOF/EOF and 10 * 2 = 20 bytes (2 bytes/byte)
b67f7ec3
MHS		 1104 uint8_t *resp_csn = BigBuf_malloc(30);
1105 int resp_csn_len;
1e262141 1106
1107 // e-Purse
b3cc5f29 1108 // 18: Takes 2 bytes for SOF/EOF and 8 * 2 = 16 bytes (2 bytes/bit)
b67f7ec3
MHS		 1109 uint8_t *resp_cc = BigBuf_malloc(20);
1110 int resp_cc_len;
1e262141 1111
f71f4deb 1112 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
6a1f2d82 1113 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
1e262141 1114 int len;
1115
1e262141 1116 // Prepare card messages
1117 ToSendMax = 0;
1118
1119 // First card answer: SOF
1120 CodeIClassTagSOF();
b67f7ec3 1121 memcpy(resp_sof, ToSend, ToSendMax); resp_sof_Len = ToSendMax;
1e262141 1122
1123 // Anticollision CSN
b67f7ec3
MHS		 1124 CodeIClassTagAnswer(anticoll_data, sizeof(anticoll_data));
1125 memcpy(resp_anticoll, ToSend, ToSendMax); resp_anticoll_len = ToSendMax;
1e262141 1126
1127 // CSN
b67f7ec3
MHS		 1128 CodeIClassTagAnswer(csn_data, sizeof(csn_data));
1129 memcpy(resp_csn, ToSend, ToSendMax); resp_csn_len = ToSendMax;
1e262141 1130
1131 // e-Purse
b67f7ec3
MHS		 1132 CodeIClassTagAnswer(card_challenge_data, sizeof(card_challenge_data));
1133 memcpy(resp_cc, ToSend, ToSendMax); resp_cc_len = ToSendMax;
1e262141 1134
b67f7ec3
MHS		 1135 //This is used for responding to READ-block commands
1136 uint8_t *data_response = BigBuf_malloc(8 * 2 + 2);
e3dc1e4c
MHS		 1137
1138 // Start from off (no field generated)
fa541aca
MHS		 1139 //FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1140 //SpinDelay(200);
1141 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1142 SpinDelay(100);
1143 StartCountSspClk();
1e262141 1144 // We need to listen to the high-frequency, peak-detected path.
1145 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1146 FpgaSetupSsc();
1147
1148 // To control where we are in the protocol
1e262141 1149 int cmdsRecvd = 0;
81012e67
MHS		 1150 uint32_t time_0 = GetCountSspClk();
1151 uint32_t t2r_time =0;
1152 uint32_t r2t_time =0;
912a3e94 1153
1e262141 1154 LED_A_ON();
f83cc126 1155 bool buttonPressed = false;
9f6e9d15 1156
ff7bb4ef 1157 while(!exitLoop) {
81012e67 1158
1e262141 1159 LED_B_OFF();
e3dc1e4c
MHS		 1160 //Signal tracer
1161 // Can be used to get a trigger for an oscilloscope..
1162 LED_C_OFF();
3fe4ff4f 1163
1e262141 1164 if(!GetIClassCommandFromReader(receivedCmd, &len, 100)) {
f83cc126 1165 buttonPressed = true;
1e262141 1166 break;
81cd0474 1167 }
81012e67 1168 r2t_time = GetCountSspClk();
e3dc1e4c
MHS		 1169 //Signal tracer
1170 LED_C_ON();
1e262141 1171
81cd0474 1172 // Okay, look at the command now.
b67f7ec3 1173 if(receivedCmd[0] == ICLASS_CMD_ACTALL ) {
1e262141 1174 // Reader in anticollission phase
b67f7ec3
MHS		 1175 modulated_response = resp_sof; modulated_response_size = resp_sof_Len; //order = 1;
1176 trace_data = sof_data;
1177 trace_data_size = sizeof(sof_data);
1178 } else if(receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 1) {
1e262141 1179 // Reader asks for anticollission CSN
b67f7ec3
MHS		 1180 modulated_response = resp_anticoll; modulated_response_size = resp_anticoll_len; //order = 2;
1181 trace_data = anticoll_data;
1182 trace_data_size = sizeof(anticoll_data);
1e262141 1183 //DbpString("Reader requests anticollission CSN:");
b67f7ec3 1184 } else if(receivedCmd[0] == ICLASS_CMD_SELECT) {
1e262141 1185 // Reader selects anticollission CSN.
1186 // Tag sends the corresponding real CSN
b67f7ec3
MHS		 1187 modulated_response = resp_csn; modulated_response_size = resp_csn_len; //order = 3;
1188 trace_data = csn_data;
1189 trace_data_size = sizeof(csn_data);
1e262141 1190 //DbpString("Reader selects anticollission CSN:");
b67f7ec3 1191 } else if(receivedCmd[0] == ICLASS_CMD_READCHECK_KD) {
1e262141 1192 // Read e-purse (88 02)
b67f7ec3
MHS		 1193 modulated_response = resp_cc; modulated_response_size = resp_cc_len; //order = 4;
1194 trace_data = card_challenge_data;
1195 trace_data_size = sizeof(card_challenge_data);
1e262141 1196 LED_B_ON();
b67f7ec3 1197 } else if(receivedCmd[0] == ICLASS_CMD_CHECK) {
1e262141 1198 // Reader random and reader MAC!!!
b67f7ec3
MHS		 1199 if(simulationMode == MODE_FULLSIM)
1200 { //This is what we must do..
1201 //Reader just sent us NR and MAC(k,cc * nr)
1202 //The diversified key should be stored on block 3
1203 //However, from a typical dump, the key will not be there
1204 uint8_t *diversified_key = { 0 };
1205 //Get the diversified key from emulator memory
1206 memcpy(diversified_key, emulator+(8*3),8);
1207 uint8_t ccnr[12] = { 0 };
1208 //Put our cc there (block 2)
1209 memcpy(ccnr, emulator + (8 * 2), 8);
1210 //Put nr there
1211 memcpy(ccnr+8, receivedCmd+1,4);
1212 //Now, calc MAC
1213 doMAC(ccnr,diversified_key, trace_data);
1214 trace_data_size = 4;
1215 CodeIClassTagAnswer(trace_data , trace_data_size);
1216 memcpy(data_response, ToSend, ToSendMax);
1217 modulated_response = data_response;
1218 modulated_response_size = ToSendMax;
1219 }else
1220 { //Not fullsim, we don't respond
1221 // We do not know what to answer, so lets keep quiet
1222 modulated_response = resp_sof; modulated_response_size = 0;
1223 trace_data = NULL;
1224 trace_data_size = 0;
1225 if (simulationMode == MODE_EXIT_AFTER_MAC){
1226 // dbprintf:ing ...
1227 Dbprintf("CSN: %02x %02x %02x %02x %02x %02x %02x %02x"
1228 ,csn[0],csn[1],csn[2],csn[3],csn[4],csn[5],csn[6],csn[7]);
1229 Dbprintf("RDR: (len=%02d): %02x %02x %02x %02x %02x %02x %02x %02x %02x",len,
1230 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1231 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1232 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1233 if (reader_mac_buf != NULL)
1234 {
1235 memcpy(reader_mac_buf,receivedCmd+1,8);
1236 }
1237 exitLoop = true;
9f6e9d15 1238 }
ff7bb4ef 1239 }
b67f7ec3
MHS		 1240
1241 } else if(receivedCmd[0] == ICLASS_CMD_HALT && len == 1) {
1e262141 1242 // Reader ends the session
b67f7ec3 1243 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS		 1244 trace_data = NULL;
1245 trace_data_size = 0;
b67f7ec3
MHS		 1246 } else if(simulationMode == MODE_FULLSIM && receivedCmd[0] == ICLASS_CMD_READ_OR_IDENTIFY && len == 4){
1247 //Read block
1248 uint16_t blk = receivedCmd[1];
1249 trace_data = emulator+(blk << 3);
1250 trace_data_size = 8;
1251 CodeIClassTagAnswer(trace_data , trace_data_size);
1252 memcpy(data_response, ToSend, ToSendMax);
1253 modulated_response = data_response;
1254 modulated_response_size = ToSendMax;
1255 }
1256 else {
17cba269 1257 //#db# Unknown command received from reader (len=5): 26 1 0 f6 a 44 44 44 44
1e262141 1258 // Never seen this command before
1259 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1260 len,
1261 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1262 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1263 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1264 // Do not respond
b67f7ec3 1265 modulated_response = resp_sof; modulated_response_size = 0; //order = 0;
55eaed8f
MHS		 1266 trace_data = NULL;
1267 trace_data_size = 0;
1e262141 1268 }
1269
81012e67
MHS		 1270 if(cmdsRecvd > 100) {
1271 //DbpString("100 commands later...");
9f6e9d15 1272 //break;
1e262141 1273 }
1274 else {
1275 cmdsRecvd++;
1276 }
55eaed8f 1277 /**
6b038d19 1278 A legit tag has about 380us delay between reader EOT and tag SOF.
55eaed8f
MHS		 1279 **/
1280 if(modulated_response_size > 0) {
645c960f 1281 SendIClassAnswer(modulated_response, modulated_response_size, 1);
81012e67 1282 t2r_time = GetCountSspClk();
81cd0474 1283 }
f83cc126 1284
81cd0474 1285 if (tracing) {
6a1f2d82 1286 uint8_t parity[MAX_PARITY_SIZE];
1287 GetParity(receivedCmd, len, parity);
1288 LogTrace(receivedCmd,len, (r2t_time-time_0)<< 4, (r2t_time-time_0) << 4, parity, TRUE);
17cba269 1289
55eaed8f
MHS		 1290 if (trace_data != NULL) {
1291 GetParity(trace_data, trace_data_size, parity);
1292 LogTrace(trace_data, trace_data_size, (t2r_time-time_0) << 4, (t2r_time-time_0) << 4, parity, FALSE);
17cba269 1293 }
81012e67
MHS		 1294 if(!tracing) {
1295 DbpString("Trace full");
1296 //break;
1297 }
1298
81cd0474 1299 }
6a1f2d82 1300 memset(receivedCmd, 0x44, MAX_FRAME_SIZE);
81cd0474 1301 }
1e262141 1302
9f6e9d15 1303 //Dbprintf("%x", cmdsRecvd);
1e262141 1304 LED_A_OFF();
1305 LED_B_OFF();
7b941c8d
MHS		 1306 LED_C_OFF();
1307
f83cc126
MHS		 1308 if(buttonPressed)
1309 {
1310 DbpString("Button pressed");
1311 }
f83cc126 1312 return buttonPressed;
1e262141 1313}
1314
1315static int SendIClassAnswer(uint8_t *resp, int respLen, int delay)
1316{
e3dc1e4c 1317 int i = 0, d=0;//, u = 0, d = 0;
1e262141 1318 uint8_t b = 0;
e3dc1e4c 1319
645c960f
MHS		 1320 //FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K);
1321 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR|FPGA_HF_SIMULATOR_MODULATE_424K_8BIT);
e3dc1e4c 1322
1e262141 1323 AT91C_BASE_SSC->SSC_THR = 0x00;
1324 FpgaSetupSsc();
e3dc1e4c
MHS		 1325 while(!BUTTON_PRESS()) {
1326 if((AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)){
1327 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1e262141 1328 }
e3dc1e4c
MHS		 1329 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)){
1330 b = 0x00;
1e262141 1331 if(d < delay) {
1e262141 1332 d++;
1333 }
e3dc1e4c
MHS		 1334 else {
1335 if( i < respLen){
1336 b = resp[i];
1337 //Hack
1338 //b = 0xAC;
1339 }
1340 i++;
1e262141 1341 }
1342 AT91C_BASE_SSC->SSC_THR = b;
1e262141 1343 }
e3dc1e4c 1344
645c960f
MHS		 1345// if (i > respLen +4) break;
1346 if (i > respLen +1) break;
1e262141 1347 }
1348
1349 return 0;
1350}
1351
1352/// THE READER CODE
1353
1354//-----------------------------------------------------------------------------
1355// Transmit the command (to the tag) that was placed in ToSend[].
1356//-----------------------------------------------------------------------------
1357static void TransmitIClassCommand(const uint8_t *cmd, int len, int *samples, int *wait)
1358{
1359 int c;
1e262141 1360 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1361 AT91C_BASE_SSC->SSC_THR = 0x00;
1362 FpgaSetupSsc();
1363
1364 if (wait)
2ed270a8
MHS		 1365 {
1366 if(*wait < 10) *wait = 10;
1367
1368 for(c = 0; c < *wait;) {
1369 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1370 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1371 c++;
1372 }
1373 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1374 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1375 (void)r;
1376 }
1377 WDT_HIT();
1378 }
1379
1380 }
1e262141 1381
1e262141 1382
1383 uint8_t sendbyte;
1384 bool firstpart = TRUE;
1385 c = 0;
1386 for(;;) {
1387 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1388
1389 // DOUBLE THE SAMPLES!
1390 if(firstpart) {
1391 sendbyte = (cmd[c] & 0xf0) | (cmd[c] >> 4);
1392 }
1393 else {
1394 sendbyte = (cmd[c] & 0x0f) | (cmd[c] << 4);
1395 c++;
1396 }
1397 if(sendbyte == 0xff) {
1398 sendbyte = 0xfe;
1399 }
1400 AT91C_BASE_SSC->SSC_THR = sendbyte;
1401 firstpart = !firstpart;
1402
1403 if(c >= len) {
1404 break;
1405 }
1406 }
1407 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1408 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1409 (void)r;
1410 }
1411 WDT_HIT();
1412 }
1413 if (samples) *samples = (c + *wait) << 3;
1414}
1415
1416
1417//-----------------------------------------------------------------------------
1418// Prepare iClass reader command to send to FPGA
1419//-----------------------------------------------------------------------------
1420void CodeIClassCommand(const uint8_t * cmd, int len)
1421{
1422 int i, j, k;
1423 uint8_t b;
1424
1425 ToSendReset();
1426
1427 // Start of Communication: 1 out of 4
1428 ToSend[++ToSendMax] = 0xf0;
1429 ToSend[++ToSendMax] = 0x00;
1430 ToSend[++ToSendMax] = 0x0f;
1431 ToSend[++ToSendMax] = 0x00;
1432
1433 // Modulate the bytes
1434 for (i = 0; i < len; i++) {
1435 b = cmd[i];
1436 for(j = 0; j < 4; j++) {
1437 for(k = 0; k < 4; k++) {
e3dc1e4c
MHS		 1438 if(k == (b & 3)) {
1439 ToSend[++ToSendMax] = 0x0f;
1440 }
1441 else {
1442 ToSend[++ToSendMax] = 0x00;
1443 }
1e262141 1444 }
1445 b >>= 2;
1446 }
1447 }
1448
1449 // End of Communication
1450 ToSend[++ToSendMax] = 0x00;
1451 ToSend[++ToSendMax] = 0x00;
1452 ToSend[++ToSendMax] = 0xf0;
1453 ToSend[++ToSendMax] = 0x00;
1454
1455 // Convert from last character reference to length
1456 ToSendMax++;
1457}
1458
1459void ReaderTransmitIClass(uint8_t* frame, int len)
1460{
6a1f2d82 1461 int wait = 0;
1462 int samples = 0;
1463
1464 // This is tied to other size changes
6a1f2d82 1465 CodeIClassCommand(frame,len);
1466
1467 // Select the card
1468 TransmitIClassCommand(ToSend, ToSendMax, &samples, &wait);
1469 if(trigger)
1470 LED_A_ON();
1471
1472 // Store reader command in buffer
1473 if (tracing) {
1474 uint8_t par[MAX_PARITY_SIZE];
1475 GetParity(frame, len, par);
1476 LogTrace(frame, len, rsamples, rsamples, par, TRUE);
1477 }
1e262141 1478}
1479
1480//-----------------------------------------------------------------------------
1481// Wait a certain time for tag response
1482// If a response is captured return TRUE
1483// If it takes too long return FALSE
1484//-----------------------------------------------------------------------------
1485static int GetIClassAnswer(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1486{
1487 // buffer needs to be 512 bytes
1488 int c;
1489
1490 // Set FPGA mode to "reader listen mode", no modulation (listen
1491 // only, since we are receiving, not transmitting).
1492 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1493
1494 // Now get the answer from the card
1495 Demod.output = receivedResponse;
1496 Demod.len = 0;
1497 Demod.state = DEMOD_UNSYNCD;
1498
1499 uint8_t b;
1500 if (elapsed) *elapsed = 0;
1501
1502 bool skip = FALSE;
1503
1504 c = 0;
1505 for(;;) {
1506 WDT_HIT();
1507
1508 if(BUTTON_PRESS()) return FALSE;
1509
1510 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1511 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1512 if (elapsed) (*elapsed)++;
1513 }
1514 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1515 if(c < timeout) { c++; } else { return FALSE; }
1516 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1517 skip = !skip;
1518 if(skip) continue;
3fe4ff4f 1519
1e262141 1520 if(ManchesterDecoding(b & 0x0f)) {
1521 *samples = c << 3;
1522 return TRUE;
1523 }
1524 }
1525 }
1526}
1527
1528int ReaderReceiveIClass(uint8_t* receivedAnswer)
1529{
1530 int samples = 0;
1531 if (!GetIClassAnswer(receivedAnswer,160,&samples,0)) return FALSE;
7bc95e2e 1532 rsamples += samples;
6a1f2d82 1533 if (tracing) {
1534 uint8_t parity[MAX_PARITY_SIZE];
1535 GetParity(receivedAnswer, Demod.len, parity);
1536 LogTrace(receivedAnswer,Demod.len,rsamples,rsamples,parity,FALSE);
1537 }
1e262141 1538 if(samples == 0) return FALSE;
1539 return Demod.len;
1540}
1541
aa41c605
MHS		 1542void setupIclassReader()
1543{
1544 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1545 // Reset trace buffer
3000dc4e
MHS		 1546 set_tracing(TRUE);
1547 clear_trace();
aa41c605
MHS		 1548
1549 // Setup SSC
1550 FpgaSetupSsc();
1551 // Start from off (no field generated)
1552 // Signal field is off with the appropriate LED
1553 LED_D_OFF();
1554 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1555 SpinDelay(200);
1556
1557 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1558
1559 // Now give it time to spin up.
1560 // Signal field is on with the appropriate LED
1561 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1562 SpinDelay(200);
1563 LED_A_ON();
1564
1565}
1566
c8dd9b09
MHS		 1567size_t sendCmdGetResponseWithRetries(uint8_t* command, size_t cmdsize, uint8_t* resp, uint8_t expected_size, uint8_t retries)
1568{
1569 while(retries-- > 0)
1570 {
1571 ReaderTransmitIClass(command, cmdsize);
1572 if(expected_size == ReaderReceiveIClass(resp)){
1573 return 0;
1574 }
1575 }
1576 return 1;//Error
1577}
1578
1579/**
1580 * @brief Talks to an iclass tag, sends the commands to get CSN and CC.
1581 * @param card_data where the CSN and CC are stored for return
1582 * @return 0 = fail
1583 * 1 = Got CSN
1584 * 2 = Got CSN and CC
1585 */
1586uint8_t handshakeIclassTag(uint8_t *card_data)
1587{
1588 static uint8_t act_all[] = { 0x0a };
1589 static uint8_t identify[] = { 0x0c };
1590 static uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1591 static uint8_t readcheck_cc[]= { 0x88, 0x02 };
f71f4deb 1592 uint8_t resp[ICLASS_BUFFER_SIZE];
c8dd9b09
MHS		 1593
1594 uint8_t read_status = 0;
1595
1596 // Send act_all
1597 ReaderTransmitIClass(act_all, 1);
1598 // Card present?
1599 if(!ReaderReceiveIClass(resp)) return read_status;//Fail
1600 //Send Identify
1601 ReaderTransmitIClass(identify, 1);
1602 //We expect a 10-byte response here, 8 byte anticollision-CSN and 2 byte CRC
1603 uint8_t len = ReaderReceiveIClass(resp);
1604 if(len != 10) return read_status;//Fail
1605
1606 //Copy the Anti-collision CSN to our select-packet
1607 memcpy(&select[1],resp,8);
1608 //Select the card
1609 ReaderTransmitIClass(select, sizeof(select));
1610 //We expect a 10-byte response here, 8 byte CSN and 2 byte CRC
1611 len = ReaderReceiveIClass(resp);
1612 if(len != 10) return read_status;//Fail
1613
1614 //Success - level 1, we got CSN
1615 //Save CSN in response data
1616 memcpy(card_data,resp,8);
1617
1618 //Flag that we got to at least stage 1, read CSN
1619 read_status = 1;
1620
1621 // Card selected, now read e-purse (cc)
1622 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1623 if(ReaderReceiveIClass(resp) == 8) {
1624 //Save CC (e-purse) in response data
1625 memcpy(card_data+8,resp,8);
1626
1627 //Got both
1628 read_status = 2;
1629 }
1630
1631 return read_status;
1632}
1633
1e262141 1634// Reader iClass Anticollission
1635void ReaderIClass(uint8_t arg0) {
1e262141 1636
aa41c605
MHS		 1637 uint8_t card_data[24]={0};
1638 uint8_t last_csn[8]={0};
6a1f2d82 1639
aa41c605
MHS		 1640 int read_status= 0;
1641 bool abort_after_read = arg0 & FLAG_ICLASS_READER_ONLY_ONCE;
c8dd9b09 1642 bool get_cc = arg0 & FLAG_ICLASS_READER_GET_CC;
3000dc4e 1643 set_tracing(TRUE);
aa41c605 1644 setupIclassReader();
1e262141 1645
aa41c605
MHS		 1646 size_t datasize = 0;
1647 while(!BUTTON_PRESS())
1648 {
1e262141 1649
3000dc4e 1650 if(!tracing) {
c8dd9b09
MHS		 1651 DbpString("Trace full");
1652 break;
1653 }
1654 WDT_HIT();
4ab4336a 1655
c8dd9b09 1656 read_status = handshakeIclassTag(card_data);
2e9d4b3f 1657
c8dd9b09
MHS		 1658 if(read_status == 0) continue;
1659 if(read_status == 1) datasize = 8;
1660 if(read_status == 2) datasize = 16;
1661
b67f7ec3
MHS		 1662 //Todo, read the public blocks 1,5 aswell:
1663 //
1664 // 0 : CSN (we already have)
1665 // 1 : Configuration
1666 // 2 : e-purse (we already have)
1667 // (3,4 write-only)
1668 // 5 Application issuer area
1669 //
1670 //Then we can 'ship' back the 8 * 5 bytes of data,
1671 // with 0xFF:s in block 3 and 4.
1672
c8dd9b09
MHS		 1673 LED_B_ON();
1674 //Send back to client, but don't bother if we already sent this
1675 if(memcmp(last_csn, card_data, 8) != 0)
1676 {
2e9d4b3f 1677
c8dd9b09
MHS		 1678 if(!get_cc || (get_cc && read_status == 2))
1679 {
1680 cmd_send(CMD_ACK,read_status,0,0,card_data,datasize);
1681 if(abort_after_read) {
1682 LED_A_OFF();
1683 return;
1684 }
1685 //Save that we already sent this....
1686 memcpy(last_csn, card_data, 8);
1687 }
1688 //If 'get_cc' was specified and we didn't get a CC, we'll just keep trying...
1689 }
1690 LED_B_OFF();
1691 }
1692 cmd_send(CMD_ACK,0,0,0,card_data, 0);
aa41c605 1693 LED_A_OFF();
cee5a30d 1694}
1695
c3963755 1696void ReaderIClass_Replay(uint8_t arg0, uint8_t *MAC) {
c8dd9b09 1697
cb29e00a 1698 uint8_t card_data[USB_CMD_DATA_SIZE]={0};
39d3ce5d
MHS		 1699 uint16_t block_crc_LUT[255] = {0};
1700
1701 {//Generate a lookup table for block crc
1702 for(int block = 0; block < 255; block++){
1703 char bl = block;
1704 block_crc_LUT[block] = iclass_crc16(&bl ,1);
1705 }
1706 }
1707 //Dbprintf("Lookup table: %02x %02x %02x" ,block_crc_LUT[0],block_crc_LUT[1],block_crc_LUT[2]);
c8dd9b09 1708
c3963755 1709 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1710 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1711
fecd8202 1712 uint16_t crc = 0;
c3963755 1713 uint8_t cardsize=0;
c3963755 1714 uint8_t mem=0;
1715
1716 static struct memory_t{
1717 int k16;
1718 int book;
1719 int k2;
1720 int lockauth;
1721 int keyaccess;
1722 } memory;
1723
f71f4deb 1724 uint8_t resp[ICLASS_BUFFER_SIZE];
6a1f2d82 1725
9b82de75 1726 setupIclassReader();
3000dc4e 1727 set_tracing(TRUE);
c3963755 1728
c8dd9b09 1729 while(!BUTTON_PRESS()) {
c3963755 1730
39d3ce5d
MHS		 1731 WDT_HIT();
1732
3000dc4e 1733 if(!tracing) {
c3963755 1734 DbpString("Trace full");
1735 break;
1736 }
1737
c8dd9b09
MHS		 1738 uint8_t read_status = handshakeIclassTag(card_data);
1739 if(read_status < 2) continue;
1740
1741 //for now replay captured auth (as cc not updated)
1742 memcpy(check+5,MAC,4);
1743
1744 if(sendCmdGetResponseWithRetries(check, sizeof(check),resp, 4, 5))
1745 {
1746 Dbprintf("Error: Authentication Fail!");
1747 continue;
1748 }
1749
39d3ce5d
MHS		 1750 //first get configuration block (block 1)
1751 crc = block_crc_LUT[1];
c8dd9b09 1752 read[1]=1;
c8dd9b09
MHS		 1753 read[2] = crc >> 8;
1754 read[3] = crc & 0xff;
1755
1756 if(sendCmdGetResponseWithRetries(read, sizeof(read),resp, 10, 10))
1757 {
39d3ce5d 1758 Dbprintf("Dump config (block 1) failed");
c8dd9b09
MHS		 1759 continue;
1760 }
1761
1762 mem=resp[5];
1763 memory.k16= (mem & 0x80);
1764 memory.book= (mem & 0x20);
1765 memory.k2= (mem & 0x8);
1766 memory.lockauth= (mem & 0x2);
1767 memory.keyaccess= (mem & 0x1);
1768
1769 cardsize = memory.k16 ? 255 : 32;
1770 WDT_HIT();
cb29e00a
MHS		 1771 //Set card_data to all zeroes, we'll fill it with data
1772 memset(card_data,0x0,USB_CMD_DATA_SIZE);
1773 uint8_t failedRead =0;
428d6221 1774 uint32_t stored_data_length =0;
c8dd9b09 1775 //then loop around remaining blocks
39d3ce5d 1776 for(int block=0; block < cardsize; block++){
c8dd9b09
MHS		 1777
1778 read[1]= block;
39d3ce5d 1779 crc = block_crc_LUT[block];
c8dd9b09
MHS		 1780 read[2] = crc >> 8;
1781 read[3] = crc & 0xff;
1782
1783 if(!sendCmdGetResponseWithRetries(read, sizeof(read), resp, 10, 10))
1784 {
1785 Dbprintf(" %02x: %02x %02x %02x %02x %02x %02x %02x %02x",
1786 block, resp[0], resp[1], resp[2],
1787 resp[3], resp[4], resp[5],
1788 resp[6], resp[7]);
1789
cb29e00a
MHS		 1790 //Fill up the buffer
1791 memcpy(card_data+stored_data_length,resp,8);
1792 stored_data_length += 8;
cb29e00a
MHS		 1793 if(stored_data_length +8 > USB_CMD_DATA_SIZE)
1794 {//Time to send this off and start afresh
1795 cmd_send(CMD_ACK,
1796 stored_data_length,//data length
1797 failedRead,//Failed blocks?
1798 0,//Not used ATM
1799 card_data, stored_data_length);
1800 //reset
1801 stored_data_length = 0;
1802 failedRead = 0;
1803 }
1804
c8dd9b09 1805 }else{
cb29e00a
MHS		 1806 failedRead = 1;
1807 stored_data_length +=8;//Otherwise, data becomes misaligned
c8dd9b09 1808 Dbprintf("Failed to dump block %d", block);
c3963755 1809 }
1810 }
428d6221 1811
cb29e00a
MHS		 1812 //Send off any remaining data
1813 if(stored_data_length > 0)
1814 {
1815 cmd_send(CMD_ACK,
1816 stored_data_length,//data length
1817 failedRead,//Failed blocks?
1818 0,//Not used ATM
1819 card_data, stored_data_length);
1820 }
c8dd9b09
MHS		 1821 //If we got here, let's break
1822 break;
c3963755 1823 }
cb29e00a
MHS		 1824 //Signal end of transmission
1825 cmd_send(CMD_ACK,
1826 0,//data length
1827 0,//Failed blocks?
1828 0,//Not used ATM
1829 card_data, 0);
1830
c3963755 1831 LED_A_OFF();
1832}
1833
fecd8202 1834//2. Create Read method (cut-down from above) based off responses from 1.
1835// Since we have the MAC could continue to use replay function.
1836//3. Create Write method
1837/*
1838void IClass_iso14443A_write(uint8_t arg0, uint8_t blockNo, uint8_t *data, uint8_t *MAC) {
1839 uint8_t act_all[] = { 0x0a };
1840 uint8_t identify[] = { 0x0c };
1841 uint8_t select[] = { 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1842 uint8_t readcheck_cc[]= { 0x88, 0x02 };
1843 uint8_t check[] = { 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1844 uint8_t read[] = { 0x0c, 0x00, 0x00, 0x00 };
1845 uint8_t write[] = { 0x87, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1846
1847 uint16_t crc = 0;
1848
6a1f2d82 1849 uint8_t* resp = (((uint8_t *)BigBuf) + 3560);
912a3e94 1850
fecd8202 1851 // Reset trace buffer
1852 memset(trace, 0x44, RECV_CMD_OFFSET);
1853 traceLen = 0;
1854
1855 // Setup SSC
1856 FpgaSetupSsc();
1857 // Start from off (no field generated)
1858 // Signal field is off with the appropriate LED
1859 LED_D_OFF();
1860 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1861 SpinDelay(200);
1862
1863 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1864
1865 // Now give it time to spin up.
1866 // Signal field is on with the appropriate LED
1867 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1868 SpinDelay(200);
1869
1870 LED_A_ON();
1871
1872 for(int i=0;i<1;i++) {
1873
1874 if(traceLen > TRACE_SIZE) {
1875 DbpString("Trace full");
1876 break;
1877 }
1878
1879 if (BUTTON_PRESS()) break;
1880
1881 // Send act_all
1882 ReaderTransmitIClass(act_all, 1);
1883 // Card present?
1884 if(ReaderReceiveIClass(resp)) {
1885 ReaderTransmitIClass(identify, 1);
1886 if(ReaderReceiveIClass(resp) == 10) {
1887 // Select card
1888 memcpy(&select[1],resp,8);
1889 ReaderTransmitIClass(select, sizeof(select));
1890
1891 if(ReaderReceiveIClass(resp) == 10) {
1892 Dbprintf(" Selected CSN: %02x %02x %02x %02x %02x %02x %02x %02x",
1893 resp[0], resp[1], resp[2],
1894 resp[3], resp[4], resp[5],
1895 resp[6], resp[7]);
1896 }
1897 // Card selected
1898 Dbprintf("Readcheck on Sector 2");
1899 ReaderTransmitIClass(readcheck_cc, sizeof(readcheck_cc));
1900 if(ReaderReceiveIClass(resp) == 8) {
1901 Dbprintf(" CC: %02x %02x %02x %02x %02x %02x %02x %02x",
1902 resp[0], resp[1], resp[2],
1903 resp[3], resp[4], resp[5],
1904 resp[6], resp[7]);
1905 }else return;
1906 Dbprintf("Authenticate");
1907 //for now replay captured auth (as cc not updated)
1908 memcpy(check+5,MAC,4);
1909 Dbprintf(" AA: %02x %02x %02x %02x",
1910 check[5], check[6], check[7],check[8]);
1911 ReaderTransmitIClass(check, sizeof(check));
1912 if(ReaderReceiveIClass(resp) == 4) {
1913 Dbprintf(" AR: %02x %02x %02x %02x",
1914 resp[0], resp[1], resp[2],resp[3]);
1915 }else {
1916 Dbprintf("Error: Authentication Fail!");
1917 return;
1918 }
1919 Dbprintf("Write Block");
1920
1921 //read configuration for max block number
1922 read_success=false;
1923 read[1]=1;
1924 uint8_t *blockno=&read[1];
1925 crc = iclass_crc16((char *)blockno,1);
1926 read[2] = crc >> 8;
1927 read[3] = crc & 0xff;
1928 while(!read_success){
1929 ReaderTransmitIClass(read, sizeof(read));
1930 if(ReaderReceiveIClass(resp) == 10) {
1931 read_success=true;
1932 mem=resp[5];
1933 memory.k16= (mem & 0x80);
1934 memory.book= (mem & 0x20);
1935 memory.k2= (mem & 0x8);
1936 memory.lockauth= (mem & 0x2);
1937 memory.keyaccess= (mem & 0x1);
1938
1939 }
1940 }
1941 if (memory.k16){
1942 cardsize=255;
1943 }else cardsize=32;
1944 //check card_size
1945
1946 memcpy(write+1,blockNo,1);
1947 memcpy(write+2,data,8);
1948 memcpy(write+10,mac,4);
1949 while(!send_success){
1950 ReaderTransmitIClass(write, sizeof(write));
1951 if(ReaderReceiveIClass(resp) == 10) {
1952 write_success=true;
1953 }
1954 }//
1955 }
1956 WDT_HIT();
1957 }
1958
1959 LED_A_OFF();
1960}*/
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