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15c4dc5a | 1 | //----------------------------------------------------------------------------- |
b62a5a84 | 2 | // Merlok - June 2011, 2012 |
15c4dc5a | 3 | // Gerhard de Koning Gans - May 2008 |
534983d7 | 4 | // Hagen Fritsch - June 2010 |
bd20f8f4 | 5 | // |
6 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, | |
7 | // at your option, any later version. See the LICENSE.txt file for the text of | |
8 | // the license. | |
15c4dc5a | 9 | //----------------------------------------------------------------------------- |
bd20f8f4 | 10 | // Routines to support ISO 14443 type A. |
11 | //----------------------------------------------------------------------------- | |
12 | ||
e30c654b | 13 | #include "proxmark3.h" |
15c4dc5a | 14 | #include "apps.h" |
f7e3ed82 | 15 | #include "util.h" |
9ab7a6c7 | 16 | #include "string.h" |
902cb3c0 | 17 | #include "cmd.h" |
15c4dc5a | 18 | #include "iso14443crc.h" |
534983d7 | 19 | #include "iso14443a.h" |
20f9a2a1 M |
20 | #include "crapto1.h" |
21 | #include "mifareutil.h" | |
3000dc4e | 22 | #include "BigBuf.h" |
534983d7 | 23 | static uint32_t iso14a_timeout; |
1e262141 | 24 | int rsamples = 0; |
1e262141 | 25 | uint8_t trigger = 0; |
b0127e65 | 26 | // the block number for the ISO14443-4 PCB |
27 | static uint8_t iso14_pcb_blocknum = 0; | |
15c4dc5a | 28 | |
7bc95e2e | 29 | // |
30 | // ISO14443 timing: | |
31 | // | |
32 | // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles | |
33 | #define REQUEST_GUARD_TIME (7000/16 + 1) | |
34 | // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles | |
35 | #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1) | |
36 | // bool LastCommandWasRequest = FALSE; | |
37 | ||
38 | // | |
39 | // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz) | |
40 | // | |
d714d3ef | 41 | // When the PM acts as reader and is receiving tag data, it takes |
42 | // 3 ticks delay in the AD converter | |
43 | // 16 ticks until the modulation detector completes and sets curbit | |
44 | // 8 ticks until bit_to_arm is assigned from curbit | |
45 | // 8*16 ticks for the transfer from FPGA to ARM | |
7bc95e2e | 46 | // 4*16 ticks until we measure the time |
47 | // - 8*16 ticks because we measure the time of the previous transfer | |
d714d3ef | 48 | #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16) |
7bc95e2e | 49 | |
50 | // When the PM acts as a reader and is sending, it takes | |
51 | // 4*16 ticks until we can write data to the sending hold register | |
52 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register | |
53 | // 8 ticks until the first transfer starts | |
54 | // 8 ticks later the FPGA samples the data | |
55 | // 1 tick to assign mod_sig_coil | |
56 | #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1) | |
57 | ||
58 | // When the PM acts as tag and is receiving it takes | |
d714d3ef | 59 | // 2 ticks delay in the RF part (for the first falling edge), |
7bc95e2e | 60 | // 3 ticks for the A/D conversion, |
61 | // 8 ticks on average until the start of the SSC transfer, | |
62 | // 8 ticks until the SSC samples the first data | |
63 | // 7*16 ticks to complete the transfer from FPGA to ARM | |
64 | // 8 ticks until the next ssp_clk rising edge | |
d714d3ef | 65 | // 4*16 ticks until we measure the time |
7bc95e2e | 66 | // - 8*16 ticks because we measure the time of the previous transfer |
d714d3ef | 67 | #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16) |
7bc95e2e | 68 | |
69 | // The FPGA will report its internal sending delay in | |
70 | uint16_t FpgaSendQueueDelay; | |
71 | // the 5 first bits are the number of bits buffered in mod_sig_buf | |
72 | // the last three bits are the remaining ticks/2 after the mod_sig_buf shift | |
73 | #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1) | |
74 | ||
75 | // When the PM acts as tag and is sending, it takes | |
d714d3ef | 76 | // 4*16 ticks until we can write data to the sending hold register |
7bc95e2e | 77 | // 8*16 ticks until the SHR is transferred to the Sending Shift Register |
78 | // 8 ticks until the first transfer starts | |
79 | // 8 ticks later the FPGA samples the data | |
80 | // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf) | |
81 | // + 1 tick to assign mod_sig_coil | |
d714d3ef | 82 | #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1) |
7bc95e2e | 83 | |
84 | // When the PM acts as sniffer and is receiving tag data, it takes | |
85 | // 3 ticks A/D conversion | |
d714d3ef | 86 | // 14 ticks to complete the modulation detection |
87 | // 8 ticks (on average) until the result is stored in to_arm | |
7bc95e2e | 88 | // + the delays in transferring data - which is the same for |
89 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 90 | #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8) |
7bc95e2e | 91 | |
d714d3ef | 92 | // When the PM acts as sniffer and is receiving reader data, it takes |
93 | // 2 ticks delay in analogue RF receiver (for the falling edge of the | |
94 | // start bit, which marks the start of the communication) | |
7bc95e2e | 95 | // 3 ticks A/D conversion |
d714d3ef | 96 | // 8 ticks on average until the data is stored in to_arm. |
7bc95e2e | 97 | // + the delays in transferring data - which is the same for |
98 | // sniffing reader and tag data and therefore not relevant | |
d714d3ef | 99 | #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8) |
7bc95e2e | 100 | |
101 | //variables used for timing purposes: | |
102 | //these are in ssp_clk cycles: | |
6a1f2d82 | 103 | static uint32_t NextTransferTime; |
104 | static uint32_t LastTimeProxToAirStart; | |
105 | static uint32_t LastProxToAirDuration; | |
7bc95e2e | 106 | |
107 | ||
108 | ||
8f51ddb0 | 109 | // CARD TO READER - manchester |
72934aa3 | 110 | // Sequence D: 11110000 modulation with subcarrier during first half |
111 | // Sequence E: 00001111 modulation with subcarrier during second half | |
112 | // Sequence F: 00000000 no modulation with subcarrier | |
8f51ddb0 | 113 | // READER TO CARD - miller |
72934aa3 | 114 | // Sequence X: 00001100 drop after half a period |
115 | // Sequence Y: 00000000 no drop | |
116 | // Sequence Z: 11000000 drop at start | |
117 | #define SEC_D 0xf0 | |
118 | #define SEC_E 0x0f | |
119 | #define SEC_F 0x00 | |
120 | #define SEC_X 0x0c | |
121 | #define SEC_Y 0x00 | |
122 | #define SEC_Z 0xc0 | |
15c4dc5a | 123 | |
1e262141 | 124 | const uint8_t OddByteParity[256] = { |
15c4dc5a | 125 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, |
126 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
127 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
128 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
129 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
130 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
131 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
132 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
133 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
134 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
135 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
136 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
137 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1, | |
138 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
139 | 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, | |
140 | 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1 | |
141 | }; | |
142 | ||
19a700a8 | 143 | |
902cb3c0 | 144 | void iso14a_set_trigger(bool enable) { |
534983d7 | 145 | trigger = enable; |
146 | } | |
147 | ||
d19929cb | 148 | |
b0127e65 | 149 | void iso14a_set_timeout(uint32_t timeout) { |
150 | iso14a_timeout = timeout; | |
19a700a8 | 151 | if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106); |
b0127e65 | 152 | } |
8556b852 | 153 | |
19a700a8 | 154 | |
155 | void iso14a_set_ATS_timeout(uint8_t *ats) { | |
156 | ||
157 | uint8_t tb1; | |
158 | uint8_t fwi; | |
159 | uint32_t fwt; | |
160 | ||
161 | if (ats[0] > 1) { // there is a format byte T0 | |
162 | if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1) | |
163 | if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1) | |
164 | tb1 = ats[3]; | |
165 | } else { | |
166 | tb1 = ats[2]; | |
167 | } | |
168 | fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI) | |
169 | fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc | |
170 | ||
171 | iso14a_set_timeout(fwt/(8*16)); | |
172 | } | |
173 | } | |
174 | } | |
175 | ||
176 | ||
15c4dc5a | 177 | //----------------------------------------------------------------------------- |
178 | // Generate the parity value for a byte sequence | |
e30c654b | 179 | // |
15c4dc5a | 180 | //----------------------------------------------------------------------------- |
20f9a2a1 M |
181 | byte_t oddparity (const byte_t bt) |
182 | { | |
5f6d6c90 | 183 | return OddByteParity[bt]; |
20f9a2a1 M |
184 | } |
185 | ||
6a1f2d82 | 186 | void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par) |
15c4dc5a | 187 | { |
6a1f2d82 | 188 | uint16_t paritybit_cnt = 0; |
189 | uint16_t paritybyte_cnt = 0; | |
190 | uint8_t parityBits = 0; | |
191 | ||
192 | for (uint16_t i = 0; i < iLen; i++) { | |
193 | // Generate the parity bits | |
194 | parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt)); | |
195 | if (paritybit_cnt == 7) { | |
196 | par[paritybyte_cnt] = parityBits; // save 8 Bits parity | |
197 | parityBits = 0; // and advance to next Parity Byte | |
198 | paritybyte_cnt++; | |
199 | paritybit_cnt = 0; | |
200 | } else { | |
201 | paritybit_cnt++; | |
202 | } | |
5f6d6c90 | 203 | } |
6a1f2d82 | 204 | |
205 | // save remaining parity bits | |
206 | par[paritybyte_cnt] = parityBits; | |
207 | ||
15c4dc5a | 208 | } |
209 | ||
534983d7 | 210 | void AppendCrc14443a(uint8_t* data, int len) |
15c4dc5a | 211 | { |
5f6d6c90 | 212 | ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1); |
15c4dc5a | 213 | } |
214 | ||
0ec548dc | 215 | void AppendCrc14443b(uint8_t* data, int len) |
216 | { | |
217 | ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1); | |
218 | } | |
219 | ||
220 | ||
7bc95e2e | 221 | //============================================================================= |
222 | // ISO 14443 Type A - Miller decoder | |
223 | //============================================================================= | |
224 | // Basics: | |
225 | // This decoder is used when the PM3 acts as a tag. | |
226 | // The reader will generate "pauses" by temporarily switching of the field. | |
227 | // At the PM3 antenna we will therefore measure a modulated antenna voltage. | |
228 | // The FPGA does a comparison with a threshold and would deliver e.g.: | |
229 | // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 ....... | |
230 | // The Miller decoder needs to identify the following sequences: | |
231 | // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0") | |
232 | // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information") | |
233 | // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1") | |
234 | // Note 1: the bitstream may start at any time. We therefore need to sync. | |
235 | // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence. | |
15c4dc5a | 236 | //----------------------------------------------------------------------------- |
b62a5a84 | 237 | static tUart Uart; |
15c4dc5a | 238 | |
d7aa3739 | 239 | // Lookup-Table to decide if 4 raw bits are a modulation. |
0ec548dc | 240 | // We accept the following: |
241 | // 0001 - a 3 tick wide pause | |
242 | // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left | |
243 | // 0111 - a 2 tick wide pause shifted left | |
244 | // 1001 - a 2 tick wide pause shifted right | |
d7aa3739 | 245 | const bool Mod_Miller_LUT[] = { |
0ec548dc | 246 | FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE, |
247 | FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE | |
d7aa3739 | 248 | }; |
0ec548dc | 249 | #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4]) |
250 | #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)]) | |
d7aa3739 | 251 | |
7bc95e2e | 252 | void UartReset() |
15c4dc5a | 253 | { |
7bc95e2e | 254 | Uart.state = STATE_UNSYNCD; |
255 | Uart.bitCount = 0; | |
256 | Uart.len = 0; // number of decoded data bytes | |
6a1f2d82 | 257 | Uart.parityLen = 0; // number of decoded parity bytes |
7bc95e2e | 258 | Uart.shiftReg = 0; // shiftreg to hold decoded data bits |
6a1f2d82 | 259 | Uart.parityBits = 0; // holds 8 parity bits |
7bc95e2e | 260 | Uart.startTime = 0; |
261 | Uart.endTime = 0; | |
46c65fed | 262 | |
263 | Uart.byteCntMax = 0; | |
264 | Uart.posCnt = 0; | |
265 | Uart.syncBit = 9999; | |
7bc95e2e | 266 | } |
15c4dc5a | 267 | |
6a1f2d82 | 268 | void UartInit(uint8_t *data, uint8_t *parity) |
269 | { | |
270 | Uart.output = data; | |
271 | Uart.parity = parity; | |
0ec548dc | 272 | Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits |
6a1f2d82 | 273 | UartReset(); |
274 | } | |
d714d3ef | 275 | |
7bc95e2e | 276 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
277 | static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time) | |
278 | { | |
15c4dc5a | 279 | |
0ec548dc | 280 | Uart.fourBits = (Uart.fourBits << 8) | bit; |
7bc95e2e | 281 | |
0c8d25eb | 282 | if (Uart.state == STATE_UNSYNCD) { // not yet synced |
3fe4ff4f | 283 | |
0ec548dc | 284 | Uart.syncBit = 9999; // not set |
46c65fed | 285 | |
286 | // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication") | |
287 | // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information") | |
288 | // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1") | |
289 | ||
0ec548dc | 290 | // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from |
46c65fed | 291 | // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111) |
292 | // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern | |
0ec548dc | 293 | // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's) |
46c65fed | 294 | // |
295 | #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000 | |
296 | #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000 | |
297 | ||
0ec548dc | 298 | if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7; |
299 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6; | |
300 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5; | |
301 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4; | |
302 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3; | |
303 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2; | |
304 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1; | |
305 | else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0; | |
306 | ||
307 | if (Uart.syncBit != 9999) { // found a sync bit | |
7bc95e2e | 308 | Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
309 | Uart.startTime -= Uart.syncBit; | |
d7aa3739 | 310 | Uart.endTime = Uart.startTime; |
7bc95e2e | 311 | Uart.state = STATE_START_OF_COMMUNICATION; |
15c4dc5a | 312 | } |
313 | ||
7bc95e2e | 314 | } else { |
15c4dc5a | 315 | |
0ec548dc | 316 | if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) { |
317 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error | |
d7aa3739 | 318 | UartReset(); |
d7aa3739 | 319 | } else { // Modulation in first half = Sequence Z = logic "0" |
7bc95e2e | 320 | if (Uart.state == STATE_MILLER_X) { // error - must not follow after X |
321 | UartReset(); | |
7bc95e2e | 322 | } else { |
323 | Uart.bitCount++; | |
324 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
325 | Uart.state = STATE_MILLER_Z; | |
326 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6; | |
327 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
328 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
329 | Uart.parityBits <<= 1; // make room for the parity bit | |
330 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
331 | Uart.bitCount = 0; | |
332 | Uart.shiftReg = 0; | |
6a1f2d82 | 333 | if((Uart.len&0x0007) == 0) { // every 8 data bytes |
334 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
335 | Uart.parityBits = 0; | |
336 | } | |
15c4dc5a | 337 | } |
7bc95e2e | 338 | } |
d7aa3739 | 339 | } |
340 | } else { | |
0ec548dc | 341 | if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1" |
7bc95e2e | 342 | Uart.bitCount++; |
343 | Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg | |
344 | Uart.state = STATE_MILLER_X; | |
345 | Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2; | |
346 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
347 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
348 | Uart.parityBits <<= 1; // make room for the new parity bit | |
349 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
350 | Uart.bitCount = 0; | |
351 | Uart.shiftReg = 0; | |
6a1f2d82 | 352 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
353 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
354 | Uart.parityBits = 0; | |
355 | } | |
7bc95e2e | 356 | } |
d7aa3739 | 357 | } else { // no modulation in both halves - Sequence Y |
7bc95e2e | 358 | if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication |
15c4dc5a | 359 | Uart.state = STATE_UNSYNCD; |
6a1f2d82 | 360 | Uart.bitCount--; // last "0" was part of EOC sequence |
361 | Uart.shiftReg <<= 1; // drop it | |
362 | if(Uart.bitCount > 0) { // if we decoded some bits | |
363 | Uart.shiftReg >>= (9 - Uart.bitCount); // right align them | |
364 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output | |
365 | Uart.parityBits <<= 1; // add a (void) parity bit | |
366 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits | |
367 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it | |
368 | return TRUE; | |
369 | } else if (Uart.len & 0x0007) { // there are some parity bits to store | |
370 | Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits | |
371 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them | |
52bfb955 | 372 | } |
373 | if (Uart.len) { | |
6a1f2d82 | 374 | return TRUE; // we are finished with decoding the raw data sequence |
52bfb955 | 375 | } else { |
0c8d25eb | 376 | UartReset(); // Nothing received - start over |
7bc95e2e | 377 | } |
15c4dc5a | 378 | } |
7bc95e2e | 379 | if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC |
380 | UartReset(); | |
7bc95e2e | 381 | } else { // a logic "0" |
382 | Uart.bitCount++; | |
383 | Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg | |
384 | Uart.state = STATE_MILLER_Y; | |
385 | if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity) | |
386 | Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); | |
387 | Uart.parityBits <<= 1; // make room for the parity bit | |
388 | Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit | |
389 | Uart.bitCount = 0; | |
390 | Uart.shiftReg = 0; | |
6a1f2d82 | 391 | if ((Uart.len&0x0007) == 0) { // every 8 data bytes |
392 | Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits | |
393 | Uart.parityBits = 0; | |
394 | } | |
15c4dc5a | 395 | } |
396 | } | |
d7aa3739 | 397 | } |
15c4dc5a | 398 | } |
7bc95e2e | 399 | |
400 | } | |
15c4dc5a | 401 | |
7bc95e2e | 402 | return FALSE; // not finished yet, need more data |
15c4dc5a | 403 | } |
404 | ||
7bc95e2e | 405 | |
406 | ||
15c4dc5a | 407 | //============================================================================= |
e691fc45 | 408 | // ISO 14443 Type A - Manchester decoder |
15c4dc5a | 409 | //============================================================================= |
e691fc45 | 410 | // Basics: |
7bc95e2e | 411 | // This decoder is used when the PM3 acts as a reader. |
e691fc45 | 412 | // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage |
413 | // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following: | |
414 | // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ....... | |
415 | // The Manchester decoder needs to identify the following sequences: | |
416 | // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication") | |
417 | // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0 | |
418 | // 8 ticks unmodulated: Sequence F = end of communication | |
419 | // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D | |
7bc95e2e | 420 | // Note 1: the bitstream may start at any time. We therefore need to sync. |
e691fc45 | 421 | // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only) |
b62a5a84 | 422 | static tDemod Demod; |
15c4dc5a | 423 | |
d7aa3739 | 424 | // Lookup-Table to decide if 4 raw bits are a modulation. |
d714d3ef | 425 | // We accept three or four "1" in any position |
7bc95e2e | 426 | const bool Mod_Manchester_LUT[] = { |
d7aa3739 | 427 | FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE, |
d714d3ef | 428 | FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE |
7bc95e2e | 429 | }; |
430 | ||
431 | #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4]) | |
432 | #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)]) | |
15c4dc5a | 433 | |
2f2d9fc5 | 434 | |
7bc95e2e | 435 | void DemodReset() |
e691fc45 | 436 | { |
7bc95e2e | 437 | Demod.state = DEMOD_UNSYNCD; |
438 | Demod.len = 0; // number of decoded data bytes | |
6a1f2d82 | 439 | Demod.parityLen = 0; |
7bc95e2e | 440 | Demod.shiftReg = 0; // shiftreg to hold decoded data bits |
441 | Demod.parityBits = 0; // | |
442 | Demod.collisionPos = 0; // Position of collision bit | |
443 | Demod.twoBits = 0xffff; // buffer for 2 Bits | |
444 | Demod.highCnt = 0; | |
445 | Demod.startTime = 0; | |
446 | Demod.endTime = 0; | |
46c65fed | 447 | |
448 | // | |
449 | Demod.bitCount = 0; | |
450 | Demod.syncBit = 0xFFFF; | |
451 | Demod.samples = 0; | |
e691fc45 | 452 | } |
15c4dc5a | 453 | |
6a1f2d82 | 454 | void DemodInit(uint8_t *data, uint8_t *parity) |
455 | { | |
456 | Demod.output = data; | |
457 | Demod.parity = parity; | |
458 | DemodReset(); | |
459 | } | |
460 | ||
7bc95e2e | 461 | // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time |
462 | static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time) | |
e691fc45 | 463 | { |
7bc95e2e | 464 | |
465 | Demod.twoBits = (Demod.twoBits << 8) | bit; | |
e691fc45 | 466 | |
7bc95e2e | 467 | if (Demod.state == DEMOD_UNSYNCD) { |
468 | ||
469 | if (Demod.highCnt < 2) { // wait for a stable unmodulated signal | |
470 | if (Demod.twoBits == 0x0000) { | |
471 | Demod.highCnt++; | |
472 | } else { | |
473 | Demod.highCnt = 0; | |
474 | } | |
475 | } else { | |
476 | Demod.syncBit = 0xFFFF; // not set | |
477 | if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7; | |
478 | else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6; | |
479 | else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5; | |
480 | else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4; | |
481 | else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3; | |
482 | else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2; | |
483 | else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1; | |
484 | else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0; | |
d7aa3739 | 485 | if (Demod.syncBit != 0xFFFF) { |
7bc95e2e | 486 | Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8); |
487 | Demod.startTime -= Demod.syncBit; | |
488 | Demod.bitCount = offset; // number of decoded data bits | |
e691fc45 | 489 | Demod.state = DEMOD_MANCHESTER_DATA; |
2f2d9fc5 | 490 | } |
7bc95e2e | 491 | } |
15c4dc5a | 492 | |
7bc95e2e | 493 | } else { |
15c4dc5a | 494 | |
7bc95e2e | 495 | if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half |
496 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision | |
e691fc45 | 497 | if (!Demod.collisionPos) { |
498 | Demod.collisionPos = (Demod.len << 3) + Demod.bitCount; | |
499 | } | |
500 | } // modulation in first half only - Sequence D = 1 | |
7bc95e2e | 501 | Demod.bitCount++; |
502 | Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg | |
503 | if(Demod.bitCount == 9) { // if we decoded a full byte (including parity) | |
e691fc45 | 504 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 505 | Demod.parityBits <<= 1; // make room for the parity bit |
e691fc45 | 506 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
507 | Demod.bitCount = 0; | |
508 | Demod.shiftReg = 0; | |
6a1f2d82 | 509 | if((Demod.len&0x0007) == 0) { // every 8 data bytes |
510 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits | |
511 | Demod.parityBits = 0; | |
512 | } | |
15c4dc5a | 513 | } |
7bc95e2e | 514 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4; |
515 | } else { // no modulation in first half | |
516 | if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0 | |
e691fc45 | 517 | Demod.bitCount++; |
7bc95e2e | 518 | Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg |
e691fc45 | 519 | if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity) |
e691fc45 | 520 | Demod.output[Demod.len++] = (Demod.shiftReg & 0xff); |
7bc95e2e | 521 | Demod.parityBits <<= 1; // make room for the new parity bit |
e691fc45 | 522 | Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit |
523 | Demod.bitCount = 0; | |
524 | Demod.shiftReg = 0; | |
6a1f2d82 | 525 | if ((Demod.len&0x0007) == 0) { // every 8 data bytes |
526 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1 | |
527 | Demod.parityBits = 0; | |
528 | } | |
15c4dc5a | 529 | } |
7bc95e2e | 530 | Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1); |
e691fc45 | 531 | } else { // no modulation in both halves - End of communication |
6a1f2d82 | 532 | if(Demod.bitCount > 0) { // there are some remaining data bits |
533 | Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits | |
534 | Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output | |
535 | Demod.parityBits <<= 1; // add a (void) parity bit | |
536 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
537 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
538 | return TRUE; | |
539 | } else if (Demod.len & 0x0007) { // there are some parity bits to store | |
540 | Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits | |
541 | Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them | |
52bfb955 | 542 | } |
543 | if (Demod.len) { | |
d7aa3739 | 544 | return TRUE; // we are finished with decoding the raw data sequence |
545 | } else { // nothing received. Start over | |
546 | DemodReset(); | |
e691fc45 | 547 | } |
15c4dc5a | 548 | } |
7bc95e2e | 549 | } |
e691fc45 | 550 | } |
e691fc45 | 551 | return FALSE; // not finished yet, need more data |
15c4dc5a | 552 | } |
553 | ||
554 | //============================================================================= | |
555 | // Finally, a `sniffer' for ISO 14443 Type A | |
556 | // Both sides of communication! | |
557 | //============================================================================= | |
558 | ||
559 | //----------------------------------------------------------------------------- | |
560 | // Record the sequence of commands sent by the reader to the tag, with | |
561 | // triggering so that we start recording at the point that the tag is moved | |
562 | // near the reader. | |
563 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
564 | void RAMFUNC SnoopIso14443a(uint8_t param) { |
565 | // param: | |
566 | // bit 0 - trigger from first card answer | |
567 | // bit 1 - trigger from first reader 7-bit request | |
568 | ||
569 | LEDsoff(); | |
5cd9ec01 M |
570 | |
571 | // We won't start recording the frames that we acquire until we trigger; | |
572 | // a good trigger condition to get started is probably when we see a | |
573 | // response from the tag. | |
574 | // triggered == FALSE -- to wait first for card | |
7bc95e2e | 575 | bool triggered = !(param & 0x03); |
576 | ||
f71f4deb | 577 | // Allocate memory from BigBuf for some buffers |
578 | // free all previous allocations first | |
579 | BigBuf_free(); | |
580 | ||
5cd9ec01 | 581 | // The command (reader -> tag) that we're receiving. |
f71f4deb | 582 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); |
583 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
6a1f2d82 | 584 | |
5cd9ec01 | 585 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 586 | uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE); |
587 | uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE); | |
5cd9ec01 M |
588 | |
589 | // The DMA buffer, used to stream samples from the FPGA | |
f71f4deb | 590 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); |
591 | ||
592 | // init trace buffer | |
3000dc4e MHS |
593 | clear_trace(); |
594 | set_tracing(TRUE); | |
f71f4deb | 595 | |
7bc95e2e | 596 | uint8_t *data = dmaBuf; |
597 | uint8_t previous_data = 0; | |
5cd9ec01 M |
598 | int maxDataLen = 0; |
599 | int dataLen = 0; | |
7bc95e2e | 600 | bool TagIsActive = FALSE; |
601 | bool ReaderIsActive = FALSE; | |
602 | ||
603 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
15c4dc5a | 604 | |
5cd9ec01 | 605 | // Set up the demodulator for tag -> reader responses. |
6a1f2d82 | 606 | DemodInit(receivedResponse, receivedResponsePar); |
607 | ||
5cd9ec01 | 608 | // Set up the demodulator for the reader -> tag commands |
6a1f2d82 | 609 | UartInit(receivedCmd, receivedCmdPar); |
610 | ||
7bc95e2e | 611 | // Setup and start DMA. |
5cd9ec01 | 612 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); |
7bc95e2e | 613 | |
5cd9ec01 | 614 | // And now we loop, receiving samples. |
7bc95e2e | 615 | for(uint32_t rsamples = 0; TRUE; ) { |
616 | ||
5cd9ec01 M |
617 | if(BUTTON_PRESS()) { |
618 | DbpString("cancelled by button"); | |
7bc95e2e | 619 | break; |
5cd9ec01 | 620 | } |
15c4dc5a | 621 | |
5cd9ec01 M |
622 | LED_A_ON(); |
623 | WDT_HIT(); | |
15c4dc5a | 624 | |
5cd9ec01 M |
625 | int register readBufDataP = data - dmaBuf; |
626 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; | |
627 | if (readBufDataP <= dmaBufDataP){ | |
628 | dataLen = dmaBufDataP - readBufDataP; | |
629 | } else { | |
7bc95e2e | 630 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; |
5cd9ec01 M |
631 | } |
632 | // test for length of buffer | |
633 | if(dataLen > maxDataLen) { | |
634 | maxDataLen = dataLen; | |
f71f4deb | 635 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
7bc95e2e | 636 | Dbprintf("blew circular buffer! dataLen=%d", dataLen); |
637 | break; | |
5cd9ec01 M |
638 | } |
639 | } | |
640 | if(dataLen < 1) continue; | |
641 | ||
642 | // primary buffer was stopped( <-- we lost data! | |
643 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { | |
644 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
645 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
7bc95e2e | 646 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
647 | } |
648 | // secondary buffer sets as primary, secondary buffer was stopped | |
649 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
650 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
651 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; | |
652 | } | |
653 | ||
654 | LED_A_OFF(); | |
7bc95e2e | 655 | |
656 | if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder | |
3be2a5ae | 657 | |
7bc95e2e | 658 | if(!TagIsActive) { // no need to try decoding reader data if the tag is sending |
659 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
660 | if (MillerDecoding(readerdata, (rsamples-1)*4)) { | |
661 | LED_C_ON(); | |
5cd9ec01 | 662 | |
7bc95e2e | 663 | // check - if there is a short 7bit request from reader |
664 | if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE; | |
5cd9ec01 | 665 | |
7bc95e2e | 666 | if(triggered) { |
6a1f2d82 | 667 | if (!LogTrace(receivedCmd, |
668 | Uart.len, | |
669 | Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
670 | Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER, | |
671 | Uart.parity, | |
672 | TRUE)) break; | |
7bc95e2e | 673 | } |
674 | /* And ready to receive another command. */ | |
675 | UartReset(); | |
676 | /* And also reset the demod code, which might have been */ | |
677 | /* false-triggered by the commands from the reader. */ | |
678 | DemodReset(); | |
679 | LED_B_OFF(); | |
680 | } | |
681 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
5cd9ec01 | 682 | } |
3be2a5ae | 683 | |
7bc95e2e | 684 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time |
685 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
686 | if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) { | |
687 | LED_B_ON(); | |
5cd9ec01 | 688 | |
6a1f2d82 | 689 | if (!LogTrace(receivedResponse, |
690 | Demod.len, | |
691 | Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
692 | Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER, | |
693 | Demod.parity, | |
694 | FALSE)) break; | |
5cd9ec01 | 695 | |
7bc95e2e | 696 | if ((!triggered) && (param & 0x01)) triggered = TRUE; |
5cd9ec01 | 697 | |
7bc95e2e | 698 | // And ready to receive another response. |
699 | DemodReset(); | |
0ec548dc | 700 | // And reset the Miller decoder including itS (now outdated) input buffer |
701 | UartInit(receivedCmd, receivedCmdPar); | |
702 | ||
7bc95e2e | 703 | LED_C_OFF(); |
704 | } | |
705 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
706 | } | |
5cd9ec01 M |
707 | } |
708 | ||
7bc95e2e | 709 | previous_data = *data; |
710 | rsamples++; | |
5cd9ec01 | 711 | data++; |
d714d3ef | 712 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 M |
713 | data = dmaBuf; |
714 | } | |
715 | } // main cycle | |
716 | ||
717 | DbpString("COMMAND FINISHED"); | |
15c4dc5a | 718 | |
7bc95e2e | 719 | FpgaDisableSscDma(); |
720 | Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len); | |
3000dc4e | 721 | Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]); |
5cd9ec01 | 722 | LEDsoff(); |
15c4dc5a | 723 | } |
724 | ||
15c4dc5a | 725 | //----------------------------------------------------------------------------- |
726 | // Prepare tag messages | |
727 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 728 | static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity) |
15c4dc5a | 729 | { |
8f51ddb0 | 730 | ToSendReset(); |
15c4dc5a | 731 | |
732 | // Correction bit, might be removed when not needed | |
733 | ToSendStuffBit(0); | |
734 | ToSendStuffBit(0); | |
735 | ToSendStuffBit(0); | |
736 | ToSendStuffBit(0); | |
737 | ToSendStuffBit(1); // 1 | |
738 | ToSendStuffBit(0); | |
739 | ToSendStuffBit(0); | |
740 | ToSendStuffBit(0); | |
8f51ddb0 | 741 | |
15c4dc5a | 742 | // Send startbit |
72934aa3 | 743 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 744 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 745 | |
6a1f2d82 | 746 | for(uint16_t i = 0; i < len; i++) { |
8f51ddb0 | 747 | uint8_t b = cmd[i]; |
15c4dc5a | 748 | |
749 | // Data bits | |
6a1f2d82 | 750 | for(uint16_t j = 0; j < 8; j++) { |
15c4dc5a | 751 | if(b & 1) { |
72934aa3 | 752 | ToSend[++ToSendMax] = SEC_D; |
15c4dc5a | 753 | } else { |
72934aa3 | 754 | ToSend[++ToSendMax] = SEC_E; |
8f51ddb0 M |
755 | } |
756 | b >>= 1; | |
757 | } | |
15c4dc5a | 758 | |
0014cb46 | 759 | // Get the parity bit |
6a1f2d82 | 760 | if (parity[i>>3] & (0x80>>(i&0x0007))) { |
8f51ddb0 | 761 | ToSend[++ToSendMax] = SEC_D; |
7bc95e2e | 762 | LastProxToAirDuration = 8 * ToSendMax - 4; |
15c4dc5a | 763 | } else { |
72934aa3 | 764 | ToSend[++ToSendMax] = SEC_E; |
7bc95e2e | 765 | LastProxToAirDuration = 8 * ToSendMax; |
15c4dc5a | 766 | } |
8f51ddb0 | 767 | } |
15c4dc5a | 768 | |
8f51ddb0 M |
769 | // Send stopbit |
770 | ToSend[++ToSendMax] = SEC_F; | |
15c4dc5a | 771 | |
8f51ddb0 M |
772 | // Convert from last byte pos to length |
773 | ToSendMax++; | |
8f51ddb0 M |
774 | } |
775 | ||
6a1f2d82 | 776 | static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len) |
777 | { | |
778 | uint8_t par[MAX_PARITY_SIZE]; | |
779 | ||
780 | GetParity(cmd, len, par); | |
781 | CodeIso14443aAsTagPar(cmd, len, par); | |
15c4dc5a | 782 | } |
783 | ||
15c4dc5a | 784 | |
8f51ddb0 M |
785 | static void Code4bitAnswerAsTag(uint8_t cmd) |
786 | { | |
787 | int i; | |
788 | ||
5f6d6c90 | 789 | ToSendReset(); |
8f51ddb0 M |
790 | |
791 | // Correction bit, might be removed when not needed | |
792 | ToSendStuffBit(0); | |
793 | ToSendStuffBit(0); | |
794 | ToSendStuffBit(0); | |
795 | ToSendStuffBit(0); | |
796 | ToSendStuffBit(1); // 1 | |
797 | ToSendStuffBit(0); | |
798 | ToSendStuffBit(0); | |
799 | ToSendStuffBit(0); | |
800 | ||
801 | // Send startbit | |
802 | ToSend[++ToSendMax] = SEC_D; | |
803 | ||
804 | uint8_t b = cmd; | |
805 | for(i = 0; i < 4; i++) { | |
806 | if(b & 1) { | |
807 | ToSend[++ToSendMax] = SEC_D; | |
7bc95e2e | 808 | LastProxToAirDuration = 8 * ToSendMax - 4; |
8f51ddb0 M |
809 | } else { |
810 | ToSend[++ToSendMax] = SEC_E; | |
7bc95e2e | 811 | LastProxToAirDuration = 8 * ToSendMax; |
8f51ddb0 M |
812 | } |
813 | b >>= 1; | |
814 | } | |
815 | ||
816 | // Send stopbit | |
817 | ToSend[++ToSendMax] = SEC_F; | |
818 | ||
5f6d6c90 | 819 | // Convert from last byte pos to length |
820 | ToSendMax++; | |
15c4dc5a | 821 | } |
822 | ||
823 | //----------------------------------------------------------------------------- | |
824 | // Wait for commands from reader | |
825 | // Stop when button is pressed | |
826 | // Or return TRUE when command is captured | |
827 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 828 | static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len) |
15c4dc5a | 829 | { |
830 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
831 | // only, since we are receiving, not transmitting). | |
832 | // Signal field is off with the appropriate LED | |
833 | LED_D_OFF(); | |
834 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
835 | ||
836 | // Now run a `software UART' on the stream of incoming samples. | |
6a1f2d82 | 837 | UartInit(received, parity); |
7bc95e2e | 838 | |
839 | // clear RXRDY: | |
840 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
15c4dc5a | 841 | |
842 | for(;;) { | |
843 | WDT_HIT(); | |
844 | ||
845 | if(BUTTON_PRESS()) return FALSE; | |
7bc95e2e | 846 | |
15c4dc5a | 847 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
7bc95e2e | 848 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
849 | if(MillerDecoding(b, 0)) { | |
850 | *len = Uart.len; | |
15c4dc5a | 851 | return TRUE; |
852 | } | |
7bc95e2e | 853 | } |
15c4dc5a | 854 | } |
855 | } | |
28afbd2b | 856 | |
6a1f2d82 | 857 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded); |
7bc95e2e | 858 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded); |
28afbd2b | 859 | int EmSend4bit(uint8_t resp); |
6a1f2d82 | 860 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par); |
861 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded); | |
862 | int EmSendCmd(uint8_t *resp, uint16_t respLen); | |
863 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par); | |
864 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, | |
865 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity); | |
15c4dc5a | 866 | |
117d9ec2 | 867 | static uint8_t* free_buffer_pointer; |
ce02f6f9 | 868 | |
869 | typedef struct { | |
870 | uint8_t* response; | |
871 | size_t response_n; | |
872 | uint8_t* modulation; | |
873 | size_t modulation_n; | |
7bc95e2e | 874 | uint32_t ProxToAirDuration; |
ce02f6f9 | 875 | } tag_response_info_t; |
876 | ||
ce02f6f9 | 877 | bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) { |
7bc95e2e | 878 | // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes |
ce02f6f9 | 879 | // This will need the following byte array for a modulation sequence |
880 | // 144 data bits (18 * 8) | |
881 | // 18 parity bits | |
882 | // 2 Start and stop | |
883 | // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA) | |
884 | // 1 just for the case | |
885 | // ----------- + | |
886 | // 166 bytes, since every bit that needs to be send costs us a byte | |
887 | // | |
f71f4deb | 888 | |
889 | ||
ce02f6f9 | 890 | // Prepare the tag modulation bits from the message |
891 | CodeIso14443aAsTag(response_info->response,response_info->response_n); | |
892 | ||
893 | // Make sure we do not exceed the free buffer space | |
894 | if (ToSendMax > max_buffer_size) { | |
895 | Dbprintf("Out of memory, when modulating bits for tag answer:"); | |
896 | Dbhexdump(response_info->response_n,response_info->response,false); | |
897 | return false; | |
898 | } | |
899 | ||
900 | // Copy the byte array, used for this modulation to the buffer position | |
901 | memcpy(response_info->modulation,ToSend,ToSendMax); | |
902 | ||
7bc95e2e | 903 | // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them |
ce02f6f9 | 904 | response_info->modulation_n = ToSendMax; |
7bc95e2e | 905 | response_info->ProxToAirDuration = LastProxToAirDuration; |
ce02f6f9 | 906 | |
907 | return true; | |
908 | } | |
909 | ||
f71f4deb | 910 | |
911 | // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit. | |
912 | // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction) | |
913 | // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits | |
914 | // -> need 273 bytes buffer | |
915 | #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273 | |
916 | ||
ce02f6f9 | 917 | bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) { |
918 | // Retrieve and store the current buffer index | |
919 | response_info->modulation = free_buffer_pointer; | |
920 | ||
921 | // Determine the maximum size we can use from our buffer | |
f71f4deb | 922 | size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE; |
ce02f6f9 | 923 | |
924 | // Forward the prepare tag modulation function to the inner function | |
f71f4deb | 925 | if (prepare_tag_modulation(response_info, max_buffer_size)) { |
ce02f6f9 | 926 | // Update the free buffer offset |
927 | free_buffer_pointer += ToSendMax; | |
928 | return true; | |
929 | } else { | |
930 | return false; | |
931 | } | |
932 | } | |
933 | ||
15c4dc5a | 934 | //----------------------------------------------------------------------------- |
935 | // Main loop of simulated tag: receive commands from reader, decide what | |
936 | // response to send, and send it. | |
937 | //----------------------------------------------------------------------------- | |
28afbd2b | 938 | void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data) |
15c4dc5a | 939 | { |
81cd0474 | 940 | uint8_t sak; |
941 | ||
942 | // The first response contains the ATQA (note: bytes are transmitted in reverse order). | |
943 | uint8_t response1[2]; | |
944 | ||
945 | switch (tagType) { | |
946 | case 1: { // MIFARE Classic | |
947 | // Says: I am Mifare 1k - original line | |
948 | response1[0] = 0x04; | |
949 | response1[1] = 0x00; | |
950 | sak = 0x08; | |
951 | } break; | |
952 | case 2: { // MIFARE Ultralight | |
953 | // Says: I am a stupid memory tag, no crypto | |
954 | response1[0] = 0x04; | |
955 | response1[1] = 0x00; | |
956 | sak = 0x00; | |
957 | } break; | |
958 | case 3: { // MIFARE DESFire | |
959 | // Says: I am a DESFire tag, ph33r me | |
960 | response1[0] = 0x04; | |
961 | response1[1] = 0x03; | |
962 | sak = 0x20; | |
963 | } break; | |
964 | case 4: { // ISO/IEC 14443-4 | |
965 | // Says: I am a javacard (JCOP) | |
966 | response1[0] = 0x04; | |
967 | response1[1] = 0x00; | |
968 | sak = 0x28; | |
969 | } break; | |
3fe4ff4f | 970 | case 5: { // MIFARE TNP3XXX |
971 | // Says: I am a toy | |
972 | response1[0] = 0x01; | |
973 | response1[1] = 0x0f; | |
974 | sak = 0x01; | |
975 | } break; | |
81cd0474 | 976 | default: { |
977 | Dbprintf("Error: unkown tagtype (%d)",tagType); | |
978 | return; | |
979 | } break; | |
980 | } | |
981 | ||
982 | // The second response contains the (mandatory) first 24 bits of the UID | |
c8b6da22 | 983 | uint8_t response2[5] = {0x00}; |
81cd0474 | 984 | |
985 | // Check if the uid uses the (optional) part | |
c8b6da22 | 986 | uint8_t response2a[5] = {0x00}; |
987 | ||
81cd0474 | 988 | if (uid_2nd) { |
989 | response2[0] = 0x88; | |
990 | num_to_bytes(uid_1st,3,response2+1); | |
991 | num_to_bytes(uid_2nd,4,response2a); | |
992 | response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3]; | |
993 | ||
994 | // Configure the ATQA and SAK accordingly | |
995 | response1[0] |= 0x40; | |
996 | sak |= 0x04; | |
997 | } else { | |
998 | num_to_bytes(uid_1st,4,response2); | |
999 | // Configure the ATQA and SAK accordingly | |
1000 | response1[0] &= 0xBF; | |
1001 | sak &= 0xFB; | |
1002 | } | |
1003 | ||
1004 | // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID. | |
1005 | response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3]; | |
1006 | ||
1007 | // Prepare the mandatory SAK (for 4 and 7 byte UID) | |
c8b6da22 | 1008 | uint8_t response3[3] = {0x00}; |
81cd0474 | 1009 | response3[0] = sak; |
1010 | ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]); | |
1011 | ||
1012 | // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit | |
c8b6da22 | 1013 | uint8_t response3a[3] = {0x00}; |
81cd0474 | 1014 | response3a[0] = sak & 0xFB; |
1015 | ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]); | |
1016 | ||
254b70a4 | 1017 | uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce |
6a1f2d82 | 1018 | uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS: |
1019 | // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present, | |
1020 | // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1 | |
1021 | // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us) | |
1022 | // TC(1) = 0x02: CID supported, NAD not supported | |
ce02f6f9 | 1023 | ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]); |
1024 | ||
7bc95e2e | 1025 | #define TAG_RESPONSE_COUNT 7 |
1026 | tag_response_info_t responses[TAG_RESPONSE_COUNT] = { | |
1027 | { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type | |
1028 | { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid | |
1029 | { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked | |
1030 | { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1 | |
1031 | { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2 | |
1032 | { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce) | |
1033 | { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS | |
1034 | }; | |
1035 | ||
1036 | // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it | |
1037 | // Such a response is less time critical, so we can prepare them on the fly | |
1038 | #define DYNAMIC_RESPONSE_BUFFER_SIZE 64 | |
1039 | #define DYNAMIC_MODULATION_BUFFER_SIZE 512 | |
1040 | uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE]; | |
1041 | uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE]; | |
1042 | tag_response_info_t dynamic_response_info = { | |
1043 | .response = dynamic_response_buffer, | |
1044 | .response_n = 0, | |
1045 | .modulation = dynamic_modulation_buffer, | |
1046 | .modulation_n = 0 | |
1047 | }; | |
ce02f6f9 | 1048 | |
f71f4deb | 1049 | BigBuf_free_keep_EM(); |
1050 | ||
1051 | // allocate buffers: | |
1052 | uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE); | |
1053 | uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE); | |
1054 | free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE); | |
1055 | ||
1056 | // clear trace | |
3000dc4e MHS |
1057 | clear_trace(); |
1058 | set_tracing(TRUE); | |
f71f4deb | 1059 | |
7bc95e2e | 1060 | // Prepare the responses of the anticollision phase |
ce02f6f9 | 1061 | // there will be not enough time to do this at the moment the reader sends it REQA |
7bc95e2e | 1062 | for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) { |
1063 | prepare_allocated_tag_modulation(&responses[i]); | |
1064 | } | |
15c4dc5a | 1065 | |
7bc95e2e | 1066 | int len = 0; |
15c4dc5a | 1067 | |
1068 | // To control where we are in the protocol | |
1069 | int order = 0; | |
1070 | int lastorder; | |
1071 | ||
1072 | // Just to allow some checks | |
1073 | int happened = 0; | |
1074 | int happened2 = 0; | |
81cd0474 | 1075 | int cmdsRecvd = 0; |
15c4dc5a | 1076 | |
254b70a4 | 1077 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 1078 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
15c4dc5a | 1079 | |
254b70a4 | 1080 | cmdsRecvd = 0; |
7bc95e2e | 1081 | tag_response_info_t* p_response; |
15c4dc5a | 1082 | |
254b70a4 | 1083 | LED_A_ON(); |
1084 | for(;;) { | |
7bc95e2e | 1085 | // Clean receive command buffer |
1086 | ||
6a1f2d82 | 1087 | if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) { |
ce02f6f9 | 1088 | DbpString("Button press"); |
254b70a4 | 1089 | break; |
1090 | } | |
7bc95e2e | 1091 | |
1092 | p_response = NULL; | |
1093 | ||
254b70a4 | 1094 | // Okay, look at the command now. |
1095 | lastorder = order; | |
1096 | if(receivedCmd[0] == 0x26) { // Received a REQUEST | |
ce02f6f9 | 1097 | p_response = &responses[0]; order = 1; |
254b70a4 | 1098 | } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP |
ce02f6f9 | 1099 | p_response = &responses[0]; order = 6; |
254b70a4 | 1100 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1) |
ce02f6f9 | 1101 | p_response = &responses[1]; order = 2; |
6a1f2d82 | 1102 | } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2) |
ce02f6f9 | 1103 | p_response = &responses[2]; order = 20; |
254b70a4 | 1104 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1) |
ce02f6f9 | 1105 | p_response = &responses[3]; order = 3; |
254b70a4 | 1106 | } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2) |
ce02f6f9 | 1107 | p_response = &responses[4]; order = 30; |
254b70a4 | 1108 | } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ |
6a1f2d82 | 1109 | EmSendCmdEx(data+(4*receivedCmd[1]),16,false); |
7bc95e2e | 1110 | // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]); |
5f6d6c90 | 1111 | // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below |
7bc95e2e | 1112 | p_response = NULL; |
254b70a4 | 1113 | } else if(receivedCmd[0] == 0x50) { // Received a HALT |
3fe4ff4f | 1114 | |
7bc95e2e | 1115 | if (tracing) { |
6a1f2d82 | 1116 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1117 | } |
1118 | p_response = NULL; | |
254b70a4 | 1119 | } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request |
ce02f6f9 | 1120 | p_response = &responses[5]; order = 7; |
254b70a4 | 1121 | } else if(receivedCmd[0] == 0xE0) { // Received a RATS request |
7bc95e2e | 1122 | if (tagType == 1 || tagType == 2) { // RATS not supported |
1123 | EmSend4bit(CARD_NACK_NA); | |
1124 | p_response = NULL; | |
1125 | } else { | |
1126 | p_response = &responses[6]; order = 70; | |
1127 | } | |
6a1f2d82 | 1128 | } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication) |
7bc95e2e | 1129 | if (tracing) { |
6a1f2d82 | 1130 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1131 | } |
1132 | uint32_t nr = bytes_to_num(receivedCmd,4); | |
1133 | uint32_t ar = bytes_to_num(receivedCmd+4,4); | |
1134 | Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar); | |
1135 | } else { | |
1136 | // Check for ISO 14443A-4 compliant commands, look at left nibble | |
1137 | switch (receivedCmd[0]) { | |
1138 | ||
1139 | case 0x0B: | |
1140 | case 0x0A: { // IBlock (command) | |
1141 | dynamic_response_info.response[0] = receivedCmd[0]; | |
1142 | dynamic_response_info.response[1] = 0x00; | |
1143 | dynamic_response_info.response[2] = 0x90; | |
1144 | dynamic_response_info.response[3] = 0x00; | |
1145 | dynamic_response_info.response_n = 4; | |
1146 | } break; | |
1147 | ||
1148 | case 0x1A: | |
1149 | case 0x1B: { // Chaining command | |
1150 | dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1); | |
1151 | dynamic_response_info.response_n = 2; | |
1152 | } break; | |
1153 | ||
1154 | case 0xaa: | |
1155 | case 0xbb: { | |
1156 | dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11; | |
1157 | dynamic_response_info.response_n = 2; | |
1158 | } break; | |
1159 | ||
1160 | case 0xBA: { // | |
1161 | memcpy(dynamic_response_info.response,"\xAB\x00",2); | |
1162 | dynamic_response_info.response_n = 2; | |
1163 | } break; | |
1164 | ||
1165 | case 0xCA: | |
1166 | case 0xC2: { // Readers sends deselect command | |
1167 | memcpy(dynamic_response_info.response,"\xCA\x00",2); | |
1168 | dynamic_response_info.response_n = 2; | |
1169 | } break; | |
1170 | ||
1171 | default: { | |
1172 | // Never seen this command before | |
1173 | if (tracing) { | |
6a1f2d82 | 1174 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1175 | } |
1176 | Dbprintf("Received unknown command (len=%d):",len); | |
1177 | Dbhexdump(len,receivedCmd,false); | |
1178 | // Do not respond | |
1179 | dynamic_response_info.response_n = 0; | |
1180 | } break; | |
1181 | } | |
ce02f6f9 | 1182 | |
7bc95e2e | 1183 | if (dynamic_response_info.response_n > 0) { |
1184 | // Copy the CID from the reader query | |
1185 | dynamic_response_info.response[1] = receivedCmd[1]; | |
ce02f6f9 | 1186 | |
7bc95e2e | 1187 | // Add CRC bytes, always used in ISO 14443A-4 compliant cards |
1188 | AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n); | |
1189 | dynamic_response_info.response_n += 2; | |
ce02f6f9 | 1190 | |
7bc95e2e | 1191 | if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) { |
1192 | Dbprintf("Error preparing tag response"); | |
1193 | if (tracing) { | |
6a1f2d82 | 1194 | LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 1195 | } |
1196 | break; | |
1197 | } | |
1198 | p_response = &dynamic_response_info; | |
1199 | } | |
81cd0474 | 1200 | } |
15c4dc5a | 1201 | |
1202 | // Count number of wakeups received after a halt | |
1203 | if(order == 6 && lastorder == 5) { happened++; } | |
1204 | ||
1205 | // Count number of other messages after a halt | |
1206 | if(order != 6 && lastorder == 5) { happened2++; } | |
1207 | ||
15c4dc5a | 1208 | if(cmdsRecvd > 999) { |
1209 | DbpString("1000 commands later..."); | |
254b70a4 | 1210 | break; |
15c4dc5a | 1211 | } |
ce02f6f9 | 1212 | cmdsRecvd++; |
1213 | ||
1214 | if (p_response != NULL) { | |
7bc95e2e | 1215 | EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52); |
1216 | // do the tracing for the previous reader request and this tag answer: | |
6a1f2d82 | 1217 | uint8_t par[MAX_PARITY_SIZE]; |
1218 | GetParity(p_response->response, p_response->response_n, par); | |
3fe4ff4f | 1219 | |
7bc95e2e | 1220 | EmLogTrace(Uart.output, |
1221 | Uart.len, | |
1222 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1223 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1224 | Uart.parity, |
7bc95e2e | 1225 | p_response->response, |
1226 | p_response->response_n, | |
1227 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1228 | (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1229 | par); |
7bc95e2e | 1230 | } |
1231 | ||
1232 | if (!tracing) { | |
1233 | Dbprintf("Trace Full. Simulation stopped."); | |
1234 | break; | |
1235 | } | |
1236 | } | |
15c4dc5a | 1237 | |
1238 | Dbprintf("%x %x %x", happened, happened2, cmdsRecvd); | |
1239 | LED_A_OFF(); | |
f71f4deb | 1240 | BigBuf_free_keep_EM(); |
15c4dc5a | 1241 | } |
1242 | ||
9492e0b0 | 1243 | |
1244 | // prepare a delayed transfer. This simply shifts ToSend[] by a number | |
1245 | // of bits specified in the delay parameter. | |
1246 | void PrepareDelayedTransfer(uint16_t delay) | |
1247 | { | |
1248 | uint8_t bitmask = 0; | |
1249 | uint8_t bits_to_shift = 0; | |
1250 | uint8_t bits_shifted = 0; | |
1251 | ||
1252 | delay &= 0x07; | |
1253 | if (delay) { | |
1254 | for (uint16_t i = 0; i < delay; i++) { | |
1255 | bitmask |= (0x01 << i); | |
1256 | } | |
7bc95e2e | 1257 | ToSend[ToSendMax++] = 0x00; |
9492e0b0 | 1258 | for (uint16_t i = 0; i < ToSendMax; i++) { |
1259 | bits_to_shift = ToSend[i] & bitmask; | |
1260 | ToSend[i] = ToSend[i] >> delay; | |
1261 | ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay)); | |
1262 | bits_shifted = bits_to_shift; | |
1263 | } | |
1264 | } | |
1265 | } | |
1266 | ||
7bc95e2e | 1267 | |
1268 | //------------------------------------------------------------------------------------- | |
15c4dc5a | 1269 | // Transmit the command (to the tag) that was placed in ToSend[]. |
9492e0b0 | 1270 | // Parameter timing: |
7bc95e2e | 1271 | // if NULL: transfer at next possible time, taking into account |
1272 | // request guard time and frame delay time | |
1273 | // if == 0: transfer immediately and return time of transfer | |
9492e0b0 | 1274 | // if != 0: delay transfer until time specified |
7bc95e2e | 1275 | //------------------------------------------------------------------------------------- |
6a1f2d82 | 1276 | static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing) |
15c4dc5a | 1277 | { |
7bc95e2e | 1278 | |
9492e0b0 | 1279 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD); |
e30c654b | 1280 | |
7bc95e2e | 1281 | uint32_t ThisTransferTime = 0; |
e30c654b | 1282 | |
9492e0b0 | 1283 | if (timing) { |
1284 | if(*timing == 0) { // Measure time | |
7bc95e2e | 1285 | *timing = (GetCountSspClk() + 8) & 0xfffffff8; |
9492e0b0 | 1286 | } else { |
1287 | PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks) | |
1288 | } | |
7bc95e2e | 1289 | if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing"); |
1290 | while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks) | |
1291 | LastTimeProxToAirStart = *timing; | |
1292 | } else { | |
1293 | ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8); | |
1294 | while(GetCountSspClk() < ThisTransferTime); | |
1295 | LastTimeProxToAirStart = ThisTransferTime; | |
9492e0b0 | 1296 | } |
1297 | ||
7bc95e2e | 1298 | // clear TXRDY |
1299 | AT91C_BASE_SSC->SSC_THR = SEC_Y; | |
1300 | ||
7bc95e2e | 1301 | uint16_t c = 0; |
9492e0b0 | 1302 | for(;;) { |
1303 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { | |
1304 | AT91C_BASE_SSC->SSC_THR = cmd[c]; | |
1305 | c++; | |
1306 | if(c >= len) { | |
1307 | break; | |
1308 | } | |
1309 | } | |
1310 | } | |
7bc95e2e | 1311 | |
1312 | NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME); | |
15c4dc5a | 1313 | } |
1314 | ||
7bc95e2e | 1315 | |
15c4dc5a | 1316 | //----------------------------------------------------------------------------- |
195af472 | 1317 | // Prepare reader command (in bits, support short frames) to send to FPGA |
15c4dc5a | 1318 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1319 | void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity) |
15c4dc5a | 1320 | { |
7bc95e2e | 1321 | int i, j; |
1322 | int last; | |
1323 | uint8_t b; | |
e30c654b | 1324 | |
7bc95e2e | 1325 | ToSendReset(); |
e30c654b | 1326 | |
7bc95e2e | 1327 | // Start of Communication (Seq. Z) |
1328 | ToSend[++ToSendMax] = SEC_Z; | |
1329 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1330 | last = 0; | |
1331 | ||
1332 | size_t bytecount = nbytes(bits); | |
1333 | // Generate send structure for the data bits | |
1334 | for (i = 0; i < bytecount; i++) { | |
1335 | // Get the current byte to send | |
1336 | b = cmd[i]; | |
1337 | size_t bitsleft = MIN((bits-(i*8)),8); | |
1338 | ||
1339 | for (j = 0; j < bitsleft; j++) { | |
1340 | if (b & 1) { | |
1341 | // Sequence X | |
1342 | ToSend[++ToSendMax] = SEC_X; | |
1343 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1344 | last = 1; | |
1345 | } else { | |
1346 | if (last == 0) { | |
1347 | // Sequence Z | |
1348 | ToSend[++ToSendMax] = SEC_Z; | |
1349 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1350 | } else { | |
1351 | // Sequence Y | |
1352 | ToSend[++ToSendMax] = SEC_Y; | |
1353 | last = 0; | |
1354 | } | |
1355 | } | |
1356 | b >>= 1; | |
1357 | } | |
1358 | ||
6a1f2d82 | 1359 | // Only transmit parity bit if we transmitted a complete byte |
0ec548dc | 1360 | if (j == 8 && parity != NULL) { |
7bc95e2e | 1361 | // Get the parity bit |
6a1f2d82 | 1362 | if (parity[i>>3] & (0x80 >> (i&0x0007))) { |
7bc95e2e | 1363 | // Sequence X |
1364 | ToSend[++ToSendMax] = SEC_X; | |
1365 | LastProxToAirDuration = 8 * (ToSendMax+1) - 2; | |
1366 | last = 1; | |
1367 | } else { | |
1368 | if (last == 0) { | |
1369 | // Sequence Z | |
1370 | ToSend[++ToSendMax] = SEC_Z; | |
1371 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1372 | } else { | |
1373 | // Sequence Y | |
1374 | ToSend[++ToSendMax] = SEC_Y; | |
1375 | last = 0; | |
1376 | } | |
1377 | } | |
1378 | } | |
1379 | } | |
e30c654b | 1380 | |
7bc95e2e | 1381 | // End of Communication: Logic 0 followed by Sequence Y |
1382 | if (last == 0) { | |
1383 | // Sequence Z | |
1384 | ToSend[++ToSendMax] = SEC_Z; | |
1385 | LastProxToAirDuration = 8 * (ToSendMax+1) - 6; | |
1386 | } else { | |
1387 | // Sequence Y | |
1388 | ToSend[++ToSendMax] = SEC_Y; | |
1389 | last = 0; | |
1390 | } | |
1391 | ToSend[++ToSendMax] = SEC_Y; | |
e30c654b | 1392 | |
7bc95e2e | 1393 | // Convert to length of command: |
1394 | ToSendMax++; | |
15c4dc5a | 1395 | } |
1396 | ||
195af472 | 1397 | //----------------------------------------------------------------------------- |
1398 | // Prepare reader command to send to FPGA | |
1399 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1400 | void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity) |
195af472 | 1401 | { |
6a1f2d82 | 1402 | CodeIso14443aBitsAsReaderPar(cmd, len*8, parity); |
195af472 | 1403 | } |
1404 | ||
0c8d25eb | 1405 | |
9ca155ba M |
1406 | //----------------------------------------------------------------------------- |
1407 | // Wait for commands from reader | |
1408 | // Stop when button is pressed (return 1) or field was gone (return 2) | |
1409 | // Or return 0 when command is captured | |
1410 | //----------------------------------------------------------------------------- | |
6a1f2d82 | 1411 | static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity) |
9ca155ba M |
1412 | { |
1413 | *len = 0; | |
1414 | ||
1415 | uint32_t timer = 0, vtime = 0; | |
1416 | int analogCnt = 0; | |
1417 | int analogAVG = 0; | |
1418 | ||
1419 | // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen | |
1420 | // only, since we are receiving, not transmitting). | |
1421 | // Signal field is off with the appropriate LED | |
1422 | LED_D_OFF(); | |
1423 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN); | |
1424 | ||
1425 | // Set ADC to read field strength | |
1426 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST; | |
1427 | AT91C_BASE_ADC->ADC_MR = | |
0c8d25eb | 1428 | ADC_MODE_PRESCALE(63) | |
1429 | ADC_MODE_STARTUP_TIME(1) | | |
1430 | ADC_MODE_SAMPLE_HOLD_TIME(15); | |
9ca155ba M |
1431 | AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF); |
1432 | // start ADC | |
1433 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1434 | ||
1435 | // Now run a 'software UART' on the stream of incoming samples. | |
6a1f2d82 | 1436 | UartInit(received, parity); |
7bc95e2e | 1437 | |
1438 | // Clear RXRDY: | |
1439 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1440 | |
9ca155ba M |
1441 | for(;;) { |
1442 | WDT_HIT(); | |
1443 | ||
1444 | if (BUTTON_PRESS()) return 1; | |
1445 | ||
1446 | // test if the field exists | |
1447 | if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) { | |
1448 | analogCnt++; | |
1449 | analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF]; | |
1450 | AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START; | |
1451 | if (analogCnt >= 32) { | |
0c8d25eb | 1452 | if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) { |
9ca155ba M |
1453 | vtime = GetTickCount(); |
1454 | if (!timer) timer = vtime; | |
1455 | // 50ms no field --> card to idle state | |
1456 | if (vtime - timer > 50) return 2; | |
1457 | } else | |
1458 | if (timer) timer = 0; | |
1459 | analogCnt = 0; | |
1460 | analogAVG = 0; | |
1461 | } | |
1462 | } | |
7bc95e2e | 1463 | |
9ca155ba | 1464 | // receive and test the miller decoding |
7bc95e2e | 1465 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
1466 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1467 | if(MillerDecoding(b, 0)) { | |
1468 | *len = Uart.len; | |
9ca155ba M |
1469 | return 0; |
1470 | } | |
7bc95e2e | 1471 | } |
1472 | ||
9ca155ba M |
1473 | } |
1474 | } | |
1475 | ||
9ca155ba | 1476 | |
6a1f2d82 | 1477 | static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded) |
7bc95e2e | 1478 | { |
1479 | uint8_t b; | |
1480 | uint16_t i = 0; | |
1481 | uint32_t ThisTransferTime; | |
1482 | ||
9ca155ba M |
1483 | // Modulate Manchester |
1484 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD); | |
7bc95e2e | 1485 | |
1486 | // include correction bit if necessary | |
1487 | if (Uart.parityBits & 0x01) { | |
1488 | correctionNeeded = TRUE; | |
1489 | } | |
1490 | if(correctionNeeded) { | |
9ca155ba M |
1491 | // 1236, so correction bit needed |
1492 | i = 0; | |
7bc95e2e | 1493 | } else { |
1494 | i = 1; | |
9ca155ba | 1495 | } |
7bc95e2e | 1496 | |
d714d3ef | 1497 | // clear receiving shift register and holding register |
7bc95e2e | 1498 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); |
1499 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
1500 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1501 | b = AT91C_BASE_SSC->SSC_RHR; (void) b; | |
9ca155ba | 1502 | |
7bc95e2e | 1503 | // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line) |
1504 | for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never | |
1505 | while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)); | |
1506 | if (AT91C_BASE_SSC->SSC_RHR) break; | |
1507 | } | |
1508 | ||
1509 | while ((ThisTransferTime = GetCountSspClk()) & 0x00000007); | |
1510 | ||
1511 | // Clear TXRDY: | |
1512 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1513 | ||
9ca155ba | 1514 | // send cycle |
bb42a03e | 1515 | for(; i < respLen; ) { |
9ca155ba | 1516 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
7bc95e2e | 1517 | AT91C_BASE_SSC->SSC_THR = resp[i++]; |
1518 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
9ca155ba | 1519 | } |
7bc95e2e | 1520 | |
9ca155ba M |
1521 | if(BUTTON_PRESS()) { |
1522 | break; | |
1523 | } | |
1524 | } | |
1525 | ||
7bc95e2e | 1526 | // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again: |
0c8d25eb | 1527 | uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3; |
1528 | for (i = 0; i <= fpga_queued_bits/8 + 1; ) { | |
7bc95e2e | 1529 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) { |
1530 | AT91C_BASE_SSC->SSC_THR = SEC_F; | |
1531 | FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
1532 | i++; | |
1533 | } | |
1534 | } | |
0c8d25eb | 1535 | |
7bc95e2e | 1536 | LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0); |
1537 | ||
9ca155ba M |
1538 | return 0; |
1539 | } | |
1540 | ||
7bc95e2e | 1541 | int EmSend4bitEx(uint8_t resp, bool correctionNeeded){ |
1542 | Code4bitAnswerAsTag(resp); | |
0a39986e | 1543 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1544 | // do the tracing for the previous reader request and this tag answer: |
6a1f2d82 | 1545 | uint8_t par[1]; |
1546 | GetParity(&resp, 1, par); | |
7bc95e2e | 1547 | EmLogTrace(Uart.output, |
1548 | Uart.len, | |
1549 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1550 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1551 | Uart.parity, |
7bc95e2e | 1552 | &resp, |
1553 | 1, | |
1554 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1555 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1556 | par); |
0a39986e | 1557 | return res; |
9ca155ba M |
1558 | } |
1559 | ||
8f51ddb0 | 1560 | int EmSend4bit(uint8_t resp){ |
7bc95e2e | 1561 | return EmSend4bitEx(resp, false); |
8f51ddb0 M |
1562 | } |
1563 | ||
6a1f2d82 | 1564 | int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){ |
7bc95e2e | 1565 | CodeIso14443aAsTagPar(resp, respLen, par); |
8f51ddb0 | 1566 | int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded); |
7bc95e2e | 1567 | // do the tracing for the previous reader request and this tag answer: |
1568 | EmLogTrace(Uart.output, | |
1569 | Uart.len, | |
1570 | Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, | |
1571 | Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, | |
6a1f2d82 | 1572 | Uart.parity, |
7bc95e2e | 1573 | resp, |
1574 | respLen, | |
1575 | LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG, | |
1576 | (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG, | |
6a1f2d82 | 1577 | par); |
8f51ddb0 M |
1578 | return res; |
1579 | } | |
1580 | ||
6a1f2d82 | 1581 | int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){ |
1582 | uint8_t par[MAX_PARITY_SIZE]; | |
1583 | GetParity(resp, respLen, par); | |
1584 | return EmSendCmdExPar(resp, respLen, correctionNeeded, par); | |
8f51ddb0 M |
1585 | } |
1586 | ||
6a1f2d82 | 1587 | int EmSendCmd(uint8_t *resp, uint16_t respLen){ |
1588 | uint8_t par[MAX_PARITY_SIZE]; | |
1589 | GetParity(resp, respLen, par); | |
1590 | return EmSendCmdExPar(resp, respLen, false, par); | |
8f51ddb0 M |
1591 | } |
1592 | ||
6a1f2d82 | 1593 | int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){ |
7bc95e2e | 1594 | return EmSendCmdExPar(resp, respLen, false, par); |
1595 | } | |
1596 | ||
6a1f2d82 | 1597 | bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity, |
1598 | uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity) | |
7bc95e2e | 1599 | { |
1600 | if (tracing) { | |
1601 | // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from | |
1602 | // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp. | |
1603 | // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated: | |
1604 | uint16_t reader_modlen = reader_EndTime - reader_StartTime; | |
1605 | uint16_t approx_fdt = tag_StartTime - reader_EndTime; | |
1606 | uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20; | |
1607 | reader_EndTime = tag_StartTime - exact_fdt; | |
1608 | reader_StartTime = reader_EndTime - reader_modlen; | |
6a1f2d82 | 1609 | if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) { |
7bc95e2e | 1610 | return FALSE; |
6a1f2d82 | 1611 | } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE)); |
7bc95e2e | 1612 | } else { |
1613 | return TRUE; | |
1614 | } | |
9ca155ba M |
1615 | } |
1616 | ||
15c4dc5a | 1617 | //----------------------------------------------------------------------------- |
1618 | // Wait a certain time for tag response | |
1619 | // If a response is captured return TRUE | |
e691fc45 | 1620 | // If it takes too long return FALSE |
15c4dc5a | 1621 | //----------------------------------------------------------------------------- |
6a1f2d82 | 1622 | static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset) |
15c4dc5a | 1623 | { |
46c65fed | 1624 | uint32_t c = 0x00; |
e691fc45 | 1625 | |
15c4dc5a | 1626 | // Set FPGA mode to "reader listen mode", no modulation (listen |
534983d7 | 1627 | // only, since we are receiving, not transmitting). |
1628 | // Signal field is on with the appropriate LED | |
1629 | LED_D_ON(); | |
1630 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN); | |
1c611bbd | 1631 | |
534983d7 | 1632 | // Now get the answer from the card |
6a1f2d82 | 1633 | DemodInit(receivedResponse, receivedResponsePar); |
15c4dc5a | 1634 | |
7bc95e2e | 1635 | // clear RXRDY: |
1636 | uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; | |
0c8d25eb | 1637 | |
15c4dc5a | 1638 | for(;;) { |
534983d7 | 1639 | WDT_HIT(); |
15c4dc5a | 1640 | |
534983d7 | 1641 | if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) { |
534983d7 | 1642 | b = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
7bc95e2e | 1643 | if(ManchesterDecoding(b, offset, 0)) { |
1644 | NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD); | |
15c4dc5a | 1645 | return TRUE; |
19a700a8 | 1646 | } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) { |
7bc95e2e | 1647 | return FALSE; |
15c4dc5a | 1648 | } |
534983d7 | 1649 | } |
1650 | } | |
15c4dc5a | 1651 | } |
1652 | ||
0ec548dc | 1653 | |
6a1f2d82 | 1654 | void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing) |
15c4dc5a | 1655 | { |
6a1f2d82 | 1656 | CodeIso14443aBitsAsReaderPar(frame, bits, par); |
dfc3c505 | 1657 | |
7bc95e2e | 1658 | // Send command to tag |
1659 | TransmitFor14443a(ToSend, ToSendMax, timing); | |
1660 | if(trigger) | |
1661 | LED_A_ON(); | |
dfc3c505 | 1662 | |
7bc95e2e | 1663 | // Log reader command in trace buffer |
1664 | if (tracing) { | |
6a1f2d82 | 1665 | LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE); |
7bc95e2e | 1666 | } |
15c4dc5a | 1667 | } |
1668 | ||
0ec548dc | 1669 | |
6a1f2d82 | 1670 | void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing) |
dfc3c505 | 1671 | { |
6a1f2d82 | 1672 | ReaderTransmitBitsPar(frame, len*8, par, timing); |
dfc3c505 | 1673 | } |
15c4dc5a | 1674 | |
0ec548dc | 1675 | |
6a1f2d82 | 1676 | void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing) |
e691fc45 | 1677 | { |
1678 | // Generate parity and redirect | |
6a1f2d82 | 1679 | uint8_t par[MAX_PARITY_SIZE]; |
1680 | GetParity(frame, len/8, par); | |
1681 | ReaderTransmitBitsPar(frame, len, par, timing); | |
e691fc45 | 1682 | } |
1683 | ||
0ec548dc | 1684 | |
6a1f2d82 | 1685 | void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing) |
15c4dc5a | 1686 | { |
1687 | // Generate parity and redirect | |
6a1f2d82 | 1688 | uint8_t par[MAX_PARITY_SIZE]; |
1689 | GetParity(frame, len, par); | |
1690 | ReaderTransmitBitsPar(frame, len*8, par, timing); | |
15c4dc5a | 1691 | } |
1692 | ||
6a1f2d82 | 1693 | int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity) |
e691fc45 | 1694 | { |
6a1f2d82 | 1695 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE; |
7bc95e2e | 1696 | if (tracing) { |
6a1f2d82 | 1697 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1698 | } |
e691fc45 | 1699 | return Demod.len; |
1700 | } | |
1701 | ||
6a1f2d82 | 1702 | int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity) |
15c4dc5a | 1703 | { |
6a1f2d82 | 1704 | if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE; |
7bc95e2e | 1705 | if (tracing) { |
6a1f2d82 | 1706 | LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE); |
7bc95e2e | 1707 | } |
e691fc45 | 1708 | return Demod.len; |
f89c7050 M |
1709 | } |
1710 | ||
e691fc45 | 1711 | /* performs iso14443a anticollision procedure |
534983d7 | 1712 | * fills the uid pointer unless NULL |
1713 | * fills resp_data unless NULL */ | |
6a1f2d82 | 1714 | int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) { |
1715 | uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP | |
1716 | uint8_t sel_all[] = { 0x93,0x20 }; | |
1717 | uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00}; | |
1718 | uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0 | |
f71f4deb | 1719 | uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller |
1720 | uint8_t resp_par[MAX_PARITY_SIZE]; | |
6a1f2d82 | 1721 | byte_t uid_resp[4]; |
1722 | size_t uid_resp_len; | |
1723 | ||
1724 | uint8_t sak = 0x04; // cascade uid | |
1725 | int cascade_level = 0; | |
1726 | int len; | |
1727 | ||
1728 | // Broadcast for a card, WUPA (0x52) will force response from all cards in the field | |
9492e0b0 | 1729 | ReaderTransmitBitsPar(wupa,7,0, NULL); |
7bc95e2e | 1730 | |
6a1f2d82 | 1731 | // Receive the ATQA |
1732 | if(!ReaderReceive(resp, resp_par)) return 0; | |
6a1f2d82 | 1733 | |
1734 | if(p_hi14a_card) { | |
1735 | memcpy(p_hi14a_card->atqa, resp, 2); | |
1736 | p_hi14a_card->uidlen = 0; | |
1737 | memset(p_hi14a_card->uid,0,10); | |
1738 | } | |
5f6d6c90 | 1739 | |
6a1f2d82 | 1740 | // clear uid |
1741 | if (uid_ptr) { | |
1742 | memset(uid_ptr,0,10); | |
1743 | } | |
79a73ab2 | 1744 | |
0ec548dc | 1745 | // check for proprietary anticollision: |
1746 | if ((resp[0] & 0x1F) == 0) { | |
1747 | return 3; | |
1748 | } | |
1749 | ||
6a1f2d82 | 1750 | // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in |
1751 | // which case we need to make a cascade 2 request and select - this is a long UID | |
1752 | // While the UID is not complete, the 3nd bit (from the right) is set in the SAK. | |
1753 | for(; sak & 0x04; cascade_level++) { | |
1754 | // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97) | |
1755 | sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2; | |
1756 | ||
1757 | // SELECT_ALL | |
1758 | ReaderTransmit(sel_all, sizeof(sel_all), NULL); | |
1759 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1760 | ||
1761 | if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit | |
1762 | memset(uid_resp, 0, 4); | |
1763 | uint16_t uid_resp_bits = 0; | |
1764 | uint16_t collision_answer_offset = 0; | |
1765 | // anti-collision-loop: | |
1766 | while (Demod.collisionPos) { | |
1767 | Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos); | |
1768 | for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point | |
1769 | uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01; | |
758f1fd1 | 1770 | uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8); |
6a1f2d82 | 1771 | } |
1772 | uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position | |
1773 | uid_resp_bits++; | |
1774 | // construct anticollosion command: | |
1775 | sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits | |
1776 | for (uint16_t i = 0; i <= uid_resp_bits/8; i++) { | |
1777 | sel_uid[2+i] = uid_resp[i]; | |
1778 | } | |
1779 | collision_answer_offset = uid_resp_bits%8; | |
1780 | ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL); | |
1781 | if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0; | |
e691fc45 | 1782 | } |
6a1f2d82 | 1783 | // finally, add the last bits and BCC of the UID |
1784 | for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) { | |
1785 | uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01; | |
1786 | uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8); | |
e691fc45 | 1787 | } |
e691fc45 | 1788 | |
6a1f2d82 | 1789 | } else { // no collision, use the response to SELECT_ALL as current uid |
1790 | memcpy(uid_resp, resp, 4); | |
1791 | } | |
1792 | uid_resp_len = 4; | |
5f6d6c90 | 1793 | |
6a1f2d82 | 1794 | // calculate crypto UID. Always use last 4 Bytes. |
1795 | if(cuid_ptr) { | |
1796 | *cuid_ptr = bytes_to_num(uid_resp, 4); | |
1797 | } | |
e30c654b | 1798 | |
6a1f2d82 | 1799 | // Construct SELECT UID command |
1800 | sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC) | |
1801 | memcpy(sel_uid+2, uid_resp, 4); // the UID | |
1802 | sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC | |
1803 | AppendCrc14443a(sel_uid, 7); // calculate and add CRC | |
1804 | ReaderTransmit(sel_uid, sizeof(sel_uid), NULL); | |
1805 | ||
1806 | // Receive the SAK | |
1807 | if (!ReaderReceive(resp, resp_par)) return 0; | |
1808 | sak = resp[0]; | |
1809 | ||
52ab55ab | 1810 | // Test if more parts of the uid are coming |
6a1f2d82 | 1811 | if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) { |
1812 | // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of: | |
1813 | // http://www.nxp.com/documents/application_note/AN10927.pdf | |
6a1f2d82 | 1814 | uid_resp[0] = uid_resp[1]; |
1815 | uid_resp[1] = uid_resp[2]; | |
1816 | uid_resp[2] = uid_resp[3]; | |
1817 | ||
1818 | uid_resp_len = 3; | |
1819 | } | |
5f6d6c90 | 1820 | |
6a1f2d82 | 1821 | if(uid_ptr) { |
1822 | memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len); | |
1823 | } | |
5f6d6c90 | 1824 | |
6a1f2d82 | 1825 | if(p_hi14a_card) { |
1826 | memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len); | |
1827 | p_hi14a_card->uidlen += uid_resp_len; | |
1828 | } | |
1829 | } | |
79a73ab2 | 1830 | |
6a1f2d82 | 1831 | if(p_hi14a_card) { |
1832 | p_hi14a_card->sak = sak; | |
1833 | p_hi14a_card->ats_len = 0; | |
1834 | } | |
534983d7 | 1835 | |
3fe4ff4f | 1836 | // non iso14443a compliant tag |
1837 | if( (sak & 0x20) == 0) return 2; | |
534983d7 | 1838 | |
6a1f2d82 | 1839 | // Request for answer to select |
1840 | AppendCrc14443a(rats, 2); | |
1841 | ReaderTransmit(rats, sizeof(rats), NULL); | |
1c611bbd | 1842 | |
6a1f2d82 | 1843 | if (!(len = ReaderReceive(resp, resp_par))) return 0; |
5191b3d1 | 1844 | |
3fe4ff4f | 1845 | |
6a1f2d82 | 1846 | if(p_hi14a_card) { |
1847 | memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats)); | |
1848 | p_hi14a_card->ats_len = len; | |
1849 | } | |
5f6d6c90 | 1850 | |
6a1f2d82 | 1851 | // reset the PCB block number |
1852 | iso14_pcb_blocknum = 0; | |
19a700a8 | 1853 | |
1854 | // set default timeout based on ATS | |
1855 | iso14a_set_ATS_timeout(resp); | |
1856 | ||
6a1f2d82 | 1857 | return 1; |
7e758047 | 1858 | } |
15c4dc5a | 1859 | |
7bc95e2e | 1860 | void iso14443a_setup(uint8_t fpga_minor_mode) { |
7cc204bf | 1861 | FpgaDownloadAndGo(FPGA_BITSTREAM_HF); |
9492e0b0 | 1862 | // Set up the synchronous serial port |
1863 | FpgaSetupSsc(); | |
7bc95e2e | 1864 | // connect Demodulated Signal to ADC: |
7e758047 | 1865 | SetAdcMuxFor(GPIO_MUXSEL_HIPKD); |
e30c654b | 1866 | |
7e758047 | 1867 | // Signal field is on with the appropriate LED |
7bc95e2e | 1868 | if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD |
1869 | || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) { | |
1870 | LED_D_ON(); | |
1871 | } else { | |
1872 | LED_D_OFF(); | |
1873 | } | |
1874 | FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode); | |
534983d7 | 1875 | |
7bc95e2e | 1876 | // Start the timer |
1877 | StartCountSspClk(); | |
1878 | ||
1879 | DemodReset(); | |
1880 | UartReset(); | |
1881 | NextTransferTime = 2*DELAY_ARM2AIR_AS_READER; | |
46c65fed | 1882 | iso14a_set_timeout(10*106); // 10ms default |
7e758047 | 1883 | } |
15c4dc5a | 1884 | |
6a1f2d82 | 1885 | int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) { |
1886 | uint8_t parity[MAX_PARITY_SIZE]; | |
534983d7 | 1887 | uint8_t real_cmd[cmd_len+4]; |
1888 | real_cmd[0] = 0x0a; //I-Block | |
b0127e65 | 1889 | // put block number into the PCB |
1890 | real_cmd[0] |= iso14_pcb_blocknum; | |
534983d7 | 1891 | real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards |
1892 | memcpy(real_cmd+2, cmd, cmd_len); | |
1893 | AppendCrc14443a(real_cmd,cmd_len+2); | |
1894 | ||
9492e0b0 | 1895 | ReaderTransmit(real_cmd, cmd_len+4, NULL); |
6a1f2d82 | 1896 | size_t len = ReaderReceive(data, parity); |
1897 | uint8_t *data_bytes = (uint8_t *) data; | |
b0127e65 | 1898 | if (!len) |
1899 | return 0; //DATA LINK ERROR | |
1900 | // if we received an I- or R(ACK)-Block with a block number equal to the | |
1901 | // current block number, toggle the current block number | |
1902 | else if (len >= 4 // PCB+CID+CRC = 4 bytes | |
1903 | && ((data_bytes[0] & 0xC0) == 0 // I-Block | |
1904 | || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0 | |
1905 | && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers | |
1906 | { | |
1907 | iso14_pcb_blocknum ^= 1; | |
1908 | } | |
1909 | ||
534983d7 | 1910 | return len; |
1911 | } | |
1912 | ||
7e758047 | 1913 | //----------------------------------------------------------------------------- |
1914 | // Read an ISO 14443a tag. Send out commands and store answers. | |
1915 | // | |
1916 | //----------------------------------------------------------------------------- | |
7bc95e2e | 1917 | void ReaderIso14443a(UsbCommand *c) |
7e758047 | 1918 | { |
534983d7 | 1919 | iso14a_command_t param = c->arg[0]; |
7bc95e2e | 1920 | uint8_t *cmd = c->d.asBytes; |
04bc1c66 | 1921 | size_t len = c->arg[1] & 0xffff; |
1922 | size_t lenbits = c->arg[1] >> 16; | |
1923 | uint32_t timeout = c->arg[2]; | |
9492e0b0 | 1924 | uint32_t arg0 = 0; |
1925 | byte_t buf[USB_CMD_DATA_SIZE]; | |
6a1f2d82 | 1926 | uint8_t par[MAX_PARITY_SIZE]; |
902cb3c0 | 1927 | |
5f6d6c90 | 1928 | if(param & ISO14A_CONNECT) { |
3000dc4e | 1929 | clear_trace(); |
5f6d6c90 | 1930 | } |
e691fc45 | 1931 | |
3000dc4e | 1932 | set_tracing(TRUE); |
e30c654b | 1933 | |
79a73ab2 | 1934 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1935 | iso14a_set_trigger(TRUE); |
9492e0b0 | 1936 | } |
15c4dc5a | 1937 | |
534983d7 | 1938 | if(param & ISO14A_CONNECT) { |
7bc95e2e | 1939 | iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN); |
5f6d6c90 | 1940 | if(!(param & ISO14A_NO_SELECT)) { |
1941 | iso14a_card_select_t *card = (iso14a_card_select_t*)buf; | |
1942 | arg0 = iso14443a_select_card(NULL,card,NULL); | |
1943 | cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t)); | |
1944 | } | |
534983d7 | 1945 | } |
e30c654b | 1946 | |
534983d7 | 1947 | if(param & ISO14A_SET_TIMEOUT) { |
04bc1c66 | 1948 | iso14a_set_timeout(timeout); |
534983d7 | 1949 | } |
e30c654b | 1950 | |
534983d7 | 1951 | if(param & ISO14A_APDU) { |
902cb3c0 | 1952 | arg0 = iso14_apdu(cmd, len, buf); |
79a73ab2 | 1953 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1954 | } |
e30c654b | 1955 | |
534983d7 | 1956 | if(param & ISO14A_RAW) { |
1957 | if(param & ISO14A_APPEND_CRC) { | |
0ec548dc | 1958 | if(param & ISO14A_TOPAZMODE) { |
1959 | AppendCrc14443b(cmd,len); | |
1960 | } else { | |
534983d7 | 1961 | AppendCrc14443a(cmd,len); |
0ec548dc | 1962 | } |
534983d7 | 1963 | len += 2; |
c7324bef | 1964 | if (lenbits) lenbits += 16; |
15c4dc5a | 1965 | } |
0ec548dc | 1966 | if(lenbits>0) { // want to send a specific number of bits (e.g. short commands) |
1967 | if(param & ISO14A_TOPAZMODE) { | |
1968 | int bits_to_send = lenbits; | |
1969 | uint16_t i = 0; | |
1970 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity | |
1971 | bits_to_send -= 7; | |
1972 | while (bits_to_send > 0) { | |
1973 | ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity | |
1974 | bits_to_send -= 8; | |
1975 | } | |
1976 | } else { | |
6a1f2d82 | 1977 | GetParity(cmd, lenbits/8, par); |
0ec548dc | 1978 | ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity |
1979 | } | |
1980 | } else { // want to send complete bytes only | |
1981 | if(param & ISO14A_TOPAZMODE) { | |
1982 | uint16_t i = 0; | |
1983 | ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy | |
1984 | while (i < len) { | |
1985 | ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy | |
1986 | } | |
5f6d6c90 | 1987 | } else { |
0ec548dc | 1988 | ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity |
1989 | } | |
5f6d6c90 | 1990 | } |
6a1f2d82 | 1991 | arg0 = ReaderReceive(buf, par); |
9492e0b0 | 1992 | cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf)); |
534983d7 | 1993 | } |
15c4dc5a | 1994 | |
79a73ab2 | 1995 | if(param & ISO14A_REQUEST_TRIGGER) { |
7bc95e2e | 1996 | iso14a_set_trigger(FALSE); |
9492e0b0 | 1997 | } |
15c4dc5a | 1998 | |
79a73ab2 | 1999 | if(param & ISO14A_NO_DISCONNECT) { |
534983d7 | 2000 | return; |
9492e0b0 | 2001 | } |
15c4dc5a | 2002 | |
15c4dc5a | 2003 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2004 | LEDsoff(); | |
15c4dc5a | 2005 | } |
b0127e65 | 2006 | |
1c611bbd | 2007 | |
1c611bbd | 2008 | // Determine the distance between two nonces. |
2009 | // Assume that the difference is small, but we don't know which is first. | |
2010 | // Therefore try in alternating directions. | |
2011 | int32_t dist_nt(uint32_t nt1, uint32_t nt2) { | |
2012 | ||
2013 | uint16_t i; | |
2014 | uint32_t nttmp1, nttmp2; | |
e772353f | 2015 | |
1c611bbd | 2016 | if (nt1 == nt2) return 0; |
2017 | ||
2018 | nttmp1 = nt1; | |
2019 | nttmp2 = nt2; | |
2020 | ||
2021 | for (i = 1; i < 32768; i++) { | |
2022 | nttmp1 = prng_successor(nttmp1, 1); | |
2023 | if (nttmp1 == nt2) return i; | |
2024 | nttmp2 = prng_successor(nttmp2, 1); | |
2025 | if (nttmp2 == nt1) return -i; | |
2026 | } | |
2027 | ||
2028 | return(-99999); // either nt1 or nt2 are invalid nonces | |
e772353f | 2029 | } |
2030 | ||
e772353f | 2031 | |
1c611bbd | 2032 | //----------------------------------------------------------------------------- |
2033 | // Recover several bits of the cypher stream. This implements (first stages of) | |
2034 | // the algorithm described in "The Dark Side of Security by Obscurity and | |
2035 | // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime" | |
2036 | // (article by Nicolas T. Courtois, 2009) | |
2037 | //----------------------------------------------------------------------------- | |
2038 | void ReaderMifare(bool first_try) | |
2039 | { | |
2040 | // Mifare AUTH | |
2041 | uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b }; | |
2042 | uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 }; | |
2043 | static uint8_t mf_nr_ar3; | |
e772353f | 2044 | |
f71f4deb | 2045 | uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE]; |
2046 | uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE]; | |
7bc95e2e | 2047 | |
f71f4deb | 2048 | // free eventually allocated BigBuf memory. We want all for tracing. |
2049 | BigBuf_free(); | |
2050 | ||
3000dc4e MHS |
2051 | clear_trace(); |
2052 | set_tracing(TRUE); | |
e772353f | 2053 | |
1c611bbd | 2054 | byte_t nt_diff = 0; |
6a1f2d82 | 2055 | uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough |
1c611bbd | 2056 | static byte_t par_low = 0; |
2057 | bool led_on = TRUE; | |
ca4714cd | 2058 | uint8_t uid[10] ={0}; |
1c611bbd | 2059 | uint32_t cuid; |
e772353f | 2060 | |
6a1f2d82 | 2061 | uint32_t nt = 0; |
2ed270a8 | 2062 | uint32_t previous_nt = 0; |
1c611bbd | 2063 | static uint32_t nt_attacked = 0; |
3fe4ff4f | 2064 | byte_t par_list[8] = {0x00}; |
2065 | byte_t ks_list[8] = {0x00}; | |
e772353f | 2066 | |
1c611bbd | 2067 | static uint32_t sync_time; |
2068 | static uint32_t sync_cycles; | |
2069 | int catch_up_cycles = 0; | |
2070 | int last_catch_up = 0; | |
2071 | uint16_t consecutive_resyncs = 0; | |
2072 | int isOK = 0; | |
e772353f | 2073 | |
1c611bbd | 2074 | if (first_try) { |
1c611bbd | 2075 | mf_nr_ar3 = 0; |
7bc95e2e | 2076 | iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD); |
2077 | sync_time = GetCountSspClk() & 0xfffffff8; | |
1c611bbd | 2078 | sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces). |
2079 | nt_attacked = 0; | |
2080 | nt = 0; | |
6a1f2d82 | 2081 | par[0] = 0; |
1c611bbd | 2082 | } |
2083 | else { | |
2084 | // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same) | |
1c611bbd | 2085 | mf_nr_ar3++; |
2086 | mf_nr_ar[3] = mf_nr_ar3; | |
6a1f2d82 | 2087 | par[0] = par_low; |
1c611bbd | 2088 | } |
e30c654b | 2089 | |
15c4dc5a | 2090 | LED_A_ON(); |
2091 | LED_B_OFF(); | |
2092 | LED_C_OFF(); | |
1c611bbd | 2093 | |
7bc95e2e | 2094 | |
1c611bbd | 2095 | for(uint16_t i = 0; TRUE; i++) { |
2096 | ||
2097 | WDT_HIT(); | |
e30c654b | 2098 | |
1c611bbd | 2099 | // Test if the action was cancelled |
2100 | if(BUTTON_PRESS()) { | |
2101 | break; | |
2102 | } | |
2103 | ||
2104 | LED_C_ON(); | |
e30c654b | 2105 | |
1c611bbd | 2106 | if(!iso14443a_select_card(uid, NULL, &cuid)) { |
9492e0b0 | 2107 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card"); |
1c611bbd | 2108 | continue; |
2109 | } | |
2110 | ||
9492e0b0 | 2111 | sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles; |
1c611bbd | 2112 | catch_up_cycles = 0; |
2113 | ||
2114 | // if we missed the sync time already, advance to the next nonce repeat | |
7bc95e2e | 2115 | while(GetCountSspClk() > sync_time) { |
9492e0b0 | 2116 | sync_time = (sync_time & 0xfffffff8) + sync_cycles; |
1c611bbd | 2117 | } |
e30c654b | 2118 | |
9492e0b0 | 2119 | // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked) |
2120 | ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time); | |
f89c7050 | 2121 | |
1c611bbd | 2122 | // Receive the (4 Byte) "random" nonce |
6a1f2d82 | 2123 | if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) { |
9492e0b0 | 2124 | if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce"); |
1c611bbd | 2125 | continue; |
2126 | } | |
2127 | ||
1c611bbd | 2128 | previous_nt = nt; |
2129 | nt = bytes_to_num(receivedAnswer, 4); | |
2130 | ||
2131 | // Transmit reader nonce with fake par | |
9492e0b0 | 2132 | ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL); |
1c611bbd | 2133 | |
2134 | if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet | |
2135 | int nt_distance = dist_nt(previous_nt, nt); | |
2136 | if (nt_distance == 0) { | |
2137 | nt_attacked = nt; | |
2138 | } | |
2139 | else { | |
2140 | if (nt_distance == -99999) { // invalid nonce received, try again | |
2141 | continue; | |
2142 | } | |
2143 | sync_cycles = (sync_cycles - nt_distance); | |
9492e0b0 | 2144 | if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles); |
1c611bbd | 2145 | continue; |
2146 | } | |
2147 | } | |
2148 | ||
2149 | if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again... | |
2150 | catch_up_cycles = -dist_nt(nt_attacked, nt); | |
2151 | if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one. | |
2152 | catch_up_cycles = 0; | |
2153 | continue; | |
2154 | } | |
2155 | if (catch_up_cycles == last_catch_up) { | |
2156 | consecutive_resyncs++; | |
2157 | } | |
2158 | else { | |
2159 | last_catch_up = catch_up_cycles; | |
2160 | consecutive_resyncs = 0; | |
2161 | } | |
2162 | if (consecutive_resyncs < 3) { | |
9492e0b0 | 2163 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs); |
1c611bbd | 2164 | } |
2165 | else { | |
2166 | sync_cycles = sync_cycles + catch_up_cycles; | |
9492e0b0 | 2167 | if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles); |
1c611bbd | 2168 | } |
2169 | continue; | |
2170 | } | |
2171 | ||
2172 | consecutive_resyncs = 0; | |
2173 | ||
2174 | // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding | |
6a1f2d82 | 2175 | if (ReaderReceive(receivedAnswer, receivedAnswerPar)) |
1c611bbd | 2176 | { |
9492e0b0 | 2177 | catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer |
1c611bbd | 2178 | |
2179 | if (nt_diff == 0) | |
2180 | { | |
6a1f2d82 | 2181 | par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change |
1c611bbd | 2182 | } |
2183 | ||
2184 | led_on = !led_on; | |
2185 | if(led_on) LED_B_ON(); else LED_B_OFF(); | |
2186 | ||
6a1f2d82 | 2187 | par_list[nt_diff] = SwapBits(par[0], 8); |
1c611bbd | 2188 | ks_list[nt_diff] = receivedAnswer[0] ^ 0x05; |
2189 | ||
2190 | // Test if the information is complete | |
2191 | if (nt_diff == 0x07) { | |
2192 | isOK = 1; | |
2193 | break; | |
2194 | } | |
2195 | ||
2196 | nt_diff = (nt_diff + 1) & 0x07; | |
2197 | mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5); | |
6a1f2d82 | 2198 | par[0] = par_low; |
1c611bbd | 2199 | } else { |
2200 | if (nt_diff == 0 && first_try) | |
2201 | { | |
6a1f2d82 | 2202 | par[0]++; |
1c611bbd | 2203 | } else { |
6a1f2d82 | 2204 | par[0] = ((par[0] & 0x1F) + 1) | par_low; |
1c611bbd | 2205 | } |
2206 | } | |
2207 | } | |
2208 | ||
1c611bbd | 2209 | |
2210 | mf_nr_ar[3] &= 0x1F; | |
2211 | ||
2212 | byte_t buf[28]; | |
2213 | memcpy(buf + 0, uid, 4); | |
2214 | num_to_bytes(nt, 4, buf + 4); | |
2215 | memcpy(buf + 8, par_list, 8); | |
2216 | memcpy(buf + 16, ks_list, 8); | |
2217 | memcpy(buf + 24, mf_nr_ar, 4); | |
2218 | ||
2219 | cmd_send(CMD_ACK,isOK,0,0,buf,28); | |
2220 | ||
2221 | // Thats it... | |
2222 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); | |
2223 | LEDsoff(); | |
7bc95e2e | 2224 | |
3000dc4e | 2225 | set_tracing(FALSE); |
20f9a2a1 | 2226 | } |
1c611bbd | 2227 | |
d2f487af | 2228 | /** |
2229 | *MIFARE 1K simulate. | |
2230 | * | |
2231 | *@param flags : | |
2232 | * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK | |
2233 | * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that | |
2234 | * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that | |
2235 | * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later | |
2236 | *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite | |
2237 | */ | |
2238 | void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain) | |
20f9a2a1 | 2239 | { |
50193c1e | 2240 | int cardSTATE = MFEMUL_NOFIELD; |
8556b852 | 2241 | int _7BUID = 0; |
9ca155ba | 2242 | int vHf = 0; // in mV |
8f51ddb0 | 2243 | int res; |
0a39986e M |
2244 | uint32_t selTimer = 0; |
2245 | uint32_t authTimer = 0; | |
6a1f2d82 | 2246 | uint16_t len = 0; |
8f51ddb0 | 2247 | uint8_t cardWRBL = 0; |
9ca155ba M |
2248 | uint8_t cardAUTHSC = 0; |
2249 | uint8_t cardAUTHKEY = 0xff; // no authentication | |
51969283 | 2250 | uint32_t cardRr = 0; |
9ca155ba | 2251 | uint32_t cuid = 0; |
d2f487af | 2252 | //uint32_t rn_enc = 0; |
51969283 | 2253 | uint32_t ans = 0; |
0014cb46 M |
2254 | uint32_t cardINTREG = 0; |
2255 | uint8_t cardINTBLOCK = 0; | |
9ca155ba M |
2256 | struct Crypto1State mpcs = {0, 0}; |
2257 | struct Crypto1State *pcs; | |
2258 | pcs = &mpcs; | |
d2f487af | 2259 | uint32_t numReads = 0;//Counts numer of times reader read a block |
f71f4deb | 2260 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE]; |
2261 | uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE]; | |
2262 | uint8_t response[MAX_MIFARE_FRAME_SIZE]; | |
2263 | uint8_t response_par[MAX_MIFARE_PARITY_SIZE]; | |
9ca155ba | 2264 | |
d2f487af | 2265 | uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID |
2266 | uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; | |
2267 | uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!! | |
2268 | uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; | |
2269 | uint8_t rSAK1[] = {0x04, 0xda, 0x17}; | |
9ca155ba | 2270 | |
d2f487af | 2271 | uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04}; |
2272 | uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00}; | |
7bc95e2e | 2273 | |
d2f487af | 2274 | //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2 |
2275 | // This can be used in a reader-only attack. | |
2276 | // (it can also be retrieved via 'hf 14a list', but hey... | |
2277 | uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0}; | |
2278 | uint8_t ar_nr_collected = 0; | |
0014cb46 | 2279 | |
f71f4deb | 2280 | // free eventually allocated BigBuf memory but keep Emulator Memory |
2281 | BigBuf_free_keep_EM(); | |
0c8d25eb | 2282 | |
0a39986e | 2283 | // clear trace |
3000dc4e MHS |
2284 | clear_trace(); |
2285 | set_tracing(TRUE); | |
51969283 | 2286 | |
7bc95e2e | 2287 | // Authenticate response - nonce |
51969283 | 2288 | uint32_t nonce = bytes_to_num(rAUTH_NT, 4); |
7bc95e2e | 2289 | |
d2f487af | 2290 | //-- Determine the UID |
2291 | // Can be set from emulator memory, incoming data | |
2292 | // and can be 7 or 4 bytes long | |
7bc95e2e | 2293 | if (flags & FLAG_4B_UID_IN_DATA) |
d2f487af | 2294 | { |
2295 | // 4B uid comes from data-portion of packet | |
2296 | memcpy(rUIDBCC1,datain,4); | |
8556b852 | 2297 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
8556b852 | 2298 | |
7bc95e2e | 2299 | } else if (flags & FLAG_7B_UID_IN_DATA) { |
d2f487af | 2300 | // 7B uid comes from data-portion of packet |
2301 | memcpy(&rUIDBCC1[1],datain,3); | |
2302 | memcpy(rUIDBCC2, datain+3, 4); | |
2303 | _7BUID = true; | |
7bc95e2e | 2304 | } else { |
d2f487af | 2305 | // get UID from emul memory |
2306 | emlGetMemBt(receivedCmd, 7, 1); | |
2307 | _7BUID = !(receivedCmd[0] == 0x00); | |
2308 | if (!_7BUID) { // ---------- 4BUID | |
2309 | emlGetMemBt(rUIDBCC1, 0, 4); | |
2310 | } else { // ---------- 7BUID | |
2311 | emlGetMemBt(&rUIDBCC1[1], 0, 3); | |
2312 | emlGetMemBt(rUIDBCC2, 3, 4); | |
2313 | } | |
2314 | } | |
7bc95e2e | 2315 | |
d2f487af | 2316 | /* |
2317 | * Regardless of what method was used to set the UID, set fifth byte and modify | |
2318 | * the ATQA for 4 or 7-byte UID | |
2319 | */ | |
d2f487af | 2320 | rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3]; |
7bc95e2e | 2321 | if (_7BUID) { |
d2f487af | 2322 | rATQA[0] = 0x44; |
8556b852 | 2323 | rUIDBCC1[0] = 0x88; |
8556b852 M |
2324 | rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3]; |
2325 | } | |
2326 | ||
9ca155ba | 2327 | // We need to listen to the high-frequency, peak-detected path. |
7bc95e2e | 2328 | iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN); |
9ca155ba | 2329 | |
9ca155ba | 2330 | |
d2f487af | 2331 | if (MF_DBGLEVEL >= 1) { |
2332 | if (!_7BUID) { | |
b03c0f2d | 2333 | Dbprintf("4B UID: %02x%02x%02x%02x", |
2334 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]); | |
7bc95e2e | 2335 | } else { |
b03c0f2d | 2336 | Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x", |
2337 | rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3], | |
2338 | rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]); | |
d2f487af | 2339 | } |
2340 | } | |
7bc95e2e | 2341 | |
2342 | bool finished = FALSE; | |
d2f487af | 2343 | while (!BUTTON_PRESS() && !finished) { |
9ca155ba | 2344 | WDT_HIT(); |
9ca155ba M |
2345 | |
2346 | // find reader field | |
9ca155ba | 2347 | if (cardSTATE == MFEMUL_NOFIELD) { |
0c8d25eb | 2348 | vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10; |
9ca155ba | 2349 | if (vHf > MF_MINFIELDV) { |
0014cb46 | 2350 | cardSTATE_TO_IDLE(); |
9ca155ba M |
2351 | LED_A_ON(); |
2352 | } | |
2353 | } | |
d2f487af | 2354 | if(cardSTATE == MFEMUL_NOFIELD) continue; |
9ca155ba | 2355 | |
d2f487af | 2356 | //Now, get data |
2357 | ||
6a1f2d82 | 2358 | res = EmGetCmd(receivedCmd, &len, receivedCmd_par); |
d2f487af | 2359 | if (res == 2) { //Field is off! |
2360 | cardSTATE = MFEMUL_NOFIELD; | |
2361 | LEDsoff(); | |
2362 | continue; | |
7bc95e2e | 2363 | } else if (res == 1) { |
2364 | break; //return value 1 means button press | |
2365 | } | |
2366 | ||
d2f487af | 2367 | // REQ or WUP request in ANY state and WUP in HALTED state |
2368 | if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) { | |
2369 | selTimer = GetTickCount(); | |
2370 | EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52)); | |
2371 | cardSTATE = MFEMUL_SELECT1; | |
2372 | ||
2373 | // init crypto block | |
2374 | LED_B_OFF(); | |
2375 | LED_C_OFF(); | |
2376 | crypto1_destroy(pcs); | |
2377 | cardAUTHKEY = 0xff; | |
2378 | continue; | |
0a39986e | 2379 | } |
7bc95e2e | 2380 | |
50193c1e | 2381 | switch (cardSTATE) { |
d2f487af | 2382 | case MFEMUL_NOFIELD: |
2383 | case MFEMUL_HALTED: | |
50193c1e | 2384 | case MFEMUL_IDLE:{ |
6a1f2d82 | 2385 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
50193c1e M |
2386 | break; |
2387 | } | |
2388 | case MFEMUL_SELECT1:{ | |
9ca155ba M |
2389 | // select all |
2390 | if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) { | |
d2f487af | 2391 | if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received"); |
9ca155ba | 2392 | EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1)); |
0014cb46 | 2393 | break; |
9ca155ba M |
2394 | } |
2395 | ||
d2f487af | 2396 | if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 ) |
2397 | { | |
2398 | Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]); | |
2399 | } | |
9ca155ba | 2400 | // select card |
0a39986e M |
2401 | if (len == 9 && |
2402 | (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) { | |
bfb6a143 | 2403 | EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK)); |
9ca155ba | 2404 | cuid = bytes_to_num(rUIDBCC1, 4); |
8556b852 M |
2405 | if (!_7BUID) { |
2406 | cardSTATE = MFEMUL_WORK; | |
0014cb46 M |
2407 | LED_B_ON(); |
2408 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer); | |
2409 | break; | |
8556b852 M |
2410 | } else { |
2411 | cardSTATE = MFEMUL_SELECT2; | |
8556b852 | 2412 | } |
9ca155ba | 2413 | } |
50193c1e M |
2414 | break; |
2415 | } | |
d2f487af | 2416 | case MFEMUL_AUTH1:{ |
2417 | if( len != 8) | |
2418 | { | |
2419 | cardSTATE_TO_IDLE(); | |
6a1f2d82 | 2420 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2421 | break; |
2422 | } | |
0c8d25eb | 2423 | |
d2f487af | 2424 | uint32_t ar = bytes_to_num(receivedCmd, 4); |
6a1f2d82 | 2425 | uint32_t nr = bytes_to_num(&receivedCmd[4], 4); |
d2f487af | 2426 | |
2427 | //Collect AR/NR | |
12d708fe | 2428 | if(ar_nr_collected < 2 && cardAUTHSC == 2){ |
273b57a7 | 2429 | if(ar_nr_responses[2] != ar) |
2430 | {// Avoid duplicates... probably not necessary, ar should vary. | |
d2f487af | 2431 | ar_nr_responses[ar_nr_collected*4] = cuid; |
2432 | ar_nr_responses[ar_nr_collected*4+1] = nonce; | |
2433 | ar_nr_responses[ar_nr_collected*4+2] = ar; | |
2434 | ar_nr_responses[ar_nr_collected*4+3] = nr; | |
273b57a7 | 2435 | ar_nr_collected++; |
12d708fe | 2436 | } |
2437 | // Interactive mode flag, means we need to send ACK | |
2438 | if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2) | |
2439 | { | |
2440 | finished = true; | |
d2f487af | 2441 | } |
2442 | } | |
2443 | ||
2444 | // --- crypto | |
2445 | crypto1_word(pcs, ar , 1); | |
2446 | cardRr = nr ^ crypto1_word(pcs, 0, 0); | |
2447 | ||
2448 | // test if auth OK | |
2449 | if (cardRr != prng_successor(nonce, 64)){ | |
b03c0f2d | 2450 | if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x", |
2451 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2452 | cardRr, prng_successor(nonce, 64)); | |
7bc95e2e | 2453 | // Shouldn't we respond anything here? |
d2f487af | 2454 | // Right now, we don't nack or anything, which causes the |
2455 | // reader to do a WUPA after a while. /Martin | |
b03c0f2d | 2456 | // -- which is the correct response. /piwi |
d2f487af | 2457 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2458 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
d2f487af | 2459 | break; |
2460 | } | |
2461 | ||
2462 | ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0); | |
2463 | ||
2464 | num_to_bytes(ans, 4, rAUTH_AT); | |
2465 | // --- crypto | |
2466 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); | |
2467 | LED_C_ON(); | |
2468 | cardSTATE = MFEMUL_WORK; | |
b03c0f2d | 2469 | if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d", |
2470 | cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B', | |
2471 | GetTickCount() - authTimer); | |
d2f487af | 2472 | break; |
2473 | } | |
50193c1e | 2474 | case MFEMUL_SELECT2:{ |
7bc95e2e | 2475 | if (!len) { |
6a1f2d82 | 2476 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2477 | break; |
2478 | } | |
8556b852 | 2479 | if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) { |
9ca155ba | 2480 | EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2)); |
8556b852 M |
2481 | break; |
2482 | } | |
9ca155ba | 2483 | |
8556b852 M |
2484 | // select 2 card |
2485 | if (len == 9 && | |
2486 | (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) { | |
2487 | EmSendCmd(rSAK, sizeof(rSAK)); | |
8556b852 M |
2488 | cuid = bytes_to_num(rUIDBCC2, 4); |
2489 | cardSTATE = MFEMUL_WORK; | |
2490 | LED_B_ON(); | |
0014cb46 | 2491 | if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer); |
8556b852 M |
2492 | break; |
2493 | } | |
0014cb46 M |
2494 | |
2495 | // i guess there is a command). go into the work state. | |
7bc95e2e | 2496 | if (len != 4) { |
6a1f2d82 | 2497 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2498 | break; |
2499 | } | |
0014cb46 | 2500 | cardSTATE = MFEMUL_WORK; |
d2f487af | 2501 | //goto lbWORK; |
2502 | //intentional fall-through to the next case-stmt | |
50193c1e | 2503 | } |
51969283 | 2504 | |
7bc95e2e | 2505 | case MFEMUL_WORK:{ |
2506 | if (len == 0) { | |
6a1f2d82 | 2507 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2508 | break; |
2509 | } | |
2510 | ||
d2f487af | 2511 | bool encrypted_data = (cardAUTHKEY != 0xFF) ; |
2512 | ||
7bc95e2e | 2513 | if(encrypted_data) { |
51969283 M |
2514 | // decrypt seqence |
2515 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
d2f487af | 2516 | } |
7bc95e2e | 2517 | |
d2f487af | 2518 | if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) { |
2519 | authTimer = GetTickCount(); | |
2520 | cardAUTHSC = receivedCmd[1] / 4; // received block num | |
2521 | cardAUTHKEY = receivedCmd[0] - 0x60; | |
2522 | crypto1_destroy(pcs);//Added by martin | |
2523 | crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY)); | |
51969283 | 2524 | |
d2f487af | 2525 | if (!encrypted_data) { // first authentication |
b03c0f2d | 2526 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
51969283 | 2527 | |
d2f487af | 2528 | crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state |
2529 | num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce | |
7bc95e2e | 2530 | } else { // nested authentication |
b03c0f2d | 2531 | if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY ); |
7bc95e2e | 2532 | ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0); |
d2f487af | 2533 | num_to_bytes(ans, 4, rAUTH_AT); |
2534 | } | |
0c8d25eb | 2535 | |
d2f487af | 2536 | EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT)); |
2537 | //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]); | |
2538 | cardSTATE = MFEMUL_AUTH1; | |
2539 | break; | |
51969283 | 2540 | } |
7bc95e2e | 2541 | |
8f51ddb0 M |
2542 | // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued |
2543 | // BUT... ACK --> NACK | |
2544 | if (len == 1 && receivedCmd[0] == CARD_ACK) { | |
2545 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2546 | break; | |
2547 | } | |
2548 | ||
2549 | // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK) | |
2550 | if (len == 1 && receivedCmd[0] == CARD_NACK_NA) { | |
2551 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2552 | break; | |
0a39986e M |
2553 | } |
2554 | ||
7bc95e2e | 2555 | if(len != 4) { |
6a1f2d82 | 2556 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
7bc95e2e | 2557 | break; |
2558 | } | |
d2f487af | 2559 | |
2560 | if(receivedCmd[0] == 0x30 // read block | |
2561 | || receivedCmd[0] == 0xA0 // write block | |
b03c0f2d | 2562 | || receivedCmd[0] == 0xC0 // inc |
2563 | || receivedCmd[0] == 0xC1 // dec | |
2564 | || receivedCmd[0] == 0xC2 // restore | |
7bc95e2e | 2565 | || receivedCmd[0] == 0xB0) { // transfer |
2566 | if (receivedCmd[1] >= 16 * 4) { | |
d2f487af | 2567 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2568 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]); | |
2569 | break; | |
2570 | } | |
2571 | ||
7bc95e2e | 2572 | if (receivedCmd[1] / 4 != cardAUTHSC) { |
8f51ddb0 | 2573 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
d2f487af | 2574 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC); |
8f51ddb0 M |
2575 | break; |
2576 | } | |
d2f487af | 2577 | } |
2578 | // read block | |
2579 | if (receivedCmd[0] == 0x30) { | |
b03c0f2d | 2580 | if (MF_DBGLEVEL >= 4) { |
d2f487af | 2581 | Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]); |
2582 | } | |
8f51ddb0 M |
2583 | emlGetMem(response, receivedCmd[1], 1); |
2584 | AppendCrc14443a(response, 16); | |
6a1f2d82 | 2585 | mf_crypto1_encrypt(pcs, response, 18, response_par); |
2586 | EmSendCmdPar(response, 18, response_par); | |
d2f487af | 2587 | numReads++; |
12d708fe | 2588 | if(exitAfterNReads > 0 && numReads >= exitAfterNReads) { |
d2f487af | 2589 | Dbprintf("%d reads done, exiting", numReads); |
2590 | finished = true; | |
2591 | } | |
0a39986e M |
2592 | break; |
2593 | } | |
0a39986e | 2594 | // write block |
d2f487af | 2595 | if (receivedCmd[0] == 0xA0) { |
b03c0f2d | 2596 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]); |
8f51ddb0 | 2597 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); |
8f51ddb0 M |
2598 | cardSTATE = MFEMUL_WRITEBL2; |
2599 | cardWRBL = receivedCmd[1]; | |
0a39986e | 2600 | break; |
7bc95e2e | 2601 | } |
0014cb46 | 2602 | // increment, decrement, restore |
d2f487af | 2603 | if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) { |
b03c0f2d | 2604 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
d2f487af | 2605 | if (emlCheckValBl(receivedCmd[1])) { |
2606 | if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking"); | |
0014cb46 M |
2607 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2608 | break; | |
2609 | } | |
2610 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2611 | if (receivedCmd[0] == 0xC1) | |
2612 | cardSTATE = MFEMUL_INTREG_INC; | |
2613 | if (receivedCmd[0] == 0xC0) | |
2614 | cardSTATE = MFEMUL_INTREG_DEC; | |
2615 | if (receivedCmd[0] == 0xC2) | |
2616 | cardSTATE = MFEMUL_INTREG_REST; | |
2617 | cardWRBL = receivedCmd[1]; | |
0014cb46 M |
2618 | break; |
2619 | } | |
0014cb46 | 2620 | // transfer |
d2f487af | 2621 | if (receivedCmd[0] == 0xB0) { |
b03c0f2d | 2622 | if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]); |
0014cb46 M |
2623 | if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1])) |
2624 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2625 | else | |
2626 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
0014cb46 M |
2627 | break; |
2628 | } | |
9ca155ba | 2629 | // halt |
d2f487af | 2630 | if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) { |
9ca155ba | 2631 | LED_B_OFF(); |
0a39986e | 2632 | LED_C_OFF(); |
0014cb46 M |
2633 | cardSTATE = MFEMUL_HALTED; |
2634 | if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer); | |
6a1f2d82 | 2635 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0a39986e | 2636 | break; |
9ca155ba | 2637 | } |
d2f487af | 2638 | // RATS |
2639 | if (receivedCmd[0] == 0xe0) {//RATS | |
8f51ddb0 M |
2640 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); |
2641 | break; | |
2642 | } | |
d2f487af | 2643 | // command not allowed |
2644 | if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking"); | |
2645 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
51969283 | 2646 | break; |
8f51ddb0 M |
2647 | } |
2648 | case MFEMUL_WRITEBL2:{ | |
2649 | if (len == 18){ | |
2650 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2651 | emlSetMem(receivedCmd, cardWRBL, 1); | |
2652 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK)); | |
2653 | cardSTATE = MFEMUL_WORK; | |
51969283 | 2654 | } else { |
0014cb46 | 2655 | cardSTATE_TO_IDLE(); |
6a1f2d82 | 2656 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
8f51ddb0 | 2657 | } |
8f51ddb0 | 2658 | break; |
50193c1e | 2659 | } |
0014cb46 M |
2660 | |
2661 | case MFEMUL_INTREG_INC:{ | |
2662 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2663 | memcpy(&ans, receivedCmd, 4); | |
2664 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2665 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2666 | cardSTATE_TO_IDLE(); | |
2667 | break; | |
7bc95e2e | 2668 | } |
6a1f2d82 | 2669 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2670 | cardINTREG = cardINTREG + ans; |
2671 | cardSTATE = MFEMUL_WORK; | |
2672 | break; | |
2673 | } | |
2674 | case MFEMUL_INTREG_DEC:{ | |
2675 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2676 | memcpy(&ans, receivedCmd, 4); | |
2677 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2678 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2679 | cardSTATE_TO_IDLE(); | |
2680 | break; | |
2681 | } | |
6a1f2d82 | 2682 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2683 | cardINTREG = cardINTREG - ans; |
2684 | cardSTATE = MFEMUL_WORK; | |
2685 | break; | |
2686 | } | |
2687 | case MFEMUL_INTREG_REST:{ | |
2688 | mf_crypto1_decrypt(pcs, receivedCmd, len); | |
2689 | memcpy(&ans, receivedCmd, 4); | |
2690 | if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) { | |
2691 | EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA)); | |
2692 | cardSTATE_TO_IDLE(); | |
2693 | break; | |
2694 | } | |
6a1f2d82 | 2695 | LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE); |
0014cb46 M |
2696 | cardSTATE = MFEMUL_WORK; |
2697 | break; | |
2698 | } | |
50193c1e | 2699 | } |
50193c1e M |
2700 | } |
2701 | ||
9ca155ba M |
2702 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
2703 | LEDsoff(); | |
2704 | ||
d2f487af | 2705 | if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK |
2706 | { | |
2707 | //May just aswell send the collected ar_nr in the response aswell | |
12d708fe | 2708 | cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,1,0,&ar_nr_responses,ar_nr_collected*4*4); |
d2f487af | 2709 | } |
d714d3ef | 2710 | |
12d708fe | 2711 | if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 ) |
d2f487af | 2712 | { |
12d708fe | 2713 | if(ar_nr_collected > 1 ) { |
d2f487af | 2714 | Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:"); |
d714d3ef | 2715 | Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x", |
0c8d25eb | 2716 | ar_nr_responses[0], // UID |
d2f487af | 2717 | ar_nr_responses[1], //NT |
2718 | ar_nr_responses[2], //AR1 | |
2719 | ar_nr_responses[3], //NR1 | |
2720 | ar_nr_responses[6], //AR2 | |
2721 | ar_nr_responses[7] //NR2 | |
2722 | ); | |
7bc95e2e | 2723 | } else { |
d2f487af | 2724 | Dbprintf("Failed to obtain two AR/NR pairs!"); |
12d708fe | 2725 | if(ar_nr_collected > 0 ) { |
d714d3ef | 2726 | Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x", |
d2f487af | 2727 | ar_nr_responses[0], // UID |
2728 | ar_nr_responses[1], //NT | |
2729 | ar_nr_responses[2], //AR1 | |
2730 | ar_nr_responses[3] //NR1 | |
2731 | ); | |
2732 | } | |
2733 | } | |
2734 | } | |
3000dc4e | 2735 | if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen()); |
0c8d25eb | 2736 | |
15c4dc5a | 2737 | } |
b62a5a84 | 2738 | |
d2f487af | 2739 | |
2740 | ||
b62a5a84 M |
2741 | //----------------------------------------------------------------------------- |
2742 | // MIFARE sniffer. | |
2743 | // | |
2744 | //----------------------------------------------------------------------------- | |
5cd9ec01 M |
2745 | void RAMFUNC SniffMifare(uint8_t param) { |
2746 | // param: | |
2747 | // bit 0 - trigger from first card answer | |
2748 | // bit 1 - trigger from first reader 7-bit request | |
39864b0b M |
2749 | |
2750 | // C(red) A(yellow) B(green) | |
b62a5a84 M |
2751 | LEDsoff(); |
2752 | // init trace buffer | |
3000dc4e MHS |
2753 | clear_trace(); |
2754 | set_tracing(TRUE); | |
b62a5a84 | 2755 | |
b62a5a84 M |
2756 | // The command (reader -> tag) that we're receiving. |
2757 | // The length of a received command will in most cases be no more than 18 bytes. | |
2758 | // So 32 should be enough! | |
f71f4deb | 2759 | uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE]; |
2760 | uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE]; | |
b62a5a84 | 2761 | // The response (tag -> reader) that we're receiving. |
f71f4deb | 2762 | uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE]; |
2763 | uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE]; | |
b62a5a84 M |
2764 | |
2765 | // As we receive stuff, we copy it from receivedCmd or receivedResponse | |
2766 | // into trace, along with its length and other annotations. | |
2767 | //uint8_t *trace = (uint8_t *)BigBuf; | |
2768 | ||
f71f4deb | 2769 | // free eventually allocated BigBuf memory |
2770 | BigBuf_free(); | |
2771 | // allocate the DMA buffer, used to stream samples from the FPGA | |
2772 | uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE); | |
7bc95e2e | 2773 | uint8_t *data = dmaBuf; |
2774 | uint8_t previous_data = 0; | |
5cd9ec01 M |
2775 | int maxDataLen = 0; |
2776 | int dataLen = 0; | |
7bc95e2e | 2777 | bool ReaderIsActive = FALSE; |
2778 | bool TagIsActive = FALSE; | |
2779 | ||
2780 | iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER); | |
b62a5a84 M |
2781 | |
2782 | // Set up the demodulator for tag -> reader responses. | |
6a1f2d82 | 2783 | DemodInit(receivedResponse, receivedResponsePar); |
b62a5a84 M |
2784 | |
2785 | // Set up the demodulator for the reader -> tag commands | |
6a1f2d82 | 2786 | UartInit(receivedCmd, receivedCmdPar); |
b62a5a84 M |
2787 | |
2788 | // Setup for the DMA. | |
7bc95e2e | 2789 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. |
b62a5a84 | 2790 | |
b62a5a84 | 2791 | LED_D_OFF(); |
39864b0b M |
2792 | |
2793 | // init sniffer | |
2794 | MfSniffInit(); | |
b62a5a84 | 2795 | |
b62a5a84 | 2796 | // And now we loop, receiving samples. |
7bc95e2e | 2797 | for(uint32_t sniffCounter = 0; TRUE; ) { |
2798 | ||
5cd9ec01 M |
2799 | if(BUTTON_PRESS()) { |
2800 | DbpString("cancelled by button"); | |
7bc95e2e | 2801 | break; |
5cd9ec01 M |
2802 | } |
2803 | ||
b62a5a84 M |
2804 | LED_A_ON(); |
2805 | WDT_HIT(); | |
39864b0b | 2806 | |
7bc95e2e | 2807 | if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time |
2808 | // check if a transaction is completed (timeout after 2000ms). | |
2809 | // if yes, stop the DMA transfer and send what we have so far to the client | |
2810 | if (MfSniffSend(2000)) { | |
2811 | // Reset everything - we missed some sniffed data anyway while the DMA was stopped | |
2812 | sniffCounter = 0; | |
2813 | data = dmaBuf; | |
2814 | maxDataLen = 0; | |
2815 | ReaderIsActive = FALSE; | |
2816 | TagIsActive = FALSE; | |
2817 | FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer. | |
39864b0b | 2818 | } |
39864b0b | 2819 | } |
7bc95e2e | 2820 | |
2821 | int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far | |
2822 | int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred | |
2823 | if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred | |
2824 | dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed | |
2825 | } else { | |
2826 | dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed | |
5cd9ec01 M |
2827 | } |
2828 | // test for length of buffer | |
7bc95e2e | 2829 | if(dataLen > maxDataLen) { // we are more behind than ever... |
2830 | maxDataLen = dataLen; | |
f71f4deb | 2831 | if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) { |
5cd9ec01 | 2832 | Dbprintf("blew circular buffer! dataLen=0x%x", dataLen); |
7bc95e2e | 2833 | break; |
b62a5a84 M |
2834 | } |
2835 | } | |
5cd9ec01 | 2836 | if(dataLen < 1) continue; |
b62a5a84 | 2837 | |
7bc95e2e | 2838 | // primary buffer was stopped ( <-- we lost data! |
5cd9ec01 M |
2839 | if (!AT91C_BASE_PDC_SSC->PDC_RCR) { |
2840 | AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf; | |
2841 | AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE; | |
55acbb2a | 2842 | Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary |
5cd9ec01 M |
2843 | } |
2844 | // secondary buffer sets as primary, secondary buffer was stopped | |
2845 | if (!AT91C_BASE_PDC_SSC->PDC_RNCR) { | |
2846 | AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; | |
b62a5a84 M |
2847 | AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE; |
2848 | } | |
5cd9ec01 M |
2849 | |
2850 | LED_A_OFF(); | |
b62a5a84 | 2851 | |
7bc95e2e | 2852 | if (sniffCounter & 0x01) { |
b62a5a84 | 2853 | |
7bc95e2e | 2854 | if(!TagIsActive) { // no need to try decoding tag data if the reader is sending |
2855 | uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4); | |
2856 | if(MillerDecoding(readerdata, (sniffCounter-1)*4)) { | |
2857 | LED_C_INV(); | |
6a1f2d82 | 2858 | if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break; |
b62a5a84 | 2859 | |
7bc95e2e | 2860 | /* And ready to receive another command. */ |
0ec548dc | 2861 | UartInit(receivedCmd, receivedCmdPar); |
7bc95e2e | 2862 | |
2863 | /* And also reset the demod code */ | |
2864 | DemodReset(); | |
2865 | } | |
2866 | ReaderIsActive = (Uart.state != STATE_UNSYNCD); | |
2867 | } | |
2868 | ||
2869 | if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending | |
2870 | uint8_t tagdata = (previous_data << 4) | (*data & 0x0F); | |
2871 | if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) { | |
2872 | LED_C_INV(); | |
b62a5a84 | 2873 | |
6a1f2d82 | 2874 | if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break; |
39864b0b | 2875 | |
7bc95e2e | 2876 | // And ready to receive another response. |
2877 | DemodReset(); | |
46c65fed | 2878 | |
0ec548dc | 2879 | // And reset the Miller decoder including its (now outdated) input buffer |
2880 | UartInit(receivedCmd, receivedCmdPar); | |
7bc95e2e | 2881 | } |
2882 | TagIsActive = (Demod.state != DEMOD_UNSYNCD); | |
2883 | } | |
b62a5a84 M |
2884 | } |
2885 | ||
7bc95e2e | 2886 | previous_data = *data; |
2887 | sniffCounter++; | |
5cd9ec01 | 2888 | data++; |
d714d3ef | 2889 | if(data == dmaBuf + DMA_BUFFER_SIZE) { |
5cd9ec01 | 2890 | data = dmaBuf; |
b62a5a84 | 2891 | } |
7bc95e2e | 2892 | |
b62a5a84 M |
2893 | } // main cycle |
2894 | ||
2895 | DbpString("COMMAND FINISHED"); | |
2896 | ||
55acbb2a | 2897 | FpgaDisableSscDma(); |
39864b0b M |
2898 | MfSniffEnd(); |
2899 | ||
7bc95e2e | 2900 | Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len); |
b62a5a84 | 2901 | LEDsoff(); |
3803d529 | 2902 | } |