| ba06a4b6 |
1 | telnet_port 4444 |
| 2 | gdb_port 3333 |
| 3 | |
| 4 | interface parport |
| 5 | parport_port 0x378 |
| 6 | parport_cable wiggler |
| 7 | jtag_speed 0 |
| 8 | jtag_nsrst_delay 200 |
| 9 | jtag_ntrst_delay 200 |
| 10 | |
| 11 | reset_config srst_only srst_pulls_trst |
| 12 | |
| 13 | jtag newtap sam7x256 cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x3f0f0f0f |
| 14 | #jtag newtap xilinx tap -irlen 6 -ircapture 0x1 -irmask 0xf -expected-id 0x1c1a093 |
| 15 | |
| 16 | target create sam7x256.cpu arm7tdmi -endian little -chain-position sam7x256.cpu -variant arm7tdmi |
| 17 | sam7x256.cpu configure -event reset-init { |
| 18 | # disable watchdog |
| 19 | mww 0xfffffd44 0x00008000 |
| 20 | # enable user reset |
| 21 | mww 0xfffffd08 0xa5000001 |
| 22 | # CKGR_MOR : enable the main oscillator |
| 23 | mww 0xfffffc20 0x00000601 |
| 24 | sleep 10 |
| 25 | # CKGR_PLLR: 16 MHz * (5+1) /1 = 96Mhz |
| 26 | mww 0xfffffc2c 0x00051c01 |
| 27 | sleep 10 |
| 28 | # PMC_MCKR : MCK = PLL / 2 = 48 MHz |
| 29 | mww 0xfffffc30 0x00000007 |
| 30 | sleep 10 |
| 31 | # MC_FMR: flash mode (FWS=1,FMCN=60) |
| 32 | mww 0xffffff60 0x003c0100 |
| 33 | sleep 100 |
| 34 | } |
| 35 | |
| 36 | gdb_memory_map enable |
| 37 | |
| 38 | sam7x256.cpu configure -work-area-virt 0 -work-area-phys 0x00200000 -work-area-size 0x10000 -work-area-backup 0 |
| 39 | flash bank at91sam7 0 0 0 0 0 |
projects / proxmark3-svn / blame