| 1 | //----------------------------------------------------------------------------- |
| 2 | // This code is licensed to you under the terms of the GNU GPL, version 2 or, |
| 3 | // at your option, any later version. See the LICENSE.txt file for the text of |
| 4 | // the license. |
| 5 | //----------------------------------------------------------------------------- |
| 6 | // Miscellaneous routines for low frequency tag operations. |
| 7 | // Tags supported here so far are Texas Instruments (TI), HID |
| 8 | // Also routines for raw mode reading/simulating of LF waveform |
| 9 | //----------------------------------------------------------------------------- |
| 10 | |
| 11 | #include "proxmark3.h" |
| 12 | #include "apps.h" |
| 13 | #include "util.h" |
| 14 | #include "hitag2.h" |
| 15 | #include "crc16.h" |
| 16 | #include "string.h" |
| 17 | #include "lfdemod.h" |
| 18 | #include "lfsampling.h" |
| 19 | #include "protocols.h" |
| 20 | #include "usb_cdc.h" // for usb_poll_validate_length |
| 21 | |
| 22 | /** |
| 23 | * Function to do a modulation and then get samples. |
| 24 | * @param delay_off |
| 25 | * @param period_0 |
| 26 | * @param period_1 |
| 27 | * @param command |
| 28 | */ |
| 29 | void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint32_t period_1, uint8_t *command) |
| 30 | { |
| 31 | |
| 32 | int divisor_used = 95; // 125 KHz |
| 33 | // see if 'h' was specified |
| 34 | |
| 35 | if (command[strlen((char *) command) - 1] == 'h') |
| 36 | divisor_used = 88; // 134.8 KHz |
| 37 | |
| 38 | sample_config sc = { 0,0,1, divisor_used, 0}; |
| 39 | setSamplingConfig(&sc); |
| 40 | //clear read buffer |
| 41 | BigBuf_Clear_keep_EM(); |
| 42 | |
| 43 | /* Make sure the tag is reset */ |
| 44 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
| 45 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 46 | SpinDelay(2500); |
| 47 | |
| 48 | LFSetupFPGAForADC(sc.divisor, 1); |
| 49 | |
| 50 | // And a little more time for the tag to fully power up |
| 51 | SpinDelay(2000); |
| 52 | |
| 53 | // now modulate the reader field |
| 54 | while(*command != '\0' && *command != ' ') { |
| 55 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 56 | LED_D_OFF(); |
| 57 | SpinDelayUs(delay_off); |
| 58 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor); |
| 59 | |
| 60 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); |
| 61 | LED_D_ON(); |
| 62 | if(*(command++) == '0') |
| 63 | SpinDelayUs(period_0); |
| 64 | else |
| 65 | SpinDelayUs(period_1); |
| 66 | } |
| 67 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 68 | LED_D_OFF(); |
| 69 | SpinDelayUs(delay_off); |
| 70 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor); |
| 71 | |
| 72 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); |
| 73 | |
| 74 | // now do the read |
| 75 | DoAcquisition_config(false); |
| 76 | } |
| 77 | |
| 78 | /* blank r/w tag data stream |
| 79 | ...0000000000000000 01111111 |
| 80 | 1010101010101010101010101010101010101010101010101010101010101010 |
| 81 | 0011010010100001 |
| 82 | 01111111 |
| 83 | 101010101010101[0]000... |
| 84 | |
| 85 | [5555fe852c5555555555555555fe0000] |
| 86 | */ |
| 87 | void ReadTItag(void) |
| 88 | { |
| 89 | // some hardcoded initial params |
| 90 | // when we read a TI tag we sample the zerocross line at 2Mhz |
| 91 | // TI tags modulate a 1 as 16 cycles of 123.2Khz |
| 92 | // TI tags modulate a 0 as 16 cycles of 134.2Khz |
| 93 | #define FSAMPLE 2000000 |
| 94 | #define FREQLO 123200 |
| 95 | #define FREQHI 134200 |
| 96 | |
| 97 | signed char *dest = (signed char *)BigBuf_get_addr(); |
| 98 | uint16_t n = BigBuf_max_traceLen(); |
| 99 | // 128 bit shift register [shift3:shift2:shift1:shift0] |
| 100 | uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0; |
| 101 | |
| 102 | int i, cycles=0, samples=0; |
| 103 | // how many sample points fit in 16 cycles of each frequency |
| 104 | uint32_t sampleslo = (FSAMPLE<<4)/FREQLO, sampleshi = (FSAMPLE<<4)/FREQHI; |
| 105 | // when to tell if we're close enough to one freq or another |
| 106 | uint32_t threshold = (sampleslo - sampleshi + 1)>>1; |
| 107 | |
| 108 | // TI tags charge at 134.2Khz |
| 109 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
| 110 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz |
| 111 | |
| 112 | // Place FPGA in passthrough mode, in this mode the CROSS_LO line |
| 113 | // connects to SSP_DIN and the SSP_DOUT logic level controls |
| 114 | // whether we're modulating the antenna (high) |
| 115 | // or listening to the antenna (low) |
| 116 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU); |
| 117 | |
| 118 | // get TI tag data into the buffer |
| 119 | AcquireTiType(); |
| 120 | |
| 121 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 122 | |
| 123 | for (i=0; i<n-1; i++) { |
| 124 | // count cycles by looking for lo to hi zero crossings |
| 125 | if ( (dest[i]<0) && (dest[i+1]>0) ) { |
| 126 | cycles++; |
| 127 | // after 16 cycles, measure the frequency |
| 128 | if (cycles>15) { |
| 129 | cycles=0; |
| 130 | samples=i-samples; // number of samples in these 16 cycles |
| 131 | |
| 132 | // TI bits are coming to us lsb first so shift them |
| 133 | // right through our 128 bit right shift register |
| 134 | shift0 = (shift0>>1) | (shift1 << 31); |
| 135 | shift1 = (shift1>>1) | (shift2 << 31); |
| 136 | shift2 = (shift2>>1) | (shift3 << 31); |
| 137 | shift3 >>= 1; |
| 138 | |
| 139 | // check if the cycles fall close to the number |
| 140 | // expected for either the low or high frequency |
| 141 | if ( (samples>(sampleslo-threshold)) && (samples<(sampleslo+threshold)) ) { |
| 142 | // low frequency represents a 1 |
| 143 | shift3 |= (1<<31); |
| 144 | } else if ( (samples>(sampleshi-threshold)) && (samples<(sampleshi+threshold)) ) { |
| 145 | // high frequency represents a 0 |
| 146 | } else { |
| 147 | // probably detected a gay waveform or noise |
| 148 | // use this as gaydar or discard shift register and start again |
| 149 | shift3 = shift2 = shift1 = shift0 = 0; |
| 150 | } |
| 151 | samples = i; |
| 152 | |
| 153 | // for each bit we receive, test if we've detected a valid tag |
| 154 | |
| 155 | // if we see 17 zeroes followed by 6 ones, we might have a tag |
| 156 | // remember the bits are backwards |
| 157 | if ( ((shift0 & 0x7fffff) == 0x7e0000) ) { |
| 158 | // if start and end bytes match, we have a tag so break out of the loop |
| 159 | if ( ((shift0>>16)&0xff) == ((shift3>>8)&0xff) ) { |
| 160 | cycles = 0xF0B; //use this as a flag (ugly but whatever) |
| 161 | break; |
| 162 | } |
| 163 | } |
| 164 | } |
| 165 | } |
| 166 | } |
| 167 | |
| 168 | // if flag is set we have a tag |
| 169 | if (cycles!=0xF0B) { |
| 170 | DbpString("Info: No valid tag detected."); |
| 171 | } else { |
| 172 | // put 64 bit data into shift1 and shift0 |
| 173 | shift0 = (shift0>>24) | (shift1 << 8); |
| 174 | shift1 = (shift1>>24) | (shift2 << 8); |
| 175 | |
| 176 | // align 16 bit crc into lower half of shift2 |
| 177 | shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff; |
| 178 | |
| 179 | // if r/w tag, check ident match |
| 180 | if (shift3 & (1<<15) ) { |
| 181 | DbpString("Info: TI tag is rewriteable"); |
| 182 | // only 15 bits compare, last bit of ident is not valid |
| 183 | if (((shift3 >> 16) ^ shift0) & 0x7fff ) { |
| 184 | DbpString("Error: Ident mismatch!"); |
| 185 | } else { |
| 186 | DbpString("Info: TI tag ident is valid"); |
| 187 | } |
| 188 | } else { |
| 189 | DbpString("Info: TI tag is readonly"); |
| 190 | } |
| 191 | |
| 192 | // WARNING the order of the bytes in which we calc crc below needs checking |
| 193 | // i'm 99% sure the crc algorithm is correct, but it may need to eat the |
| 194 | // bytes in reverse or something |
| 195 | // calculate CRC |
| 196 | uint32_t crc=0; |
| 197 | |
| 198 | crc = update_crc16(crc, (shift0)&0xff); |
| 199 | crc = update_crc16(crc, (shift0>>8)&0xff); |
| 200 | crc = update_crc16(crc, (shift0>>16)&0xff); |
| 201 | crc = update_crc16(crc, (shift0>>24)&0xff); |
| 202 | crc = update_crc16(crc, (shift1)&0xff); |
| 203 | crc = update_crc16(crc, (shift1>>8)&0xff); |
| 204 | crc = update_crc16(crc, (shift1>>16)&0xff); |
| 205 | crc = update_crc16(crc, (shift1>>24)&0xff); |
| 206 | |
| 207 | Dbprintf("Info: Tag data: %x%08x, crc=%x", (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF); |
| 208 | if (crc != (shift2&0xffff)) { |
| 209 | Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc); |
| 210 | } else { |
| 211 | DbpString("Info: CRC is good"); |
| 212 | } |
| 213 | } |
| 214 | } |
| 215 | |
| 216 | void WriteTIbyte(uint8_t b) |
| 217 | { |
| 218 | int i = 0; |
| 219 | |
| 220 | // modulate 8 bits out to the antenna |
| 221 | for (i=0; i<8; i++) |
| 222 | { |
| 223 | if (b&(1<<i)) { |
| 224 | // stop modulating antenna |
| 225 | LOW(GPIO_SSC_DOUT); |
| 226 | SpinDelayUs(1000); |
| 227 | // modulate antenna |
| 228 | HIGH(GPIO_SSC_DOUT); |
| 229 | SpinDelayUs(1000); |
| 230 | } else { |
| 231 | // stop modulating antenna |
| 232 | LOW(GPIO_SSC_DOUT); |
| 233 | SpinDelayUs(300); |
| 234 | // modulate antenna |
| 235 | HIGH(GPIO_SSC_DOUT); |
| 236 | SpinDelayUs(1700); |
| 237 | } |
| 238 | } |
| 239 | } |
| 240 | |
| 241 | void AcquireTiType(void) |
| 242 | { |
| 243 | int i, j, n; |
| 244 | // tag transmission is <20ms, sampling at 2M gives us 40K samples max |
| 245 | // each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t |
| 246 | #define TIBUFLEN 1250 |
| 247 | |
| 248 | // clear buffer |
| 249 | uint32_t *buf = (uint32_t *)BigBuf_get_addr(); |
| 250 | |
| 251 | //clear buffer now so it does not interfere with timing later |
| 252 | BigBuf_Clear_ext(false); |
| 253 | |
| 254 | // Set up the synchronous serial port |
| 255 | AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN; |
| 256 | AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN; |
| 257 | |
| 258 | // steal this pin from the SSP and use it to control the modulation |
| 259 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; |
| 260 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; |
| 261 | |
| 262 | AT91C_BASE_SSC->SSC_CR = AT91C_SSC_SWRST; |
| 263 | AT91C_BASE_SSC->SSC_CR = AT91C_SSC_RXEN | AT91C_SSC_TXEN; |
| 264 | |
| 265 | // Sample at 2 Mbit/s, so TI tags are 16.2 vs. 14.9 clocks long |
| 266 | // 48/2 = 24 MHz clock must be divided by 12 |
| 267 | AT91C_BASE_SSC->SSC_CMR = 12; |
| 268 | |
| 269 | AT91C_BASE_SSC->SSC_RCMR = SSC_CLOCK_MODE_SELECT(0); |
| 270 | AT91C_BASE_SSC->SSC_RFMR = SSC_FRAME_MODE_BITS_IN_WORD(32) | AT91C_SSC_MSBF; |
| 271 | AT91C_BASE_SSC->SSC_TCMR = 0; |
| 272 | AT91C_BASE_SSC->SSC_TFMR = 0; |
| 273 | |
| 274 | LED_D_ON(); |
| 275 | |
| 276 | // modulate antenna |
| 277 | HIGH(GPIO_SSC_DOUT); |
| 278 | |
| 279 | // Charge TI tag for 50ms. |
| 280 | SpinDelay(50); |
| 281 | |
| 282 | // stop modulating antenna and listen |
| 283 | LOW(GPIO_SSC_DOUT); |
| 284 | |
| 285 | LED_D_OFF(); |
| 286 | |
| 287 | i = 0; |
| 288 | for(;;) { |
| 289 | if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { |
| 290 | buf[i] = AT91C_BASE_SSC->SSC_RHR; // store 32 bit values in buffer |
| 291 | i++; if(i >= TIBUFLEN) break; |
| 292 | } |
| 293 | WDT_HIT(); |
| 294 | } |
| 295 | |
| 296 | // return stolen pin to SSP |
| 297 | AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DOUT; |
| 298 | AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT; |
| 299 | |
| 300 | char *dest = (char *)BigBuf_get_addr(); |
| 301 | n = TIBUFLEN * 32; |
| 302 | |
| 303 | // unpack buffer |
| 304 | for (i = TIBUFLEN-1; i >= 0; i--) { |
| 305 | for (j = 0; j < 32; j++) { |
| 306 | if(buf[i] & (1 << j)) { |
| 307 | dest[--n] = 1; |
| 308 | } else { |
| 309 | dest[--n] = -1; |
| 310 | } |
| 311 | } |
| 312 | } |
| 313 | } |
| 314 | |
| 315 | // arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc |
| 316 | // if crc provided, it will be written with the data verbatim (even if bogus) |
| 317 | // if not provided a valid crc will be computed from the data and written. |
| 318 | void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc) |
| 319 | { |
| 320 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
| 321 | if(crc == 0) { |
| 322 | crc = update_crc16(crc, (idlo)&0xff); |
| 323 | crc = update_crc16(crc, (idlo>>8)&0xff); |
| 324 | crc = update_crc16(crc, (idlo>>16)&0xff); |
| 325 | crc = update_crc16(crc, (idlo>>24)&0xff); |
| 326 | crc = update_crc16(crc, (idhi)&0xff); |
| 327 | crc = update_crc16(crc, (idhi>>8)&0xff); |
| 328 | crc = update_crc16(crc, (idhi>>16)&0xff); |
| 329 | crc = update_crc16(crc, (idhi>>24)&0xff); |
| 330 | } |
| 331 | Dbprintf("Writing to tag: %x%08x, crc=%x", (unsigned int) idhi, (unsigned int) idlo, crc); |
| 332 | |
| 333 | // TI tags charge at 134.2Khz |
| 334 | FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz |
| 335 | // Place FPGA in passthrough mode, in this mode the CROSS_LO line |
| 336 | // connects to SSP_DIN and the SSP_DOUT logic level controls |
| 337 | // whether we're modulating the antenna (high) |
| 338 | // or listening to the antenna (low) |
| 339 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU); |
| 340 | LED_A_ON(); |
| 341 | |
| 342 | // steal this pin from the SSP and use it to control the modulation |
| 343 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT; |
| 344 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; |
| 345 | |
| 346 | // writing algorithm: |
| 347 | // a high bit consists of a field off for 1ms and field on for 1ms |
| 348 | // a low bit consists of a field off for 0.3ms and field on for 1.7ms |
| 349 | // initiate a charge time of 50ms (field on) then immediately start writing bits |
| 350 | // start by writing 0xBB (keyword) and 0xEB (password) |
| 351 | // then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer) |
| 352 | // finally end with 0x0300 (write frame) |
| 353 | // all data is sent lsb first |
| 354 | // finish with 15ms programming time |
| 355 | |
| 356 | // modulate antenna |
| 357 | HIGH(GPIO_SSC_DOUT); |
| 358 | SpinDelay(50); // charge time |
| 359 | |
| 360 | WriteTIbyte(0xbb); // keyword |
| 361 | WriteTIbyte(0xeb); // password |
| 362 | WriteTIbyte( (idlo )&0xff ); |
| 363 | WriteTIbyte( (idlo>>8 )&0xff ); |
| 364 | WriteTIbyte( (idlo>>16)&0xff ); |
| 365 | WriteTIbyte( (idlo>>24)&0xff ); |
| 366 | WriteTIbyte( (idhi )&0xff ); |
| 367 | WriteTIbyte( (idhi>>8 )&0xff ); |
| 368 | WriteTIbyte( (idhi>>16)&0xff ); |
| 369 | WriteTIbyte( (idhi>>24)&0xff ); // data hi to lo |
| 370 | WriteTIbyte( (crc )&0xff ); // crc lo |
| 371 | WriteTIbyte( (crc>>8 )&0xff ); // crc hi |
| 372 | WriteTIbyte(0x00); // write frame lo |
| 373 | WriteTIbyte(0x03); // write frame hi |
| 374 | HIGH(GPIO_SSC_DOUT); |
| 375 | SpinDelay(50); // programming time |
| 376 | |
| 377 | LED_A_OFF(); |
| 378 | |
| 379 | // get TI tag data into the buffer |
| 380 | AcquireTiType(); |
| 381 | |
| 382 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 383 | DbpString("Now use `lf ti read` to check"); |
| 384 | } |
| 385 | |
| 386 | void SimulateTagLowFrequency(int period, int gap, int ledcontrol) |
| 387 | { |
| 388 | int i; |
| 389 | uint8_t *tab = BigBuf_get_addr(); |
| 390 | |
| 391 | FpgaDownloadAndGo(FPGA_BITSTREAM_LF); |
| 392 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT); |
| 393 | |
| 394 | AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK; |
| 395 | AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT; |
| 396 | AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK; |
| 397 | |
| 398 | #define SHORT_COIL() LOW(GPIO_SSC_DOUT) |
| 399 | #define OPEN_COIL() HIGH(GPIO_SSC_DOUT) |
| 400 | |
| 401 | i = 0; |
| 402 | for(;;) { |
| 403 | //wait until SSC_CLK goes HIGH |
| 404 | while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) { |
| 405 | if(BUTTON_PRESS() || usb_poll_validate_length() ) { |
| 406 | DbpString("Stopped"); |
| 407 | return; |
| 408 | } |
| 409 | WDT_HIT(); |
| 410 | } |
| 411 | if (ledcontrol) LED_D_ON(); |
| 412 | |
| 413 | if(tab[i]) |
| 414 | OPEN_COIL(); |
| 415 | else |
| 416 | SHORT_COIL(); |
| 417 | |
| 418 | if (ledcontrol) LED_D_OFF(); |
| 419 | |
| 420 | //wait until SSC_CLK goes LOW |
| 421 | while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) { |
| 422 | if( BUTTON_PRESS() || usb_poll_validate_length() ) { |
| 423 | DbpString("Stopped"); |
| 424 | return; |
| 425 | } |
| 426 | WDT_HIT(); |
| 427 | } |
| 428 | |
| 429 | i++; |
| 430 | if(i == period) { |
| 431 | |
| 432 | i = 0; |
| 433 | if (gap) { |
| 434 | SHORT_COIL(); |
| 435 | SpinDelayUs(gap); |
| 436 | } |
| 437 | } |
| 438 | } |
| 439 | } |
| 440 | |
| 441 | #define DEBUG_FRAME_CONTENTS 1 |
| 442 | void SimulateTagLowFrequencyBidir(int divisor, int t0) |
| 443 | { |
| 444 | } |
| 445 | |
| 446 | // compose fc/8 fc/10 waveform (FSK2) |
| 447 | static void fc(int c, int *n) |
| 448 | { |
| 449 | uint8_t *dest = BigBuf_get_addr(); |
| 450 | int idx; |
| 451 | |
| 452 | // for when we want an fc8 pattern every 4 logical bits |
| 453 | if(c==0) { |
| 454 | dest[((*n)++)]=1; |
| 455 | dest[((*n)++)]=1; |
| 456 | dest[((*n)++)]=1; |
| 457 | dest[((*n)++)]=1; |
| 458 | dest[((*n)++)]=0; |
| 459 | dest[((*n)++)]=0; |
| 460 | dest[((*n)++)]=0; |
| 461 | dest[((*n)++)]=0; |
| 462 | } |
| 463 | |
| 464 | // an fc/8 encoded bit is a bit pattern of 11110000 x6 = 48 samples |
| 465 | if(c==8) { |
| 466 | for (idx=0; idx<6; idx++) { |
| 467 | dest[((*n)++)]=1; |
| 468 | dest[((*n)++)]=1; |
| 469 | dest[((*n)++)]=1; |
| 470 | dest[((*n)++)]=1; |
| 471 | dest[((*n)++)]=0; |
| 472 | dest[((*n)++)]=0; |
| 473 | dest[((*n)++)]=0; |
| 474 | dest[((*n)++)]=0; |
| 475 | } |
| 476 | } |
| 477 | |
| 478 | // an fc/10 encoded bit is a bit pattern of 1111100000 x5 = 50 samples |
| 479 | if(c==10) { |
| 480 | for (idx=0; idx<5; idx++) { |
| 481 | dest[((*n)++)]=1; |
| 482 | dest[((*n)++)]=1; |
| 483 | dest[((*n)++)]=1; |
| 484 | dest[((*n)++)]=1; |
| 485 | dest[((*n)++)]=1; |
| 486 | dest[((*n)++)]=0; |
| 487 | dest[((*n)++)]=0; |
| 488 | dest[((*n)++)]=0; |
| 489 | dest[((*n)++)]=0; |
| 490 | dest[((*n)++)]=0; |
| 491 | } |
| 492 | } |
| 493 | } |
| 494 | // compose fc/X fc/Y waveform (FSKx) |
| 495 | static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) |
| 496 | { |
| 497 | uint8_t *dest = BigBuf_get_addr(); |
| 498 | uint8_t halfFC = fc/2; |
| 499 | uint8_t wavesPerClock = clock/fc; |
| 500 | uint8_t mod = clock % fc; //modifier |
| 501 | uint8_t modAdj = fc/mod; //how often to apply modifier |
| 502 | bool modAdjOk = !(fc % mod); //if (fc % mod==0) modAdjOk=TRUE; |
| 503 | // loop through clock - step field clock |
| 504 | for (uint8_t idx=0; idx < wavesPerClock; idx++){ |
| 505 | // put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave) |
| 506 | memset(dest+(*n), 0, fc-halfFC); //in case of odd number use extra here |
| 507 | memset(dest+(*n)+(fc-halfFC), 1, halfFC); |
| 508 | *n += fc; |
| 509 | } |
| 510 | if (mod>0) (*modCnt)++; |
| 511 | if ((mod>0) && modAdjOk){ //fsk2 |
| 512 | if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave |
| 513 | memset(dest+(*n), 0, fc-halfFC); |
| 514 | memset(dest+(*n)+(fc-halfFC), 1, halfFC); |
| 515 | *n += fc; |
| 516 | } |
| 517 | } |
| 518 | if (mod>0 && !modAdjOk){ //fsk1 |
| 519 | memset(dest+(*n), 0, mod-(mod/2)); |
| 520 | memset(dest+(*n)+(mod-(mod/2)), 1, mod/2); |
| 521 | *n += mod; |
| 522 | } |
| 523 | } |
| 524 | |
| 525 | // prepare a waveform pattern in the buffer based on the ID given then |
| 526 | // simulate a HID tag until the button is pressed |
| 527 | void CmdHIDsimTAG(int hi, int lo, int ledcontrol) |
| 528 | { |
| 529 | int n=0, i=0; |
| 530 | /* |
| 531 | HID tag bitstream format |
| 532 | The tag contains a 44bit unique code. This is sent out MSB first in sets of 4 bits |
| 533 | A 1 bit is represented as 6 fc8 and 5 fc10 patterns |
| 534 | A 0 bit is represented as 5 fc10 and 6 fc8 patterns |
| 535 | A fc8 is inserted before every 4 bits |
| 536 | A special start of frame pattern is used consisting a0b0 where a and b are neither 0 |
| 537 | nor 1 bits, they are special patterns (a = set of 12 fc8 and b = set of 10 fc10) |
| 538 | */ |
| 539 | |
| 540 | if (hi>0xFFF) { |
| 541 | DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags"); |
| 542 | return; |
| 543 | } |
| 544 | fc(0,&n); |
| 545 | // special start of frame marker containing invalid bit sequences |
| 546 | fc(8, &n); fc(8, &n); // invalid |
| 547 | fc(8, &n); fc(10, &n); // logical 0 |
| 548 | fc(10, &n); fc(10, &n); // invalid |
| 549 | fc(8, &n); fc(10, &n); // logical 0 |
| 550 | |
| 551 | WDT_HIT(); |
| 552 | // manchester encode bits 43 to 32 |
| 553 | for (i=11; i>=0; i--) { |
| 554 | if ((i%4)==3) fc(0,&n); |
| 555 | if ((hi>>i)&1) { |
| 556 | fc(10, &n); fc(8, &n); // low-high transition |
| 557 | } else { |
| 558 | fc(8, &n); fc(10, &n); // high-low transition |
| 559 | } |
| 560 | } |
| 561 | |
| 562 | WDT_HIT(); |
| 563 | // manchester encode bits 31 to 0 |
| 564 | for (i=31; i>=0; i--) { |
| 565 | if ((i%4)==3) fc(0,&n); |
| 566 | if ((lo>>i)&1) { |
| 567 | fc(10, &n); fc(8, &n); // low-high transition |
| 568 | } else { |
| 569 | fc(8, &n); fc(10, &n); // high-low transition |
| 570 | } |
| 571 | } |
| 572 | |
| 573 | if (ledcontrol) LED_A_ON(); |
| 574 | SimulateTagLowFrequency(n, 0, ledcontrol); |
| 575 | if (ledcontrol) LED_A_OFF(); |
| 576 | } |
| 577 | |
| 578 | // prepare a waveform pattern in the buffer based on the ID given then |
| 579 | // simulate a FSK tag until the button is pressed |
| 580 | // arg1 contains fcHigh and fcLow, arg2 contains invert and clock |
| 581 | void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream) |
| 582 | { |
| 583 | int ledcontrol=1; |
| 584 | int n=0, i=0; |
| 585 | uint8_t fcHigh = arg1 >> 8; |
| 586 | uint8_t fcLow = arg1 & 0xFF; |
| 587 | uint16_t modCnt = 0; |
| 588 | uint8_t clk = arg2 & 0xFF; |
| 589 | uint8_t invert = (arg2 >> 8) & 1; |
| 590 | |
| 591 | for (i=0; i<size; i++){ |
| 592 | if (BitStream[i] == invert){ |
| 593 | fcAll(fcLow, &n, clk, &modCnt); |
| 594 | } else { |
| 595 | fcAll(fcHigh, &n, clk, &modCnt); |
| 596 | } |
| 597 | } |
| 598 | Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n); |
| 599 | |
| 600 | if (ledcontrol) LED_A_ON(); |
| 601 | SimulateTagLowFrequency(n, 0, ledcontrol); |
| 602 | if (ledcontrol) LED_A_OFF(); |
| 603 | } |
| 604 | |
| 605 | // compose ask waveform for one bit(ASK) |
| 606 | static void askSimBit(uint8_t c, int *n, uint8_t clock, uint8_t manchester) |
| 607 | { |
| 608 | uint8_t *dest = BigBuf_get_addr(); |
| 609 | uint8_t halfClk = clock/2; |
| 610 | // c = current bit 1 or 0 |
| 611 | if (manchester==1){ |
| 612 | memset(dest+(*n), c, halfClk); |
| 613 | memset(dest+(*n) + halfClk, c^1, halfClk); |
| 614 | } else { |
| 615 | memset(dest+(*n), c, clock); |
| 616 | } |
| 617 | *n += clock; |
| 618 | } |
| 619 | |
| 620 | static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase) |
| 621 | { |
| 622 | uint8_t *dest = BigBuf_get_addr(); |
| 623 | uint8_t halfClk = clock/2; |
| 624 | if (c){ |
| 625 | memset(dest+(*n), c ^ 1 ^ *phase, halfClk); |
| 626 | memset(dest+(*n) + halfClk, c ^ *phase, halfClk); |
| 627 | } else { |
| 628 | memset(dest+(*n), c ^ *phase, clock); |
| 629 | *phase ^= 1; |
| 630 | } |
| 631 | *n += clock; |
| 632 | } |
| 633 | |
| 634 | static void stAskSimBit(int *n, uint8_t clock) { |
| 635 | uint8_t *dest = BigBuf_get_addr(); |
| 636 | uint8_t halfClk = clock/2; |
| 637 | //ST = .5 high .5 low 1.5 high .5 low 1 high |
| 638 | memset(dest+(*n), 1, halfClk); |
| 639 | memset(dest+(*n) + halfClk, 0, halfClk); |
| 640 | memset(dest+(*n) + clock, 1, clock + halfClk); |
| 641 | memset(dest+(*n) + clock*2 + halfClk, 0, halfClk); |
| 642 | memset(dest+(*n) + clock*3, 1, clock); |
| 643 | *n += clock*4; |
| 644 | } |
| 645 | |
| 646 | // args clock, ask/man or askraw, invert, transmission separator |
| 647 | void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream) |
| 648 | { |
| 649 | int ledcontrol = 1; |
| 650 | int n=0, i=0; |
| 651 | uint8_t clk = (arg1 >> 8) & 0xFF; |
| 652 | uint8_t encoding = arg1 & 0xFF; |
| 653 | uint8_t separator = arg2 & 1; |
| 654 | uint8_t invert = (arg2 >> 8) & 1; |
| 655 | |
| 656 | if (encoding==2){ //biphase |
| 657 | uint8_t phase=0; |
| 658 | for (i=0; i<size; i++){ |
| 659 | biphaseSimBit(BitStream[i]^invert, &n, clk, &phase); |
| 660 | } |
| 661 | if (phase==1) { //run a second set inverted to keep phase in check |
| 662 | for (i=0; i<size; i++){ |
| 663 | biphaseSimBit(BitStream[i]^invert, &n, clk, &phase); |
| 664 | } |
| 665 | } |
| 666 | } else { // ask/manchester || ask/raw |
| 667 | for (i=0; i<size; i++){ |
| 668 | askSimBit(BitStream[i]^invert, &n, clk, encoding); |
| 669 | } |
| 670 | if (encoding==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase) |
| 671 | for (i=0; i<size; i++){ |
| 672 | askSimBit(BitStream[i]^invert^1, &n, clk, encoding); |
| 673 | } |
| 674 | } |
| 675 | } |
| 676 | if (separator==1 && encoding == 1) |
| 677 | stAskSimBit(&n, clk); |
| 678 | else if (separator==1) |
| 679 | Dbprintf("sorry but separator option not yet available"); |
| 680 | |
| 681 | Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n); |
| 682 | |
| 683 | if (ledcontrol) LED_A_ON(); |
| 684 | SimulateTagLowFrequency(n, 0, ledcontrol); |
| 685 | if (ledcontrol) LED_A_OFF(); |
| 686 | } |
| 687 | |
| 688 | //carrier can be 2,4 or 8 |
| 689 | static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, bool phaseChg) |
| 690 | { |
| 691 | uint8_t *dest = BigBuf_get_addr(); |
| 692 | uint8_t halfWave = waveLen/2; |
| 693 | //uint8_t idx; |
| 694 | int i = 0; |
| 695 | if (phaseChg){ |
| 696 | // write phase change |
| 697 | memset(dest+(*n), *curPhase^1, halfWave); |
| 698 | memset(dest+(*n) + halfWave, *curPhase, halfWave); |
| 699 | *n += waveLen; |
| 700 | *curPhase ^= 1; |
| 701 | i += waveLen; |
| 702 | } |
| 703 | //write each normal clock wave for the clock duration |
| 704 | for (; i < clk; i+=waveLen){ |
| 705 | memset(dest+(*n), *curPhase, halfWave); |
| 706 | memset(dest+(*n) + halfWave, *curPhase^1, halfWave); |
| 707 | *n += waveLen; |
| 708 | } |
| 709 | } |
| 710 | |
| 711 | // args clock, carrier, invert, |
| 712 | void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream) |
| 713 | { |
| 714 | int ledcontrol = 1; |
| 715 | int n=0, i=0; |
| 716 | uint8_t clk = arg1 >> 8; |
| 717 | uint8_t carrier = arg1 & 0xFF; |
| 718 | uint8_t invert = arg2 & 0xFF; |
| 719 | uint8_t curPhase = 0; |
| 720 | for (i=0; i<size; i++){ |
| 721 | if (BitStream[i] == curPhase){ |
| 722 | pskSimBit(carrier, &n, clk, &curPhase, FALSE); |
| 723 | } else { |
| 724 | pskSimBit(carrier, &n, clk, &curPhase, TRUE); |
| 725 | } |
| 726 | } |
| 727 | Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n); |
| 728 | |
| 729 | if (ledcontrol) LED_A_ON(); |
| 730 | SimulateTagLowFrequency(n, 0, ledcontrol); |
| 731 | if (ledcontrol) LED_A_OFF(); |
| 732 | } |
| 733 | |
| 734 | // loop to get raw HID waveform then FSK demodulate the TAG ID from it |
| 735 | void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol) |
| 736 | { |
| 737 | uint8_t *dest = BigBuf_get_addr(); |
| 738 | size_t size = 0; |
| 739 | uint32_t hi2=0, hi=0, lo=0; |
| 740 | int idx=0; |
| 741 | // Configure to go in 125Khz listen mode |
| 742 | LFSetupFPGAForADC(95, true); |
| 743 | |
| 744 | //clear read buffer |
| 745 | BigBuf_Clear_keep_EM(); |
| 746 | |
| 747 | while(!BUTTON_PRESS() && !usb_poll_validate_length()) { |
| 748 | |
| 749 | WDT_HIT(); |
| 750 | if (ledcontrol) LED_A_ON(); |
| 751 | |
| 752 | DoAcquisition_default(-1,true); |
| 753 | // FSK demodulator |
| 754 | size = 50*128*2; //big enough to catch 2 sequences of largest format |
| 755 | idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo); |
| 756 | |
| 757 | if (idx>0 && lo>0 && (size==96 || size==192)){ |
| 758 | // go over previously decoded manchester data and decode into usable tag ID |
| 759 | if (hi2 != 0){ //extra large HID tags 88/192 bits |
| 760 | Dbprintf("TAG ID: %x%08x%08x (%d)", |
| 761 | (unsigned int) hi2, |
| 762 | (unsigned int) hi, |
| 763 | (unsigned int) lo, |
| 764 | (unsigned int) (lo>>1) & 0xFFFF |
| 765 | ); |
| 766 | } else { //standard HID tags 44/96 bits |
| 767 | uint8_t bitlen = 0; |
| 768 | uint32_t fc = 0; |
| 769 | uint32_t cardnum = 0; |
| 770 | |
| 771 | if (((hi>>5)&1) == 1){//if bit 38 is set then < 37 bit format is used |
| 772 | uint32_t lo2=0; |
| 773 | lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit |
| 774 | uint8_t idx3 = 1; |
| 775 | while(lo2 > 1){ //find last bit set to 1 (format len bit) |
| 776 | lo2=lo2 >> 1; |
| 777 | idx3++; |
| 778 | } |
| 779 | bitlen = idx3+19; |
| 780 | fc =0; |
| 781 | cardnum=0; |
| 782 | if(bitlen == 26){ |
| 783 | cardnum = (lo>>1)&0xFFFF; |
| 784 | fc = (lo>>17)&0xFF; |
| 785 | } |
| 786 | if(bitlen == 37){ |
| 787 | cardnum = (lo>>1)&0x7FFFF; |
| 788 | fc = ((hi&0xF)<<12)|(lo>>20); |
| 789 | } |
| 790 | if(bitlen == 34){ |
| 791 | cardnum = (lo>>1)&0xFFFF; |
| 792 | fc= ((hi&1)<<15)|(lo>>17); |
| 793 | } |
| 794 | if(bitlen == 35){ |
| 795 | cardnum = (lo>>1)&0xFFFFF; |
| 796 | fc = ((hi&1)<<11)|(lo>>21); |
| 797 | } |
| 798 | } |
| 799 | else { //if bit 38 is not set then 37 bit format is used |
| 800 | bitlen= 37; |
| 801 | fc =0; |
| 802 | cardnum=0; |
| 803 | if(bitlen==37){ |
| 804 | cardnum = (lo>>1)&0x7FFFF; |
| 805 | fc = ((hi&0xF)<<12)|(lo>>20); |
| 806 | } |
| 807 | } |
| 808 | Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d", |
| 809 | (unsigned int) hi, |
| 810 | (unsigned int) lo, |
| 811 | (unsigned int) (lo>>1) & 0xFFFF, |
| 812 | (unsigned int) bitlen, |
| 813 | (unsigned int) fc, |
| 814 | (unsigned int) cardnum); |
| 815 | } |
| 816 | if (findone){ |
| 817 | if (ledcontrol) LED_A_OFF(); |
| 818 | *high = hi; |
| 819 | *low = lo; |
| 820 | return; |
| 821 | } |
| 822 | // reset |
| 823 | } |
| 824 | hi2 = hi = lo = idx = 0; |
| 825 | WDT_HIT(); |
| 826 | } |
| 827 | DbpString("Stopped"); |
| 828 | if (ledcontrol) LED_A_OFF(); |
| 829 | } |
| 830 | |
| 831 | // loop to get raw HID waveform then FSK demodulate the TAG ID from it |
| 832 | void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol) |
| 833 | { |
| 834 | uint8_t *dest = BigBuf_get_addr(); |
| 835 | size_t size; |
| 836 | int idx=0; |
| 837 | //clear read buffer |
| 838 | BigBuf_Clear_keep_EM(); |
| 839 | // Configure to go in 125Khz listen mode |
| 840 | LFSetupFPGAForADC(95, true); |
| 841 | |
| 842 | while(!BUTTON_PRESS() && !usb_poll_validate_length()) { |
| 843 | |
| 844 | WDT_HIT(); |
| 845 | if (ledcontrol) LED_A_ON(); |
| 846 | |
| 847 | DoAcquisition_default(-1,true); |
| 848 | // FSK demodulator |
| 849 | size = 50*128*2; //big enough to catch 2 sequences of largest format |
| 850 | idx = AWIDdemodFSK(dest, &size); |
| 851 | |
| 852 | if (idx<=0 || size!=96) continue; |
| 853 | // Index map |
| 854 | // 0 10 20 30 40 50 60 |
| 855 | // | | | | | | | |
| 856 | // 01234567 890 1 234 5 678 9 012 3 456 7 890 1 234 5 678 9 012 3 456 7 890 1 234 5 678 9 012 3 - to 96 |
| 857 | // ----------------------------------------------------------------------------- |
| 858 | // 00000001 000 1 110 1 101 1 011 1 101 1 010 0 000 1 000 1 010 0 001 0 110 1 100 0 000 1 000 1 |
| 859 | // premable bbb o bbb o bbw o fff o fff o ffc o ccc o ccc o ccc o ccc o ccc o wxx o xxx o xxx o - to 96 |
| 860 | // |---26 bit---| |-----117----||-------------142-------------| |
| 861 | // b = format bit len, o = odd parity of last 3 bits |
| 862 | // f = facility code, c = card number |
| 863 | // w = wiegand parity |
| 864 | // (26 bit format shown) |
| 865 | |
| 866 | //get raw ID before removing parities |
| 867 | uint32_t rawLo = bytebits_to_byte(dest+idx+64,32); |
| 868 | uint32_t rawHi = bytebits_to_byte(dest+idx+32,32); |
| 869 | uint32_t rawHi2 = bytebits_to_byte(dest+idx,32); |
| 870 | |
| 871 | size = removeParity(dest, idx+8, 4, 1, 88); |
| 872 | if (size != 66) continue; |
| 873 | // ok valid card found! |
| 874 | |
| 875 | // Index map |
| 876 | // 0 10 20 30 40 50 60 |
| 877 | // | | | | | | | |
| 878 | // 01234567 8 90123456 7890123456789012 3 456789012345678901234567890123456 |
| 879 | // ----------------------------------------------------------------------------- |
| 880 | // 00011010 1 01110101 0000000010001110 1 000000000000000000000000000000000 |
| 881 | // bbbbbbbb w ffffffff cccccccccccccccc w xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx |
| 882 | // |26 bit| |-117--| |-----142------| |
| 883 | // b = format bit len, o = odd parity of last 3 bits |
| 884 | // f = facility code, c = card number |
| 885 | // w = wiegand parity |
| 886 | // (26 bit format shown) |
| 887 | |
| 888 | uint32_t fc = 0; |
| 889 | uint32_t cardnum = 0; |
| 890 | uint32_t code1 = 0; |
| 891 | uint32_t code2 = 0; |
| 892 | uint8_t fmtLen = bytebits_to_byte(dest,8); |
| 893 | if (fmtLen==26){ |
| 894 | fc = bytebits_to_byte(dest+9, 8); |
| 895 | cardnum = bytebits_to_byte(dest+17, 16); |
| 896 | code1 = bytebits_to_byte(dest+8,fmtLen); |
| 897 | Dbprintf("AWID Found - BitLength: %d, FC: %d, Card: %d - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, fc, cardnum, code1, rawHi2, rawHi, rawLo); |
| 898 | } else { |
| 899 | cardnum = bytebits_to_byte(dest+8+(fmtLen-17), 16); |
| 900 | if (fmtLen>32){ |
| 901 | code1 = bytebits_to_byte(dest+8,fmtLen-32); |
| 902 | code2 = bytebits_to_byte(dest+8+(fmtLen-32),32); |
| 903 | Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x%08x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, code2, rawHi2, rawHi, rawLo); |
| 904 | } else{ |
| 905 | code1 = bytebits_to_byte(dest+8,fmtLen); |
| 906 | Dbprintf("AWID Found - BitLength: %d -unknown BitLength- (%d) - Wiegand: %x, Raw: %08x%08x%08x", fmtLen, cardnum, code1, rawHi2, rawHi, rawLo); |
| 907 | } |
| 908 | } |
| 909 | if (findone){ |
| 910 | if (ledcontrol) LED_A_OFF(); |
| 911 | return; |
| 912 | } |
| 913 | // reset |
| 914 | idx = 0; |
| 915 | WDT_HIT(); |
| 916 | } |
| 917 | DbpString("Stopped"); |
| 918 | if (ledcontrol) LED_A_OFF(); |
| 919 | } |
| 920 | |
| 921 | void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol) |
| 922 | { |
| 923 | uint8_t *dest = BigBuf_get_addr(); |
| 924 | |
| 925 | size_t size=0, idx=0; |
| 926 | int clk=0, invert=0, errCnt=0, maxErr=20; |
| 927 | uint32_t hi=0; |
| 928 | uint64_t lo=0; |
| 929 | //clear read buffer |
| 930 | BigBuf_Clear_keep_EM(); |
| 931 | // Configure to go in 125Khz listen mode |
| 932 | LFSetupFPGAForADC(95, true); |
| 933 | |
| 934 | while(!BUTTON_PRESS() && !usb_poll_validate_length()) { |
| 935 | |
| 936 | WDT_HIT(); |
| 937 | if (ledcontrol) LED_A_ON(); |
| 938 | |
| 939 | DoAcquisition_default(-1,true); |
| 940 | size = BigBuf_max_traceLen(); |
| 941 | //askdemod and manchester decode |
| 942 | if (size > 16385) size = 16385; //big enough to catch 2 sequences of largest format |
| 943 | errCnt = askdemod(dest, &size, &clk, &invert, maxErr, 0, 1); |
| 944 | WDT_HIT(); |
| 945 | |
| 946 | if (errCnt<0) continue; |
| 947 | |
| 948 | errCnt = Em410xDecode(dest, &size, &idx, &hi, &lo); |
| 949 | if (errCnt){ |
| 950 | if (size>64){ |
| 951 | Dbprintf("EM XL TAG ID: %06x%08x%08x - (%05d_%03d_%08d)", |
| 952 | hi, |
| 953 | (uint32_t)(lo>>32), |
| 954 | (uint32_t)lo, |
| 955 | (uint32_t)(lo&0xFFFF), |
| 956 | (uint32_t)((lo>>16LL) & 0xFF), |
| 957 | (uint32_t)(lo & 0xFFFFFF)); |
| 958 | } else { |
| 959 | Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)", |
| 960 | (uint32_t)(lo>>32), |
| 961 | (uint32_t)lo, |
| 962 | (uint32_t)(lo&0xFFFF), |
| 963 | (uint32_t)((lo>>16LL) & 0xFF), |
| 964 | (uint32_t)(lo & 0xFFFFFF)); |
| 965 | } |
| 966 | |
| 967 | if (findone){ |
| 968 | if (ledcontrol) LED_A_OFF(); |
| 969 | *high=lo>>32; |
| 970 | *low=lo & 0xFFFFFFFF; |
| 971 | return; |
| 972 | } |
| 973 | } |
| 974 | WDT_HIT(); |
| 975 | hi = lo = size = idx = 0; |
| 976 | clk = invert = errCnt = 0; |
| 977 | } |
| 978 | DbpString("Stopped"); |
| 979 | if (ledcontrol) LED_A_OFF(); |
| 980 | } |
| 981 | |
| 982 | void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol) |
| 983 | { |
| 984 | uint8_t *dest = BigBuf_get_addr(); |
| 985 | int idx=0; |
| 986 | uint32_t code=0, code2=0; |
| 987 | uint8_t version=0; |
| 988 | uint8_t facilitycode=0; |
| 989 | uint16_t number=0; |
| 990 | uint8_t crc = 0; |
| 991 | uint16_t calccrc = 0; |
| 992 | |
| 993 | //clear read buffer |
| 994 | BigBuf_Clear_keep_EM(); |
| 995 | |
| 996 | // Configure to go in 125Khz listen mode |
| 997 | LFSetupFPGAForADC(95, true); |
| 998 | |
| 999 | while(!BUTTON_PRESS() && !usb_poll_validate_length()) { |
| 1000 | WDT_HIT(); |
| 1001 | if (ledcontrol) LED_A_ON(); |
| 1002 | DoAcquisition_default(-1,true); |
| 1003 | //fskdemod and get start index |
| 1004 | WDT_HIT(); |
| 1005 | idx = IOdemodFSK(dest, BigBuf_max_traceLen()); |
| 1006 | if (idx<0) continue; |
| 1007 | //valid tag found |
| 1008 | |
| 1009 | //Index map |
| 1010 | //0 10 20 30 40 50 60 |
| 1011 | //| | | | | | | |
| 1012 | //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23 |
| 1013 | //----------------------------------------------------------------------------- |
| 1014 | //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 checksum 11 |
| 1015 | // |
| 1016 | //Checksum: |
| 1017 | //00000000 0 11110000 1 11100000 1 00000001 1 00000011 1 10110110 1 01110101 11 |
| 1018 | //preamble F0 E0 01 03 B6 75 |
| 1019 | // How to calc checksum, |
| 1020 | // http://www.proxmark.org/forum/viewtopic.php?id=364&p=6 |
| 1021 | // F0 + E0 + 01 + 03 + B6 = 28A |
| 1022 | // 28A & FF = 8A |
| 1023 | // FF - 8A = 75 |
| 1024 | // Checksum: 0x75 |
| 1025 | //XSF(version)facility:codeone+codetwo |
| 1026 | //Handle the data |
| 1027 | if(findone){ //only print binary if we are doing one |
| 1028 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx], dest[idx+1], dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]); |
| 1029 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]); |
| 1030 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]); |
| 1031 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]); |
| 1032 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]); |
| 1033 | Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]); |
| 1034 | Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]); |
| 1035 | } |
| 1036 | code = bytebits_to_byte(dest+idx,32); |
| 1037 | code2 = bytebits_to_byte(dest+idx+32,32); |
| 1038 | version = bytebits_to_byte(dest+idx+27,8); //14,4 |
| 1039 | facilitycode = bytebits_to_byte(dest+idx+18,8); |
| 1040 | number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9 |
| 1041 | |
| 1042 | crc = bytebits_to_byte(dest+idx+54,8); |
| 1043 | for (uint8_t i=1; i<6; ++i) |
| 1044 | calccrc += bytebits_to_byte(dest+idx+9*i,8); |
| 1045 | calccrc &= 0xff; |
| 1046 | calccrc = 0xff - calccrc; |
| 1047 | |
| 1048 | char *crcStr = (crc == calccrc) ? "ok":"!crc"; |
| 1049 | |
| 1050 | Dbprintf("IO Prox XSF(%02d)%02x:%05d (%08x%08x) [%02x %s]",version,facilitycode,number,code,code2, crc, crcStr); |
| 1051 | // if we're only looking for one tag |
| 1052 | if (findone){ |
| 1053 | if (ledcontrol) LED_A_OFF(); |
| 1054 | *high=code; |
| 1055 | *low=code2; |
| 1056 | return; |
| 1057 | } |
| 1058 | code=code2=0; |
| 1059 | version=facilitycode=0; |
| 1060 | number=0; |
| 1061 | idx=0; |
| 1062 | |
| 1063 | WDT_HIT(); |
| 1064 | } |
| 1065 | DbpString("Stopped"); |
| 1066 | if (ledcontrol) LED_A_OFF(); |
| 1067 | } |
| 1068 | |
| 1069 | /*------------------------------ |
| 1070 | * T5555/T5557/T5567/T5577 routines |
| 1071 | *------------------------------ |
| 1072 | * NOTE: T55x7/T5555 configuration register definitions moved to protocols.h |
| 1073 | * |
| 1074 | * Relevant communication times in microsecond |
| 1075 | * To compensate antenna falling times shorten the write times |
| 1076 | * and enlarge the gap ones. |
| 1077 | * Q5 tags seems to have issues when these values changes. |
| 1078 | */ |
| 1079 | |
| 1080 | #define START_GAP 31*8 // was 250 // SPEC: 1*8 to 50*8 - typ 15*8 (or 15fc) |
| 1081 | #define WRITE_GAP 20*8 // was 160 // SPEC: 1*8 to 20*8 - typ 10*8 (or 10fc) |
| 1082 | #define WRITE_0 18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc) |
| 1083 | #define WRITE_1 50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc) 432 for T55x7; 448 for E5550 |
| 1084 | #define READ_GAP 15*8 |
| 1085 | |
| 1086 | // VALUES TAKEN FROM EM4x function: SendForward |
| 1087 | // START_GAP = 440; (55*8) cycles at 125Khz (8us = 1cycle) |
| 1088 | // WRITE_GAP = 128; (16*8) |
| 1089 | // WRITE_1 = 256 32*8; (32*8) |
| 1090 | |
| 1091 | // These timings work for 4469/4269/4305 (with the 55*8 above) |
| 1092 | // WRITE_0 = 23*8 , 9*8 SpinDelayUs(23*8); |
| 1093 | |
| 1094 | // Sam7s has several timers, we will use the source TIMER_CLOCK1 (aka AT91C_TC_CLKS_TIMER_DIV1_CLOCK) |
| 1095 | // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz |
| 1096 | // Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier) |
| 1097 | // T0 = TIMER_CLOCK1 / 125000 = 192 |
| 1098 | // 1 Cycle = 8 microseconds(us) == 1 field clock |
| 1099 | |
| 1100 | void TurnReadLFOn(int delay) { |
| 1101 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); |
| 1102 | // Give it a bit of time for the resonant antenna to settle. |
| 1103 | |
| 1104 | // measure antenna strength. |
| 1105 | //int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10); |
| 1106 | // where to save it |
| 1107 | |
| 1108 | SpinDelayUs(delay); |
| 1109 | } |
| 1110 | |
| 1111 | // Write one bit to card |
| 1112 | void T55xxWriteBit(int bit) { |
| 1113 | if (!bit) |
| 1114 | TurnReadLFOn(WRITE_0); |
| 1115 | else |
| 1116 | TurnReadLFOn(WRITE_1); |
| 1117 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1118 | SpinDelayUs(WRITE_GAP); |
| 1119 | } |
| 1120 | |
| 1121 | // Send T5577 reset command then read stream (see if we can identify the start of the stream) |
| 1122 | void T55xxResetRead(void) { |
| 1123 | LED_A_ON(); |
| 1124 | //clear buffer now so it does not interfere with timing later |
| 1125 | BigBuf_Clear_keep_EM(); |
| 1126 | |
| 1127 | // Set up FPGA, 125kHz |
| 1128 | LFSetupFPGAForADC(95, true); |
| 1129 | |
| 1130 | // Trigger T55x7 in mode. |
| 1131 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1132 | SpinDelayUs(START_GAP); |
| 1133 | |
| 1134 | // reset tag - op code 00 |
| 1135 | T55xxWriteBit(0); |
| 1136 | T55xxWriteBit(0); |
| 1137 | |
| 1138 | // Turn field on to read the response |
| 1139 | TurnReadLFOn(READ_GAP); |
| 1140 | |
| 1141 | // Acquisition |
| 1142 | doT55x7Acquisition(BigBuf_max_traceLen()); |
| 1143 | |
| 1144 | // Turn the field off |
| 1145 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1146 | cmd_send(CMD_ACK,0,0,0,0,0); |
| 1147 | LED_A_OFF(); |
| 1148 | } |
| 1149 | |
| 1150 | // Write one card block in page 0, no lock |
| 1151 | void T55xxWriteBlockExt(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) { |
| 1152 | LED_A_ON(); |
| 1153 | bool PwdMode = arg & 0x1; |
| 1154 | uint8_t Page = (arg & 0x2)>>1; |
| 1155 | uint32_t i = 0; |
| 1156 | |
| 1157 | // Set up FPGA, 125kHz |
| 1158 | LFSetupFPGAForADC(95, true); |
| 1159 | |
| 1160 | // Trigger T55x7 in mode. |
| 1161 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1162 | SpinDelayUs(START_GAP); |
| 1163 | |
| 1164 | // Opcode 10 |
| 1165 | T55xxWriteBit(1); |
| 1166 | T55xxWriteBit(Page); //Page 0 |
| 1167 | if (PwdMode){ |
| 1168 | // Send Pwd |
| 1169 | for (i = 0x80000000; i != 0; i >>= 1) |
| 1170 | T55xxWriteBit(Pwd & i); |
| 1171 | } |
| 1172 | // Send Lock bit |
| 1173 | T55xxWriteBit(0); |
| 1174 | |
| 1175 | // Send Data |
| 1176 | for (i = 0x80000000; i != 0; i >>= 1) |
| 1177 | T55xxWriteBit(Data & i); |
| 1178 | |
| 1179 | // Send Block number |
| 1180 | for (i = 0x04; i != 0; i >>= 1) |
| 1181 | T55xxWriteBit(Block & i); |
| 1182 | |
| 1183 | // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550, |
| 1184 | // so wait a little more) |
| 1185 | TurnReadLFOn(20 * 1000); |
| 1186 | //could attempt to do a read to confirm write took |
| 1187 | // as the tag should repeat back the new block |
| 1188 | // until it is reset, but to confirm it we would |
| 1189 | // need to know the current block 0 config mode |
| 1190 | |
| 1191 | // turn field off |
| 1192 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1193 | LED_A_OFF(); |
| 1194 | } |
| 1195 | |
| 1196 | // Write one card block in page 0, no lock |
| 1197 | void T55xxWriteBlock(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) { |
| 1198 | T55xxWriteBlockExt(Data, Block, Pwd, arg); |
| 1199 | cmd_send(CMD_ACK,0,0,0,0,0); |
| 1200 | } |
| 1201 | |
| 1202 | // Read one card block in page [page] |
| 1203 | void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) { |
| 1204 | LED_A_ON(); |
| 1205 | bool PwdMode = arg0 & 0x1; |
| 1206 | uint8_t Page = (arg0 & 0x2) >> 1; |
| 1207 | uint32_t i = 0; |
| 1208 | bool RegReadMode = (Block == 0xFF); |
| 1209 | |
| 1210 | //clear buffer now so it does not interfere with timing later |
| 1211 | BigBuf_Clear_ext(false); |
| 1212 | |
| 1213 | //make sure block is at max 7 |
| 1214 | Block &= 0x7; |
| 1215 | |
| 1216 | // Set up FPGA, 125kHz to power up the tag |
| 1217 | LFSetupFPGAForADC(95, true); |
| 1218 | |
| 1219 | // Trigger T55x7 Direct Access Mode with start gap |
| 1220 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1221 | SpinDelayUs(START_GAP); |
| 1222 | |
| 1223 | // Opcode 1[page] |
| 1224 | T55xxWriteBit(1); |
| 1225 | T55xxWriteBit(Page); //Page 0 |
| 1226 | |
| 1227 | if (PwdMode){ |
| 1228 | // Send Pwd |
| 1229 | for (i = 0x80000000; i != 0; i >>= 1) |
| 1230 | T55xxWriteBit(Pwd & i); |
| 1231 | } |
| 1232 | // Send a zero bit separation |
| 1233 | T55xxWriteBit(0); |
| 1234 | |
| 1235 | // Send Block number (if direct access mode) |
| 1236 | if (!RegReadMode) |
| 1237 | for (i = 0x04; i != 0; i >>= 1) |
| 1238 | T55xxWriteBit(Block & i); |
| 1239 | |
| 1240 | // Turn field on to read the response |
| 1241 | TurnReadLFOn(READ_GAP); |
| 1242 | |
| 1243 | // Acquisition |
| 1244 | doT55x7Acquisition(12000); |
| 1245 | |
| 1246 | // Turn the field off |
| 1247 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1248 | cmd_send(CMD_ACK,0,0,0,0,0); |
| 1249 | LED_A_OFF(); |
| 1250 | } |
| 1251 | |
| 1252 | void T55xxWakeUp(uint32_t Pwd){ |
| 1253 | LED_B_ON(); |
| 1254 | uint32_t i = 0; |
| 1255 | |
| 1256 | // Set up FPGA, 125kHz |
| 1257 | LFSetupFPGAForADC(95, true); |
| 1258 | |
| 1259 | // Trigger T55x7 Direct Access Mode |
| 1260 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); |
| 1261 | SpinDelayUs(START_GAP); |
| 1262 | |
| 1263 | // Opcode 10 |
| 1264 | T55xxWriteBit(1); |
| 1265 | T55xxWriteBit(0); //Page 0 |
| 1266 | |
| 1267 | // Send Pwd |
| 1268 | for (i = 0x80000000; i != 0; i >>= 1) |
| 1269 | T55xxWriteBit(Pwd & i); |
| 1270 | |
| 1271 | // Turn and leave field on to let the begin repeating transmission |
| 1272 | TurnReadLFOn(20*1000); |
| 1273 | } |
| 1274 | |
| 1275 | /*-------------- Cloning routines -----------*/ |
| 1276 | void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) { |
| 1277 | // write last block first and config block last (if included) |
| 1278 | for (uint8_t i = numblocks+startblock; i > startblock; i--) |
| 1279 | T55xxWriteBlockExt(blockdata[i-1], i-1, 0, 0); |
| 1280 | } |
| 1281 | |
| 1282 | // Copy HID id to card and setup block 0 config |
| 1283 | void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) { |
| 1284 | uint32_t data[] = {0,0,0,0,0,0,0}; |
| 1285 | uint8_t last_block = 0; |
| 1286 | |
| 1287 | if (longFMT){ |
| 1288 | // Ensure no more than 84 bits supplied |
| 1289 | if (hi2 > 0xFFFFF) { |
| 1290 | DbpString("Tags can only have 84 bits."); |
| 1291 | return; |
| 1292 | } |
| 1293 | // Build the 6 data blocks for supplied 84bit ID |
| 1294 | last_block = 6; |
| 1295 | // load preamble (1D) & long format identifier (9E manchester encoded) |
| 1296 | data[1] = 0x1D96A900 | (manchesterEncode2Bytes((hi2 >> 16) & 0xF) & 0xFF); |
| 1297 | // load raw id from hi2, hi, lo to data blocks (manchester encoded) |
| 1298 | data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF); |
| 1299 | data[3] = manchesterEncode2Bytes(hi >> 16); |
| 1300 | data[4] = manchesterEncode2Bytes(hi & 0xFFFF); |
| 1301 | data[5] = manchesterEncode2Bytes(lo >> 16); |
| 1302 | data[6] = manchesterEncode2Bytes(lo & 0xFFFF); |
| 1303 | } else { |
| 1304 | // Ensure no more than 44 bits supplied |
| 1305 | if (hi > 0xFFF) { |
| 1306 | DbpString("Tags can only have 44 bits."); |
| 1307 | return; |
| 1308 | } |
| 1309 | // Build the 3 data blocks for supplied 44bit ID |
| 1310 | last_block = 3; |
| 1311 | // load preamble |
| 1312 | data[1] = 0x1D000000 | (manchesterEncode2Bytes(hi) & 0xFFFFFF); |
| 1313 | data[2] = manchesterEncode2Bytes(lo >> 16); |
| 1314 | data[3] = manchesterEncode2Bytes(lo & 0xFFFF); |
| 1315 | } |
| 1316 | // load chip config block |
| 1317 | data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT; |
| 1318 | |
| 1319 | //TODO add selection of chip for Q5 or T55x7 |
| 1320 | // data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT; |
| 1321 | |
| 1322 | LED_D_ON(); |
| 1323 | // Program the data blocks for supplied ID |
| 1324 | // and the block 0 for HID format |
| 1325 | WriteT55xx(data, 0, last_block+1); |
| 1326 | |
| 1327 | LED_D_OFF(); |
| 1328 | |
| 1329 | DbpString("DONE!"); |
| 1330 | } |
| 1331 | |
| 1332 | void CopyIOtoT55x7(uint32_t hi, uint32_t lo) { |
| 1333 | uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo}; |
| 1334 | //TODO add selection of chip for Q5 or T55x7 |
| 1335 | // data[0] = (((64-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT; |
| 1336 | |
| 1337 | LED_D_ON(); |
| 1338 | // Program the data blocks for supplied ID |
| 1339 | // and the block 0 config |
| 1340 | WriteT55xx(data, 0, 3); |
| 1341 | |
| 1342 | LED_D_OFF(); |
| 1343 | |
| 1344 | DbpString("DONE!"); |
| 1345 | } |
| 1346 | |
| 1347 | // Clone Indala 64-bit tag by UID to T55x7 |
| 1348 | void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) { |
| 1349 | //Program the 2 data blocks for supplied 64bit UID |
| 1350 | // and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2) |
| 1351 | uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo}; |
| 1352 | //TODO add selection of chip for Q5 or T55x7 |
| 1353 | // data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 2 << T5555_MAXBLOCK_SHIFT; |
| 1354 | |
| 1355 | WriteT55xx(data, 0, 3); |
| 1356 | //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data) |
| 1357 | // T5567WriteBlock(0x603E1042,0); |
| 1358 | DbpString("DONE!"); |
| 1359 | } |
| 1360 | // Clone Indala 224-bit tag by UID to T55x7 |
| 1361 | void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) { |
| 1362 | //Program the 7 data blocks for supplied 224bit UID |
| 1363 | uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7}; |
| 1364 | // and the block 0 for Indala224 format |
| 1365 | //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7) |
| 1366 | data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT); |
| 1367 | //TODO add selection of chip for Q5 or T55x7 |
| 1368 | // data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 7 << T5555_MAXBLOCK_SHIFT; |
| 1369 | WriteT55xx(data, 0, 8); |
| 1370 | //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data) |
| 1371 | // T5567WriteBlock(0x603E10E2,0); |
| 1372 | DbpString("DONE!"); |
| 1373 | } |
| 1374 | // clone viking tag to T55xx |
| 1375 | void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) { |
| 1376 | uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2}; |
| 1377 | if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT; |
| 1378 | // Program the data blocks for supplied ID and the block 0 config |
| 1379 | WriteT55xx(data, 0, 3); |
| 1380 | LED_D_OFF(); |
| 1381 | cmd_send(CMD_ACK,0,0,0,0,0); |
| 1382 | } |
| 1383 | |
| 1384 | // Define 9bit header for EM410x tags |
| 1385 | #define EM410X_HEADER 0x1FF |
| 1386 | #define EM410X_ID_LENGTH 40 |
| 1387 | |
| 1388 | void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) { |
| 1389 | int i, id_bit; |
| 1390 | uint64_t id = EM410X_HEADER; |
| 1391 | uint64_t rev_id = 0; // reversed ID |
| 1392 | int c_parity[4]; // column parity |
| 1393 | int r_parity = 0; // row parity |
| 1394 | uint32_t clock = 0; |
| 1395 | |
| 1396 | // Reverse ID bits given as parameter (for simpler operations) |
| 1397 | for (i = 0; i < EM410X_ID_LENGTH; ++i) { |
| 1398 | if (i < 32) { |
| 1399 | rev_id = (rev_id << 1) | (id_lo & 1); |
| 1400 | id_lo >>= 1; |
| 1401 | } else { |
| 1402 | rev_id = (rev_id << 1) | (id_hi & 1); |
| 1403 | id_hi >>= 1; |
| 1404 | } |
| 1405 | } |
| 1406 | |
| 1407 | for (i = 0; i < EM410X_ID_LENGTH; ++i) { |
| 1408 | id_bit = rev_id & 1; |
| 1409 | |
| 1410 | if (i % 4 == 0) { |
| 1411 | // Don't write row parity bit at start of parsing |
| 1412 | if (i) |
| 1413 | id = (id << 1) | r_parity; |
| 1414 | // Start counting parity for new row |
| 1415 | r_parity = id_bit; |
| 1416 | } else { |
| 1417 | // Count row parity |
| 1418 | r_parity ^= id_bit; |
| 1419 | } |
| 1420 | |
| 1421 | // First elements in column? |
| 1422 | if (i < 4) |
| 1423 | // Fill out first elements |
| 1424 | c_parity[i] = id_bit; |
| 1425 | else |
| 1426 | // Count column parity |
| 1427 | c_parity[i % 4] ^= id_bit; |
| 1428 | |
| 1429 | // Insert ID bit |
| 1430 | id = (id << 1) | id_bit; |
| 1431 | rev_id >>= 1; |
| 1432 | } |
| 1433 | |
| 1434 | // Insert parity bit of last row |
| 1435 | id = (id << 1) | r_parity; |
| 1436 | |
| 1437 | // Fill out column parity at the end of tag |
| 1438 | for (i = 0; i < 4; ++i) |
| 1439 | id = (id << 1) | c_parity[i]; |
| 1440 | |
| 1441 | // Add stop bit |
| 1442 | id <<= 1; |
| 1443 | |
| 1444 | Dbprintf("Started writing %s tag ...", card ? "T55x7":"T5555"); |
| 1445 | LED_D_ON(); |
| 1446 | |
| 1447 | // Write EM410x ID |
| 1448 | uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)}; |
| 1449 | |
| 1450 | clock = (card & 0xFF00) >> 8; |
| 1451 | clock = (clock == 0) ? 64 : clock; |
| 1452 | Dbprintf("Clock rate: %d", clock); |
| 1453 | if (card & 0xFF) { //t55x7 |
| 1454 | clock = GetT55xxClockBit(clock); |
| 1455 | if (clock == 0) { |
| 1456 | Dbprintf("Invalid clock rate: %d", clock); |
| 1457 | return; |
| 1458 | } |
| 1459 | data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT); |
| 1460 | } else { //t5555 (Q5) |
| 1461 | clock = (clock-2)>>1; //n = (RF-2)/2 |
| 1462 | data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT); |
| 1463 | } |
| 1464 | |
| 1465 | WriteT55xx(data, 0, 3); |
| 1466 | |
| 1467 | LED_D_OFF(); |
| 1468 | Dbprintf("Tag %s written with 0x%08x%08x\n", |
| 1469 | card ? "T55x7":"T5555", |
| 1470 | (uint32_t)(id >> 32), |
| 1471 | (uint32_t)id); |
| 1472 | } |
| 1473 | |
| 1474 | //----------------------------------- |
| 1475 | // EM4469 / EM4305 routines |
| 1476 | //----------------------------------- |
| 1477 | #define FWD_CMD_LOGIN 0xC //including the even parity, binary mirrored |
| 1478 | #define FWD_CMD_WRITE 0xA |
| 1479 | #define FWD_CMD_READ 0x9 |
| 1480 | #define FWD_CMD_DISABLE 0x5 |
| 1481 | |
| 1482 | uint8_t forwardLink_data[64]; //array of forwarded bits |
| 1483 | uint8_t * forward_ptr; //ptr for forward message preparation |
| 1484 | uint8_t fwd_bit_sz; //forwardlink bit counter |
| 1485 | uint8_t * fwd_write_ptr; //forwardlink bit pointer |
| 1486 | |
| 1487 | //==================================================================== |
| 1488 | // prepares command bits |
| 1489 | // see EM4469 spec |
| 1490 | //==================================================================== |
| 1491 | //-------------------------------------------------------------------- |
| 1492 | // VALUES TAKEN FROM EM4x function: SendForward |
| 1493 | // START_GAP = 440; (55*8) cycles at 125Khz (8us = 1cycle) |
| 1494 | // WRITE_GAP = 128; (16*8) |
| 1495 | // WRITE_1 = 256 32*8; (32*8) |
| 1496 | |
| 1497 | // These timings work for 4469/4269/4305 (with the 55*8 above) |
| 1498 | // WRITE_0 = 23*8 , 9*8 SpinDelayUs(23*8); |
| 1499 | |
| 1500 | uint8_t Prepare_Cmd( uint8_t cmd ) { |
| 1501 | |
| 1502 | *forward_ptr++ = 0; //start bit |
| 1503 | *forward_ptr++ = 0; //second pause for 4050 code |
| 1504 | |
| 1505 | *forward_ptr++ = cmd; |
| 1506 | cmd >>= 1; |
| 1507 | *forward_ptr++ = cmd; |
| 1508 | cmd >>= 1; |
| 1509 | *forward_ptr++ = cmd; |
| 1510 | cmd >>= 1; |
| 1511 | *forward_ptr++ = cmd; |
| 1512 | |
| 1513 | return 6; //return number of emited bits |
| 1514 | } |
| 1515 | |
| 1516 | //==================================================================== |
| 1517 | // prepares address bits |
| 1518 | // see EM4469 spec |
| 1519 | //==================================================================== |
| 1520 | uint8_t Prepare_Addr( uint8_t addr ) { |
| 1521 | |
| 1522 | register uint8_t line_parity; |
| 1523 | |
| 1524 | uint8_t i; |
| 1525 | line_parity = 0; |
| 1526 | for(i=0;i<6;i++) { |
| 1527 | *forward_ptr++ = addr; |
| 1528 | line_parity ^= addr; |
| 1529 | addr >>= 1; |
| 1530 | } |
| 1531 | |
| 1532 | *forward_ptr++ = (line_parity & 1); |
| 1533 | |
| 1534 | return 7; //return number of emited bits |
| 1535 | } |
| 1536 | |
| 1537 | //==================================================================== |
| 1538 | // prepares data bits intreleaved with parity bits |
| 1539 | // see EM4469 spec |
| 1540 | //==================================================================== |
| 1541 | uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) { |
| 1542 | |
| 1543 | register uint8_t line_parity; |
| 1544 | register uint8_t column_parity; |
| 1545 | register uint8_t i, j; |
| 1546 | register uint16_t data; |
| 1547 | |
| 1548 | data = data_low; |
| 1549 | column_parity = 0; |
| 1550 | |
| 1551 | for(i=0; i<4; i++) { |
| 1552 | line_parity = 0; |
| 1553 | for(j=0; j<8; j++) { |
| 1554 | line_parity ^= data; |
| 1555 | column_parity ^= (data & 1) << j; |
| 1556 | *forward_ptr++ = data; |
| 1557 | data >>= 1; |
| 1558 | } |
| 1559 | *forward_ptr++ = line_parity; |
| 1560 | if(i == 1) |
| 1561 | data = data_hi; |
| 1562 | } |
| 1563 | |
| 1564 | for(j=0; j<8; j++) { |
| 1565 | *forward_ptr++ = column_parity; |
| 1566 | column_parity >>= 1; |
| 1567 | } |
| 1568 | *forward_ptr = 0; |
| 1569 | |
| 1570 | return 45; //return number of emited bits |
| 1571 | } |
| 1572 | |
| 1573 | //==================================================================== |
| 1574 | // Forward Link send function |
| 1575 | // Requires: forwarLink_data filled with valid bits (1 bit per byte) |
| 1576 | // fwd_bit_count set with number of bits to be sent |
| 1577 | //==================================================================== |
| 1578 | void SendForward(uint8_t fwd_bit_count) { |
| 1579 | |
| 1580 | fwd_write_ptr = forwardLink_data; |
| 1581 | fwd_bit_sz = fwd_bit_count; |
| 1582 | |
| 1583 | LED_D_ON(); |
| 1584 | |
| 1585 | // Set up FPGA, 125kHz |
| 1586 | LFSetupFPGAForADC(95, true); |
| 1587 | |
| 1588 | // force 1st mod pulse (start gap must be longer for 4305) |
| 1589 | fwd_bit_sz--; //prepare next bit modulation |
| 1590 | fwd_write_ptr++; |
| 1591 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1592 | SpinDelayUs(55*8); //55 cycles off (8us each)for 4305 |
| 1593 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on |
| 1594 | SpinDelayUs(16*8); //16 cycles on (8us each) |
| 1595 | |
| 1596 | // now start writting |
| 1597 | while(fwd_bit_sz-- > 0) { //prepare next bit modulation |
| 1598 | if(((*fwd_write_ptr++) & 1) == 1) |
| 1599 | SpinDelayUs(32*8); //32 cycles at 125Khz (8us each) |
| 1600 | else { |
| 1601 | //These timings work for 4469/4269/4305 (with the 55*8 above) |
| 1602 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1603 | SpinDelayUs(23*8); //16-4 cycles off (8us each) |
| 1604 | FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on |
| 1605 | SpinDelayUs(9*8); //16 cycles on (8us each) |
| 1606 | } |
| 1607 | } |
| 1608 | } |
| 1609 | |
| 1610 | void EM4xLogin(uint32_t Password) { |
| 1611 | |
| 1612 | uint8_t fwd_bit_count; |
| 1613 | |
| 1614 | forward_ptr = forwardLink_data; |
| 1615 | fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN ); |
| 1616 | fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 ); |
| 1617 | |
| 1618 | SendForward(fwd_bit_count); |
| 1619 | |
| 1620 | //Wait for command to complete |
| 1621 | SpinDelay(20); |
| 1622 | } |
| 1623 | |
| 1624 | void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) { |
| 1625 | |
| 1626 | uint8_t fwd_bit_count; |
| 1627 | uint8_t *dest = BigBuf_get_addr(); |
| 1628 | uint16_t bufsize = BigBuf_max_traceLen(); |
| 1629 | uint32_t i = 0; |
| 1630 | |
| 1631 | // Clear destination buffer before sending the command |
| 1632 | BigBuf_Clear_ext(false); |
| 1633 | |
| 1634 | //If password mode do login |
| 1635 | if (PwdMode == 1) EM4xLogin(Pwd); |
| 1636 | |
| 1637 | forward_ptr = forwardLink_data; |
| 1638 | fwd_bit_count = Prepare_Cmd( FWD_CMD_READ ); |
| 1639 | fwd_bit_count += Prepare_Addr( Address ); |
| 1640 | |
| 1641 | // Connect the A/D to the peak-detected low-frequency path. |
| 1642 | SetAdcMuxFor(GPIO_MUXSEL_LOPKD); |
| 1643 | // Now set up the SSC to get the ADC samples that are now streaming at us. |
| 1644 | FpgaSetupSsc(); |
| 1645 | |
| 1646 | SendForward(fwd_bit_count); |
| 1647 | |
| 1648 | // Now do the acquisition |
| 1649 | i = 0; |
| 1650 | for(;;) { |
| 1651 | if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) { |
| 1652 | AT91C_BASE_SSC->SSC_THR = 0x43; |
| 1653 | } |
| 1654 | if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) { |
| 1655 | dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR; |
| 1656 | ++i; |
| 1657 | if (i >= bufsize) break; |
| 1658 | } |
| 1659 | } |
| 1660 | |
| 1661 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1662 | cmd_send(CMD_ACK,0,0,0,0,0); |
| 1663 | LED_D_OFF(); |
| 1664 | } |
| 1665 | |
| 1666 | void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) { |
| 1667 | |
| 1668 | uint8_t fwd_bit_count; |
| 1669 | |
| 1670 | //If password mode do login |
| 1671 | if (PwdMode == 1) EM4xLogin(Pwd); |
| 1672 | |
| 1673 | forward_ptr = forwardLink_data; |
| 1674 | fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE ); |
| 1675 | fwd_bit_count += Prepare_Addr( Address ); |
| 1676 | fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 ); |
| 1677 | |
| 1678 | SendForward(fwd_bit_count); |
| 1679 | |
| 1680 | //Wait for write to complete |
| 1681 | SpinDelay(20); |
| 1682 | FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off |
| 1683 | LED_D_OFF(); |
| 1684 | } |