1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
13 #include "proxmark3.h"
19 #include "iso14443crc.h"
20 #include "iso14443a.h"
22 #include "mifareutil.h"
24 static uint32_t iso14a_timeout
;
27 // the block number for the ISO14443-4 PCB
28 static uint8_t iso14_pcb_blocknum
= 0;
33 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
34 #define REQUEST_GUARD_TIME (7000/16 + 1)
35 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
36 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
37 // bool LastCommandWasRequest = FALSE;
40 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
42 // When the PM acts as reader and is receiving tag data, it takes
43 // 3 ticks delay in the AD converter
44 // 16 ticks until the modulation detector completes and sets curbit
45 // 8 ticks until bit_to_arm is assigned from curbit
46 // 8*16 ticks for the transfer from FPGA to ARM
47 // 4*16 ticks until we measure the time
48 // - 8*16 ticks because we measure the time of the previous transfer
49 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
51 // When the PM acts as a reader and is sending, it takes
52 // 4*16 ticks until we can write data to the sending hold register
53 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
54 // 8 ticks until the first transfer starts
55 // 8 ticks later the FPGA samples the data
56 // 1 tick to assign mod_sig_coil
57 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
59 // When the PM acts as tag and is receiving it takes
60 // 2 ticks delay in the RF part (for the first falling edge),
61 // 3 ticks for the A/D conversion,
62 // 8 ticks on average until the start of the SSC transfer,
63 // 8 ticks until the SSC samples the first data
64 // 7*16 ticks to complete the transfer from FPGA to ARM
65 // 8 ticks until the next ssp_clk rising edge
66 // 4*16 ticks until we measure the time
67 // - 8*16 ticks because we measure the time of the previous transfer
68 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
70 // The FPGA will report its internal sending delay in
71 uint16_t FpgaSendQueueDelay
;
72 // the 5 first bits are the number of bits buffered in mod_sig_buf
73 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
74 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
76 // When the PM acts as tag and is sending, it takes
77 // 4*16 ticks until we can write data to the sending hold register
78 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
79 // 8 ticks until the first transfer starts
80 // 8 ticks later the FPGA samples the data
81 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
82 // + 1 tick to assign mod_sig_coil
83 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
85 // When the PM acts as sniffer and is receiving tag data, it takes
86 // 3 ticks A/D conversion
87 // 14 ticks to complete the modulation detection
88 // 8 ticks (on average) until the result is stored in to_arm
89 // + the delays in transferring data - which is the same for
90 // sniffing reader and tag data and therefore not relevant
91 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
93 // When the PM acts as sniffer and is receiving reader data, it takes
94 // 2 ticks delay in analogue RF receiver (for the falling edge of the
95 // start bit, which marks the start of the communication)
96 // 3 ticks A/D conversion
97 // 8 ticks on average until the data is stored in to_arm.
98 // + the delays in transferring data - which is the same for
99 // sniffing reader and tag data and therefore not relevant
100 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
102 //variables used for timing purposes:
103 //these are in ssp_clk cycles:
104 static uint32_t NextTransferTime
;
105 static uint32_t LastTimeProxToAirStart
;
106 static uint32_t LastProxToAirDuration
;
110 // CARD TO READER - manchester
111 // Sequence D: 11110000 modulation with subcarrier during first half
112 // Sequence E: 00001111 modulation with subcarrier during second half
113 // Sequence F: 00000000 no modulation with subcarrier
114 // READER TO CARD - miller
115 // Sequence X: 00001100 drop after half a period
116 // Sequence Y: 00000000 no drop
117 // Sequence Z: 11000000 drop at start
125 const uint8_t OddByteParity
[256] = {
126 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
127 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
128 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
129 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
137 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
141 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
144 void iso14a_set_trigger(bool enable
) {
150 void iso14a_set_timeout(uint32_t timeout
) {
151 iso14a_timeout
= timeout
;
154 //-----------------------------------------------------------------------------
155 // Generate the parity value for a byte sequence
157 //-----------------------------------------------------------------------------
158 byte_t
oddparity (const byte_t bt
)
160 return OddByteParity
[bt
];
163 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
)
165 uint16_t paritybit_cnt
= 0;
166 uint16_t paritybyte_cnt
= 0;
167 uint8_t parityBits
= 0;
169 for (uint16_t i
= 0; i
< iLen
; i
++) {
170 // Generate the parity bits
171 parityBits
|= ((OddByteParity
[pbtCmd
[i
]]) << (7-paritybit_cnt
));
172 if (paritybit_cnt
== 7) {
173 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
174 parityBits
= 0; // and advance to next Parity Byte
182 // save remaining parity bits
183 par
[paritybyte_cnt
] = parityBits
;
187 void AppendCrc14443a(uint8_t* data
, int len
)
189 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
192 //=============================================================================
193 // ISO 14443 Type A - Miller decoder
194 //=============================================================================
196 // This decoder is used when the PM3 acts as a tag.
197 // The reader will generate "pauses" by temporarily switching of the field.
198 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
199 // The FPGA does a comparison with a threshold and would deliver e.g.:
200 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
201 // The Miller decoder needs to identify the following sequences:
202 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
203 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
204 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
205 // Note 1: the bitstream may start at any time. We therefore need to sync.
206 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
207 //-----------------------------------------------------------------------------
210 // Lookup-Table to decide if 4 raw bits are a modulation.
211 // We accept two or three consecutive "0" in any position with the rest "1"
212 const bool Mod_Miller_LUT
[] = {
213 TRUE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
,
214 TRUE
, TRUE
, FALSE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
216 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
217 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
221 Uart
.state
= STATE_UNSYNCD
;
223 Uart
.len
= 0; // number of decoded data bytes
224 Uart
.parityLen
= 0; // number of decoded parity bytes
225 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
226 Uart
.parityBits
= 0; // holds 8 parity bits
227 Uart
.twoBits
= 0x0000; // buffer for 2 Bits
233 void UartInit(uint8_t *data
, uint8_t *parity
)
236 Uart
.parity
= parity
;
240 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
241 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
)
244 Uart
.twoBits
= (Uart
.twoBits
<< 8) | bit
;
246 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
248 if (Uart
.highCnt
< 7) { // wait for a stable unmodulated signal
249 if (Uart
.twoBits
== 0xffff) {
255 Uart
.syncBit
= 0xFFFF; // not set
256 // look for 00xx1111 (the start bit)
257 if ((Uart
.twoBits
& 0x6780) == 0x0780) Uart
.syncBit
= 7;
258 else if ((Uart
.twoBits
& 0x33C0) == 0x03C0) Uart
.syncBit
= 6;
259 else if ((Uart
.twoBits
& 0x19E0) == 0x01E0) Uart
.syncBit
= 5;
260 else if ((Uart
.twoBits
& 0x0CF0) == 0x00F0) Uart
.syncBit
= 4;
261 else if ((Uart
.twoBits
& 0x0678) == 0x0078) Uart
.syncBit
= 3;
262 else if ((Uart
.twoBits
& 0x033C) == 0x003C) Uart
.syncBit
= 2;
263 else if ((Uart
.twoBits
& 0x019E) == 0x001E) Uart
.syncBit
= 1;
264 else if ((Uart
.twoBits
& 0x00CF) == 0x000F) Uart
.syncBit
= 0;
265 if (Uart
.syncBit
!= 0xFFFF) {
266 Uart
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
267 Uart
.startTime
-= Uart
.syncBit
;
268 Uart
.endTime
= Uart
.startTime
;
269 Uart
.state
= STATE_START_OF_COMMUNICATION
;
275 if (IsMillerModulationNibble1(Uart
.twoBits
>> Uart
.syncBit
)) {
276 if (IsMillerModulationNibble2(Uart
.twoBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
279 } else { // Modulation in first half = Sequence Z = logic "0"
280 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
285 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
286 Uart
.state
= STATE_MILLER_Z
;
287 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
288 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
289 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
290 Uart
.parityBits
<<= 1; // make room for the parity bit
291 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
294 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
295 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
302 if (IsMillerModulationNibble2(Uart
.twoBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
304 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
305 Uart
.state
= STATE_MILLER_X
;
306 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
307 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
308 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
309 Uart
.parityBits
<<= 1; // make room for the new parity bit
310 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
313 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
314 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
318 } else { // no modulation in both halves - Sequence Y
319 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
320 Uart
.state
= STATE_UNSYNCD
;
321 Uart
.bitCount
--; // last "0" was part of EOC sequence
322 Uart
.shiftReg
<<= 1; // drop it
323 if(Uart
.bitCount
> 0) { // if we decoded some bits
324 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
325 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
326 Uart
.parityBits
<<= 1; // add a (void) parity bit
327 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
328 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
330 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
331 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
332 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
335 return TRUE
; // we are finished with decoding the raw data sequence
337 UartReset(); // Nothing receiver - start over
340 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
343 } else { // a logic "0"
345 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
346 Uart
.state
= STATE_MILLER_Y
;
347 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
348 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
349 Uart
.parityBits
<<= 1; // make room for the parity bit
350 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
353 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
354 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
364 return FALSE
; // not finished yet, need more data
369 //=============================================================================
370 // ISO 14443 Type A - Manchester decoder
371 //=============================================================================
373 // This decoder is used when the PM3 acts as a reader.
374 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
375 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
376 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
377 // The Manchester decoder needs to identify the following sequences:
378 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
379 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
380 // 8 ticks unmodulated: Sequence F = end of communication
381 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
382 // Note 1: the bitstream may start at any time. We therefore need to sync.
383 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
386 // Lookup-Table to decide if 4 raw bits are a modulation.
387 // We accept three or four "1" in any position
388 const bool Mod_Manchester_LUT
[] = {
389 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
390 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
393 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
394 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
399 Demod
.state
= DEMOD_UNSYNCD
;
400 Demod
.len
= 0; // number of decoded data bytes
402 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
403 Demod
.parityBits
= 0; //
404 Demod
.collisionPos
= 0; // Position of collision bit
405 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
411 void DemodInit(uint8_t *data
, uint8_t *parity
)
414 Demod
.parity
= parity
;
418 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
419 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
)
422 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
424 if (Demod
.state
== DEMOD_UNSYNCD
) {
426 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
427 if (Demod
.twoBits
== 0x0000) {
433 Demod
.syncBit
= 0xFFFF; // not set
434 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
435 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
436 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
437 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
438 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
439 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
440 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
441 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
442 if (Demod
.syncBit
!= 0xFFFF) {
443 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
444 Demod
.startTime
-= Demod
.syncBit
;
445 Demod
.bitCount
= offset
; // number of decoded data bits
446 Demod
.state
= DEMOD_MANCHESTER_DATA
;
452 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
453 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
454 if (!Demod
.collisionPos
) {
455 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
457 } // modulation in first half only - Sequence D = 1
459 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
460 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
461 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
462 Demod
.parityBits
<<= 1; // make room for the parity bit
463 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
466 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
467 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
468 Demod
.parityBits
= 0;
471 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
472 } else { // no modulation in first half
473 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
475 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
476 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
477 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
478 Demod
.parityBits
<<= 1; // make room for the new parity bit
479 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
482 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
483 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
484 Demod
.parityBits
= 0;
487 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
488 } else { // no modulation in both halves - End of communication
489 if(Demod
.bitCount
> 0) { // there are some remaining data bits
490 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
491 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
492 Demod
.parityBits
<<= 1; // add a (void) parity bit
493 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
494 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
496 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
497 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
498 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
501 return TRUE
; // we are finished with decoding the raw data sequence
502 } else { // nothing received. Start over
510 return FALSE
; // not finished yet, need more data
513 //=============================================================================
514 // Finally, a `sniffer' for ISO 14443 Type A
515 // Both sides of communication!
516 //=============================================================================
518 //-----------------------------------------------------------------------------
519 // Record the sequence of commands sent by the reader to the tag, with
520 // triggering so that we start recording at the point that the tag is moved
522 //-----------------------------------------------------------------------------
523 void RAMFUNC
SnoopIso14443a(uint8_t param
) {
525 // bit 0 - trigger from first card answer
526 // bit 1 - trigger from first reader 7-bit request
530 // We won't start recording the frames that we acquire until we trigger;
531 // a good trigger condition to get started is probably when we see a
532 // response from the tag.
533 // triggered == FALSE -- to wait first for card
534 bool triggered
= !(param
& 0x03);
536 // Allocate memory from BigBuf for some buffers
537 // free all previous allocations first
540 // The command (reader -> tag) that we're receiving.
541 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
542 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
544 // The response (tag -> reader) that we're receiving.
545 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
546 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
548 // The DMA buffer, used to stream samples from the FPGA
549 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
552 iso14a_clear_trace();
553 iso14a_set_tracing(TRUE
);
555 uint8_t *data
= dmaBuf
;
556 uint8_t previous_data
= 0;
559 bool TagIsActive
= FALSE
;
560 bool ReaderIsActive
= FALSE
;
562 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
564 // Set up the demodulator for tag -> reader responses.
565 DemodInit(receivedResponse
, receivedResponsePar
);
567 // Set up the demodulator for the reader -> tag commands
568 UartInit(receivedCmd
, receivedCmdPar
);
570 // Setup and start DMA.
571 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
);
573 // And now we loop, receiving samples.
574 for(uint32_t rsamples
= 0; TRUE
; ) {
577 DbpString("cancelled by button");
584 int register readBufDataP
= data
- dmaBuf
;
585 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
586 if (readBufDataP
<= dmaBufDataP
){
587 dataLen
= dmaBufDataP
- readBufDataP
;
589 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
591 // test for length of buffer
592 if(dataLen
> maxDataLen
) {
593 maxDataLen
= dataLen
;
594 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
595 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
599 if(dataLen
< 1) continue;
601 // primary buffer was stopped( <-- we lost data!
602 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
603 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
604 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
605 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
607 // secondary buffer sets as primary, secondary buffer was stopped
608 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
609 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
610 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
615 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
617 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
618 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
619 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
622 // check - if there is a short 7bit request from reader
623 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
626 if (!LogTrace(receivedCmd
,
628 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
629 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
633 /* And ready to receive another command. */
635 /* And also reset the demod code, which might have been */
636 /* false-triggered by the commands from the reader. */
640 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
643 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
644 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
645 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
648 if (!LogTrace(receivedResponse
,
650 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
651 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
655 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
657 // And ready to receive another response.
661 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
665 previous_data
= *data
;
668 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
673 DbpString("COMMAND FINISHED");
676 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
677 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen
, (uint32_t)Uart
.output
[0]);
681 //-----------------------------------------------------------------------------
682 // Prepare tag messages
683 //-----------------------------------------------------------------------------
684 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
)
688 // Correction bit, might be removed when not needed
693 ToSendStuffBit(1); // 1
699 ToSend
[++ToSendMax
] = SEC_D
;
700 LastProxToAirDuration
= 8 * ToSendMax
- 4;
702 for(uint16_t i
= 0; i
< len
; i
++) {
706 for(uint16_t j
= 0; j
< 8; j
++) {
708 ToSend
[++ToSendMax
] = SEC_D
;
710 ToSend
[++ToSendMax
] = SEC_E
;
715 // Get the parity bit
716 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
717 ToSend
[++ToSendMax
] = SEC_D
;
718 LastProxToAirDuration
= 8 * ToSendMax
- 4;
720 ToSend
[++ToSendMax
] = SEC_E
;
721 LastProxToAirDuration
= 8 * ToSendMax
;
726 ToSend
[++ToSendMax
] = SEC_F
;
728 // Convert from last byte pos to length
732 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
)
734 uint8_t par
[MAX_PARITY_SIZE
];
736 GetParity(cmd
, len
, par
);
737 CodeIso14443aAsTagPar(cmd
, len
, par
);
741 static void Code4bitAnswerAsTag(uint8_t cmd
)
747 // Correction bit, might be removed when not needed
752 ToSendStuffBit(1); // 1
758 ToSend
[++ToSendMax
] = SEC_D
;
761 for(i
= 0; i
< 4; i
++) {
763 ToSend
[++ToSendMax
] = SEC_D
;
764 LastProxToAirDuration
= 8 * ToSendMax
- 4;
766 ToSend
[++ToSendMax
] = SEC_E
;
767 LastProxToAirDuration
= 8 * ToSendMax
;
773 ToSend
[++ToSendMax
] = SEC_F
;
775 // Convert from last byte pos to length
779 //-----------------------------------------------------------------------------
780 // Wait for commands from reader
781 // Stop when button is pressed
782 // Or return TRUE when command is captured
783 //-----------------------------------------------------------------------------
784 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
)
786 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
787 // only, since we are receiving, not transmitting).
788 // Signal field is off with the appropriate LED
790 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
792 // Now run a `software UART' on the stream of incoming samples.
793 UartInit(received
, parity
);
796 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
801 if(BUTTON_PRESS()) return FALSE
;
803 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
804 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
805 if(MillerDecoding(b
, 0)) {
813 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
814 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
);
815 int EmSend4bit(uint8_t resp
);
816 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
);
817 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
);
818 int EmSendCmd(uint8_t *resp
, uint16_t respLen
);
819 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
);
820 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
821 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
);
823 static uint8_t* free_buffer_pointer
;
830 uint32_t ProxToAirDuration
;
831 } tag_response_info_t
;
833 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
834 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
835 // This will need the following byte array for a modulation sequence
836 // 144 data bits (18 * 8)
839 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
840 // 1 just for the case
842 // 166 bytes, since every bit that needs to be send costs us a byte
846 // Prepare the tag modulation bits from the message
847 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
849 // Make sure we do not exceed the free buffer space
850 if (ToSendMax
> max_buffer_size
) {
851 Dbprintf("Out of memory, when modulating bits for tag answer:");
852 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
856 // Copy the byte array, used for this modulation to the buffer position
857 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
859 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
860 response_info
->modulation_n
= ToSendMax
;
861 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
867 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
868 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
869 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
870 // -> need 273 bytes buffer
871 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 273
873 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
874 // Retrieve and store the current buffer index
875 response_info
->modulation
= free_buffer_pointer
;
877 // Determine the maximum size we can use from our buffer
878 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
880 // Forward the prepare tag modulation function to the inner function
881 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
882 // Update the free buffer offset
883 free_buffer_pointer
+= ToSendMax
;
890 //-----------------------------------------------------------------------------
891 // Main loop of simulated tag: receive commands from reader, decide what
892 // response to send, and send it.
893 //-----------------------------------------------------------------------------
894 void SimulateIso14443aTag(int tagType
, int uid_1st
, int uid_2nd
, byte_t
* data
)
898 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
899 uint8_t response1
[2];
902 case 1: { // MIFARE Classic
903 // Says: I am Mifare 1k - original line
908 case 2: { // MIFARE Ultralight
909 // Says: I am a stupid memory tag, no crypto
914 case 3: { // MIFARE DESFire
915 // Says: I am a DESFire tag, ph33r me
920 case 4: { // ISO/IEC 14443-4
921 // Says: I am a javacard (JCOP)
926 case 5: { // MIFARE TNP3XXX
933 Dbprintf("Error: unkown tagtype (%d)",tagType
);
938 // The second response contains the (mandatory) first 24 bits of the UID
939 uint8_t response2
[5] = {0x00};
941 // Check if the uid uses the (optional) part
942 uint8_t response2a
[5] = {0x00};
946 num_to_bytes(uid_1st
,3,response2
+1);
947 num_to_bytes(uid_2nd
,4,response2a
);
948 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
950 // Configure the ATQA and SAK accordingly
951 response1
[0] |= 0x40;
954 num_to_bytes(uid_1st
,4,response2
);
955 // Configure the ATQA and SAK accordingly
956 response1
[0] &= 0xBF;
960 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
961 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
963 // Prepare the mandatory SAK (for 4 and 7 byte UID)
964 uint8_t response3
[3] = {0x00};
966 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
968 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
969 uint8_t response3a
[3] = {0x00};
970 response3a
[0] = sak
& 0xFB;
971 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
973 uint8_t response5
[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
974 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
975 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
976 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
977 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
978 // TC(1) = 0x02: CID supported, NAD not supported
979 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
981 #define TAG_RESPONSE_COUNT 7
982 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
983 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
984 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
985 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
986 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
987 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
988 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
989 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
992 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
993 // Such a response is less time critical, so we can prepare them on the fly
994 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
995 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
996 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
997 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
998 tag_response_info_t dynamic_response_info
= {
999 .response
= dynamic_response_buffer
,
1001 .modulation
= dynamic_modulation_buffer
,
1005 BigBuf_free_keep_EM();
1007 // allocate buffers:
1008 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1009 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1010 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1013 iso14a_clear_trace();
1014 iso14a_set_tracing(TRUE
);
1016 // Prepare the responses of the anticollision phase
1017 // there will be not enough time to do this at the moment the reader sends it REQA
1018 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++) {
1019 prepare_allocated_tag_modulation(&responses
[i
]);
1024 // To control where we are in the protocol
1028 // Just to allow some checks
1033 // We need to listen to the high-frequency, peak-detected path.
1034 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1037 tag_response_info_t
* p_response
;
1041 // Clean receive command buffer
1043 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1044 DbpString("Button press");
1050 // Okay, look at the command now.
1052 if(receivedCmd
[0] == 0x26) { // Received a REQUEST
1053 p_response
= &responses
[0]; order
= 1;
1054 } else if(receivedCmd
[0] == 0x52) { // Received a WAKEUP
1055 p_response
= &responses
[0]; order
= 6;
1056 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x93) { // Received request for UID (cascade 1)
1057 p_response
= &responses
[1]; order
= 2;
1058 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == 0x95) { // Received request for UID (cascade 2)
1059 p_response
= &responses
[2]; order
= 20;
1060 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x93) { // Received a SELECT (cascade 1)
1061 p_response
= &responses
[3]; order
= 3;
1062 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == 0x95) { // Received a SELECT (cascade 2)
1063 p_response
= &responses
[4]; order
= 30;
1064 } else if(receivedCmd
[0] == 0x30) { // Received a (plain) READ
1065 EmSendCmdEx(data
+(4*receivedCmd
[1]),16,false);
1066 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1067 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1069 } else if(receivedCmd
[0] == 0x50) { // Received a HALT
1072 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1075 } else if(receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61) { // Received an authentication request
1076 p_response
= &responses
[5]; order
= 7;
1077 } else if(receivedCmd
[0] == 0xE0) { // Received a RATS request
1078 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1079 EmSend4bit(CARD_NACK_NA
);
1082 p_response
= &responses
[6]; order
= 70;
1084 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1086 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1088 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1089 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1090 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr
,ar
);
1092 // Check for ISO 14443A-4 compliant commands, look at left nibble
1093 switch (receivedCmd
[0]) {
1096 case 0x0A: { // IBlock (command)
1097 dynamic_response_info
.response
[0] = receivedCmd
[0];
1098 dynamic_response_info
.response
[1] = 0x00;
1099 dynamic_response_info
.response
[2] = 0x90;
1100 dynamic_response_info
.response
[3] = 0x00;
1101 dynamic_response_info
.response_n
= 4;
1105 case 0x1B: { // Chaining command
1106 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1107 dynamic_response_info
.response_n
= 2;
1112 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1113 dynamic_response_info
.response_n
= 2;
1117 memcpy(dynamic_response_info
.response
,"\xAB\x00",2);
1118 dynamic_response_info
.response_n
= 2;
1122 case 0xC2: { // Readers sends deselect command
1123 memcpy(dynamic_response_info
.response
,"\xCA\x00",2);
1124 dynamic_response_info
.response_n
= 2;
1128 // Never seen this command before
1130 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1132 Dbprintf("Received unknown command (len=%d):",len
);
1133 Dbhexdump(len
,receivedCmd
,false);
1135 dynamic_response_info
.response_n
= 0;
1139 if (dynamic_response_info
.response_n
> 0) {
1140 // Copy the CID from the reader query
1141 dynamic_response_info
.response
[1] = receivedCmd
[1];
1143 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1144 AppendCrc14443a(dynamic_response_info
.response
,dynamic_response_info
.response_n
);
1145 dynamic_response_info
.response_n
+= 2;
1147 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1148 Dbprintf("Error preparing tag response");
1150 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1154 p_response
= &dynamic_response_info
;
1158 // Count number of wakeups received after a halt
1159 if(order
== 6 && lastorder
== 5) { happened
++; }
1161 // Count number of other messages after a halt
1162 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1164 if(cmdsRecvd
> 999) {
1165 DbpString("1000 commands later...");
1170 if (p_response
!= NULL
) {
1171 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1172 // do the tracing for the previous reader request and this tag answer:
1173 uint8_t par
[MAX_PARITY_SIZE
];
1174 GetParity(p_response
->response
, p_response
->response_n
, par
);
1176 EmLogTrace(Uart
.output
,
1178 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1179 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1181 p_response
->response
,
1182 p_response
->response_n
,
1183 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1184 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1189 Dbprintf("Trace Full. Simulation stopped.");
1194 Dbprintf("%x %x %x", happened
, happened2
, cmdsRecvd
);
1196 BigBuf_free_keep_EM();
1200 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1201 // of bits specified in the delay parameter.
1202 void PrepareDelayedTransfer(uint16_t delay
)
1204 uint8_t bitmask
= 0;
1205 uint8_t bits_to_shift
= 0;
1206 uint8_t bits_shifted
= 0;
1210 for (uint16_t i
= 0; i
< delay
; i
++) {
1211 bitmask
|= (0x01 << i
);
1213 ToSend
[ToSendMax
++] = 0x00;
1214 for (uint16_t i
= 0; i
< ToSendMax
; i
++) {
1215 bits_to_shift
= ToSend
[i
] & bitmask
;
1216 ToSend
[i
] = ToSend
[i
] >> delay
;
1217 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1218 bits_shifted
= bits_to_shift
;
1224 //-------------------------------------------------------------------------------------
1225 // Transmit the command (to the tag) that was placed in ToSend[].
1226 // Parameter timing:
1227 // if NULL: transfer at next possible time, taking into account
1228 // request guard time and frame delay time
1229 // if == 0: transfer immediately and return time of transfer
1230 // if != 0: delay transfer until time specified
1231 //-------------------------------------------------------------------------------------
1232 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
)
1235 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1237 uint32_t ThisTransferTime
= 0;
1240 if(*timing
== 0) { // Measure time
1241 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1243 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1245 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1246 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1247 LastTimeProxToAirStart
= *timing
;
1249 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1250 while(GetCountSspClk() < ThisTransferTime
);
1251 LastTimeProxToAirStart
= ThisTransferTime
;
1255 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1259 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1260 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1268 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1272 //-----------------------------------------------------------------------------
1273 // Prepare reader command (in bits, support short frames) to send to FPGA
1274 //-----------------------------------------------------------------------------
1275 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
)
1283 // Start of Communication (Seq. Z)
1284 ToSend
[++ToSendMax
] = SEC_Z
;
1285 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1288 size_t bytecount
= nbytes(bits
);
1289 // Generate send structure for the data bits
1290 for (i
= 0; i
< bytecount
; i
++) {
1291 // Get the current byte to send
1293 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1295 for (j
= 0; j
< bitsleft
; j
++) {
1298 ToSend
[++ToSendMax
] = SEC_X
;
1299 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1304 ToSend
[++ToSendMax
] = SEC_Z
;
1305 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1308 ToSend
[++ToSendMax
] = SEC_Y
;
1315 // Only transmit parity bit if we transmitted a complete byte
1317 // Get the parity bit
1318 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1320 ToSend
[++ToSendMax
] = SEC_X
;
1321 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1326 ToSend
[++ToSendMax
] = SEC_Z
;
1327 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1330 ToSend
[++ToSendMax
] = SEC_Y
;
1337 // End of Communication: Logic 0 followed by Sequence Y
1340 ToSend
[++ToSendMax
] = SEC_Z
;
1341 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1344 ToSend
[++ToSendMax
] = SEC_Y
;
1347 ToSend
[++ToSendMax
] = SEC_Y
;
1349 // Convert to length of command:
1353 //-----------------------------------------------------------------------------
1354 // Prepare reader command to send to FPGA
1355 //-----------------------------------------------------------------------------
1356 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
)
1358 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1361 //-----------------------------------------------------------------------------
1362 // Wait for commands from reader
1363 // Stop when button is pressed (return 1) or field was gone (return 2)
1364 // Or return 0 when command is captured
1365 //-----------------------------------------------------------------------------
1366 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
)
1370 uint32_t timer
= 0, vtime
= 0;
1374 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1375 // only, since we are receiving, not transmitting).
1376 // Signal field is off with the appropriate LED
1378 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1380 // Set ADC to read field strength
1381 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1382 AT91C_BASE_ADC
->ADC_MR
=
1383 ADC_MODE_PRESCALE(32) |
1384 ADC_MODE_STARTUP_TIME(16) |
1385 ADC_MODE_SAMPLE_HOLD_TIME(8);
1386 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1388 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1390 // Now run a 'software UART' on the stream of incoming samples.
1391 UartInit(received
, parity
);
1394 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1399 if (BUTTON_PRESS()) return 1;
1401 // test if the field exists
1402 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1404 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1405 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1406 if (analogCnt
>= 32) {
1407 if ((33000 * (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1408 vtime
= GetTickCount();
1409 if (!timer
) timer
= vtime
;
1410 // 50ms no field --> card to idle state
1411 if (vtime
- timer
> 50) return 2;
1413 if (timer
) timer
= 0;
1419 // receive and test the miller decoding
1420 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1421 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1422 if(MillerDecoding(b
, 0)) {
1432 static int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
)
1436 uint32_t ThisTransferTime
;
1438 // Modulate Manchester
1439 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1441 // include correction bit if necessary
1442 if (Uart
.parityBits
& 0x01) {
1443 correctionNeeded
= TRUE
;
1445 if(correctionNeeded
) {
1446 // 1236, so correction bit needed
1452 // clear receiving shift register and holding register
1453 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1454 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1455 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1456 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1458 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1459 for (uint16_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1460 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1461 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1464 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1467 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1470 for(; i
< respLen
; ) {
1471 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1472 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1473 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1476 if(BUTTON_PRESS()) {
1481 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1482 for (i
= 0; i
< 2 ; ) {
1483 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1484 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1485 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1490 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1495 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1496 Code4bitAnswerAsTag(resp
);
1497 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1498 // do the tracing for the previous reader request and this tag answer:
1500 GetParity(&resp
, 1, par
);
1501 EmLogTrace(Uart
.output
,
1503 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1504 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1508 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1509 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1514 int EmSend4bit(uint8_t resp
){
1515 return EmSend4bitEx(resp
, false);
1518 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1519 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1520 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1521 // do the tracing for the previous reader request and this tag answer:
1522 EmLogTrace(Uart
.output
,
1524 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1525 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1529 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1530 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1535 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1536 uint8_t par
[MAX_PARITY_SIZE
];
1537 GetParity(resp
, respLen
, par
);
1538 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1541 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1542 uint8_t par
[MAX_PARITY_SIZE
];
1543 GetParity(resp
, respLen
, par
);
1544 return EmSendCmdExPar(resp
, respLen
, false, par
);
1547 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1548 return EmSendCmdExPar(resp
, respLen
, false, par
);
1551 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1552 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1555 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1556 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1557 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1558 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1559 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1560 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1561 reader_EndTime
= tag_StartTime
- exact_fdt
;
1562 reader_StartTime
= reader_EndTime
- reader_modlen
;
1563 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
)) {
1565 } else return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1571 //-----------------------------------------------------------------------------
1572 // Wait a certain time for tag response
1573 // If a response is captured return TRUE
1574 // If it takes too long return FALSE
1575 //-----------------------------------------------------------------------------
1576 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
)
1580 // Set FPGA mode to "reader listen mode", no modulation (listen
1581 // only, since we are receiving, not transmitting).
1582 // Signal field is on with the appropriate LED
1584 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1586 // Now get the answer from the card
1587 DemodInit(receivedResponse
, receivedResponsePar
);
1590 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1596 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1597 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1598 if(ManchesterDecoding(b
, offset
, 0)) {
1599 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1601 } else if (c
++ > iso14a_timeout
) {
1608 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
)
1610 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1612 // Send command to tag
1613 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1617 // Log reader command in trace buffer
1619 LogTrace(frame
, nbytes(bits
), LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_READER
, (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1623 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
)
1625 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1628 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1630 // Generate parity and redirect
1631 uint8_t par
[MAX_PARITY_SIZE
];
1632 GetParity(frame
, len
/8, par
);
1633 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1636 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
)
1638 // Generate parity and redirect
1639 uint8_t par
[MAX_PARITY_SIZE
];
1640 GetParity(frame
, len
, par
);
1641 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1644 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
)
1646 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
)) return FALSE
;
1648 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1653 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
)
1655 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0)) return FALSE
;
1657 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1662 /* performs iso14443a anticollision procedure
1663 * fills the uid pointer unless NULL
1664 * fills resp_data unless NULL */
1665 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
) {
1666 uint8_t wupa
[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1667 uint8_t sel_all
[] = { 0x93,0x20 };
1668 uint8_t sel_uid
[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1669 uint8_t rats
[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1670 uint8_t resp
[MAX_FRAME_SIZE
]; // theoretically. A usual RATS will be much smaller
1671 uint8_t resp_par
[MAX_PARITY_SIZE
];
1673 size_t uid_resp_len
;
1675 uint8_t sak
= 0x04; // cascade uid
1676 int cascade_level
= 0;
1679 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1680 ReaderTransmitBitsPar(wupa
,7,0, NULL
);
1683 if(!ReaderReceive(resp
, resp_par
)) return 0;
1686 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1687 p_hi14a_card
->uidlen
= 0;
1688 memset(p_hi14a_card
->uid
,0,10);
1693 memset(uid_ptr
,0,10);
1696 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1697 // which case we need to make a cascade 2 request and select - this is a long UID
1698 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1699 for(; sak
& 0x04; cascade_level
++) {
1700 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1701 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1704 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1705 if (!ReaderReceive(resp
, resp_par
)) return 0;
1707 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1708 memset(uid_resp
, 0, 4);
1709 uint16_t uid_resp_bits
= 0;
1710 uint16_t collision_answer_offset
= 0;
1711 // anti-collision-loop:
1712 while (Demod
.collisionPos
) {
1713 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1714 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1715 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1716 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1718 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1720 // construct anticollosion command:
1721 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1722 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1723 sel_uid
[2+i
] = uid_resp
[i
];
1725 collision_answer_offset
= uid_resp_bits
%8;
1726 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1727 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1729 // finally, add the last bits and BCC of the UID
1730 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1731 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1732 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1735 } else { // no collision, use the response to SELECT_ALL as current uid
1736 memcpy(uid_resp
, resp
, 4);
1740 // calculate crypto UID. Always use last 4 Bytes.
1742 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1745 // Construct SELECT UID command
1746 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1747 memcpy(sel_uid
+2, uid_resp
, 4); // the UID
1748 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1749 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1750 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1753 if (!ReaderReceive(resp
, resp_par
)) return 0;
1756 // Test if more parts of the uid are coming
1757 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1758 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1759 // http://www.nxp.com/documents/application_note/AN10927.pdf
1760 uid_resp
[0] = uid_resp
[1];
1761 uid_resp
[1] = uid_resp
[2];
1762 uid_resp
[2] = uid_resp
[3];
1768 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1772 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1773 p_hi14a_card
->uidlen
+= uid_resp_len
;
1778 p_hi14a_card
->sak
= sak
;
1779 p_hi14a_card
->ats_len
= 0;
1782 // non iso14443a compliant tag
1783 if( (sak
& 0x20) == 0) return 2;
1785 // Request for answer to select
1786 AppendCrc14443a(rats
, 2);
1787 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1789 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
1793 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
1794 p_hi14a_card
->ats_len
= len
;
1797 // reset the PCB block number
1798 iso14_pcb_blocknum
= 0;
1802 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1803 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1804 // Set up the synchronous serial port
1806 // connect Demodulated Signal to ADC:
1807 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1809 // Signal field is on with the appropriate LED
1810 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
1811 || fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
) {
1816 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
1823 NextTransferTime
= 2*DELAY_ARM2AIR_AS_READER
;
1824 iso14a_set_timeout(1050); // 10ms default
1827 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
1828 uint8_t parity
[MAX_PARITY_SIZE
];
1829 uint8_t real_cmd
[cmd_len
+4];
1830 real_cmd
[0] = 0x0a; //I-Block
1831 // put block number into the PCB
1832 real_cmd
[0] |= iso14_pcb_blocknum
;
1833 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1834 memcpy(real_cmd
+2, cmd
, cmd_len
);
1835 AppendCrc14443a(real_cmd
,cmd_len
+2);
1837 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
1838 size_t len
= ReaderReceive(data
, parity
);
1839 uint8_t *data_bytes
= (uint8_t *) data
;
1841 return 0; //DATA LINK ERROR
1842 // if we received an I- or R(ACK)-Block with a block number equal to the
1843 // current block number, toggle the current block number
1844 else if (len
>= 4 // PCB+CID+CRC = 4 bytes
1845 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
1846 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1847 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
1849 iso14_pcb_blocknum
^= 1;
1855 //-----------------------------------------------------------------------------
1856 // Read an ISO 14443a tag. Send out commands and store answers.
1858 //-----------------------------------------------------------------------------
1859 void ReaderIso14443a(UsbCommand
*c
)
1861 iso14a_command_t param
= c
->arg
[0];
1862 uint8_t *cmd
= c
->d
.asBytes
;
1863 size_t len
= c
->arg
[1];
1864 size_t lenbits
= c
->arg
[2];
1866 byte_t buf
[USB_CMD_DATA_SIZE
];
1867 uint8_t par
[MAX_PARITY_SIZE
];
1869 if(param
& ISO14A_CONNECT
) {
1870 iso14a_clear_trace();
1873 iso14a_set_tracing(TRUE
);
1875 if(param
& ISO14A_REQUEST_TRIGGER
) {
1876 iso14a_set_trigger(TRUE
);
1879 if(param
& ISO14A_CONNECT
) {
1880 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
1881 if(!(param
& ISO14A_NO_SELECT
)) {
1882 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
1883 arg0
= iso14443a_select_card(NULL
,card
,NULL
);
1884 cmd_send(CMD_ACK
,arg0
,card
->uidlen
,0,buf
,sizeof(iso14a_card_select_t
));
1888 if(param
& ISO14A_SET_TIMEOUT
) {
1889 iso14a_set_timeout(c
->arg
[2]);
1892 if(param
& ISO14A_APDU
) {
1893 arg0
= iso14_apdu(cmd
, len
, buf
);
1894 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1897 if(param
& ISO14A_RAW
) {
1898 if(param
& ISO14A_APPEND_CRC
) {
1899 AppendCrc14443a(cmd
,len
);
1901 if (lenbits
) lenbits
+= 16;
1904 GetParity(cmd
, lenbits
/8, par
);
1905 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
);
1907 ReaderTransmit(cmd
,len
, NULL
);
1909 arg0
= ReaderReceive(buf
, par
);
1910 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
1913 if(param
& ISO14A_REQUEST_TRIGGER
) {
1914 iso14a_set_trigger(FALSE
);
1917 if(param
& ISO14A_NO_DISCONNECT
) {
1921 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1926 // Determine the distance between two nonces.
1927 // Assume that the difference is small, but we don't know which is first.
1928 // Therefore try in alternating directions.
1929 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
1932 uint32_t nttmp1
, nttmp2
;
1934 if (nt1
== nt2
) return 0;
1939 for (i
= 1; i
< 32768; i
++) {
1940 nttmp1
= prng_successor(nttmp1
, 1);
1941 if (nttmp1
== nt2
) return i
;
1942 nttmp2
= prng_successor(nttmp2
, 1);
1943 if (nttmp2
== nt1
) return -i
;
1946 return(-99999); // either nt1 or nt2 are invalid nonces
1950 //-----------------------------------------------------------------------------
1951 // Recover several bits of the cypher stream. This implements (first stages of)
1952 // the algorithm described in "The Dark Side of Security by Obscurity and
1953 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
1954 // (article by Nicolas T. Courtois, 2009)
1955 //-----------------------------------------------------------------------------
1956 void ReaderMifare(bool first_try
)
1959 uint8_t mf_auth
[] = { 0x60,0x00,0xf5,0x7b };
1960 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1961 static uint8_t mf_nr_ar3
;
1963 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
];
1964 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
];
1966 // free eventually allocated BigBuf memory. We want all for tracing.
1969 iso14a_clear_trace();
1970 iso14a_set_tracing(TRUE
);
1973 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
1974 static byte_t par_low
= 0;
1976 uint8_t uid
[10] ={0};
1980 uint32_t previous_nt
= 0;
1981 static uint32_t nt_attacked
= 0;
1982 byte_t par_list
[8] = {0x00};
1983 byte_t ks_list
[8] = {0x00};
1985 static uint32_t sync_time
;
1986 static uint32_t sync_cycles
;
1987 int catch_up_cycles
= 0;
1988 int last_catch_up
= 0;
1989 uint16_t consecutive_resyncs
= 0;
1994 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
1995 sync_time
= GetCountSspClk() & 0xfffffff8;
1996 sync_cycles
= 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2002 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2004 mf_nr_ar
[3] = mf_nr_ar3
;
2013 for(uint16_t i
= 0; TRUE
; i
++) {
2017 // Test if the action was cancelled
2018 if(BUTTON_PRESS()) {
2024 if(!iso14443a_select_card(uid
, NULL
, &cuid
)) {
2025 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Can't select card");
2029 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
+ catch_up_cycles
;
2030 catch_up_cycles
= 0;
2032 // if we missed the sync time already, advance to the next nonce repeat
2033 while(GetCountSspClk() > sync_time
) {
2034 sync_time
= (sync_time
& 0xfffffff8) + sync_cycles
;
2037 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2038 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2040 // Receive the (4 Byte) "random" nonce
2041 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2042 if (MF_DBGLEVEL
>= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2047 nt
= bytes_to_num(receivedAnswer
, 4);
2049 // Transmit reader nonce with fake par
2050 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2052 if (first_try
&& previous_nt
&& !nt_attacked
) { // we didn't calibrate our clock yet
2053 int nt_distance
= dist_nt(previous_nt
, nt
);
2054 if (nt_distance
== 0) {
2058 if (nt_distance
== -99999) { // invalid nonce received, try again
2061 sync_cycles
= (sync_cycles
- nt_distance
);
2062 if (MF_DBGLEVEL
>= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i
, nt_distance
, sync_cycles
);
2067 if ((nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2068 catch_up_cycles
= -dist_nt(nt_attacked
, nt
);
2069 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2070 catch_up_cycles
= 0;
2073 if (catch_up_cycles
== last_catch_up
) {
2074 consecutive_resyncs
++;
2077 last_catch_up
= catch_up_cycles
;
2078 consecutive_resyncs
= 0;
2080 if (consecutive_resyncs
< 3) {
2081 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, -catch_up_cycles
, consecutive_resyncs
);
2084 sync_cycles
= sync_cycles
+ catch_up_cycles
;
2085 if (MF_DBGLEVEL
>= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, -catch_up_cycles
, sync_cycles
);
2090 consecutive_resyncs
= 0;
2092 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2093 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
))
2095 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2099 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2103 if(led_on
) LED_B_ON(); else LED_B_OFF();
2105 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2106 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05;
2108 // Test if the information is complete
2109 if (nt_diff
== 0x07) {
2114 nt_diff
= (nt_diff
+ 1) & 0x07;
2115 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2118 if (nt_diff
== 0 && first_try
)
2122 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2128 mf_nr_ar
[3] &= 0x1F;
2131 memcpy(buf
+ 0, uid
, 4);
2132 num_to_bytes(nt
, 4, buf
+ 4);
2133 memcpy(buf
+ 8, par_list
, 8);
2134 memcpy(buf
+ 16, ks_list
, 8);
2135 memcpy(buf
+ 24, mf_nr_ar
, 4);
2137 cmd_send(CMD_ACK
,isOK
,0,0,buf
,28);
2140 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2143 iso14a_set_tracing(FALSE
);
2147 *MIFARE 1K simulate.
2150 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2151 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2152 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2153 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2154 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2156 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
)
2158 int cardSTATE
= MFEMUL_NOFIELD
;
2160 int vHf
= 0; // in mV
2162 uint32_t selTimer
= 0;
2163 uint32_t authTimer
= 0;
2165 uint8_t cardWRBL
= 0;
2166 uint8_t cardAUTHSC
= 0;
2167 uint8_t cardAUTHKEY
= 0xff; // no authentication
2168 uint32_t cardRr
= 0;
2170 //uint32_t rn_enc = 0;
2172 uint32_t cardINTREG
= 0;
2173 uint8_t cardINTBLOCK
= 0;
2174 struct Crypto1State mpcs
= {0, 0};
2175 struct Crypto1State
*pcs
;
2177 uint32_t numReads
= 0;//Counts numer of times reader read a block
2178 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2179 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
];
2180 uint8_t response
[MAX_MIFARE_FRAME_SIZE
];
2181 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
];
2183 uint8_t rATQA
[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2184 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2185 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2186 uint8_t rSAK
[] = {0x08, 0xb6, 0xdd};
2187 uint8_t rSAK1
[] = {0x04, 0xda, 0x17};
2189 uint8_t rAUTH_NT
[] = {0x01, 0x02, 0x03, 0x04};
2190 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2192 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2193 // This can be used in a reader-only attack.
2194 // (it can also be retrieved via 'hf 14a list', but hey...
2195 uint32_t ar_nr_responses
[] = {0,0,0,0,0,0,0,0};
2196 uint8_t ar_nr_collected
= 0;
2198 // free eventually allocated BigBuf memory but keep Emulator Memory
2199 BigBuf_free_keep_EM();
2201 iso14a_clear_trace();
2202 iso14a_set_tracing(TRUE
);
2204 // Authenticate response - nonce
2205 uint32_t nonce
= bytes_to_num(rAUTH_NT
, 4);
2207 //-- Determine the UID
2208 // Can be set from emulator memory, incoming data
2209 // and can be 7 or 4 bytes long
2210 if (flags
& FLAG_4B_UID_IN_DATA
)
2212 // 4B uid comes from data-portion of packet
2213 memcpy(rUIDBCC1
,datain
,4);
2214 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2216 } else if (flags
& FLAG_7B_UID_IN_DATA
) {
2217 // 7B uid comes from data-portion of packet
2218 memcpy(&rUIDBCC1
[1],datain
,3);
2219 memcpy(rUIDBCC2
, datain
+3, 4);
2222 // get UID from emul memory
2223 emlGetMemBt(receivedCmd
, 7, 1);
2224 _7BUID
= !(receivedCmd
[0] == 0x00);
2225 if (!_7BUID
) { // ---------- 4BUID
2226 emlGetMemBt(rUIDBCC1
, 0, 4);
2227 } else { // ---------- 7BUID
2228 emlGetMemBt(&rUIDBCC1
[1], 0, 3);
2229 emlGetMemBt(rUIDBCC2
, 3, 4);
2234 * Regardless of what method was used to set the UID, set fifth byte and modify
2235 * the ATQA for 4 or 7-byte UID
2237 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2241 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2244 // We need to listen to the high-frequency, peak-detected path.
2245 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2248 if (MF_DBGLEVEL
>= 1) {
2250 Dbprintf("4B UID: %02x%02x%02x%02x",
2251 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3]);
2253 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2254 rUIDBCC1
[0], rUIDBCC1
[1], rUIDBCC1
[2], rUIDBCC1
[3],
2255 rUIDBCC2
[0], rUIDBCC2
[1] ,rUIDBCC2
[2], rUIDBCC2
[3]);
2259 bool finished
= FALSE
;
2260 while (!BUTTON_PRESS() && !finished
) {
2263 // find reader field
2264 // Vref = 3300mV, and an 10:1 voltage divider on the input
2265 // can measure voltages up to 33000 mV
2266 if (cardSTATE
== MFEMUL_NOFIELD
) {
2267 vHf
= (33000 * AvgAdc(ADC_CHAN_HF
)) >> 10;
2268 if (vHf
> MF_MINFIELDV
) {
2269 cardSTATE_TO_IDLE();
2273 if(cardSTATE
== MFEMUL_NOFIELD
) continue;
2277 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2278 if (res
== 2) { //Field is off!
2279 cardSTATE
= MFEMUL_NOFIELD
;
2282 } else if (res
== 1) {
2283 break; //return value 1 means button press
2286 // REQ or WUP request in ANY state and WUP in HALTED state
2287 if (len
== 1 && ((receivedCmd
[0] == 0x26 && cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == 0x52)) {
2288 selTimer
= GetTickCount();
2289 EmSendCmdEx(rATQA
, sizeof(rATQA
), (receivedCmd
[0] == 0x52));
2290 cardSTATE
= MFEMUL_SELECT1
;
2292 // init crypto block
2295 crypto1_destroy(pcs
);
2300 switch (cardSTATE
) {
2301 case MFEMUL_NOFIELD
:
2304 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2307 case MFEMUL_SELECT1
:{
2309 if (len
== 2 && (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x20)) {
2310 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2311 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2315 if (MF_DBGLEVEL
>= 4 && len
== 9 && receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 )
2317 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd
[2],receivedCmd
[3],receivedCmd
[4],receivedCmd
[5]);
2321 (receivedCmd
[0] == 0x93 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2322 EmSendCmd(_7BUID
?rSAK1
:rSAK
, _7BUID
?sizeof(rSAK1
):sizeof(rSAK
));
2323 cuid
= bytes_to_num(rUIDBCC1
, 4);
2325 cardSTATE
= MFEMUL_WORK
;
2327 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2330 cardSTATE
= MFEMUL_SELECT2
;
2338 cardSTATE_TO_IDLE();
2339 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2342 uint32_t ar
= bytes_to_num(receivedCmd
, 4);
2343 uint32_t nr
= bytes_to_num(&receivedCmd
[4], 4);
2346 if(ar_nr_collected
< 2){
2347 if(ar_nr_responses
[2] != ar
)
2348 {// Avoid duplicates... probably not necessary, ar should vary.
2349 ar_nr_responses
[ar_nr_collected
*4] = cuid
;
2350 ar_nr_responses
[ar_nr_collected
*4+1] = nonce
;
2351 ar_nr_responses
[ar_nr_collected
*4+2] = ar
;
2352 ar_nr_responses
[ar_nr_collected
*4+3] = nr
;
2358 crypto1_word(pcs
, ar
, 1);
2359 cardRr
= nr
^ crypto1_word(pcs
, 0, 0);
2362 if (cardRr
!= prng_successor(nonce
, 64)){
2363 if (MF_DBGLEVEL
>= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2364 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2365 cardRr
, prng_successor(nonce
, 64));
2366 // Shouldn't we respond anything here?
2367 // Right now, we don't nack or anything, which causes the
2368 // reader to do a WUPA after a while. /Martin
2369 // -- which is the correct response. /piwi
2370 cardSTATE_TO_IDLE();
2371 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2375 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2377 num_to_bytes(ans
, 4, rAUTH_AT
);
2379 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2381 cardSTATE
= MFEMUL_WORK
;
2382 if (MF_DBGLEVEL
>= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2383 cardAUTHSC
, cardAUTHKEY
== 0 ? 'A' : 'B',
2384 GetTickCount() - authTimer
);
2387 case MFEMUL_SELECT2
:{
2389 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2392 if (len
== 2 && (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x20)) {
2393 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2399 (receivedCmd
[0] == 0x95 && receivedCmd
[1] == 0x70 && memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0)) {
2400 EmSendCmd(rSAK
, sizeof(rSAK
));
2401 cuid
= bytes_to_num(rUIDBCC2
, 4);
2402 cardSTATE
= MFEMUL_WORK
;
2404 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2408 // i guess there is a command). go into the work state.
2410 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2413 cardSTATE
= MFEMUL_WORK
;
2415 //intentional fall-through to the next case-stmt
2420 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2424 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2426 if(encrypted_data
) {
2428 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2431 if (len
== 4 && (receivedCmd
[0] == 0x60 || receivedCmd
[0] == 0x61)) {
2432 authTimer
= GetTickCount();
2433 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2434 cardAUTHKEY
= receivedCmd
[0] - 0x60;
2435 crypto1_destroy(pcs
);//Added by martin
2436 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2438 if (!encrypted_data
) { // first authentication
2439 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2441 crypto1_word(pcs
, cuid
^ nonce
, 0);//Update crypto state
2442 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2443 } else { // nested authentication
2444 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2445 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2446 num_to_bytes(ans
, 4, rAUTH_AT
);
2448 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2449 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2450 cardSTATE
= MFEMUL_AUTH1
;
2454 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2455 // BUT... ACK --> NACK
2456 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2457 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2461 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2462 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2463 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2468 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2472 if(receivedCmd
[0] == 0x30 // read block
2473 || receivedCmd
[0] == 0xA0 // write block
2474 || receivedCmd
[0] == 0xC0 // inc
2475 || receivedCmd
[0] == 0xC1 // dec
2476 || receivedCmd
[0] == 0xC2 // restore
2477 || receivedCmd
[0] == 0xB0) { // transfer
2478 if (receivedCmd
[1] >= 16 * 4) {
2479 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2480 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2484 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2485 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2486 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2491 if (receivedCmd
[0] == 0x30) {
2492 if (MF_DBGLEVEL
>= 4) {
2493 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd
[1],receivedCmd
[1]);
2495 emlGetMem(response
, receivedCmd
[1], 1);
2496 AppendCrc14443a(response
, 16);
2497 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2498 EmSendCmdPar(response
, 18, response_par
);
2500 if(exitAfterNReads
> 0 && numReads
== exitAfterNReads
) {
2501 Dbprintf("%d reads done, exiting", numReads
);
2507 if (receivedCmd
[0] == 0xA0) {
2508 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd
[1],receivedCmd
[1]);
2509 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2510 cardSTATE
= MFEMUL_WRITEBL2
;
2511 cardWRBL
= receivedCmd
[1];
2514 // increment, decrement, restore
2515 if (receivedCmd
[0] == 0xC0 || receivedCmd
[0] == 0xC1 || receivedCmd
[0] == 0xC2) {
2516 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2517 if (emlCheckValBl(receivedCmd
[1])) {
2518 if (MF_DBGLEVEL
>= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2519 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2522 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2523 if (receivedCmd
[0] == 0xC1)
2524 cardSTATE
= MFEMUL_INTREG_INC
;
2525 if (receivedCmd
[0] == 0xC0)
2526 cardSTATE
= MFEMUL_INTREG_DEC
;
2527 if (receivedCmd
[0] == 0xC2)
2528 cardSTATE
= MFEMUL_INTREG_REST
;
2529 cardWRBL
= receivedCmd
[1];
2533 if (receivedCmd
[0] == 0xB0) {
2534 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2535 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2536 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2538 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2542 if (receivedCmd
[0] == 0x50 && receivedCmd
[1] == 0x00) {
2545 cardSTATE
= MFEMUL_HALTED
;
2546 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2547 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2551 if (receivedCmd
[0] == 0xe0) {//RATS
2552 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2555 // command not allowed
2556 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2557 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2560 case MFEMUL_WRITEBL2
:{
2562 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2563 emlSetMem(receivedCmd
, cardWRBL
, 1);
2564 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2565 cardSTATE
= MFEMUL_WORK
;
2567 cardSTATE_TO_IDLE();
2568 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2573 case MFEMUL_INTREG_INC
:{
2574 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2575 memcpy(&ans
, receivedCmd
, 4);
2576 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2577 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2578 cardSTATE_TO_IDLE();
2581 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2582 cardINTREG
= cardINTREG
+ ans
;
2583 cardSTATE
= MFEMUL_WORK
;
2586 case MFEMUL_INTREG_DEC
:{
2587 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2588 memcpy(&ans
, receivedCmd
, 4);
2589 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2590 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2591 cardSTATE_TO_IDLE();
2594 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2595 cardINTREG
= cardINTREG
- ans
;
2596 cardSTATE
= MFEMUL_WORK
;
2599 case MFEMUL_INTREG_REST
:{
2600 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2601 memcpy(&ans
, receivedCmd
, 4);
2602 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2603 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2604 cardSTATE_TO_IDLE();
2607 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2608 cardSTATE
= MFEMUL_WORK
;
2614 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2617 if(flags
& FLAG_INTERACTIVE
)// Interactive mode flag, means we need to send ACK
2619 //May just aswell send the collected ar_nr in the response aswell
2620 cmd_send(CMD_ACK
,CMD_SIMULATE_MIFARE_CARD
,0,0,&ar_nr_responses
,ar_nr_collected
*4*4);
2623 if(flags
& FLAG_NR_AR_ATTACK
)
2625 if(ar_nr_collected
> 1) {
2626 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2627 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2628 ar_nr_responses
[0], // UID
2629 ar_nr_responses
[1], //NT
2630 ar_nr_responses
[2], //AR1
2631 ar_nr_responses
[3], //NR1
2632 ar_nr_responses
[6], //AR2
2633 ar_nr_responses
[7] //NR2
2636 Dbprintf("Failed to obtain two AR/NR pairs!");
2637 if(ar_nr_collected
>0) {
2638 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2639 ar_nr_responses
[0], // UID
2640 ar_nr_responses
[1], //NT
2641 ar_nr_responses
[2], //AR1
2642 ar_nr_responses
[3] //NR1
2647 if (MF_DBGLEVEL
>= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, traceLen
);
2652 //-----------------------------------------------------------------------------
2655 //-----------------------------------------------------------------------------
2656 void RAMFUNC
SniffMifare(uint8_t param
) {
2658 // bit 0 - trigger from first card answer
2659 // bit 1 - trigger from first reader 7-bit request
2661 // C(red) A(yellow) B(green)
2663 // init trace buffer
2664 iso14a_clear_trace();
2665 iso14a_set_tracing(TRUE
);
2667 // The command (reader -> tag) that we're receiving.
2668 // The length of a received command will in most cases be no more than 18 bytes.
2669 // So 32 should be enough!
2670 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
];
2671 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
];
2672 // The response (tag -> reader) that we're receiving.
2673 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
];
2674 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
];
2676 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2677 // into trace, along with its length and other annotations.
2678 //uint8_t *trace = (uint8_t *)BigBuf;
2680 // free eventually allocated BigBuf memory
2682 // allocate the DMA buffer, used to stream samples from the FPGA
2683 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
2684 uint8_t *data
= dmaBuf
;
2685 uint8_t previous_data
= 0;
2688 bool ReaderIsActive
= FALSE
;
2689 bool TagIsActive
= FALSE
;
2691 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
2693 // Set up the demodulator for tag -> reader responses.
2694 DemodInit(receivedResponse
, receivedResponsePar
);
2696 // Set up the demodulator for the reader -> tag commands
2697 UartInit(receivedCmd
, receivedCmdPar
);
2699 // Setup for the DMA.
2700 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2707 // And now we loop, receiving samples.
2708 for(uint32_t sniffCounter
= 0; TRUE
; ) {
2710 if(BUTTON_PRESS()) {
2711 DbpString("cancelled by button");
2718 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
2719 // check if a transaction is completed (timeout after 2000ms).
2720 // if yes, stop the DMA transfer and send what we have so far to the client
2721 if (MfSniffSend(2000)) {
2722 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2726 ReaderIsActive
= FALSE
;
2727 TagIsActive
= FALSE
;
2728 FpgaSetupSscDma((uint8_t *)dmaBuf
, DMA_BUFFER_SIZE
); // set transfer address and number of bytes. Start transfer.
2732 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
2733 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
2734 if (readBufDataP
<= dmaBufDataP
){ // we are processing the same block of data which is currently being transferred
2735 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
2737 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
2739 // test for length of buffer
2740 if(dataLen
> maxDataLen
) { // we are more behind than ever...
2741 maxDataLen
= dataLen
;
2742 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
2743 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
2747 if(dataLen
< 1) continue;
2749 // primary buffer was stopped ( <-- we lost data!
2750 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
2751 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
2752 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
2753 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
2755 // secondary buffer sets as primary, secondary buffer was stopped
2756 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
2757 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
2758 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
2763 if (sniffCounter
& 0x01) {
2765 if(!TagIsActive
) { // no need to try decoding tag data if the reader is sending
2766 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
2767 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
2769 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
2771 /* And ready to receive another command. */
2774 /* And also reset the demod code */
2777 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
2780 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending
2781 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
2782 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
2785 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
2787 // And ready to receive another response.
2790 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
2794 previous_data
= *data
;
2797 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
2803 DbpString("COMMAND FINISHED");
2805 FpgaDisableSscDma();
2808 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);