1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12 #include "iso14443a.h"
14 static uint32_t iso14a_timeout
;
17 // the block number for the ISO14443-4 PCB
18 static uint8_t iso14_pcb_blocknum
= 0;
20 static uint8_t* free_buffer_pointer
;
25 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
26 #define REQUEST_GUARD_TIME (7000/16 + 1)
27 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
28 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
29 // bool LastCommandWasRequest = FALSE;
32 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
34 // When the PM acts as reader and is receiving tag data, it takes
35 // 3 ticks delay in the AD converter
36 // 16 ticks until the modulation detector completes and sets curbit
37 // 8 ticks until bit_to_arm is assigned from curbit
38 // 8*16 ticks for the transfer from FPGA to ARM
39 // 4*16 ticks until we measure the time
40 // - 8*16 ticks because we measure the time of the previous transfer
41 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
43 // When the PM acts as a reader and is sending, it takes
44 // 4*16 ticks until we can write data to the sending hold register
45 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
46 // 8 ticks until the first transfer starts
47 // 8 ticks later the FPGA samples the data
48 // 1 tick to assign mod_sig_coil
49 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
51 // When the PM acts as tag and is receiving it takes
52 // 2 ticks delay in the RF part (for the first falling edge),
53 // 3 ticks for the A/D conversion,
54 // 8 ticks on average until the start of the SSC transfer,
55 // 8 ticks until the SSC samples the first data
56 // 7*16 ticks to complete the transfer from FPGA to ARM
57 // 8 ticks until the next ssp_clk rising edge
58 // 4*16 ticks until we measure the time
59 // - 8*16 ticks because we measure the time of the previous transfer
60 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
62 // The FPGA will report its internal sending delay in
63 uint16_t FpgaSendQueueDelay
;
64 // the 5 first bits are the number of bits buffered in mod_sig_buf
65 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
66 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
68 // When the PM acts as tag and is sending, it takes
69 // 4*16 ticks until we can write data to the sending hold register
70 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
71 // 8 ticks until the first transfer starts
72 // 8 ticks later the FPGA samples the data
73 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
74 // + 1 tick to assign mod_sig_coil
75 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
77 // When the PM acts as sniffer and is receiving tag data, it takes
78 // 3 ticks A/D conversion
79 // 14 ticks to complete the modulation detection
80 // 8 ticks (on average) until the result is stored in to_arm
81 // + the delays in transferring data - which is the same for
82 // sniffing reader and tag data and therefore not relevant
83 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
85 // When the PM acts as sniffer and is receiving reader data, it takes
86 // 2 ticks delay in analogue RF receiver (for the falling edge of the
87 // start bit, which marks the start of the communication)
88 // 3 ticks A/D conversion
89 // 8 ticks on average until the data is stored in to_arm.
90 // + the delays in transferring data - which is the same for
91 // sniffing reader and tag data and therefore not relevant
92 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
94 //variables used for timing purposes:
95 //these are in ssp_clk cycles:
96 static uint32_t NextTransferTime
;
97 static uint32_t LastTimeProxToAirStart
;
98 static uint32_t LastProxToAirDuration
;
100 // CARD TO READER - manchester
101 // Sequence D: 11110000 modulation with subcarrier during first half
102 // Sequence E: 00001111 modulation with subcarrier during second half
103 // Sequence F: 00000000 no modulation with subcarrier
104 // READER TO CARD - miller
105 // Sequence X: 00001100 drop after half a period
106 // Sequence Y: 00000000 no drop
107 // Sequence Z: 11000000 drop at start
115 void iso14a_set_trigger(bool enable
) {
119 void iso14a_set_timeout(uint32_t timeout
) {
120 iso14a_timeout
= timeout
;
121 if(MF_DBGLEVEL
>= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout
, iso14a_timeout
/ 106);
124 void iso14a_set_ATS_timeout(uint8_t *ats
) {
129 if (ats
[0] > 1) { // there is a format byte T0
130 if ((ats
[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
132 if ((ats
[1] & 0x10) == 0x10) // there is an interface byte TA(1) preceding TB(1)
137 fwi
= (tb1
& 0xf0) >> 4; // frame waiting indicator (FWI)
138 fwt
= 256 * 16 * (1 << fwi
); // frame waiting time (FWT) in 1/fc
139 //fwt = 4096 * (1 << fwi);
141 iso14a_set_timeout(fwt
/(8*16));
142 //iso14a_set_timeout(fwt/128);
147 //-----------------------------------------------------------------------------
148 // Generate the parity value for a byte sequence
150 //-----------------------------------------------------------------------------
151 void GetParity(const uint8_t *pbtCmd
, uint16_t iLen
, uint8_t *par
) {
152 uint16_t paritybit_cnt
= 0;
153 uint16_t paritybyte_cnt
= 0;
154 uint8_t parityBits
= 0;
156 for (uint16_t i
= 0; i
< iLen
; i
++) {
157 // Generate the parity bits
158 parityBits
|= ((oddparity8(pbtCmd
[i
])) << (7-paritybit_cnt
));
159 if (paritybit_cnt
== 7) {
160 par
[paritybyte_cnt
] = parityBits
; // save 8 Bits parity
161 parityBits
= 0; // and advance to next Parity Byte
169 // save remaining parity bits
170 par
[paritybyte_cnt
] = parityBits
;
173 void AppendCrc14443a(uint8_t* data
, int len
) {
174 ComputeCrc14443(CRC_14443_A
,data
,len
,data
+len
,data
+len
+1);
177 //=============================================================================
178 // ISO 14443 Type A - Miller decoder
179 //=============================================================================
181 // This decoder is used when the PM3 acts as a tag.
182 // The reader will generate "pauses" by temporarily switching of the field.
183 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
184 // The FPGA does a comparison with a threshold and would deliver e.g.:
185 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
186 // The Miller decoder needs to identify the following sequences:
187 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
188 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
189 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
190 // Note 1: the bitstream may start at any time. We therefore need to sync.
191 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
192 //-----------------------------------------------------------------------------
195 // Lookup-Table to decide if 4 raw bits are a modulation.
196 // We accept the following:
197 // 0001 - a 3 tick wide pause
198 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
199 // 0111 - a 2 tick wide pause shifted left
200 // 1001 - a 2 tick wide pause shifted right
201 const bool Mod_Miller_LUT
[] = {
202 FALSE
, TRUE
, FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, TRUE
,
203 FALSE
, TRUE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
205 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
206 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
209 Uart
.state
= STATE_UNSYNCD
;
211 Uart
.len
= 0; // number of decoded data bytes
212 Uart
.parityLen
= 0; // number of decoded parity bytes
213 Uart
.shiftReg
= 0; // shiftreg to hold decoded data bits
214 Uart
.parityBits
= 0; // holds 8 parity bits
223 void UartInit(uint8_t *data
, uint8_t *parity
) {
225 Uart
.parity
= parity
;
226 Uart
.fourBits
= 0x00000000; // clear the buffer for 4 Bits
230 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
231 static RAMFUNC
bool MillerDecoding(uint8_t bit
, uint32_t non_real_time
) {
232 Uart
.fourBits
= (Uart
.fourBits
<< 8) | bit
;
234 if (Uart
.state
== STATE_UNSYNCD
) { // not yet synced
235 Uart
.syncBit
= 9999; // not set
237 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
238 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
239 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
241 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
242 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
243 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
244 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
246 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
247 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
249 if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 0)) == ISO14443A_STARTBIT_PATTERN
>> 0) Uart
.syncBit
= 7;
250 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 1)) == ISO14443A_STARTBIT_PATTERN
>> 1) Uart
.syncBit
= 6;
251 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 2)) == ISO14443A_STARTBIT_PATTERN
>> 2) Uart
.syncBit
= 5;
252 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 3)) == ISO14443A_STARTBIT_PATTERN
>> 3) Uart
.syncBit
= 4;
253 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 4)) == ISO14443A_STARTBIT_PATTERN
>> 4) Uart
.syncBit
= 3;
254 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 5)) == ISO14443A_STARTBIT_PATTERN
>> 5) Uart
.syncBit
= 2;
255 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 6)) == ISO14443A_STARTBIT_PATTERN
>> 6) Uart
.syncBit
= 1;
256 else if ((Uart
.fourBits
& (ISO14443A_STARTBIT_MASK
>> 7)) == ISO14443A_STARTBIT_PATTERN
>> 7) Uart
.syncBit
= 0;
258 if (Uart
.syncBit
!= 9999) { // found a sync bit
259 Uart
.startTime
= non_real_time
? non_real_time
: (GetCountSspClk() & 0xfffffff8);
260 Uart
.startTime
-= Uart
.syncBit
;
261 Uart
.endTime
= Uart
.startTime
;
262 Uart
.state
= STATE_START_OF_COMMUNICATION
;
266 if (IsMillerModulationNibble1(Uart
.fourBits
>> Uart
.syncBit
)) {
267 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation in both halves - error
269 } else { // Modulation in first half = Sequence Z = logic "0"
270 if (Uart
.state
== STATE_MILLER_X
) { // error - must not follow after X
274 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
275 Uart
.state
= STATE_MILLER_Z
;
276 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 6;
277 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
278 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
279 Uart
.parityBits
<<= 1; // make room for the parity bit
280 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
283 if((Uart
.len
&0x0007) == 0) { // every 8 data bytes
284 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
291 if (IsMillerModulationNibble2(Uart
.fourBits
>> Uart
.syncBit
)) { // Modulation second half = Sequence X = logic "1"
293 Uart
.shiftReg
= (Uart
.shiftReg
>> 1) | 0x100; // add a 1 to the shiftreg
294 Uart
.state
= STATE_MILLER_X
;
295 Uart
.endTime
= Uart
.startTime
+ 8*(9*Uart
.len
+ Uart
.bitCount
+ 1) - 2;
296 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
297 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
298 Uart
.parityBits
<<= 1; // make room for the new parity bit
299 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
302 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
303 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
307 } else { // no modulation in both halves - Sequence Y
308 if (Uart
.state
== STATE_MILLER_Z
|| Uart
.state
== STATE_MILLER_Y
) { // Y after logic "0" - End of Communication
309 Uart
.state
= STATE_UNSYNCD
;
310 Uart
.bitCount
--; // last "0" was part of EOC sequence
311 Uart
.shiftReg
<<= 1; // drop it
312 if(Uart
.bitCount
> 0) { // if we decoded some bits
313 Uart
.shiftReg
>>= (9 - Uart
.bitCount
); // right align them
314 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff); // add last byte to the output
315 Uart
.parityBits
<<= 1; // add a (void) parity bit
316 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align parity bits
317 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store it
319 } else if (Uart
.len
& 0x0007) { // there are some parity bits to store
320 Uart
.parityBits
<<= (8 - (Uart
.len
&0x0007)); // left align remaining parity bits
321 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // and store them
324 return TRUE
; // we are finished with decoding the raw data sequence
326 UartReset(); // Nothing received - start over
329 if (Uart
.state
== STATE_START_OF_COMMUNICATION
) { // error - must not follow directly after SOC
331 } else { // a logic "0"
333 Uart
.shiftReg
= (Uart
.shiftReg
>> 1); // add a 0 to the shiftreg
334 Uart
.state
= STATE_MILLER_Y
;
335 if(Uart
.bitCount
>= 9) { // if we decoded a full byte (including parity)
336 Uart
.output
[Uart
.len
++] = (Uart
.shiftReg
& 0xff);
337 Uart
.parityBits
<<= 1; // make room for the parity bit
338 Uart
.parityBits
|= ((Uart
.shiftReg
>> 8) & 0x01); // store parity bit
341 if ((Uart
.len
&0x0007) == 0) { // every 8 data bytes
342 Uart
.parity
[Uart
.parityLen
++] = Uart
.parityBits
; // store 8 parity bits
350 return FALSE
; // not finished yet, need more data
353 //=============================================================================
354 // ISO 14443 Type A - Manchester decoder
355 //=============================================================================
357 // This decoder is used when the PM3 acts as a reader.
358 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
359 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
360 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
361 // The Manchester decoder needs to identify the following sequences:
362 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
363 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
364 // 8 ticks unmodulated: Sequence F = end of communication
365 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
366 // Note 1: the bitstream may start at any time. We therefore need to sync.
367 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
370 // Lookup-Table to decide if 4 raw bits are a modulation.
371 // We accept three or four "1" in any position
372 const bool Mod_Manchester_LUT
[] = {
373 FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, FALSE
, TRUE
,
374 FALSE
, FALSE
, FALSE
, TRUE
, FALSE
, TRUE
, TRUE
, TRUE
377 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
378 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
381 Demod
.state
= DEMOD_UNSYNCD
;
382 Demod
.len
= 0; // number of decoded data bytes
384 Demod
.shiftReg
= 0; // shiftreg to hold decoded data bits
385 Demod
.parityBits
= 0; //
386 Demod
.collisionPos
= 0; // Position of collision bit
387 Demod
.twoBits
= 0xffff; // buffer for 2 Bits
392 Demod
.syncBit
= 0xFFFF;
396 void DemodInit(uint8_t *data
, uint8_t *parity
) {
398 Demod
.parity
= parity
;
402 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
403 static RAMFUNC
int ManchesterDecoding(uint8_t bit
, uint16_t offset
, uint32_t non_real_time
) {
404 Demod
.twoBits
= (Demod
.twoBits
<< 8) | bit
;
406 if (Demod
.state
== DEMOD_UNSYNCD
) {
408 if (Demod
.highCnt
< 2) { // wait for a stable unmodulated signal
409 if (Demod
.twoBits
== 0x0000) {
415 Demod
.syncBit
= 0xFFFF; // not set
416 if ((Demod
.twoBits
& 0x7700) == 0x7000) Demod
.syncBit
= 7;
417 else if ((Demod
.twoBits
& 0x3B80) == 0x3800) Demod
.syncBit
= 6;
418 else if ((Demod
.twoBits
& 0x1DC0) == 0x1C00) Demod
.syncBit
= 5;
419 else if ((Demod
.twoBits
& 0x0EE0) == 0x0E00) Demod
.syncBit
= 4;
420 else if ((Demod
.twoBits
& 0x0770) == 0x0700) Demod
.syncBit
= 3;
421 else if ((Demod
.twoBits
& 0x03B8) == 0x0380) Demod
.syncBit
= 2;
422 else if ((Demod
.twoBits
& 0x01DC) == 0x01C0) Demod
.syncBit
= 1;
423 else if ((Demod
.twoBits
& 0x00EE) == 0x00E0) Demod
.syncBit
= 0;
424 if (Demod
.syncBit
!= 0xFFFF) {
425 Demod
.startTime
= non_real_time
?non_real_time
:(GetCountSspClk() & 0xfffffff8);
426 Demod
.startTime
-= Demod
.syncBit
;
427 Demod
.bitCount
= offset
; // number of decoded data bits
428 Demod
.state
= DEMOD_MANCHESTER_DATA
;
433 if (IsManchesterModulationNibble1(Demod
.twoBits
>> Demod
.syncBit
)) { // modulation in first half
434 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // ... and in second half = collision
435 if (!Demod
.collisionPos
) {
436 Demod
.collisionPos
= (Demod
.len
<< 3) + Demod
.bitCount
;
438 } // modulation in first half only - Sequence D = 1
440 Demod
.shiftReg
= (Demod
.shiftReg
>> 1) | 0x100; // in both cases, add a 1 to the shiftreg
441 if(Demod
.bitCount
== 9) { // if we decoded a full byte (including parity)
442 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
443 Demod
.parityBits
<<= 1; // make room for the parity bit
444 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
447 if((Demod
.len
&0x0007) == 0) { // every 8 data bytes
448 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits
449 Demod
.parityBits
= 0;
452 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1) - 4;
453 } else { // no modulation in first half
454 if (IsManchesterModulationNibble2(Demod
.twoBits
>> Demod
.syncBit
)) { // and modulation in second half = Sequence E = 0
456 Demod
.shiftReg
= (Demod
.shiftReg
>> 1); // add a 0 to the shiftreg
457 if(Demod
.bitCount
>= 9) { // if we decoded a full byte (including parity)
458 Demod
.output
[Demod
.len
++] = (Demod
.shiftReg
& 0xff);
459 Demod
.parityBits
<<= 1; // make room for the new parity bit
460 Demod
.parityBits
|= ((Demod
.shiftReg
>> 8) & 0x01); // store parity bit
463 if ((Demod
.len
&0x0007) == 0) { // every 8 data bytes
464 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // store 8 parity bits1
465 Demod
.parityBits
= 0;
468 Demod
.endTime
= Demod
.startTime
+ 8*(9*Demod
.len
+ Demod
.bitCount
+ 1);
469 } else { // no modulation in both halves - End of communication
470 if(Demod
.bitCount
> 0) { // there are some remaining data bits
471 Demod
.shiftReg
>>= (9 - Demod
.bitCount
); // right align the decoded bits
472 Demod
.output
[Demod
.len
++] = Demod
.shiftReg
& 0xff; // and add them to the output
473 Demod
.parityBits
<<= 1; // add a (void) parity bit
474 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
475 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
477 } else if (Demod
.len
& 0x0007) { // there are some parity bits to store
478 Demod
.parityBits
<<= (8 - (Demod
.len
&0x0007)); // left align remaining parity bits
479 Demod
.parity
[Demod
.parityLen
++] = Demod
.parityBits
; // and store them
482 return TRUE
; // we are finished with decoding the raw data sequence
483 } else { // nothing received. Start over
489 return FALSE
; // not finished yet, need more data
492 //=============================================================================
493 // Finally, a `sniffer' for ISO 14443 Type A
494 // Both sides of communication!
495 //=============================================================================
497 //-----------------------------------------------------------------------------
498 // Record the sequence of commands sent by the reader to the tag, with
499 // triggering so that we start recording at the point that the tag is moved
502 //-----------------------------------------------------------------------------
503 void RAMFUNC
SniffIso14443a(uint8_t param
) {
505 // bit 0 - trigger from first card answer
506 // bit 1 - trigger from first reader 7-bit request
509 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
511 // Allocate memory from BigBuf for some buffers
512 // free all previous allocations first
513 BigBuf_free(); BigBuf_Clear_ext(false);
517 // The command (reader -> tag) that we're receiving.
518 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
519 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
521 // The response (tag -> reader) that we're receiving.
522 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
523 uint8_t *receivedResponsePar
= BigBuf_malloc(MAX_PARITY_SIZE
);
525 // The DMA buffer, used to stream samples from the FPGA
526 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
528 uint8_t *data
= dmaBuf
;
529 uint8_t previous_data
= 0;
532 bool TagIsActive
= FALSE
;
533 bool ReaderIsActive
= FALSE
;
535 // Set up the demodulator for tag -> reader responses.
536 DemodInit(receivedResponse
, receivedResponsePar
);
538 // Set up the demodulator for the reader -> tag commands
539 UartInit(receivedCmd
, receivedCmdPar
);
541 // Setup and start DMA.
542 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf
, DMA_BUFFER_SIZE
) ){
543 if (MF_DBGLEVEL
> 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
547 // We won't start recording the frames that we acquire until we trigger;
548 // a good trigger condition to get started is probably when we see a
549 // response from the tag.
550 // triggered == FALSE -- to wait first for card
551 bool triggered
= !(param
& 0x03);
553 // And now we loop, receiving samples.
554 for(uint32_t rsamples
= 0; TRUE
; ) {
557 DbpString("cancelled by button");
564 int register readBufDataP
= data
- dmaBuf
;
565 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
566 if (readBufDataP
<= dmaBufDataP
){
567 dataLen
= dmaBufDataP
- readBufDataP
;
569 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
;
571 // test for length of buffer
572 if(dataLen
> maxDataLen
) {
573 maxDataLen
= dataLen
;
574 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
575 Dbprintf("blew circular buffer! dataLen=%d", dataLen
);
579 if(dataLen
< 1) continue;
581 // primary buffer was stopped( <-- we lost data!
582 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
583 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
584 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
585 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen
); // temporary
587 // secondary buffer sets as primary, secondary buffer was stopped
588 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
589 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
590 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
595 if (rsamples
& 0x01) { // Need two samples to feed Miller and Manchester-Decoder
597 if(!TagIsActive
) { // no need to try decoding reader data if the tag is sending
598 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
599 if (MillerDecoding(readerdata
, (rsamples
-1)*4)) {
602 // check - if there is a short 7bit request from reader
603 if ((!triggered
) && (param
& 0x02) && (Uart
.len
== 1) && (Uart
.bitCount
== 7)) triggered
= TRUE
;
606 if (!LogTrace(receivedCmd
,
608 Uart
.startTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
609 Uart
.endTime
*16 - DELAY_READER_AIR2ARM_AS_SNIFFER
,
613 /* And ready to receive another command. */
615 /* And also reset the demod code, which might have been */
616 /* false-triggered by the commands from the reader. */
620 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
623 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
624 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
625 if(ManchesterDecoding(tagdata
, 0, (rsamples
-1)*4)) {
628 if (!LogTrace(receivedResponse
,
630 Demod
.startTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
631 Demod
.endTime
*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER
,
635 if ((!triggered
) && (param
& 0x01)) triggered
= TRUE
;
637 // And ready to receive another response.
639 // And reset the Miller decoder including itS (now outdated) input buffer
640 UartInit(receivedCmd
, receivedCmdPar
);
643 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
647 previous_data
= *data
;
650 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
) {
655 if (MF_DBGLEVEL
>= 1) {
656 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen
, Uart
.state
, Uart
.len
);
657 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart
.output
[0]);
660 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
665 //-----------------------------------------------------------------------------
666 // Prepare tag messages
667 //-----------------------------------------------------------------------------
668 static void CodeIso14443aAsTagPar(const uint8_t *cmd
, uint16_t len
, uint8_t *parity
) {
671 // Correction bit, might be removed when not needed
676 ToSendStuffBit(1); // 1
682 ToSend
[++ToSendMax
] = SEC_D
;
683 LastProxToAirDuration
= 8 * ToSendMax
- 4;
685 for(uint16_t i
= 0; i
< len
; i
++) {
689 for(uint16_t j
= 0; j
< 8; j
++) {
691 ToSend
[++ToSendMax
] = SEC_D
;
693 ToSend
[++ToSendMax
] = SEC_E
;
698 // Get the parity bit
699 if (parity
[i
>>3] & (0x80>>(i
&0x0007))) {
700 ToSend
[++ToSendMax
] = SEC_D
;
701 LastProxToAirDuration
= 8 * ToSendMax
- 4;
703 ToSend
[++ToSendMax
] = SEC_E
;
704 LastProxToAirDuration
= 8 * ToSendMax
;
709 ToSend
[++ToSendMax
] = SEC_F
;
711 // Convert from last byte pos to length
715 static void CodeIso14443aAsTag(const uint8_t *cmd
, uint16_t len
) {
716 uint8_t par
[MAX_PARITY_SIZE
] = {0};
717 GetParity(cmd
, len
, par
);
718 CodeIso14443aAsTagPar(cmd
, len
, par
);
721 static void Code4bitAnswerAsTag(uint8_t cmd
) {
726 // Correction bit, might be removed when not needed
731 ToSendStuffBit(1); // 1
737 ToSend
[++ToSendMax
] = SEC_D
;
739 for(uint8_t i
= 0; i
< 4; i
++) {
741 ToSend
[++ToSendMax
] = SEC_D
;
742 LastProxToAirDuration
= 8 * ToSendMax
- 4;
744 ToSend
[++ToSendMax
] = SEC_E
;
745 LastProxToAirDuration
= 8 * ToSendMax
;
751 ToSend
[++ToSendMax
] = SEC_F
;
753 // Convert from last byte pos to length
757 //-----------------------------------------------------------------------------
758 // Wait for commands from reader
759 // Stop when button is pressed
760 // Or return TRUE when command is captured
761 //-----------------------------------------------------------------------------
762 static int GetIso14443aCommandFromReader(uint8_t *received
, uint8_t *parity
, int *len
) {
763 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
764 // only, since we are receiving, not transmitting).
765 // Signal field is off with the appropriate LED
767 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
769 // Now run a `software UART` on the stream of incoming samples.
770 UartInit(received
, parity
);
773 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
778 if(BUTTON_PRESS()) return FALSE
;
780 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
781 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
782 if(MillerDecoding(b
, 0)) {
790 bool prepare_tag_modulation(tag_response_info_t
* response_info
, size_t max_buffer_size
) {
791 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
792 // This will need the following byte array for a modulation sequence
793 // 144 data bits (18 * 8)
796 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
797 // 1 just for the case
799 // 166 bytes, since every bit that needs to be send costs us a byte
801 // Prepare the tag modulation bits from the message
802 CodeIso14443aAsTag(response_info
->response
,response_info
->response_n
);
804 // Make sure we do not exceed the free buffer space
805 if (ToSendMax
> max_buffer_size
) {
806 Dbprintf("Out of memory, when modulating bits for tag answer:");
807 Dbhexdump(response_info
->response_n
,response_info
->response
,false);
811 // Copy the byte array, used for this modulation to the buffer position
812 memcpy(response_info
->modulation
,ToSend
,ToSendMax
);
814 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
815 response_info
->modulation_n
= ToSendMax
;
816 response_info
->ProxToAirDuration
= LastProxToAirDuration
;
820 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
821 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
822 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
823 // -> need 273 bytes buffer
824 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
825 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
826 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
828 bool prepare_allocated_tag_modulation(tag_response_info_t
* response_info
) {
829 // Retrieve and store the current buffer index
830 response_info
->modulation
= free_buffer_pointer
;
832 // Determine the maximum size we can use from our buffer
833 size_t max_buffer_size
= ALLOCATED_TAG_MODULATION_BUFFER_SIZE
;
835 // Forward the prepare tag modulation function to the inner function
836 if (prepare_tag_modulation(response_info
, max_buffer_size
)) {
837 // Update the free buffer offset
838 free_buffer_pointer
+= ToSendMax
;
845 //-----------------------------------------------------------------------------
846 // Main loop of simulated tag: receive commands from reader, decide what
847 // response to send, and send it.
849 //-----------------------------------------------------------------------------
850 void SimulateIso14443aTag(int tagType
, int flags
, byte_t
* data
) {
852 #define ATTACK_KEY_COUNT 8 // keep same as define in cmdhfmf.c -> readerAttack()
860 // PACK response to PWD AUTH for EV1/NTAG
861 uint8_t response8
[4] = {0,0,0,0};
862 // Counter for EV1/NTAG
863 uint32_t counters
[] = {0,0,0};
865 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
866 uint8_t response1
[] = {0,0};
868 // Here, we collect CUID, block1, keytype1, NT1, NR1, AR1, CUID, block2, keytyp2, NT2, NR2, AR2
869 // it should also collect block, keytype.
870 uint8_t cardAUTHSC
= 0;
871 uint8_t cardAUTHKEY
= 0xff; // no authentication
872 // allow collecting up to 8 sets of nonces to allow recovery of up to 8 keys
874 nonces_t ar_nr_nonces
[ATTACK_KEY_COUNT
]; // for attack types moebius
875 memset(ar_nr_nonces
, 0x00, sizeof(ar_nr_nonces
));
876 uint8_t moebius_count
= 0;
879 case 1: { // MIFARE Classic 1k
883 case 2: { // MIFARE Ultralight
887 case 3: { // MIFARE DESFire
892 case 4: { // ISO/IEC 14443-4 - javacard (JCOP)
896 case 5: { // MIFARE TNP3XXX
901 case 6: { // MIFARE Mini 320b
911 ComputeCrc14443(CRC_14443_A
, response8
, 2, &response8
[2], &response8
[3]);
912 // uid not supplied then get from emulator memory
914 uint16_t start
= 4 * (0+12);
916 emlGetMemBt( emdata
, start
, sizeof(emdata
));
917 memcpy(data
, emdata
, 3); // uid bytes 0-2
918 memcpy(data
+3, emdata
+4, 4); // uid bytes 3-7
919 flags
|= FLAG_7B_UID_IN_DATA
;
923 Dbprintf("Error: unkown tagtype (%d)",tagType
);
928 // The second response contains the (mandatory) first 24 bits of the UID
929 uint8_t response2
[5] = {0x00};
932 uint8_t response2a
[5] = {0x00};
934 if ( (flags
& FLAG_7B_UID_IN_DATA
) == FLAG_7B_UID_IN_DATA
) {
935 response2
[0] = 0x88; // Cascade Tag marker
936 response2
[1] = data
[0];
937 response2
[2] = data
[1];
938 response2
[3] = data
[2];
940 response2a
[0] = data
[3];
941 response2a
[1] = data
[4];
942 response2a
[2] = data
[5];
943 response2a
[3] = data
[6]; //??
944 response2a
[4] = response2a
[0] ^ response2a
[1] ^ response2a
[2] ^ response2a
[3];
946 // Configure the ATQA and SAK accordingly
947 response1
[0] |= 0x40;
950 cuid
= bytes_to_num(data
+3, 4);
952 memcpy(response2
, data
, 4);
953 // Configure the ATQA and SAK accordingly
954 response1
[0] &= 0xBF;
956 cuid
= bytes_to_num(data
, 4);
959 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
960 response2
[4] = response2
[0] ^ response2
[1] ^ response2
[2] ^ response2
[3];
962 // Prepare the mandatory SAK (for 4 and 7 byte UID)
963 uint8_t response3
[3] = {sak
, 0x00, 0x00};
964 ComputeCrc14443(CRC_14443_A
, response3
, 1, &response3
[1], &response3
[2]);
966 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
967 uint8_t response3a
[3] = {0x00};
968 response3a
[0] = sak
& 0xFB;
969 ComputeCrc14443(CRC_14443_A
, response3a
, 1, &response3a
[1], &response3a
[2]);
972 uint8_t response5
[4];
974 uint8_t response6
[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
975 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
976 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
977 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
978 // TC(1) = 0x02: CID supported, NAD not supported
979 ComputeCrc14443(CRC_14443_A
, response6
, 4, &response6
[4], &response6
[5]);
981 // Prepare GET_VERSION (different for UL EV-1 / NTAG)
982 // uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
983 // uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
984 // Prepare CHK_TEARING
985 // uint8_t response9[] = {0xBD,0x90,0x3f};
987 #define TAG_RESPONSE_COUNT 10
988 tag_response_info_t responses
[TAG_RESPONSE_COUNT
] = {
989 { .response
= response1
, .response_n
= sizeof(response1
) }, // Answer to request - respond with card type
990 { .response
= response2
, .response_n
= sizeof(response2
) }, // Anticollision cascade1 - respond with uid
991 { .response
= response2a
, .response_n
= sizeof(response2a
) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
992 { .response
= response3
, .response_n
= sizeof(response3
) }, // Acknowledge select - cascade 1
993 { .response
= response3a
, .response_n
= sizeof(response3a
) }, // Acknowledge select - cascade 2
994 { .response
= response5
, .response_n
= sizeof(response5
) }, // Authentication answer (random nonce)
995 { .response
= response6
, .response_n
= sizeof(response6
) }, // dummy ATS (pseudo-ATR), answer to RATS
997 { .response
= response8
, .response_n
= sizeof(response8
) } // EV1/NTAG PACK response
999 // { .response = response7_NTAG, .response_n = sizeof(response7_NTAG)}, // EV1/NTAG GET_VERSION response
1000 // { .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1003 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1004 // Such a response is less time critical, so we can prepare them on the fly
1005 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1006 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1007 uint8_t dynamic_response_buffer
[DYNAMIC_RESPONSE_BUFFER_SIZE
];
1008 uint8_t dynamic_modulation_buffer
[DYNAMIC_MODULATION_BUFFER_SIZE
];
1009 tag_response_info_t dynamic_response_info
= {
1010 .response
= dynamic_response_buffer
,
1012 .modulation
= dynamic_modulation_buffer
,
1016 // We need to listen to the high-frequency, peak-detected path.
1017 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1019 BigBuf_free_keep_EM();
1023 // allocate buffers:
1024 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
1025 uint8_t *receivedCmdPar
= BigBuf_malloc(MAX_PARITY_SIZE
);
1026 free_buffer_pointer
= BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE
);
1028 // Prepare the responses of the anticollision phase
1029 // there will be not enough time to do this at the moment the reader sends it REQA
1030 for (size_t i
=0; i
<TAG_RESPONSE_COUNT
; i
++)
1031 prepare_allocated_tag_modulation(&responses
[i
]);
1035 // To control where we are in the protocol
1039 // Just to allow some checks
1043 tag_response_info_t
* p_response
;
1049 // Clean receive command buffer
1050 if(!GetIso14443aCommandFromReader(receivedCmd
, receivedCmdPar
, &len
)) {
1051 Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
1056 // Okay, look at the command now.
1058 if(receivedCmd
[0] == ISO14443A_CMD_REQA
) { // Received a REQUEST
1059 p_response
= &responses
[0]; order
= 1;
1060 } else if(receivedCmd
[0] == ISO14443A_CMD_WUPA
) { // Received a WAKEUP
1061 p_response
= &responses
[0]; order
= 6;
1062 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
) { // Received request for UID (cascade 1)
1063 p_response
= &responses
[1]; order
= 2;
1064 } else if(receivedCmd
[1] == 0x20 && receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
) { // Received request for UID (cascade 2)
1065 p_response
= &responses
[2]; order
= 20;
1066 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
) { // Received a SELECT (cascade 1)
1067 p_response
= &responses
[3]; order
= 3;
1068 } else if(receivedCmd
[1] == 0x70 && receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
) { // Received a SELECT (cascade 2)
1069 p_response
= &responses
[4]; order
= 30;
1070 } else if(receivedCmd
[0] == ISO14443A_CMD_READBLOCK
) { // Received a (plain) READ
1071 uint8_t block
= receivedCmd
[1];
1072 // if Ultralight or NTAG (4 byte blocks)
1073 if ( tagType
== 7 || tagType
== 2 ) {
1074 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1075 uint16_t start
= 4 * (block
+12);
1076 uint8_t emdata
[MAX_MIFARE_FRAME_SIZE
];
1077 emlGetMemBt( emdata
, start
, 16);
1078 AppendCrc14443a(emdata
, 16);
1079 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1080 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1082 } else { // all other tags (16 byte block tags)
1083 uint8_t emdata
[MAX_MIFARE_FRAME_SIZE
];
1084 emlGetMemBt( emdata
, block
, 16);
1085 AppendCrc14443a(emdata
, 16);
1086 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1087 // EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1088 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1089 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1092 } else if(receivedCmd
[0] == MIFARE_ULEV1_FASTREAD
) { // Received a FAST READ (ranged read)
1093 uint8_t emdata
[MAX_FRAME_SIZE
];
1094 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1095 int start
= (receivedCmd
[1]+12) * 4;
1096 int len
= (receivedCmd
[2] - receivedCmd
[1] + 1) * 4;
1097 emlGetMemBt( emdata
, start
, len
);
1098 AppendCrc14443a(emdata
, len
);
1099 EmSendCmdEx(emdata
, len
+2, false);
1101 } else if(receivedCmd
[0] == MIFARE_ULEV1_READSIG
&& tagType
== 7) { // Received a READ SIGNATURE --
1102 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1103 uint16_t start
= 4 * 4;
1105 emlGetMemBt( emdata
, start
, 32);
1106 AppendCrc14443a(emdata
, 32);
1107 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1109 } else if (receivedCmd
[0] == MIFARE_ULEV1_READ_CNT
&& tagType
== 7) { // Received a READ COUNTER --
1110 uint8_t index
= receivedCmd
[1];
1111 uint8_t data
[] = {0x00,0x00,0x00,0x14,0xa5};
1112 if ( counters
[index
] > 0) {
1113 num_to_bytes(counters
[index
], 3, data
);
1114 AppendCrc14443a(data
, sizeof(data
)-2);
1116 EmSendCmdEx(data
,sizeof(data
),false);
1118 } else if (receivedCmd
[0] == MIFARE_ULEV1_INCR_CNT
&& tagType
== 7) { // Received a INC COUNTER --
1119 // number of counter
1120 uint8_t counter
= receivedCmd
[1];
1121 uint32_t val
= bytes_to_num(receivedCmd
+2,4);
1122 counters
[counter
] = val
;
1125 uint8_t ack
[] = {0x0a};
1126 EmSendCmdEx(ack
,sizeof(ack
),false);
1128 } else if(receivedCmd
[0] == MIFARE_ULEV1_CHECKTEAR
&& tagType
== 7) { // Received a CHECK_TEARING_EVENT --
1129 // first 12 blocks of emu are [getversion answer - check tearing - pack - 0x00 - signature]
1132 if (receivedCmd
[1]<3) counter
= receivedCmd
[1];
1133 emlGetMemBt( emdata
, 10+counter
, 1);
1134 AppendCrc14443a(emdata
, sizeof(emdata
)-2);
1135 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1137 } else if(receivedCmd
[0] == ISO14443A_CMD_HALT
) { // Received a HALT
1138 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1140 } else if(receivedCmd
[0] == MIFARE_AUTH_KEYA
|| receivedCmd
[0] == MIFARE_AUTH_KEYB
) { // Received an authentication request
1141 if ( tagType
== 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1143 emlGetMemBt( emdata
, 0, 8 );
1144 AppendCrc14443a(emdata
, sizeof(emdata
)-2);
1145 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1149 cardAUTHKEY
= receivedCmd
[0] - 0x60;
1150 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
1152 // incease nonce at AUTH requests. this is time consuming.
1154 //num_to_bytes(nonce, 4, response5);
1155 num_to_bytes(nonce
, 4, dynamic_response_info
.response
);
1156 dynamic_response_info
.response_n
= 4;
1158 //prepare_tag_modulation(&responses[5], DYNAMIC_MODULATION_BUFFER_SIZE);
1159 prepare_tag_modulation(&dynamic_response_info
, DYNAMIC_MODULATION_BUFFER_SIZE
);
1160 p_response
= &dynamic_response_info
;
1161 //p_response = &responses[5];
1164 } else if(receivedCmd
[0] == ISO14443A_CMD_RATS
) { // Received a RATS request
1165 if (tagType
== 1 || tagType
== 2) { // RATS not supported
1166 EmSend4bit(CARD_NACK_NA
);
1169 p_response
= &responses
[6]; order
= 70;
1171 } else if (order
== 7 && len
== 8) { // Received {nr] and {ar} (part of authentication)
1172 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1173 uint32_t nr
= bytes_to_num(receivedCmd
,4);
1174 uint32_t ar
= bytes_to_num(receivedCmd
+4,4);
1176 // Collect AR/NR per keytype & sector
1177 if ( (flags
& FLAG_NR_AR_ATTACK
) == FLAG_NR_AR_ATTACK
) {
1181 for (uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
1182 // find which index to use
1183 if ( (cardAUTHSC
== ar_nr_nonces
[i
].sector
) && (cardAUTHKEY
== ar_nr_nonces
[i
].keytype
))
1186 // keep track of empty slots.
1187 if ( ar_nr_nonces
[i
].state
== EMPTY
)
1190 // if no empty slots. Choose first and overwrite.
1191 if ( index
== -1 ) {
1192 if ( empty
== -1 ) {
1194 ar_nr_nonces
[index
].state
= EMPTY
;
1200 switch(ar_nr_nonces
[index
].state
) {
1202 // first nonce collect
1203 ar_nr_nonces
[index
].cuid
= cuid
;
1204 ar_nr_nonces
[index
].sector
= cardAUTHSC
;
1205 ar_nr_nonces
[index
].keytype
= cardAUTHKEY
;
1206 ar_nr_nonces
[index
].nonce
= nonce
;
1207 ar_nr_nonces
[index
].nr
= nr
;
1208 ar_nr_nonces
[index
].ar
= ar
;
1209 ar_nr_nonces
[index
].state
= FIRST
;
1213 // second nonce collect
1214 ar_nr_nonces
[index
].nonce2
= nonce
;
1215 ar_nr_nonces
[index
].nr2
= nr
;
1216 ar_nr_nonces
[index
].ar2
= ar
;
1217 ar_nr_nonces
[index
].state
= SECOND
;
1220 cmd_send(CMD_ACK
, CMD_SIMULATE_MIFARE_CARD
, 0, 0, &ar_nr_nonces
[index
], sizeof(nonces_t
));
1222 ar_nr_nonces
[index
].state
= EMPTY
;
1223 ar_nr_nonces
[index
].sector
= 0;
1224 ar_nr_nonces
[index
].keytype
= 0;
1234 } else if (receivedCmd
[0] == MIFARE_ULC_AUTH_1
) { // ULC authentication, or Desfire Authentication
1235 } else if (receivedCmd
[0] == MIFARE_ULEV1_AUTH
) { // NTAG / EV-1 authentication
1236 if ( tagType
== 7 ) {
1237 uint16_t start
= 13; // first 4 blocks of emu are [getversion answer - check tearing - pack - 0x00]
1239 emlGetMemBt( emdata
, start
, 2);
1240 AppendCrc14443a(emdata
, 2);
1241 EmSendCmdEx(emdata
, sizeof(emdata
), false);
1243 uint32_t pwd
= bytes_to_num(receivedCmd
+1,4);
1245 if ( MF_DBGLEVEL
>= 3) Dbprintf("Auth attempt: %08x", pwd
);
1248 // Check for ISO 14443A-4 compliant commands, look at left nibble
1249 switch (receivedCmd
[0]) {
1251 case 0x03: { // IBlock (command no CID)
1252 dynamic_response_info
.response
[0] = receivedCmd
[0];
1253 dynamic_response_info
.response
[1] = 0x90;
1254 dynamic_response_info
.response
[2] = 0x00;
1255 dynamic_response_info
.response_n
= 3;
1258 case 0x0A: { // IBlock (command CID)
1259 dynamic_response_info
.response
[0] = receivedCmd
[0];
1260 dynamic_response_info
.response
[1] = 0x00;
1261 dynamic_response_info
.response
[2] = 0x90;
1262 dynamic_response_info
.response
[3] = 0x00;
1263 dynamic_response_info
.response_n
= 4;
1267 case 0x1B: { // Chaining command
1268 dynamic_response_info
.response
[0] = 0xaa | ((receivedCmd
[0]) & 1);
1269 dynamic_response_info
.response_n
= 2;
1274 dynamic_response_info
.response
[0] = receivedCmd
[0] ^ 0x11;
1275 dynamic_response_info
.response_n
= 2;
1278 case 0xBA: { // ping / pong
1279 dynamic_response_info
.response
[0] = 0xAB;
1280 dynamic_response_info
.response
[1] = 0x00;
1281 dynamic_response_info
.response_n
= 2;
1285 case 0xC2: { // Readers sends deselect command
1286 dynamic_response_info
.response
[0] = 0xCA;
1287 dynamic_response_info
.response
[1] = 0x00;
1288 dynamic_response_info
.response_n
= 2;
1292 // Never seen this command before
1293 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1294 Dbprintf("Received unknown command (len=%d):",len
);
1295 Dbhexdump(len
,receivedCmd
,false);
1297 dynamic_response_info
.response_n
= 0;
1301 if (dynamic_response_info
.response_n
> 0) {
1302 // Copy the CID from the reader query
1303 dynamic_response_info
.response
[1] = receivedCmd
[1];
1305 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1306 AppendCrc14443a(dynamic_response_info
.response
, dynamic_response_info
.response_n
);
1307 dynamic_response_info
.response_n
+= 2;
1309 if (prepare_tag_modulation(&dynamic_response_info
,DYNAMIC_MODULATION_BUFFER_SIZE
) == false) {
1310 DbpString("Error preparing tag response");
1311 LogTrace(receivedCmd
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
1314 p_response
= &dynamic_response_info
;
1318 // Count number of wakeups received after a halt
1319 if(order
== 6 && lastorder
== 5) { happened
++; }
1321 // Count number of other messages after a halt
1322 if(order
!= 6 && lastorder
== 5) { happened2
++; }
1324 // comment this limit if you want to simulation longer
1326 DbpString("Trace Full. Simulation stopped.");
1329 // comment this limit if you want to simulation longer
1330 if(cmdsRecvd
> 999) {
1331 DbpString("1000 commands later...");
1336 if (p_response
!= NULL
) {
1337 EmSendCmd14443aRaw(p_response
->modulation
, p_response
->modulation_n
, receivedCmd
[0] == 0x52);
1338 // do the tracing for the previous reader request and this tag answer:
1339 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1340 GetParity(p_response
->response
, p_response
->response_n
, par
);
1342 EmLogTrace(Uart
.output
,
1344 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1345 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1347 p_response
->response
,
1348 p_response
->response_n
,
1349 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1350 (LastTimeProxToAirStart
+ p_response
->ProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1355 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
1357 BigBuf_free_keep_EM();
1361 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1) {
1363 for ( uint8_t i = 0; i < ATTACK_KEY_COUNT; i++) {
1364 if (ar_nr_collected[i] == 2) {
1365 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
1366 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
1367 ar_nr_resp[i].cuid, //UID
1368 ar_nr_resp[i].nonce, //NT
1369 ar_nr_resp[i].nr, //NR1
1370 ar_nr_resp[i].ar, //AR1
1371 ar_nr_resp[i].nr2, //NR2
1372 ar_nr_resp[i].ar2 //AR2
1377 for ( uint8_t i = ATTACK_KEY_COUNT; i < ATTACK_KEY_COUNT*2; i++) {
1378 if (ar_nr_collected[i] == 2) {
1379 Dbprintf("Collected two pairs of AR/NR which can be used to extract %s from reader for sector %d:", (i<ATTACK_KEY_COUNT/2) ? "keyA" : "keyB", ar_nr_resp[i].sector);
1380 Dbprintf("../tools/mfkey/mfkey32v2 %08x %08x %08x %08x %08x %08x %08x",
1381 ar_nr_resp[i].cuid, //UID
1382 ar_nr_resp[i].nonce, //NT
1383 ar_nr_resp[i].nr, //NR1
1384 ar_nr_resp[i].ar, //AR1
1385 ar_nr_resp[i].nonce2,//NT2
1386 ar_nr_resp[i].nr2, //NR2
1387 ar_nr_resp[i].ar2 //AR2
1394 if (MF_DBGLEVEL
>= 4){
1395 Dbprintf("-[ Wake ups after halt [%d]", happened
);
1396 Dbprintf("-[ Messages after halt [%d]", happened2
);
1397 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd
);
1398 Dbprintf("-[ Num of moebius tries [%d]", moebius_count
);
1401 cmd_send(CMD_ACK
,1,0,0,0,0);
1404 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1405 // of bits specified in the delay parameter.
1406 void PrepareDelayedTransfer(uint16_t delay
) {
1410 uint8_t bitmask
= 0;
1411 uint8_t bits_to_shift
= 0;
1412 uint8_t bits_shifted
= 0;
1415 for (i
= 0; i
< delay
; ++i
)
1416 bitmask
|= (0x01 << i
);
1418 ToSend
[++ToSendMax
] = 0x00;
1420 for (i
= 0; i
< ToSendMax
; ++i
) {
1421 bits_to_shift
= ToSend
[i
] & bitmask
;
1422 ToSend
[i
] = ToSend
[i
] >> delay
;
1423 ToSend
[i
] = ToSend
[i
] | (bits_shifted
<< (8 - delay
));
1424 bits_shifted
= bits_to_shift
;
1429 //-------------------------------------------------------------------------------------
1430 // Transmit the command (to the tag) that was placed in ToSend[].
1431 // Parameter timing:
1432 // if NULL: transfer at next possible time, taking into account
1433 // request guard time and frame delay time
1434 // if == 0: transfer immediately and return time of transfer
1435 // if != 0: delay transfer until time specified
1436 //-------------------------------------------------------------------------------------
1437 static void TransmitFor14443a(const uint8_t *cmd
, uint16_t len
, uint32_t *timing
) {
1438 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_MOD
);
1440 uint32_t ThisTransferTime
= 0;
1443 if(*timing
== 0) { // Measure time
1444 *timing
= (GetCountSspClk() + 8) & 0xfffffff8;
1446 PrepareDelayedTransfer(*timing
& 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1448 if(MF_DBGLEVEL
>= 4 && GetCountSspClk() >= (*timing
& 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1449 while(GetCountSspClk() < (*timing
& 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1450 LastTimeProxToAirStart
= *timing
;
1452 ThisTransferTime
= ((MAX(NextTransferTime
, GetCountSspClk()) & 0xfffffff8) + 8);
1454 while(GetCountSspClk() < ThisTransferTime
);
1456 LastTimeProxToAirStart
= ThisTransferTime
;
1460 AT91C_BASE_SSC
->SSC_THR
= SEC_Y
;
1464 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1465 AT91C_BASE_SSC
->SSC_THR
= cmd
[c
];
1472 NextTransferTime
= MAX(NextTransferTime
, LastTimeProxToAirStart
+ REQUEST_GUARD_TIME
);
1475 //-----------------------------------------------------------------------------
1476 // Prepare reader command (in bits, support short frames) to send to FPGA
1477 //-----------------------------------------------------------------------------
1478 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd
, uint16_t bits
, const uint8_t *parity
) {
1485 // Start of Communication (Seq. Z)
1486 ToSend
[++ToSendMax
] = SEC_Z
;
1487 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1489 size_t bytecount
= nbytes(bits
);
1490 // Generate send structure for the data bits
1491 for (i
= 0; i
< bytecount
; i
++) {
1492 // Get the current byte to send
1494 size_t bitsleft
= MIN((bits
-(i
*8)),8);
1496 for (j
= 0; j
< bitsleft
; j
++) {
1499 ToSend
[++ToSendMax
] = SEC_X
;
1500 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1505 ToSend
[++ToSendMax
] = SEC_Z
;
1506 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1509 ToSend
[++ToSendMax
] = SEC_Y
;
1516 // Only transmit parity bit if we transmitted a complete byte
1517 if (j
== 8 && parity
!= NULL
) {
1518 // Get the parity bit
1519 if (parity
[i
>>3] & (0x80 >> (i
&0x0007))) {
1521 ToSend
[++ToSendMax
] = SEC_X
;
1522 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 2;
1527 ToSend
[++ToSendMax
] = SEC_Z
;
1528 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1531 ToSend
[++ToSendMax
] = SEC_Y
;
1538 // End of Communication: Logic 0 followed by Sequence Y
1541 ToSend
[++ToSendMax
] = SEC_Z
;
1542 LastProxToAirDuration
= 8 * (ToSendMax
+1) - 6;
1545 ToSend
[++ToSendMax
] = SEC_Y
;
1548 ToSend
[++ToSendMax
] = SEC_Y
;
1550 // Convert to length of command:
1554 //-----------------------------------------------------------------------------
1555 // Prepare reader command to send to FPGA
1556 //-----------------------------------------------------------------------------
1557 void CodeIso14443aAsReaderPar(const uint8_t *cmd
, uint16_t len
, const uint8_t *parity
) {
1558 CodeIso14443aBitsAsReaderPar(cmd
, len
*8, parity
);
1561 //-----------------------------------------------------------------------------
1562 // Wait for commands from reader
1563 // Stop when button is pressed (return 1) or field was gone (return 2)
1564 // Or return 0 when command is captured
1565 //-----------------------------------------------------------------------------
1566 static int EmGetCmd(uint8_t *received
, uint16_t *len
, uint8_t *parity
) {
1569 uint32_t timer
= 0, vtime
= 0;
1573 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1574 // only, since we are receiving, not transmitting).
1575 // Signal field is off with the appropriate LED
1577 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
1579 // Set ADC to read field strength
1580 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_SWRST
;
1581 AT91C_BASE_ADC
->ADC_MR
=
1582 ADC_MODE_PRESCALE(63) |
1583 ADC_MODE_STARTUP_TIME(1) |
1584 ADC_MODE_SAMPLE_HOLD_TIME(15);
1585 AT91C_BASE_ADC
->ADC_CHER
= ADC_CHANNEL(ADC_CHAN_HF
);
1587 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1589 // Now run a 'software UART' on the stream of incoming samples.
1590 UartInit(received
, parity
);
1593 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1598 if (BUTTON_PRESS()) return 1;
1600 // test if the field exists
1601 if (AT91C_BASE_ADC
->ADC_SR
& ADC_END_OF_CONVERSION(ADC_CHAN_HF
)) {
1603 analogAVG
+= AT91C_BASE_ADC
->ADC_CDR
[ADC_CHAN_HF
];
1604 AT91C_BASE_ADC
->ADC_CR
= AT91C_ADC_START
;
1605 if (analogCnt
>= 32) {
1606 if ((MAX_ADC_HF_VOLTAGE
* (analogAVG
/ analogCnt
) >> 10) < MF_MINFIELDV
) {
1607 vtime
= GetTickCount();
1608 if (!timer
) timer
= vtime
;
1609 // 50ms no field --> card to idle state
1610 if (vtime
- timer
> 50) return 2;
1612 if (timer
) timer
= 0;
1618 // receive and test the miller decoding
1619 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1620 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1621 if(MillerDecoding(b
, 0)) {
1629 int EmSendCmd14443aRaw(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
) {
1632 uint32_t ThisTransferTime
;
1634 // Modulate Manchester
1635 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_TAGSIM_MOD
);
1637 // include correction bit if necessary
1638 if (Uart
.parityBits
& 0x01) {
1639 correctionNeeded
= TRUE
;
1641 // 1236, so correction bit needed
1642 i
= (correctionNeeded
) ? 0 : 1;
1644 // clear receiving shift register and holding register
1645 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1646 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1647 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1648 b
= AT91C_BASE_SSC
->SSC_RHR
; (void) b
;
1650 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1651 for (uint8_t j
= 0; j
< 5; j
++) { // allow timeout - better late than never
1652 while(!(AT91C_BASE_SSC
->SSC_SR
& AT91C_SSC_RXRDY
));
1653 if (AT91C_BASE_SSC
->SSC_RHR
) break;
1656 while ((ThisTransferTime
= GetCountSspClk()) & 0x00000007);
1659 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1662 for(; i
< respLen
; ) {
1663 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1664 AT91C_BASE_SSC
->SSC_THR
= resp
[i
++];
1665 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1668 if(BUTTON_PRESS()) break;
1671 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1672 uint8_t fpga_queued_bits
= FpgaSendQueueDelay
>> 3; // twich /8 ?? >>3,
1673 for (i
= 0; i
<= fpga_queued_bits
/8 + 1; ) {
1674 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
1675 AT91C_BASE_SSC
->SSC_THR
= SEC_F
;
1676 FpgaSendQueueDelay
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1680 LastTimeProxToAirStart
= ThisTransferTime
+ (correctionNeeded
?8:0);
1684 int EmSend4bitEx(uint8_t resp
, bool correctionNeeded
){
1685 Code4bitAnswerAsTag(resp
);
1686 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1687 // do the tracing for the previous reader request and this tag answer:
1688 uint8_t par
[1] = {0x00};
1689 GetParity(&resp
, 1, par
);
1690 EmLogTrace(Uart
.output
,
1692 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1693 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1697 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1698 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1703 int EmSend4bit(uint8_t resp
){
1704 return EmSend4bitEx(resp
, false);
1707 int EmSendCmdExPar(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
, uint8_t *par
){
1708 CodeIso14443aAsTagPar(resp
, respLen
, par
);
1709 int res
= EmSendCmd14443aRaw(ToSend
, ToSendMax
, correctionNeeded
);
1710 // do the tracing for the previous reader request and this tag answer:
1711 EmLogTrace(Uart
.output
,
1713 Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1714 Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
,
1718 LastTimeProxToAirStart
*16 + DELAY_ARM2AIR_AS_TAG
,
1719 (LastTimeProxToAirStart
+ LastProxToAirDuration
)*16 + DELAY_ARM2AIR_AS_TAG
,
1724 int EmSendCmdEx(uint8_t *resp
, uint16_t respLen
, bool correctionNeeded
){
1725 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1726 GetParity(resp
, respLen
, par
);
1727 return EmSendCmdExPar(resp
, respLen
, correctionNeeded
, par
);
1730 int EmSendCmd(uint8_t *resp
, uint16_t respLen
){
1731 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1732 GetParity(resp
, respLen
, par
);
1733 return EmSendCmdExPar(resp
, respLen
, false, par
);
1736 int EmSendCmdPar(uint8_t *resp
, uint16_t respLen
, uint8_t *par
){
1737 return EmSendCmdExPar(resp
, respLen
, false, par
);
1740 bool EmLogTrace(uint8_t *reader_data
, uint16_t reader_len
, uint32_t reader_StartTime
, uint32_t reader_EndTime
, uint8_t *reader_Parity
,
1741 uint8_t *tag_data
, uint16_t tag_len
, uint32_t tag_StartTime
, uint32_t tag_EndTime
, uint8_t *tag_Parity
)
1743 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1744 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1745 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1746 uint16_t reader_modlen
= reader_EndTime
- reader_StartTime
;
1747 uint16_t approx_fdt
= tag_StartTime
- reader_EndTime
;
1748 uint16_t exact_fdt
= (approx_fdt
- 20 + 32)/64 * 64 + 20;
1749 reader_EndTime
= tag_StartTime
- exact_fdt
;
1750 reader_StartTime
= reader_EndTime
- reader_modlen
;
1752 if (!LogTrace(reader_data
, reader_len
, reader_StartTime
, reader_EndTime
, reader_Parity
, TRUE
))
1755 return(!LogTrace(tag_data
, tag_len
, tag_StartTime
, tag_EndTime
, tag_Parity
, FALSE
));
1759 //-----------------------------------------------------------------------------
1760 // Wait a certain time for tag response
1761 // If a response is captured return TRUE
1762 // If it takes too long return FALSE
1763 //-----------------------------------------------------------------------------
1764 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse
, uint8_t *receivedResponsePar
, uint16_t offset
) {
1767 // Set FPGA mode to "reader listen mode", no modulation (listen
1768 // only, since we are receiving, not transmitting).
1769 // Signal field is on with the appropriate LED
1771 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| FPGA_HF_ISO14443A_READER_LISTEN
);
1773 // Now get the answer from the card
1774 DemodInit(receivedResponse
, receivedResponsePar
);
1777 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1782 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
1783 b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
1784 if(ManchesterDecoding(b
, offset
, 0)) {
1785 NextTransferTime
= MAX(NextTransferTime
, Demod
.endTime
- (DELAY_AIR2ARM_AS_READER
+ DELAY_ARM2AIR_AS_READER
)/16 + FRAME_DELAY_TIME_PICC_TO_PCD
);
1787 } else if (c
++ > iso14a_timeout
&& Demod
.state
== DEMOD_UNSYNCD
) {
1794 void ReaderTransmitBitsPar(uint8_t* frame
, uint16_t bits
, uint8_t *par
, uint32_t *timing
) {
1796 CodeIso14443aBitsAsReaderPar(frame
, bits
, par
);
1797 // Send command to tag
1798 TransmitFor14443a(ToSend
, ToSendMax
, timing
);
1799 if(trigger
) LED_A_ON();
1801 LogTrace(frame
, nbytes(bits
), (LastTimeProxToAirStart
<<4) + DELAY_ARM2AIR_AS_READER
, ((LastTimeProxToAirStart
+ LastProxToAirDuration
)<<4) + DELAY_ARM2AIR_AS_READER
, par
, TRUE
);
1804 void ReaderTransmitPar(uint8_t* frame
, uint16_t len
, uint8_t *par
, uint32_t *timing
) {
1805 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1808 void ReaderTransmitBits(uint8_t* frame
, uint16_t len
, uint32_t *timing
) {
1809 // Generate parity and redirect
1810 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1811 GetParity(frame
, len
/8, par
);
1812 ReaderTransmitBitsPar(frame
, len
, par
, timing
);
1815 void ReaderTransmit(uint8_t* frame
, uint16_t len
, uint32_t *timing
) {
1816 // Generate parity and redirect
1817 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
1818 GetParity(frame
, len
, par
);
1819 ReaderTransmitBitsPar(frame
, len
*8, par
, timing
);
1822 int ReaderReceiveOffset(uint8_t* receivedAnswer
, uint16_t offset
, uint8_t *parity
) {
1823 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, offset
))
1825 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1829 int ReaderReceive(uint8_t *receivedAnswer
, uint8_t *parity
) {
1830 if (!GetIso14443aAnswerFromTag(receivedAnswer
, parity
, 0))
1832 LogTrace(receivedAnswer
, Demod
.len
, Demod
.startTime
*16 - DELAY_AIR2ARM_AS_READER
, Demod
.endTime
*16 - DELAY_AIR2ARM_AS_READER
, parity
, FALSE
);
1836 // performs iso14443a anticollision (optional) and card select procedure
1837 // fills the uid and cuid pointer unless NULL
1838 // fills the card info record unless NULL
1839 // if anticollision is false, then the UID must be provided in uid_ptr[]
1840 // and num_cascades must be set (1: 4 Byte UID, 2: 7 Byte UID, 3: 10 Byte UID)
1841 int iso14443a_select_card(byte_t
*uid_ptr
, iso14a_card_select_t
*p_hi14a_card
, uint32_t *cuid_ptr
, bool anticollision
, uint8_t num_cascades
) {
1842 uint8_t wupa
[] = { ISO14443A_CMD_WUPA
}; // 0x26 - ISO14443A_CMD_REQA 0x52 - ISO14443A_CMD_WUPA
1843 uint8_t sel_all
[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT
,0x20 };
1844 uint8_t sel_uid
[] = { ISO14443A_CMD_ANTICOLL_OR_SELECT
,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1845 uint8_t rats
[] = { ISO14443A_CMD_RATS
,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1846 uint8_t resp
[MAX_FRAME_SIZE
] = {0}; // theoretically. A usual RATS will be much smaller
1847 uint8_t resp_par
[MAX_PARITY_SIZE
] = {0};
1848 byte_t uid_resp
[4] = {0};
1849 size_t uid_resp_len
= 0;
1851 uint8_t sak
= 0x04; // cascade uid
1852 int cascade_level
= 0;
1855 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1856 ReaderTransmitBitsPar(wupa
, 7, NULL
, NULL
);
1859 if(!ReaderReceive(resp
, resp_par
)) return 0;
1862 memcpy(p_hi14a_card
->atqa
, resp
, 2);
1863 p_hi14a_card
->uidlen
= 0;
1864 memset(p_hi14a_card
->uid
,0,10);
1867 if (anticollision
) {
1870 memset(uid_ptr
,0,10);
1873 // reset the PCB block number
1874 iso14_pcb_blocknum
= 0;
1876 // check for proprietary anticollision:
1877 if ((resp
[0] & 0x1F) == 0) return 3;
1879 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1880 // which case we need to make a cascade 2 request and select - this is a long UID
1881 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1882 for(; sak
& 0x04; cascade_level
++) {
1883 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1884 sel_uid
[0] = sel_all
[0] = 0x93 + cascade_level
* 2;
1886 if (anticollision
) {
1888 ReaderTransmit(sel_all
, sizeof(sel_all
), NULL
);
1889 if (!ReaderReceive(resp
, resp_par
)) return 0;
1891 if (Demod
.collisionPos
) { // we had a collision and need to construct the UID bit by bit
1892 memset(uid_resp
, 0, 4);
1893 uint16_t uid_resp_bits
= 0;
1894 uint16_t collision_answer_offset
= 0;
1895 // anti-collision-loop:
1896 while (Demod
.collisionPos
) {
1897 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod
.collisionPos
);
1898 for (uint16_t i
= collision_answer_offset
; i
< Demod
.collisionPos
; i
++, uid_resp_bits
++) { // add valid UID bits before collision point
1899 uint16_t UIDbit
= (resp
[i
/8] >> (i
% 8)) & 0x01;
1900 uid_resp
[uid_resp_bits
/ 8] |= UIDbit
<< (uid_resp_bits
% 8);
1902 uid_resp
[uid_resp_bits
/8] |= 1 << (uid_resp_bits
% 8); // next time select the card(s) with a 1 in the collision position
1904 // construct anticollosion command:
1905 sel_uid
[1] = ((2 + uid_resp_bits
/8) << 4) | (uid_resp_bits
& 0x07); // length of data in bytes and bits
1906 for (uint16_t i
= 0; i
<= uid_resp_bits
/8; i
++) {
1907 sel_uid
[2+i
] = uid_resp
[i
];
1909 collision_answer_offset
= uid_resp_bits
%8;
1910 ReaderTransmitBits(sel_uid
, 16 + uid_resp_bits
, NULL
);
1911 if (!ReaderReceiveOffset(resp
, collision_answer_offset
, resp_par
)) return 0;
1913 // finally, add the last bits and BCC of the UID
1914 for (uint16_t i
= collision_answer_offset
; i
< (Demod
.len
-1)*8; i
++, uid_resp_bits
++) {
1915 uint16_t UIDbit
= (resp
[i
/8] >> (i
%8)) & 0x01;
1916 uid_resp
[uid_resp_bits
/8] |= UIDbit
<< (uid_resp_bits
% 8);
1919 } else { // no collision, use the response to SELECT_ALL as current uid
1920 memcpy(uid_resp
, resp
, 4);
1924 if (cascade_level
< num_cascades
- 1) {
1926 memcpy(uid_resp
+1, uid_ptr
+cascade_level
*3, 3);
1928 memcpy(uid_resp
, uid_ptr
+cascade_level
*3, 4);
1933 // calculate crypto UID. Always use last 4 Bytes.
1935 *cuid_ptr
= bytes_to_num(uid_resp
, 4);
1937 // Construct SELECT UID command
1938 sel_uid
[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1939 memcpy(sel_uid
+2, uid_resp
, 4); // the UID received during anticollision, or the provided UID
1940 sel_uid
[6] = sel_uid
[2] ^ sel_uid
[3] ^ sel_uid
[4] ^ sel_uid
[5]; // calculate and add BCC
1941 AppendCrc14443a(sel_uid
, 7); // calculate and add CRC
1942 ReaderTransmit(sel_uid
, sizeof(sel_uid
), NULL
);
1945 if (!ReaderReceive(resp
, resp_par
)) return 0;
1949 // Test if more parts of the uid are coming
1950 if ((sak
& 0x04) /* && uid_resp[0] == 0x88 */) {
1951 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1952 // http://www.nxp.com/documents/application_note/AN10927.pdf
1953 uid_resp
[0] = uid_resp
[1];
1954 uid_resp
[1] = uid_resp
[2];
1955 uid_resp
[2] = uid_resp
[3];
1959 if(uid_ptr
&& anticollision
)
1960 memcpy(uid_ptr
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1963 memcpy(p_hi14a_card
->uid
+ (cascade_level
*3), uid_resp
, uid_resp_len
);
1964 p_hi14a_card
->uidlen
+= uid_resp_len
;
1969 p_hi14a_card
->sak
= sak
;
1970 p_hi14a_card
->ats_len
= 0;
1973 // non iso14443a compliant tag
1974 if( (sak
& 0x20) == 0) return 2;
1976 // Request for answer to select
1977 AppendCrc14443a(rats
, 2);
1978 ReaderTransmit(rats
, sizeof(rats
), NULL
);
1980 if (!(len
= ReaderReceive(resp
, resp_par
))) return 0;
1983 memcpy(p_hi14a_card
->ats
, resp
, sizeof(p_hi14a_card
->ats
));
1984 p_hi14a_card
->ats_len
= len
;
1987 // set default timeout based on ATS
1988 iso14a_set_ATS_timeout(resp
);
1992 void iso14443a_setup(uint8_t fpga_minor_mode
) {
1994 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1995 // Set up the synchronous serial port
1997 // connect Demodulated Signal to ADC:
1998 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
2001 // Signal field is on with the appropriate LED
2002 if (fpga_minor_mode
== FPGA_HF_ISO14443A_READER_MOD
||
2003 fpga_minor_mode
== FPGA_HF_ISO14443A_READER_LISTEN
)
2006 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A
| fpga_minor_mode
);
2013 // Prepare the demodulation functions
2016 NextTransferTime
= 2 * DELAY_ARM2AIR_AS_READER
;
2017 iso14a_set_timeout(10*106); // 20ms default
2020 int iso14_apdu(uint8_t *cmd
, uint16_t cmd_len
, void *data
) {
2021 uint8_t parity
[MAX_PARITY_SIZE
] = {0x00};
2022 uint8_t real_cmd
[cmd_len
+4];
2023 real_cmd
[0] = 0x0a; //I-Block
2024 // put block number into the PCB
2025 real_cmd
[0] |= iso14_pcb_blocknum
;
2026 real_cmd
[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2027 memcpy(real_cmd
+2, cmd
, cmd_len
);
2028 AppendCrc14443a(real_cmd
,cmd_len
+2);
2030 ReaderTransmit(real_cmd
, cmd_len
+4, NULL
);
2031 size_t len
= ReaderReceive(data
, parity
);
2035 uint8_t *data_bytes
= (uint8_t *) data
;
2037 // if we received an I- or R(ACK)-Block with a block number equal to the
2038 // current block number, toggle the current block number
2039 if (len
>= 4 // PCB+CID+CRC = 4 bytes
2040 && ((data_bytes
[0] & 0xC0) == 0 // I-Block
2041 || (data_bytes
[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2042 && (data_bytes
[0] & 0x01) == iso14_pcb_blocknum
) // equal block numbers
2044 iso14_pcb_blocknum
^= 1;
2051 //-----------------------------------------------------------------------------
2052 // Read an ISO 14443a tag. Send out commands and store answers.
2053 //-----------------------------------------------------------------------------
2054 void ReaderIso14443a(UsbCommand
*c
) {
2055 iso14a_command_t param
= c
->arg
[0];
2056 size_t len
= c
->arg
[1] & 0xffff;
2057 size_t lenbits
= c
->arg
[1] >> 16;
2058 uint32_t timeout
= c
->arg
[2];
2059 uint8_t *cmd
= c
->d
.asBytes
;
2061 byte_t buf
[USB_CMD_DATA_SIZE
] = {0x00};
2062 uint8_t par
[MAX_PARITY_SIZE
] = {0x00};
2064 if (param
& ISO14A_CONNECT
)
2069 if (param
& ISO14A_REQUEST_TRIGGER
)
2070 iso14a_set_trigger(TRUE
);
2072 if (param
& ISO14A_CONNECT
) {
2073 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN
);
2074 if(!(param
& ISO14A_NO_SELECT
)) {
2075 iso14a_card_select_t
*card
= (iso14a_card_select_t
*)buf
;
2076 arg0
= iso14443a_select_card(NULL
,card
,NULL
, true, 0);
2077 cmd_send(CMD_ACK
, arg0
, card
->uidlen
, 0, buf
, sizeof(iso14a_card_select_t
));
2078 // if it fails, the cmdhf14a.c client quites.. however this one still executes.
2079 if ( arg0
== 0 ) return;
2083 if (param
& ISO14A_SET_TIMEOUT
)
2084 iso14a_set_timeout(timeout
);
2086 if (param
& ISO14A_APDU
) {
2087 arg0
= iso14_apdu(cmd
, len
, buf
);
2088 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2091 if (param
& ISO14A_RAW
) {
2092 if (param
& ISO14A_APPEND_CRC
) {
2093 if (param
& ISO14A_TOPAZMODE
)
2094 AppendCrc14443b(cmd
,len
);
2096 AppendCrc14443a(cmd
,len
);
2099 if (lenbits
) lenbits
+= 16;
2101 if (lenbits
>0) { // want to send a specific number of bits (e.g. short commands)
2102 if (param
& ISO14A_TOPAZMODE
) {
2103 int bits_to_send
= lenbits
;
2105 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 7), NULL
, NULL
); // first byte is always short (7bits) and no parity
2107 while (bits_to_send
> 0) {
2108 ReaderTransmitBitsPar(&cmd
[i
++], MIN(bits_to_send
, 8), NULL
, NULL
); // following bytes are 8 bit and no parity
2112 GetParity(cmd
, lenbits
/8, par
);
2113 ReaderTransmitBitsPar(cmd
, lenbits
, par
, NULL
); // bytes are 8 bit with odd parity
2115 } else { // want to send complete bytes only
2116 if (param
& ISO14A_TOPAZMODE
) {
2118 ReaderTransmitBitsPar(&cmd
[i
++], 7, NULL
, NULL
); // first byte: 7 bits, no paritiy
2120 ReaderTransmitBitsPar(&cmd
[i
++], 8, NULL
, NULL
); // following bytes: 8 bits, no paritiy
2123 ReaderTransmit(cmd
,len
, NULL
); // 8 bits, odd parity
2126 arg0
= ReaderReceive(buf
, par
);
2127 cmd_send(CMD_ACK
,arg0
,0,0,buf
,sizeof(buf
));
2130 if (param
& ISO14A_REQUEST_TRIGGER
)
2131 iso14a_set_trigger(FALSE
);
2133 if (param
& ISO14A_NO_DISCONNECT
)
2136 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2141 // Determine the distance between two nonces.
2142 // Assume that the difference is small, but we don't know which is first.
2143 // Therefore try in alternating directions.
2144 int32_t dist_nt(uint32_t nt1
, uint32_t nt2
) {
2146 if (nt1
== nt2
) return 0;
2148 uint32_t nttmp1
= nt1
;
2149 uint32_t nttmp2
= nt2
;
2151 // 0xFFFF -- Half up and half down to find distance between nonces
2152 for (uint16_t i
= 1; i
< 32768/8; i
+= 8) {
2153 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
;
2154 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+1;
2155 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+2;
2156 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+3;
2157 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+4;
2158 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+5;
2159 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+6;
2160 nttmp1
= prng_successor(nttmp1
, 1); if (nttmp1
== nt2
) return i
+7;
2162 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -i
;
2163 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+1);
2164 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+2);
2165 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+3);
2166 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+4);
2167 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+5);
2168 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+6);
2169 nttmp2
= prng_successor(nttmp2
, 1); if (nttmp2
== nt1
) return -(i
+7);
2171 // either nt1 or nt2 are invalid nonces
2175 //-----------------------------------------------------------------------------
2176 // Recover several bits of the cypher stream. This implements (first stages of)
2177 // the algorithm described in "The Dark Side of Security by Obscurity and
2178 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2179 // (article by Nicolas T. Courtois, 2009)
2180 //-----------------------------------------------------------------------------
2182 void ReaderMifare(bool first_try
, uint8_t block
, uint8_t keytype
) {
2184 uint8_t mf_auth
[] = { keytype
, block
, 0x00, 0x00 };
2185 uint8_t mf_nr_ar
[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2186 uint8_t uid
[10] = {0,0,0,0,0,0,0,0,0,0};
2187 uint8_t par_list
[8] = {0,0,0,0,0,0,0,0};
2188 uint8_t ks_list
[8] = {0,0,0,0,0,0,0,0};
2189 uint8_t receivedAnswer
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2190 uint8_t receivedAnswerPar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2191 uint8_t par
[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2194 uint32_t previous_nt
= 0;
2197 int32_t catch_up_cycles
= 0;
2198 int32_t last_catch_up
= 0;
2200 int32_t nt_distance
= 0;
2202 uint16_t elapsed_prng_sequences
= 1;
2203 uint16_t consecutive_resyncs
= 0;
2204 uint16_t unexpected_random
= 0;
2205 uint16_t sync_tries
= 0;
2207 // static variables here, is re-used in the next call
2208 static uint32_t nt_attacked
= 0;
2209 static uint32_t sync_time
= 0;
2210 static uint32_t sync_cycles
= 0;
2211 static uint8_t par_low
= 0;
2212 static uint8_t mf_nr_ar3
= 0;
2214 #define PRNG_SEQUENCE_LENGTH (1 << 16)
2215 #define MAX_UNEXPECTED_RANDOM 4 // maximum number of unexpected (i.e. real) random numbers when trying to sync. Then give up.
2216 #define MAX_SYNC_TRIES 32
2218 AppendCrc14443a(mf_auth
, 2);
2220 BigBuf_free(); BigBuf_Clear_ext(false);
2223 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD
);
2225 sync_time
= GetCountSspClk() & 0xfffffff8;
2226 sync_cycles
= PRNG_SEQUENCE_LENGTH
; // Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2229 if (MF_DBGLEVEL
>= 4) Dbprintf("Mifare::Sync %u", sync_time
);
2235 // we were unsuccessful on a previous call.
2236 // Try another READER nonce (first 3 parity bits remain the same)
2238 mf_nr_ar
[3] = mf_nr_ar3
;
2242 bool have_uid
= FALSE
;
2243 uint8_t cascade_levels
= 0;
2247 for(i
= 0; TRUE
; ++i
) {
2251 // Test if the action was cancelled
2252 if(BUTTON_PRESS()) {
2257 // this part is from Piwi's faster nonce collecting part in Hardnested.
2258 if (!have_uid
) { // need a full select cycle to get the uid first
2259 iso14a_card_select_t card_info
;
2260 if(!iso14443a_select_card(uid
, &card_info
, &cuid
, true, 0)) {
2261 if (MF_DBGLEVEL
>= 4) Dbprintf("Mifare: Can't select card (ALL)");
2264 switch (card_info
.uidlen
) {
2265 case 4 : cascade_levels
= 1; break;
2266 case 7 : cascade_levels
= 2; break;
2267 case 10: cascade_levels
= 3; break;
2271 } else { // no need for anticollision. We can directly select the card
2272 if(!iso14443a_select_card(uid
, NULL
, &cuid
, false, cascade_levels
)) {
2273 if (MF_DBGLEVEL
>= 4) Dbprintf("Mifare: Can't select card (UID)");
2278 // Sending timeslot of ISO14443a frame
2279 sync_time
= (sync_time
& 0xfffffff8 ) + sync_cycles
+ catch_up_cycles
;
2280 catch_up_cycles
= 0;
2282 // if we missed the sync time already, advance to the next nonce repeat
2283 while( GetCountSspClk() > sync_time
) {
2284 ++elapsed_prng_sequences
;
2285 sync_time
= (sync_time
& 0xfffffff8 ) + sync_cycles
;
2288 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2289 ReaderTransmit(mf_auth
, sizeof(mf_auth
), &sync_time
);
2291 // Receive the (4 Byte) "random" nonce from TAG
2292 if (!ReaderReceive(receivedAnswer
, receivedAnswerPar
))
2296 nt
= bytes_to_num(receivedAnswer
, 4);
2298 // Transmit reader nonce with fake par
2299 ReaderTransmitPar(mf_nr_ar
, sizeof(mf_nr_ar
), par
, NULL
);
2301 // we didn't calibrate our clock yet,
2302 // iceman: has to be calibrated every time.
2303 if (previous_nt
&& !nt_attacked
) {
2305 nt_distance
= dist_nt(previous_nt
, nt
);
2307 // if no distance between, then we are in sync.
2308 if (nt_distance
== 0) {
2311 if (nt_distance
== -99999) { // invalid nonce received
2312 ++unexpected_random
;
2313 if (unexpected_random
> MAX_UNEXPECTED_RANDOM
) {
2314 isOK
= -3; // Card has an unpredictable PRNG. Give up
2317 if (sync_cycles
<= 0) sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2319 continue; // continue trying...
2323 if (++sync_tries
> MAX_SYNC_TRIES
) {
2324 isOK
= -4; // Card's PRNG runs at an unexpected frequency or resets unexpectedly
2328 sync_cycles
= (sync_cycles
- nt_distance
)/elapsed_prng_sequences
;
2330 if (sync_cycles
<= 0)
2331 sync_cycles
+= PRNG_SEQUENCE_LENGTH
;
2333 if (MF_DBGLEVEL
>= 4)
2334 Dbprintf("calibrating in cycle %d. nt_distance=%d, elapsed_prng_sequences=%d, new sync_cycles: %d\n", i
, nt_distance
, elapsed_prng_sequences
, sync_cycles
);
2342 if ( (nt
!= nt_attacked
) && nt_attacked
) { // we somehow lost sync. Try to catch up again...
2344 catch_up_cycles
= ABS(dist_nt(nt_attacked
, nt
));
2345 if (catch_up_cycles
== 99999) { // invalid nonce received. Don't resync on that one.
2346 catch_up_cycles
= 0;
2350 catch_up_cycles
/= elapsed_prng_sequences
;
2352 if (catch_up_cycles
== last_catch_up
) {
2353 ++consecutive_resyncs
;
2355 last_catch_up
= catch_up_cycles
;
2356 consecutive_resyncs
= 0;
2359 if (consecutive_resyncs
< 3) {
2360 if (MF_DBGLEVEL
>= 4)
2361 Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i
, catch_up_cycles
, consecutive_resyncs
);
2363 sync_cycles
+= catch_up_cycles
;
2365 if (MF_DBGLEVEL
>= 4)
2366 Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i
, catch_up_cycles
, sync_cycles
);
2369 catch_up_cycles
= 0;
2370 consecutive_resyncs
= 0;
2375 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2376 if (ReaderReceive(receivedAnswer
, receivedAnswerPar
)) {
2377 catch_up_cycles
= 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2380 par_low
= par
[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2382 par_list
[nt_diff
] = SwapBits(par
[0], 8);
2383 ks_list
[nt_diff
] = receivedAnswer
[0] ^ 0x05; // xor with NACK value to get keystream
2385 // Test if the information is complete
2386 if (nt_diff
== 0x07) {
2391 nt_diff
= (nt_diff
+ 1) & 0x07;
2392 mf_nr_ar
[3] = (mf_nr_ar
[3] & 0x1F) | (nt_diff
<< 5);
2397 if (nt_diff
== 0 && first_try
) {
2399 if (par
[0] == 0x00) { // tried all 256 possible parities without success. Card doesn't send NACK.
2405 par
[0] = ((par
[0] & 0x1F) + 1) | par_low
;
2409 // reset the resyncs since we got a complete transaction on right time.
2410 consecutive_resyncs
= 0;
2413 mf_nr_ar
[3] &= 0x1F;
2415 if (MF_DBGLEVEL
>= 4) Dbprintf("Number of sent auth requestes: %u", i
);
2417 uint8_t buf
[28] = {0x00};
2418 memset(buf
, 0x00, sizeof(buf
));
2419 num_to_bytes(cuid
, 4, buf
);
2420 num_to_bytes(nt
, 4, buf
+ 4);
2421 memcpy(buf
+ 8, par_list
, 8);
2422 memcpy(buf
+ 16, ks_list
, 8);
2423 memcpy(buf
+ 24, mf_nr_ar
, 4);
2425 cmd_send(CMD_ACK
, isOK
, 0, 0, buf
, sizeof(buf
) );
2427 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
2434 *MIFARE 1K simulate.
2437 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2438 * FLAG_4B_UID_IN_DATA - use 4-byte UID in the data-section
2439 * FLAG_7B_UID_IN_DATA - use 7-byte UID in the data-section
2440 * FLAG_10B_UID_IN_DATA - use 10-byte UID in the data-section
2441 * FLAG_UID_IN_EMUL - use 4-byte UID from emulator memory
2442 * FLAG_NR_AR_ATTACK - collect NR_AR responses for bruteforcing later
2443 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2445 void Mifare1ksim(uint8_t flags
, uint8_t exitAfterNReads
, uint8_t arg2
, uint8_t *datain
) {
2448 fast_prand( GetTickCount() );
2450 int cardSTATE
= MFEMUL_NOFIELD
;
2451 int _UID_LEN
= 0; // 4, 7, 10
2452 int vHf
= 0; // in mV
2454 uint32_t selTimer
= 0;
2455 uint32_t authTimer
= 0;
2457 uint8_t cardWRBL
= 0;
2458 uint8_t cardAUTHSC
= 0;
2459 uint8_t cardAUTHKEY
= 0xff; // no authentication
2462 uint32_t cardINTREG
= 0;
2463 uint8_t cardINTBLOCK
= 0;
2464 struct Crypto1State mpcs
= {0, 0};
2465 struct Crypto1State
*pcs
;
2467 uint32_t numReads
= 0; // Counts numer of times reader read a block
2468 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2469 uint8_t receivedCmd_par
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2470 uint8_t response
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
2471 uint8_t response_par
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
2473 uint8_t atqa
[] = {0x04, 0x00}; // Mifare classic 1k
2474 uint8_t sak_4
[] = {0x0C, 0x00, 0x00}; // CL1 - 4b uid
2475 uint8_t sak_7
[] = {0x0C, 0x00, 0x00}; // CL2 - 7b uid
2476 uint8_t sak_10
[] = {0x0C, 0x00, 0x00}; // CL3 - 10b uid
2477 // uint8_t sak[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2479 uint8_t rUIDBCC1
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2480 uint8_t rUIDBCC2
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2481 uint8_t rUIDBCC3
[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2483 // TAG Nonce - Authenticate response
2484 uint8_t rAUTH_NT
[4];
2485 uint32_t nonce
= prand();
2486 num_to_bytes(nonce
, 4, rAUTH_NT
);
2488 // uint8_t rAUTH_NT[] = {0x55, 0x41, 0x49, 0x92};// nonce from nested? why this?
2489 uint8_t rAUTH_AT
[] = {0x00, 0x00, 0x00, 0x00};
2491 // Here, we collect CUID, NT, NR, AR, CUID2, NT2, NR2, AR2
2492 // This can be used in a reader-only attack.
2493 nonces_t ar_nr_nonces
[ATTACK_KEY_COUNT
];
2494 memset(ar_nr_nonces
, 0x00, sizeof(ar_nr_nonces
));
2496 // -- Determine the UID
2497 // Can be set from emulator memory or incoming data
2498 // Length: 4,7,or 10 bytes
2499 if ( (flags
& FLAG_UID_IN_EMUL
) == FLAG_UID_IN_EMUL
)
2500 emlGetMemBt(datain
, 0, 10); // load 10bytes from EMUL to the datain pointer. to be used below.
2502 if ( (flags
& FLAG_4B_UID_IN_DATA
) == FLAG_4B_UID_IN_DATA
) {
2503 memcpy(rUIDBCC1
, datain
, 4);
2505 } else if ( (flags
& FLAG_7B_UID_IN_DATA
) == FLAG_7B_UID_IN_DATA
) {
2506 memcpy(&rUIDBCC1
[1], datain
, 3);
2507 memcpy( rUIDBCC2
, datain
+3, 4);
2509 } else if ( (flags
& FLAG_10B_UID_IN_DATA
) == FLAG_10B_UID_IN_DATA
) {
2510 memcpy(&rUIDBCC1
[1], datain
, 3);
2511 memcpy(&rUIDBCC2
[1], datain
+3, 3);
2512 memcpy( rUIDBCC3
, datain
+6, 4);
2520 cuid
= bytes_to_num(rUIDBCC1
, 4);
2522 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2523 if (MF_DBGLEVEL
>= 2) {
2524 Dbprintf("4B UID: %02x%02x%02x%02x",
2536 cuid
= bytes_to_num(rUIDBCC2
, 4);
2540 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2541 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2542 if (MF_DBGLEVEL
>= 2) {
2543 Dbprintf("7B UID: %02x %02x %02x %02x %02x %02x %02x",
2558 cuid
= bytes_to_num(rUIDBCC3
, 4);
2563 rUIDBCC1
[4] = rUIDBCC1
[0] ^ rUIDBCC1
[1] ^ rUIDBCC1
[2] ^ rUIDBCC1
[3];
2564 rUIDBCC2
[4] = rUIDBCC2
[0] ^ rUIDBCC2
[1] ^ rUIDBCC2
[2] ^ rUIDBCC2
[3];
2565 rUIDBCC3
[4] = rUIDBCC3
[0] ^ rUIDBCC3
[1] ^ rUIDBCC3
[2] ^ rUIDBCC3
[3];
2567 if (MF_DBGLEVEL
>= 2) {
2568 Dbprintf("10B UID: %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
2586 ComputeCrc14443(CRC_14443_A
, sak_4
, 1, &sak_4
[1], &sak_4
[2]);
2587 ComputeCrc14443(CRC_14443_A
, sak_7
, 1, &sak_7
[1], &sak_7
[2]);
2588 ComputeCrc14443(CRC_14443_A
, sak_10
, 1, &sak_10
[1], &sak_10
[2]);
2590 // We need to listen to the high-frequency, peak-detected path.
2591 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN
);
2593 // free eventually allocated BigBuf memory but keep Emulator Memory
2594 BigBuf_free_keep_EM();
2598 bool finished
= FALSE
;
2599 while (!BUTTON_PRESS() && !finished
&& !usb_poll_validate_length()) {
2602 // find reader field
2603 if (cardSTATE
== MFEMUL_NOFIELD
) {
2604 vHf
= (MAX_ADC_HF_VOLTAGE
* AvgAdc(ADC_CHAN_HF
)) >> 10;
2605 if (vHf
> MF_MINFIELDV
) {
2606 cardSTATE_TO_IDLE();
2610 if (cardSTATE
== MFEMUL_NOFIELD
) continue;
2613 res
= EmGetCmd(receivedCmd
, &len
, receivedCmd_par
);
2614 if (res
== 2) { //Field is off!
2615 cardSTATE
= MFEMUL_NOFIELD
;
2618 } else if (res
== 1) {
2619 break; // return value 1 means button press
2622 // REQ or WUP request in ANY state and WUP in HALTED state
2623 // this if-statement doesn't match the specification above. (iceman)
2624 if (len
== 1 && ((receivedCmd
[0] == ISO14443A_CMD_REQA
&& cardSTATE
!= MFEMUL_HALTED
) || receivedCmd
[0] == ISO14443A_CMD_WUPA
)) {
2625 selTimer
= GetTickCount();
2626 EmSendCmdEx(atqa
, sizeof(atqa
), (receivedCmd
[0] == ISO14443A_CMD_WUPA
));
2627 cardSTATE
= MFEMUL_SELECT1
;
2628 crypto1_destroy(pcs
);
2635 switch (cardSTATE
) {
2636 case MFEMUL_NOFIELD
:
2639 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2642 case MFEMUL_SELECT1
:{
2643 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&& receivedCmd
[1] == 0x20)) {
2644 if (MF_DBGLEVEL
>= 4) Dbprintf("SELECT ALL received");
2645 EmSendCmd(rUIDBCC1
, sizeof(rUIDBCC1
));
2650 ( receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT
&&
2651 receivedCmd
[1] == 0x70 &&
2652 memcmp(&receivedCmd
[2], rUIDBCC1
, 4) == 0)) {
2655 EmSendCmd(sak_4
, sizeof(sak_4
));
2658 cardSTATE
= MFEMUL_WORK
;
2660 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer
);
2664 cardSTATE
= MFEMUL_SELECT2
;
2669 cardSTATE_TO_IDLE();
2673 case MFEMUL_SELECT2
:{
2675 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2678 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&& receivedCmd
[1] == 0x20)) {
2679 EmSendCmd(rUIDBCC2
, sizeof(rUIDBCC2
));
2683 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_2
&&
2684 receivedCmd
[1] == 0x70 &&
2685 memcmp(&receivedCmd
[2], rUIDBCC2
, 4) == 0) ) {
2687 EmSendCmd(sak_7
, sizeof(sak_7
));
2690 cardSTATE
= MFEMUL_WORK
;
2692 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer
);
2695 cardSTATE
= MFEMUL_SELECT3
;
2700 cardSTATE_TO_IDLE();
2703 case MFEMUL_SELECT3
:{
2705 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2708 if (len
== 2 && (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&& receivedCmd
[1] == 0x20)) {
2709 EmSendCmd(rUIDBCC3
, sizeof(rUIDBCC3
));
2713 (receivedCmd
[0] == ISO14443A_CMD_ANTICOLL_OR_SELECT_3
&&
2714 receivedCmd
[1] == 0x70 &&
2715 memcmp(&receivedCmd
[2], rUIDBCC3
, 4) == 0) ) {
2717 EmSendCmd(sak_10
, sizeof(sak_10
));
2718 cardSTATE
= MFEMUL_WORK
;
2720 if (MF_DBGLEVEL
>= 4) Dbprintf("--> WORK. anticol3 time: %d", GetTickCount() - selTimer
);
2723 cardSTATE_TO_IDLE();
2728 cardSTATE_TO_IDLE();
2729 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2733 uint32_t nr
= bytes_to_num(receivedCmd
, 4);
2734 uint32_t ar
= bytes_to_num(&receivedCmd
[4], 4);
2736 // Collect AR/NR per keytype & sector
2737 if ( (flags
& FLAG_NR_AR_ATTACK
) == FLAG_NR_AR_ATTACK
) {
2741 for (uint8_t i
= 0; i
< ATTACK_KEY_COUNT
; i
++) {
2742 // find which index to use
2743 if ( (cardAUTHSC
== ar_nr_nonces
[i
].sector
) && (cardAUTHKEY
== ar_nr_nonces
[i
].keytype
))
2746 // keep track of empty slots.
2747 if ( ar_nr_nonces
[i
].state
== EMPTY
)
2750 // if no empty slots. Choose first and overwrite.
2751 if ( index
== -1 ) {
2752 if ( empty
== -1 ) {
2754 ar_nr_nonces
[index
].state
= EMPTY
;
2760 switch(ar_nr_nonces
[index
].state
) {
2762 // first nonce collect
2763 ar_nr_nonces
[index
].cuid
= cuid
;
2764 ar_nr_nonces
[index
].sector
= cardAUTHSC
;
2765 ar_nr_nonces
[index
].keytype
= cardAUTHKEY
;
2766 ar_nr_nonces
[index
].nonce
= nonce
;
2767 ar_nr_nonces
[index
].nr
= nr
;
2768 ar_nr_nonces
[index
].ar
= ar
;
2769 ar_nr_nonces
[index
].state
= FIRST
;
2773 // second nonce collect
2774 ar_nr_nonces
[index
].nonce2
= nonce
;
2775 ar_nr_nonces
[index
].nr2
= nr
;
2776 ar_nr_nonces
[index
].ar2
= ar
;
2777 ar_nr_nonces
[index
].state
= SECOND
;
2780 cmd_send(CMD_ACK
, CMD_SIMULATE_MIFARE_CARD
, 0, 0, &ar_nr_nonces
[index
], sizeof(nonces_t
));
2782 ar_nr_nonces
[index
].state
= EMPTY
;
2783 ar_nr_nonces
[index
].sector
= 0;
2784 ar_nr_nonces
[index
].keytype
= 0;
2792 // Interactive mode flag, means we need to send ACK
2794 crypto1_word(pcs, ar , 1);
2795 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2798 if (cardRr != prng_successor(nonce, 64)){
2800 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2801 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2802 cardRr, prng_successor(nonce, 64));
2803 Shouldn't we respond anything here?
2804 Right now, we don't nack or anything, which causes the
2805 reader to do a WUPA after a while. /Martin
2806 -- which is the correct response. /piwi
2807 cardSTATE_TO_IDLE();
2808 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2813 ans
= prng_successor(nonce
, 96) ^ crypto1_word(pcs
, 0, 0);
2814 num_to_bytes(ans
, 4, rAUTH_AT
);
2815 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2818 if (MF_DBGLEVEL
>= 4) {
2819 Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2821 cardAUTHKEY
== 0 ? 'A' : 'B',
2822 GetTickCount() - authTimer
2825 cardSTATE
= MFEMUL_WORK
;
2830 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2833 bool encrypted_data
= (cardAUTHKEY
!= 0xFF) ;
2836 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2838 if (len
== 4 && (receivedCmd
[0] == MIFARE_AUTH_KEYA
||
2839 receivedCmd
[0] == MIFARE_AUTH_KEYB
) ) {
2841 authTimer
= GetTickCount();
2842 cardAUTHSC
= receivedCmd
[1] / 4; // received block num
2843 cardAUTHKEY
= receivedCmd
[0] - 0x60; // & 1
2844 crypto1_destroy(pcs
);
2845 crypto1_create(pcs
, emlGetKey(cardAUTHSC
, cardAUTHKEY
));
2847 if (!encrypted_data
) {
2848 // first authentication
2849 crypto1_word(pcs
, cuid
^ nonce
, 0);// Update crypto state
2850 num_to_bytes(nonce
, 4, rAUTH_AT
); // Send nonce
2852 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2855 // nested authentication
2856 ans
= nonce
^ crypto1_word(pcs
, cuid
^ nonce
, 0);
2857 num_to_bytes(ans
, 4, rAUTH_AT
);
2859 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd
[1] ,receivedCmd
[1],cardAUTHKEY
);
2862 EmSendCmd(rAUTH_AT
, sizeof(rAUTH_AT
));
2863 cardSTATE
= MFEMUL_AUTH1
;
2867 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2868 // BUT... ACK --> NACK
2869 if (len
== 1 && receivedCmd
[0] == CARD_ACK
) {
2870 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2874 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2875 if (len
== 1 && receivedCmd
[0] == CARD_NACK_NA
) {
2876 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2881 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2885 if ( receivedCmd
[0] == ISO14443A_CMD_READBLOCK
||
2886 receivedCmd
[0] == ISO14443A_CMD_WRITEBLOCK
||
2887 receivedCmd
[0] == MIFARE_CMD_INC
||
2888 receivedCmd
[0] == MIFARE_CMD_DEC
||
2889 receivedCmd
[0] == MIFARE_CMD_RESTORE
||
2890 receivedCmd
[0] == MIFARE_CMD_TRANSFER
) {
2892 if (receivedCmd
[1] >= 16 * 4) {
2893 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2894 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],receivedCmd
[1]);
2898 if (receivedCmd
[1] / 4 != cardAUTHSC
) {
2899 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2900 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd
[0],receivedCmd
[1],cardAUTHSC
);
2905 if (receivedCmd
[0] == ISO14443A_CMD_READBLOCK
) {
2906 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader reading block %d (0x%02x)", receivedCmd
[1], receivedCmd
[1]);
2908 emlGetMem(response
, receivedCmd
[1], 1);
2909 AppendCrc14443a(response
, 16);
2910 mf_crypto1_encrypt(pcs
, response
, 18, response_par
);
2911 EmSendCmdPar(response
, 18, response_par
);
2913 if(exitAfterNReads
> 0 && numReads
>= exitAfterNReads
) {
2914 Dbprintf("%d reads done, exiting", numReads
);
2920 if (receivedCmd
[0] == ISO14443A_CMD_WRITEBLOCK
) {
2921 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0xA0 write block %d (%02x)", receivedCmd
[1], receivedCmd
[1]);
2922 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2923 cardSTATE
= MFEMUL_WRITEBL2
;
2924 cardWRBL
= receivedCmd
[1];
2927 // increment, decrement, restore
2928 if ( receivedCmd
[0] == MIFARE_CMD_INC
||
2929 receivedCmd
[0] == MIFARE_CMD_DEC
||
2930 receivedCmd
[0] == MIFARE_CMD_RESTORE
) {
2932 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd
[0], receivedCmd
[1], receivedCmd
[1]);
2934 if (emlCheckValBl(receivedCmd
[1])) {
2935 if (MF_DBGLEVEL
>= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2936 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2939 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2940 if (receivedCmd
[0] == MIFARE_CMD_INC
) cardSTATE
= MFEMUL_INTREG_INC
;
2941 if (receivedCmd
[0] == MIFARE_CMD_DEC
) cardSTATE
= MFEMUL_INTREG_DEC
;
2942 if (receivedCmd
[0] == MIFARE_CMD_RESTORE
) cardSTATE
= MFEMUL_INTREG_REST
;
2943 cardWRBL
= receivedCmd
[1];
2947 if (receivedCmd
[0] == MIFARE_CMD_TRANSFER
) {
2948 if (MF_DBGLEVEL
>= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)", receivedCmd
[0], receivedCmd
[1], receivedCmd
[1]);
2949 if (emlSetValBl(cardINTREG
, cardINTBLOCK
, receivedCmd
[1]))
2950 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2952 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2956 if (receivedCmd
[0] == ISO14443A_CMD_HALT
&& receivedCmd
[1] == 0x00) {
2959 cardSTATE
= MFEMUL_HALTED
;
2960 if (MF_DBGLEVEL
>= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer
);
2961 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2965 if (receivedCmd
[0] == ISO14443A_CMD_RATS
) {
2966 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2969 // command not allowed
2970 if (MF_DBGLEVEL
>= 4) Dbprintf("Received command not allowed, nacking");
2971 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2974 case MFEMUL_WRITEBL2
:{
2976 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2977 emlSetMem(receivedCmd
, cardWRBL
, 1);
2978 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_ACK
));
2979 cardSTATE
= MFEMUL_WORK
;
2981 cardSTATE_TO_IDLE();
2982 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2986 case MFEMUL_INTREG_INC
:{
2987 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
2988 memcpy(&ans
, receivedCmd
, 4);
2989 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
2990 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
2991 cardSTATE_TO_IDLE();
2994 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
2995 cardINTREG
= cardINTREG
+ ans
;
2996 cardSTATE
= MFEMUL_WORK
;
2999 case MFEMUL_INTREG_DEC
:{
3000 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
3001 memcpy(&ans
, receivedCmd
, 4);
3002 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
3003 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
3004 cardSTATE_TO_IDLE();
3007 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
3008 cardINTREG
= cardINTREG
- ans
;
3009 cardSTATE
= MFEMUL_WORK
;
3012 case MFEMUL_INTREG_REST
:{
3013 mf_crypto1_decrypt(pcs
, receivedCmd
, len
);
3014 memcpy(&ans
, receivedCmd
, 4);
3015 if (emlGetValBl(&cardINTREG
, &cardINTBLOCK
, cardWRBL
)) {
3016 EmSend4bit(mf_crypto1_encrypt4bit(pcs
, CARD_NACK_NA
));
3017 cardSTATE_TO_IDLE();
3020 LogTrace(Uart
.output
, Uart
.len
, Uart
.startTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.endTime
*16 - DELAY_AIR2ARM_AS_TAG
, Uart
.parity
, TRUE
);
3021 cardSTATE
= MFEMUL_WORK
;
3027 if (MF_DBGLEVEL
>= 1)
3028 Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing
, BigBuf_get_traceLen());
3030 cmd_send(CMD_ACK
,1,0,0,0,0); FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
3036 //-----------------------------------------------------------------------------
3039 // if no activity for 2sec, it sends the collected data to the client.
3040 //-----------------------------------------------------------------------------
3042 void RAMFUNC
SniffMifare(uint8_t param
) {
3046 // free eventually allocated BigBuf memory
3047 BigBuf_free(); BigBuf_Clear_ext(false);
3051 // The command (reader -> tag) that we're receiving.
3052 uint8_t receivedCmd
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
3053 uint8_t receivedCmdPar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
3055 // The response (tag -> reader) that we're receiving.
3056 uint8_t receivedResponse
[MAX_MIFARE_FRAME_SIZE
] = {0x00};
3057 uint8_t receivedResponsePar
[MAX_MIFARE_PARITY_SIZE
] = {0x00};
3059 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER
);
3061 // allocate the DMA buffer, used to stream samples from the FPGA
3062 // [iceman] is this sniffed data unsigned?
3063 uint8_t *dmaBuf
= BigBuf_malloc(DMA_BUFFER_SIZE
);
3064 uint8_t *data
= dmaBuf
;
3065 uint8_t previous_data
= 0;
3068 bool ReaderIsActive
= FALSE
;
3069 bool TagIsActive
= FALSE
;
3071 // Set up the demodulator for tag -> reader responses.
3072 DemodInit(receivedResponse
, receivedResponsePar
);
3074 // Set up the demodulator for the reader -> tag commands
3075 UartInit(receivedCmd
, receivedCmdPar
);
3077 // Setup and start DMA.
3078 // set transfer address and number of bytes. Start transfer.
3079 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf
, DMA_BUFFER_SIZE
) ){
3080 if (MF_DBGLEVEL
> 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
3088 // And now we loop, receiving samples.
3089 for(uint32_t sniffCounter
= 0;; ) {
3094 if(BUTTON_PRESS()) {
3095 DbpString("cancelled by button");
3099 if ((sniffCounter
& 0x0000FFFF) == 0) { // from time to time
3100 // check if a transaction is completed (timeout after 2000ms).
3101 // if yes, stop the DMA transfer and send what we have so far to the client
3102 if (MfSniffSend(2000)) {
3103 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
3107 ReaderIsActive
= FALSE
;
3108 TagIsActive
= FALSE
;
3109 // Setup and start DMA. set transfer address and number of bytes. Start transfer.
3110 if ( !FpgaSetupSscDma((uint8_t*) dmaBuf
, DMA_BUFFER_SIZE
) ){
3111 if (MF_DBGLEVEL
> 1) Dbprintf("FpgaSetupSscDma failed. Exiting");
3117 int register readBufDataP
= data
- dmaBuf
; // number of bytes we have processed so far
3118 int register dmaBufDataP
= DMA_BUFFER_SIZE
- AT91C_BASE_PDC_SSC
->PDC_RCR
; // number of bytes already transferred
3120 if (readBufDataP
<= dmaBufDataP
) // we are processing the same block of data which is currently being transferred
3121 dataLen
= dmaBufDataP
- readBufDataP
; // number of bytes still to be processed
3123 dataLen
= DMA_BUFFER_SIZE
- readBufDataP
+ dmaBufDataP
; // number of bytes still to be processed
3125 // test for length of buffer
3126 if(dataLen
> maxDataLen
) { // we are more behind than ever...
3127 maxDataLen
= dataLen
;
3128 if(dataLen
> (9 * DMA_BUFFER_SIZE
/ 10)) {
3129 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen
);
3133 if(dataLen
< 1) continue;
3135 // primary buffer was stopped ( <-- we lost data!
3136 if (!AT91C_BASE_PDC_SSC
->PDC_RCR
) {
3137 AT91C_BASE_PDC_SSC
->PDC_RPR
= (uint32_t) dmaBuf
;
3138 AT91C_BASE_PDC_SSC
->PDC_RCR
= DMA_BUFFER_SIZE
;
3139 Dbprintf("RxEmpty ERROR, data length:%d", dataLen
); // temporary
3141 // secondary buffer sets as primary, secondary buffer was stopped
3142 if (!AT91C_BASE_PDC_SSC
->PDC_RNCR
) {
3143 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
3144 AT91C_BASE_PDC_SSC
->PDC_RNCR
= DMA_BUFFER_SIZE
;
3149 if (sniffCounter
& 0x01) {
3151 // no need to try decoding tag data if the reader is sending
3153 uint8_t readerdata
= (previous_data
& 0xF0) | (*data
>> 4);
3154 if(MillerDecoding(readerdata
, (sniffCounter
-1)*4)) {
3157 if (MfSniffLogic(receivedCmd
, Uart
.len
, Uart
.parity
, Uart
.bitCount
, TRUE
)) break;
3159 UartInit(receivedCmd
, receivedCmdPar
);
3162 ReaderIsActive
= (Uart
.state
!= STATE_UNSYNCD
);
3165 // no need to try decoding tag data if the reader is sending
3166 if(!ReaderIsActive
) {
3167 uint8_t tagdata
= (previous_data
<< 4) | (*data
& 0x0F);
3168 if(ManchesterDecoding(tagdata
, 0, (sniffCounter
-1)*4)) {
3171 if (MfSniffLogic(receivedResponse
, Demod
.len
, Demod
.parity
, Demod
.bitCount
, FALSE
)) break;
3174 UartInit(receivedCmd
, receivedCmdPar
);
3176 TagIsActive
= (Demod
.state
!= DEMOD_UNSYNCD
);
3180 previous_data
= *data
;
3184 if(data
== dmaBuf
+ DMA_BUFFER_SIZE
)
3189 if (MF_DBGLEVEL
>= 1) Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen
, Uart
.state
, Uart
.len
);
3191 FpgaDisableSscDma();
3193 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);