1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
5 // at your option, any later version. See the LICENSE.txt file for the text of
7 //-----------------------------------------------------------------------------
8 // Routines to support ISO 14443B. This includes both the reader software and
9 // the `fake tag' modes.
10 //-----------------------------------------------------------------------------
12 #include "proxmark3.h"
17 #include "iso14443crc.h"
19 #define RECEIVE_SAMPLES_TIMEOUT 2000
20 #define ISO14443B_DMA_BUFFER_SIZE 256
22 //=============================================================================
23 // An ISO 14443 Type B tag. We listen for commands from the reader, using
24 // a UART kind of thing that's implemented in software. When we get a
25 // frame (i.e., a group of bytes between SOF and EOF), we check the CRC.
26 // If it's good, then we can do something appropriate with it, and send
28 //=============================================================================
30 //-----------------------------------------------------------------------------
31 // Code up a string of octets at layer 2 (including CRC, we don't generate
32 // that here) so that they can be transmitted to the reader. Doesn't transmit
33 // them yet, just leaves them ready to send in ToSend[].
34 //-----------------------------------------------------------------------------
35 static void CodeIso14443bAsTag(const uint8_t *cmd
, int len
)
41 // Transmit a burst of ones, as the initial thing that lets the
42 // reader get phase sync. This (TR1) must be > 80/fs, per spec,
43 // but tag that I've tried (a Paypass) exceeds that by a fair bit,
45 for(i
= 0; i
< 20; i
++) {
53 for(i
= 0; i
< 10; i
++) {
59 for(i
= 0; i
< 2; i
++) {
66 for(i
= 0; i
< len
; i
++) {
77 for(j
= 0; j
< 8; j
++) {
100 for(i
= 0; i
< 10; i
++) {
106 for(i
= 0; i
< 2; i
++) {
113 // Convert from last byte pos to length
117 //-----------------------------------------------------------------------------
118 // The software UART that receives commands from the reader, and its state
120 //-----------------------------------------------------------------------------
124 STATE_GOT_FALLING_EDGE_OF_SOF
,
125 STATE_AWAITING_START_BIT
,
136 /* Receive & handle a bit coming from the reader.
138 * This function is called 4 times per bit (every 2 subcarrier cycles).
139 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
142 * LED A -> ON once we have received the SOF and are expecting the rest.
143 * LED A -> OFF once we have received EOF or are in error state or unsynced
145 * Returns: true if we received a EOF
146 * false if we are still waiting for some more
148 static RAMFUNC
int Handle14443bUartBit(uint8_t bit
)
153 // we went low, so this could be the beginning
155 Uart
.state
= STATE_GOT_FALLING_EDGE_OF_SOF
;
161 case STATE_GOT_FALLING_EDGE_OF_SOF
:
163 if(Uart
.posCnt
== 2) { // sample every 4 1/fs in the middle of a bit
165 if(Uart
.bitCnt
> 9) {
166 // we've seen enough consecutive
167 // zeros that it's a valid SOF
170 Uart
.state
= STATE_AWAITING_START_BIT
;
171 LED_A_ON(); // Indicate we got a valid SOF
173 // didn't stay down long enough
174 // before going high, error
175 Uart
.state
= STATE_UNSYNCD
;
178 // do nothing, keep waiting
182 if(Uart
.posCnt
>= 4) Uart
.posCnt
= 0;
183 if(Uart
.bitCnt
> 12) {
184 // Give up if we see too many zeros without
187 Uart
.state
= STATE_UNSYNCD
;
191 case STATE_AWAITING_START_BIT
:
194 if(Uart
.posCnt
> 50/2) { // max 57us between characters = 49 1/fs, max 3 etus after low phase of SOF = 24 1/fs
195 // stayed high for too long between
197 Uart
.state
= STATE_UNSYNCD
;
200 // falling edge, this starts the data byte
204 Uart
.state
= STATE_RECEIVING_DATA
;
208 case STATE_RECEIVING_DATA
:
210 if(Uart
.posCnt
== 2) {
211 // time to sample a bit
214 Uart
.shiftReg
|= 0x200;
218 if(Uart
.posCnt
>= 4) {
221 if(Uart
.bitCnt
== 10) {
222 if((Uart
.shiftReg
& 0x200) && !(Uart
.shiftReg
& 0x001))
224 // this is a data byte, with correct
225 // start and stop bits
226 Uart
.output
[Uart
.byteCnt
] = (Uart
.shiftReg
>> 1) & 0xff;
229 if(Uart
.byteCnt
>= Uart
.byteCntMax
) {
230 // Buffer overflowed, give up
232 Uart
.state
= STATE_UNSYNCD
;
234 // so get the next byte now
236 Uart
.state
= STATE_AWAITING_START_BIT
;
238 } else if (Uart
.shiftReg
== 0x000) {
239 // this is an EOF byte
240 LED_A_OFF(); // Finished receiving
241 Uart
.state
= STATE_UNSYNCD
;
242 if (Uart
.byteCnt
!= 0) {
248 Uart
.state
= STATE_UNSYNCD
;
255 Uart
.state
= STATE_UNSYNCD
;
263 static void UartReset()
265 Uart
.byteCntMax
= MAX_FRAME_SIZE
;
266 Uart
.state
= STATE_UNSYNCD
;
272 static void UartInit(uint8_t *data
)
279 //-----------------------------------------------------------------------------
280 // Receive a command (from the reader to us, where we are the simulated tag),
281 // and store it in the given buffer, up to the given maximum length. Keeps
282 // spinning, waiting for a well-framed command, until either we get one
283 // (returns TRUE) or someone presses the pushbutton on the board (FALSE).
285 // Assume that we're called with the SSC (to the FPGA) and ADC path set
287 //-----------------------------------------------------------------------------
288 static int GetIso14443bCommandFromReader(uint8_t *received
, uint16_t *len
)
290 // Set FPGA mode to "simulated ISO 14443B tag", no modulation (listen
291 // only, since we are receiving, not transmitting).
292 // Signal field is off with the appropriate LED
294 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_NO_MODULATION
);
296 // Now run a `software UART' on the stream of incoming samples.
302 if(BUTTON_PRESS()) return FALSE
;
304 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
305 uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
306 for(uint8_t mask
= 0x80; mask
!= 0x00; mask
>>= 1) {
307 if(Handle14443bUartBit(b
& mask
)) {
318 //-----------------------------------------------------------------------------
319 // Main loop of simulated tag: receive commands from reader, decide what
320 // response to send, and send it.
321 //-----------------------------------------------------------------------------
322 void SimulateIso14443bTag(void)
324 // the only commands we understand is REQB, AFI=0, Select All, N=0:
325 static const uint8_t cmd1
[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
326 // ... and REQB, AFI=0, Normal Request, N=0:
327 static const uint8_t cmd2
[] = { 0x05, 0x00, 0x00, 0x71, 0xFF };
329 // ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
330 // supports only 106kBit/s in both directions, max frame size = 32Bytes,
331 // supports ISO14443-4, FWI=8 (77ms), NAD supported, CID not supported:
332 static const uint8_t response1
[] = {
333 0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
334 0x00, 0x21, 0x85, 0x5e, 0xd7
342 uint16_t respLen
, respCodeLen
;
344 // allocate command receive buffer
346 uint8_t *receivedCmd
= BigBuf_malloc(MAX_FRAME_SIZE
);
349 uint16_t cmdsRecvd
= 0;
351 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
353 // prepare the (only one) tag answer:
354 CodeIso14443bAsTag(response1
, sizeof(response1
));
355 uint8_t *resp1Code
= BigBuf_malloc(ToSendMax
);
356 memcpy(resp1Code
, ToSend
, ToSendMax
);
357 uint16_t resp1CodeLen
= ToSendMax
;
359 // We need to listen to the high-frequency, peak-detected path.
360 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
367 if(!GetIso14443bCommandFromReader(receivedCmd
, &len
)) {
368 Dbprintf("button pressed, received %d commands", cmdsRecvd
);
373 uint8_t parity
[MAX_PARITY_SIZE
];
374 LogTrace(receivedCmd
, len
, 0, 0, parity
, TRUE
);
377 // Good, look at the command now.
378 if ( (len
== sizeof(cmd1
) && memcmp(receivedCmd
, cmd1
, len
) == 0)
379 || (len
== sizeof(cmd2
) && memcmp(receivedCmd
, cmd2
, len
) == 0) ) {
381 respLen
= sizeof(response1
);
382 respCode
= resp1Code
;
383 respCodeLen
= resp1CodeLen
;
385 Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len
, cmdsRecvd
);
386 // And print whether the CRC fails, just for good measure
388 ComputeCrc14443(CRC_14443_B
, receivedCmd
, len
-2, &b1
, &b2
);
389 if(b1
!= receivedCmd
[len
-2] || b2
!= receivedCmd
[len
-1]) {
390 // Not so good, try again.
391 DbpString("+++CRC fail");
393 DbpString("CRC passes");
400 if(cmdsRecvd
> 0x30) {
401 DbpString("many commands later...");
405 if(respCodeLen
<= 0) continue;
408 // Signal field is off with the appropriate LED
410 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR
| FPGA_HF_SIMULATOR_MODULATE_BPSK
);
411 AT91C_BASE_SSC
->SSC_THR
= 0xff;
414 // Transmit the response.
417 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
418 uint8_t b
= respCode
[i
];
420 AT91C_BASE_SSC
->SSC_THR
= b
;
423 if(i
> respCodeLen
) {
427 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
428 volatile uint8_t b
= (uint8_t)AT91C_BASE_SSC
->SSC_RHR
;
433 // trace the response:
435 uint8_t parity
[MAX_PARITY_SIZE
];
436 LogTrace(resp
, respLen
, 0, 0, parity
, FALSE
);
442 //=============================================================================
443 // An ISO 14443 Type B reader. We take layer two commands, code them
444 // appropriately, and then send them to the tag. We then listen for the
445 // tag's response, which we leave in the buffer to be demodulated on the
447 //=============================================================================
452 DEMOD_PHASE_REF_TRAINING
,
453 DEMOD_AWAITING_FALLING_EDGE_OF_SOF
,
454 DEMOD_GOT_FALLING_EDGE_OF_SOF
,
455 DEMOD_AWAITING_START_BIT
,
461 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
473 * Handles reception of a bit from the tag
475 * This function is called 2 times per bit (every 4 subcarrier cycles).
476 * Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 4,72us
479 * LED C -> ON once we have received the SOF and are expecting the rest.
480 * LED C -> OFF once we have received EOF or are unsynced
482 * Returns: true if we received a EOF
483 * false if we are still waiting for some more
486 static RAMFUNC
int Handle14443bSamplesDemod(int ci
, int cq
)
490 // The soft decision on the bit uses an estimate of just the
491 // quadrant of the reference angle, not the exact angle.
492 #define MAKE_SOFT_DECISION() { \
493 if(Demod.sumI > 0) { \
498 if(Demod.sumQ > 0) { \
505 #define SUBCARRIER_DETECT_THRESHOLD 8
507 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
508 /* #define CHECK_FOR_SUBCARRIER() { \
518 // Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
519 #define CHECK_FOR_SUBCARRIER() { \
521 if(cq < 0) { /* ci < 0, cq < 0 */ \
523 v = -cq - (ci >> 1); \
525 v = -ci - (cq >> 1); \
527 } else { /* ci < 0, cq >= 0 */ \
529 v = -ci + (cq >> 1); \
531 v = cq - (ci >> 1); \
535 if(cq < 0) { /* ci >= 0, cq < 0 */ \
537 v = ci - (cq >> 1); \
539 v = -cq + (ci >> 1); \
541 } else { /* ci >= 0, cq >= 0 */ \
543 v = ci + (cq >> 1); \
545 v = cq + (ci >> 1); \
551 switch(Demod
.state
) {
553 CHECK_FOR_SUBCARRIER();
554 if(v
> SUBCARRIER_DETECT_THRESHOLD
) { // subcarrier detected
555 Demod
.state
= DEMOD_PHASE_REF_TRAINING
;
562 case DEMOD_PHASE_REF_TRAINING
:
563 if(Demod
.posCount
< 8) {
564 CHECK_FOR_SUBCARRIER();
565 if (v
> SUBCARRIER_DETECT_THRESHOLD
) {
566 // set the reference phase (will code a logic '1') by averaging over 32 1/fs.
567 // note: synchronization time > 80 1/fs
571 } else { // subcarrier lost
572 Demod
.state
= DEMOD_UNSYNCD
;
575 Demod
.state
= DEMOD_AWAITING_FALLING_EDGE_OF_SOF
;
579 case DEMOD_AWAITING_FALLING_EDGE_OF_SOF
:
580 MAKE_SOFT_DECISION();
581 if(v
< 0) { // logic '0' detected
582 Demod
.state
= DEMOD_GOT_FALLING_EDGE_OF_SOF
;
583 Demod
.posCount
= 0; // start of SOF sequence
585 if(Demod
.posCount
> 200/4) { // maximum length of TR1 = 200 1/fs
586 Demod
.state
= DEMOD_UNSYNCD
;
592 case DEMOD_GOT_FALLING_EDGE_OF_SOF
:
594 MAKE_SOFT_DECISION();
596 if(Demod
.posCount
< 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
597 Demod
.state
= DEMOD_UNSYNCD
;
599 LED_C_ON(); // Got SOF
600 Demod
.state
= DEMOD_AWAITING_START_BIT
;
603 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
609 if(Demod
.posCount
> 12*2) { // low phase of SOF too long (> 12 etu)
610 Demod
.state
= DEMOD_UNSYNCD
;
616 case DEMOD_AWAITING_START_BIT
:
618 MAKE_SOFT_DECISION();
620 if(Demod
.posCount
> 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
621 Demod
.state
= DEMOD_UNSYNCD
;
624 } else { // start bit detected
626 Demod
.posCount
= 1; // this was the first half
629 Demod
.state
= DEMOD_RECEIVING_DATA
;
633 case DEMOD_RECEIVING_DATA
:
634 MAKE_SOFT_DECISION();
635 if(Demod
.posCount
== 0) { // first half of bit
638 } else { // second half of bit
641 /* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
642 if(Demod.thisBit > 0) {
643 Demod.metric += Demod.thisBit;
645 Demod.metric -= Demod.thisBit;
650 Demod
.shiftReg
>>= 1;
651 if(Demod
.thisBit
> 0) { // logic '1'
652 Demod
.shiftReg
|= 0x200;
656 if(Demod
.bitCount
== 10) {
657 uint16_t s
= Demod
.shiftReg
;
658 if((s
& 0x200) && !(s
& 0x001)) { // stop bit == '1', start bit == '0'
659 uint8_t b
= (s
>> 1);
660 Demod
.output
[Demod
.len
] = b
;
662 Demod
.state
= DEMOD_AWAITING_START_BIT
;
664 Demod
.state
= DEMOD_UNSYNCD
;
667 // This is EOF (start, stop and all data bits == '0'
677 Demod
.state
= DEMOD_UNSYNCD
;
686 static void DemodReset()
688 // Clear out the state of the "UART" that receives from the tag.
690 Demod
.state
= DEMOD_UNSYNCD
;
692 memset(Demod
.output
, 0x00, MAX_FRAME_SIZE
);
696 static void DemodInit(uint8_t *data
)
704 * Demodulate the samples we received from the tag, also log to tracebuffer
705 * quiet: set to 'TRUE' to disable debug output
707 static void GetSamplesFor14443bDemod(int n
, bool quiet
)
710 bool gotFrame
= FALSE
;
711 int lastRxCounter
, ci
, cq
, samples
= 0;
713 // Allocate memory from BigBuf for some buffers
714 // free all previous allocations first
717 // The response (tag -> reader) that we're receiving.
718 uint8_t *receivedResponse
= BigBuf_malloc(MAX_FRAME_SIZE
);
720 // The DMA buffer, used to stream samples from the FPGA
721 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE
);
723 // Set up the demodulator for tag -> reader responses.
724 DemodInit(receivedResponse
);
726 // Setup and start DMA.
727 FpgaSetupSscDma((uint8_t*) dmaBuf
, ISO14443B_DMA_BUFFER_SIZE
);
729 int8_t *upTo
= dmaBuf
;
730 lastRxCounter
= ISO14443B_DMA_BUFFER_SIZE
;
732 // Signal field is ON with the appropriate LED:
734 // And put the FPGA in the appropriate mode
735 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
738 int behindBy
= lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
;
739 if(behindBy
> max
) max
= behindBy
;
741 while(((lastRxCounter
-AT91C_BASE_PDC_SSC
->PDC_RCR
) & (ISO14443B_DMA_BUFFER_SIZE
-1)) > 2) {
745 if(upTo
>= dmaBuf
+ ISO14443B_DMA_BUFFER_SIZE
) {
747 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) upTo
;
748 AT91C_BASE_PDC_SSC
->PDC_RNCR
= ISO14443B_DMA_BUFFER_SIZE
;
751 if(lastRxCounter
<= 0) {
752 lastRxCounter
+= ISO14443B_DMA_BUFFER_SIZE
;
757 if(Handle14443bSamplesDemod(ci
, cq
)) {
763 if(samples
> n
|| gotFrame
) {
768 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
770 if (!quiet
) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max
, samples
, gotFrame
, Demod
.len
, Demod
.sumI
, Demod
.sumQ
);
772 if (tracing
&& Demod
.len
> 0) {
773 uint8_t parity
[MAX_PARITY_SIZE
];
774 LogTrace(Demod
.output
, Demod
.len
, 0, 0, parity
, FALSE
);
779 //-----------------------------------------------------------------------------
780 // Transmit the command (to the tag) that was placed in ToSend[].
781 //-----------------------------------------------------------------------------
782 static void TransmitFor14443b(void)
788 while(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
789 AT91C_BASE_SSC
->SSC_THR
= 0xff;
792 // Signal field is ON with the appropriate Red LED
794 // Signal we are transmitting with the Green LED
796 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX
| FPGA_HF_READER_TX_SHALLOW_MOD
);
798 for(c
= 0; c
< 10;) {
799 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
800 AT91C_BASE_SSC
->SSC_THR
= 0xff;
803 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
804 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
812 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_TXRDY
)) {
813 AT91C_BASE_SSC
->SSC_THR
= ToSend
[c
];
819 if(AT91C_BASE_SSC
->SSC_SR
& (AT91C_SSC_RXRDY
)) {
820 volatile uint32_t r
= AT91C_BASE_SSC
->SSC_RHR
;
825 LED_B_OFF(); // Finished sending
829 //-----------------------------------------------------------------------------
830 // Code a layer 2 command (string of octets, including CRC) into ToSend[],
831 // so that it is ready to transmit to the tag using TransmitFor14443b().
832 //-----------------------------------------------------------------------------
833 static void CodeIso14443bAsReader(const uint8_t *cmd
, int len
)
840 // Establish initial reference level
841 for(i
= 0; i
< 40; i
++) {
845 for(i
= 0; i
< 10; i
++) {
849 for(i
= 0; i
< len
; i
++) {
857 for(j
= 0; j
< 8; j
++) {
868 for(i
= 0; i
< 10; i
++) {
871 for(i
= 0; i
< 8; i
++) {
875 // And then a little more, to make sure that the last character makes
876 // it out before we switch to rx mode.
877 for(i
= 0; i
< 24; i
++) {
881 // Convert from last character reference to length
887 Convenience function to encode, transmit and trace iso 14443b comms
889 static void CodeAndTransmit14443bAsReader(const uint8_t *cmd
, int len
)
891 CodeIso14443bAsReader(cmd
, len
);
894 uint8_t parity
[MAX_PARITY_SIZE
];
895 LogTrace(cmd
,len
, 0, 0, parity
, TRUE
);
900 //-----------------------------------------------------------------------------
901 // Read a SRI512 ISO 14443B tag.
903 // SRI512 tags are just simple memory tags, here we're looking at making a dump
904 // of the contents of the memory. No anticollision algorithm is done, we assume
905 // we have a single tag in the field.
907 // I tried to be systematic and check every answer of the tag, every CRC, etc...
908 //-----------------------------------------------------------------------------
909 void ReadSTMemoryIso14443b(uint32_t dwLast
)
916 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
917 // Make sure that we start from off, since the tags are stateful;
918 // confusing things will happen if we don't reset them between reads.
920 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);
923 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
926 // Now give it time to spin up.
927 // Signal field is on with the appropriate LED
929 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
);
932 // First command: wake up the tag using the INITIATE command
933 uint8_t cmd1
[] = {0x06, 0x00, 0x97, 0x5b};
934 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
935 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
937 if (Demod
.len
== 0) {
938 DbpString("No response from tag");
941 Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
942 Demod
.output
[0], Demod
.output
[1], Demod
.output
[2]);
945 // There is a response, SELECT the uid
946 DbpString("Now SELECT tag:");
947 cmd1
[0] = 0x0E; // 0x0E is SELECT
948 cmd1
[1] = Demod
.output
[0];
949 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
950 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
951 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
952 if (Demod
.len
!= 3) {
953 Dbprintf("Expected 3 bytes from tag, got %d", Demod
.len
);
956 // Check the CRC of the answer:
957 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 1 , &cmd1
[2], &cmd1
[3]);
958 if(cmd1
[2] != Demod
.output
[1] || cmd1
[3] != Demod
.output
[2]) {
959 DbpString("CRC Error reading select response.");
962 // Check response from the tag: should be the same UID as the command we just sent:
963 if (cmd1
[1] != Demod
.output
[0]) {
964 Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1
[1], Demod
.output
[0]);
968 // Tag is now selected,
969 // First get the tag's UID:
971 ComputeCrc14443(CRC_14443_B
, cmd1
, 1 , &cmd1
[1], &cmd1
[2]);
972 CodeAndTransmit14443bAsReader(cmd1
, 3); // Only first three bytes for this one
973 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
974 if (Demod
.len
!= 10) {
975 Dbprintf("Expected 10 bytes from tag, got %d", Demod
.len
);
978 // The check the CRC of the answer (use cmd1 as temporary variable):
979 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 8, &cmd1
[2], &cmd1
[3]);
980 if(cmd1
[2] != Demod
.output
[8] || cmd1
[3] != Demod
.output
[9]) {
981 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
982 (cmd1
[2]<<8)+cmd1
[3], (Demod
.output
[8]<<8)+Demod
.output
[9]);
983 // Do not return;, let's go on... (we should retry, maybe ?)
985 Dbprintf("Tag UID (64 bits): %08x %08x",
986 (Demod
.output
[7]<<24) + (Demod
.output
[6]<<16) + (Demod
.output
[5]<<8) + Demod
.output
[4],
987 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0]);
989 // Now loop to read all 16 blocks, address from 0 to last block
990 Dbprintf("Tag memory dump, block 0 to %d", dwLast
);
996 DbpString("System area block (0xff):");
1000 ComputeCrc14443(CRC_14443_B
, cmd1
, 2, &cmd1
[2], &cmd1
[3]);
1001 CodeAndTransmit14443bAsReader(cmd1
, sizeof(cmd1
));
1002 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
1003 if (Demod
.len
!= 6) { // Check if we got an answer from the tag
1004 DbpString("Expected 6 bytes from tag, got less...");
1007 // The check the CRC of the answer (use cmd1 as temporary variable):
1008 ComputeCrc14443(CRC_14443_B
, Demod
.output
, 4, &cmd1
[2], &cmd1
[3]);
1009 if(cmd1
[2] != Demod
.output
[4] || cmd1
[3] != Demod
.output
[5]) {
1010 Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
1011 (cmd1
[2]<<8)+cmd1
[3], (Demod
.output
[4]<<8)+Demod
.output
[5]);
1012 // Do not return;, let's go on... (we should retry, maybe ?)
1014 // Now print out the memory location:
1015 Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i
,
1016 (Demod
.output
[3]<<24) + (Demod
.output
[2]<<16) + (Demod
.output
[1]<<8) + Demod
.output
[0],
1017 (Demod
.output
[4]<<8)+Demod
.output
[5]
1019 if (i
== 0xff) break;
1025 //=============================================================================
1026 // Finally, the `sniffer' combines elements from both the reader and
1027 // simulated tag, to show both sides of the conversation.
1028 //=============================================================================
1030 //-----------------------------------------------------------------------------
1031 // Record the sequence of commands sent by the reader to the tag, with
1032 // triggering so that we start recording at the point that the tag is moved
1034 //-----------------------------------------------------------------------------
1036 * Memory usage for this function, (within BigBuf)
1037 * Last Received command (reader->tag) - MAX_FRAME_SIZE
1038 * Last Received command (tag->reader) - MAX_FRAME_SIZE
1039 * DMA Buffer - ISO14443B_DMA_BUFFER_SIZE
1040 * Demodulated samples received - all the rest
1042 void RAMFUNC
SnoopIso14443b(void)
1044 // We won't start recording the frames that we acquire until we trigger;
1045 // a good trigger condition to get started is probably when we see a
1046 // response from the tag.
1047 int triggered
= TRUE
; // TODO: set and evaluate trigger condition
1049 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1055 // The DMA buffer, used to stream samples from the FPGA
1056 int8_t *dmaBuf
= (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE
);
1060 int maxBehindBy
= 0;
1062 // Count of samples received so far, so that we can include timing
1063 // information in the trace buffer.
1066 DemodInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1067 UartInit(BigBuf_malloc(MAX_FRAME_SIZE
));
1069 // Print some debug information about the buffer sizes
1070 Dbprintf("Snooping buffers initialized:");
1071 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1072 Dbprintf(" Reader -> tag: %i bytes", MAX_FRAME_SIZE
);
1073 Dbprintf(" tag -> Reader: %i bytes", MAX_FRAME_SIZE
);
1074 Dbprintf(" DMA: %i bytes", ISO14443B_DMA_BUFFER_SIZE
);
1076 // Signal field is off, no reader signal, no tag signal
1079 // And put the FPGA in the appropriate mode
1080 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR
| FPGA_HF_READER_RX_XCORR_848_KHZ
| FPGA_HF_READER_RX_XCORR_SNOOP
);
1081 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1083 // Setup for the DMA.
1086 lastRxCounter
= ISO14443B_DMA_BUFFER_SIZE
;
1087 FpgaSetupSscDma((uint8_t*) dmaBuf
, ISO14443B_DMA_BUFFER_SIZE
);
1088 uint8_t parity
[MAX_PARITY_SIZE
];
1090 bool TagIsActive
= FALSE
;
1091 bool ReaderIsActive
= FALSE
;
1093 bool TagIsActive
= FALSE
;
1094 bool ReaderIsActive
= FALSE
;
1096 // And now we loop, receiving samples.
1098 int behindBy
= (lastRxCounter
- AT91C_BASE_PDC_SSC
->PDC_RCR
) &
1099 (ISO14443B_DMA_BUFFER_SIZE
-1);
1100 if(behindBy
> maxBehindBy
) {
1101 maxBehindBy
= behindBy
;
1104 if(behindBy
< 2) continue;
1110 if(upTo
>= dmaBuf
+ ISO14443B_DMA_BUFFER_SIZE
) {
1112 lastRxCounter
+= ISO14443B_DMA_BUFFER_SIZE
;
1113 AT91C_BASE_PDC_SSC
->PDC_RNPR
= (uint32_t) dmaBuf
;
1114 AT91C_BASE_PDC_SSC
->PDC_RNCR
= ISO14443B_DMA_BUFFER_SIZE
;
1116 if(behindBy
> (9*ISO14443B_DMA_BUFFER_SIZE
/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1117 Dbprintf("blew circular buffer! behindBy=%d", behindBy
);
1120 if(behindBy
> (9*DMA_BUFFER_SIZE
/10)) { // TODO: understand whether we can increase/decrease as we want or not?
1121 Dbprintf("blew circular buffer! behindBy=%d", behindBy
);
1125 DbpString("Reached trace limit");
1128 if(BUTTON_PRESS()) {
1129 DbpString("cancelled");
1136 if (!TagIsActive
) { // no need to try decoding reader data if the tag is sending
1137 if(Handle14443bUartBit(ci
& 0x01)) {
1138 if(triggered
&& tracing
) {
1139 LogTrace(Uart
.output
, Uart
.byteCnt
, samples
, samples
, parity
, TRUE
);
1141 /* And ready to receive another command. */
1143 /* And also reset the demod code, which might have been */
1144 /* false-triggered by the commands from the reader. */
1147 if(Handle14443bUartBit(cq
& 0x01)) {
1148 if(triggered
&& tracing
) {
1149 LogTrace(Uart
.output
, Uart
.byteCnt
, samples
, samples
, parity
, TRUE
);
1151 /* And ready to receive another command. */
1153 /* And also reset the demod code, which might have been */
1154 /* false-triggered by the commands from the reader. */
1157 ReaderIsActive
= (Uart
.state
> STATE_GOT_FALLING_EDGE_OF_SOF
);
1160 if(!ReaderIsActive
) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
1161 if(Handle14443bSamplesDemod(ci
| 0x01, cq
| 0x01)) {
1163 //Use samples as a time measurement
1166 uint8_t parity
[MAX_PARITY_SIZE
];
1167 LogTrace(Demod
.output
, Demod
.len
, samples
, samples
, parity
, FALSE
);
1171 // And ready to receive another response.
1174 TagIsActive
= (Demod
.state
> DEMOD_GOT_FALLING_EDGE_OF_SOF
);
1179 FpgaDisableSscDma();
1181 AT91C_BASE_PDC_SSC
->PDC_PTCR
= AT91C_PDC_RXTDIS
;
1182 DbpString("Snoop statistics:");
1183 Dbprintf(" Max behind by: %i", maxBehindBy
);
1184 Dbprintf(" Uart State: %x", Uart
.state
);
1185 Dbprintf(" Uart ByteCnt: %i", Uart
.byteCnt
);
1186 Dbprintf(" Uart ByteCntMax: %i", Uart
.byteCntMax
);
1187 Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
1192 * Send raw command to tag ISO14443B
1194 * datalen len of buffer data
1195 * recv bool when true wait for data from tag and send to client
1196 * powerfield bool leave the field on when true
1197 * data buffer with byte to send
1203 void SendRawCommand14443B(uint32_t datalen
, uint32_t recv
, uint8_t powerfield
, uint8_t data
[])
1205 FpgaDownloadAndGo(FPGA_BITSTREAM_HF
);
1206 SetAdcMuxFor(GPIO_MUXSEL_HIPKD
);
1211 CodeAndTransmit14443bAsReader(data
, datalen
);
1214 GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT
, TRUE
);
1215 uint16_t iLen
= MIN(Demod
.len
, USB_CMD_DATA_SIZE
);
1216 cmd_send(CMD_ACK
, iLen
, 0, 0, Demod
.output
, iLen
);
1220 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF
);