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[proxmark3-svn] / armsrc / iso15693.c
1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "deprecated"
51 // *) document all the functions
52
53 #include "iso15693.h"
54
55 #include "proxmark3.h"
56 #include "util.h"
57 #include "apps.h"
58 #include "string.h"
59 #include "iso15693tools.h"
60 #include "protocols.h"
61 #include "cmd.h"
62 #include "BigBuf.h"
63 #include "fpgaloader.h"
64
65 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
66
67 // Delays in SSP_CLK ticks.
68 // SSP_CLK runs at 13,56MHz / 32 = 423.75kHz when simulating a tag
69 #define DELAY_READER_TO_ARM 8
70 #define DELAY_ARM_TO_READER 0
71 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when acting as reader. All values should be multiples of 16
72 #define DELAY_ARM_TO_TAG 16
73 #define DELAY_TAG_TO_ARM 32
74 //SSP_CLK runs at 13.56MHz / 4 = 3,39MHz when snooping. All values should be multiples of 16
75 #define DELAY_TAG_TO_ARM_SNOOP 32
76 #define DELAY_READER_TO_ARM_SNOOP 32
77
78 static int DEBUG = 0;
79
80
81 // specific LogTrace function for ISO15693: the duration needs to be scaled because otherwise it won't fit into a uint16_t
82 bool LogTrace_ISO15693(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag) {
83 uint32_t duration = timestamp_end - timestamp_start;
84 duration /= 32;
85 timestamp_end = timestamp_start + duration;
86 return LogTrace(btBytes, iLen, timestamp_start, timestamp_end, parity, readerToTag);
87 }
88
89
90 ///////////////////////////////////////////////////////////////////////
91 // ISO 15693 Part 2 - Air Interface
92 // This section basically contains transmission and receiving of bits
93 ///////////////////////////////////////////////////////////////////////
94
95 // buffers
96 #define ISO15693_DMA_BUFFER_SIZE 2048 // must be a power of 2
97 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
98 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
99
100 // ---------------------------
101 // Signal Processing
102 // ---------------------------
103
104 // prepare data using "1 out of 4" code for later transmission
105 // resulting data rate is 26.48 kbit/s (fc/512)
106 // cmd ... data
107 // n ... length of data
108 void CodeIso15693AsReader(uint8_t *cmd, int n) {
109
110 ToSendReset();
111
112 // SOF for 1of4
113 ToSend[++ToSendMax] = 0x84; //10000100
114
115 // data
116 for (int i = 0; i < n; i++) {
117 for (int j = 0; j < 8; j += 2) {
118 int these = (cmd[i] >> j) & 0x03;
119 switch(these) {
120 case 0:
121 ToSend[++ToSendMax] = 0x40; //01000000
122 break;
123 case 1:
124 ToSend[++ToSendMax] = 0x10; //00010000
125 break;
126 case 2:
127 ToSend[++ToSendMax] = 0x04; //00000100
128 break;
129 case 3:
130 ToSend[++ToSendMax] = 0x01; //00000001
131 break;
132 }
133 }
134 }
135
136 // EOF
137 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
138
139 ToSendMax++;
140 }
141
142 // encode data using "1 out of 256" scheme
143 // data rate is 1,66 kbit/s (fc/8192)
144 // is designed for more robust communication over longer distances
145 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
146 {
147 ToSendReset();
148
149 // SOF for 1of256
150 ToSend[++ToSendMax] = 0x81; //10000001
151
152 // data
153 for(int i = 0; i < n; i++) {
154 for (int j = 0; j <= 255; j++) {
155 if (cmd[i] == j) {
156 ToSendStuffBit(0);
157 ToSendStuffBit(1);
158 } else {
159 ToSendStuffBit(0);
160 ToSendStuffBit(0);
161 }
162 }
163 }
164
165 // EOF
166 ToSend[++ToSendMax] = 0x20; //0010 + 0000 padding
167
168 ToSendMax++;
169 }
170
171
172 // static uint8_t encode4Bits(const uint8_t b) {
173 // uint8_t c = b & 0xF;
174 // // OTA, the least significant bits first
175 // // The columns are
176 // // 1 - Bit value to send
177 // // 2 - Reversed (big-endian)
178 // // 3 - Manchester Encoded
179 // // 4 - Hex values
180
181 // switch(c){
182 // // 1 2 3 4
183 // case 15: return 0x55; // 1111 -> 1111 -> 01010101 -> 0x55
184 // case 14: return 0x95; // 1110 -> 0111 -> 10010101 -> 0x95
185 // case 13: return 0x65; // 1101 -> 1011 -> 01100101 -> 0x65
186 // case 12: return 0xa5; // 1100 -> 0011 -> 10100101 -> 0xa5
187 // case 11: return 0x59; // 1011 -> 1101 -> 01011001 -> 0x59
188 // case 10: return 0x99; // 1010 -> 0101 -> 10011001 -> 0x99
189 // case 9: return 0x69; // 1001 -> 1001 -> 01101001 -> 0x69
190 // case 8: return 0xa9; // 1000 -> 0001 -> 10101001 -> 0xa9
191 // case 7: return 0x56; // 0111 -> 1110 -> 01010110 -> 0x56
192 // case 6: return 0x96; // 0110 -> 0110 -> 10010110 -> 0x96
193 // case 5: return 0x66; // 0101 -> 1010 -> 01100110 -> 0x66
194 // case 4: return 0xa6; // 0100 -> 0010 -> 10100110 -> 0xa6
195 // case 3: return 0x5a; // 0011 -> 1100 -> 01011010 -> 0x5a
196 // case 2: return 0x9a; // 0010 -> 0100 -> 10011010 -> 0x9a
197 // case 1: return 0x6a; // 0001 -> 1000 -> 01101010 -> 0x6a
198 // default: return 0xaa; // 0000 -> 0000 -> 10101010 -> 0xaa
199
200 // }
201 // }
202
203 static const uint8_t encode_4bits[16] = { 0xaa, 0x6a, 0x9a, 0x5a, 0xa6, 0x66, 0x96, 0x56, 0xa9, 0x69, 0x99, 0x59, 0xa5, 0x65, 0x95, 0x55 };
204
205 void CodeIso15693AsTag(uint8_t *cmd, size_t len) {
206 /*
207 * SOF comprises 3 parts;
208 * * An unmodulated time of 56.64 us
209 * * 24 pulses of 423.75 kHz (fc/32)
210 * * A logic 1, which starts with an unmodulated time of 18.88us
211 * followed by 8 pulses of 423.75kHz (fc/32)
212 *
213 * EOF comprises 3 parts:
214 * - A logic 0 (which starts with 8 pulses of fc/32 followed by an unmodulated
215 * time of 18.88us.
216 * - 24 pulses of fc/32
217 * - An unmodulated time of 56.64 us
218 *
219 * A logic 0 starts with 8 pulses of fc/32
220 * followed by an unmodulated time of 256/fc (~18,88us).
221 *
222 * A logic 0 starts with unmodulated time of 256/fc (~18,88us) followed by
223 * 8 pulses of fc/32 (also 18.88us)
224 *
225 * A bit here becomes 8 pulses of fc/32. Therefore:
226 * The SOF can be written as 00011101 = 0x1D
227 * The EOF can be written as 10111000 = 0xb8
228 * A logic 1 is 01
229 * A logic 0 is 10
230 *
231 * */
232
233 ToSendReset();
234
235 // SOF
236 ToSend[++ToSendMax] = 0x1D; // 00011101
237
238 // data
239 for (int i = 0; i < len; i++) {
240 ToSend[++ToSendMax] = encode_4bits[cmd[i] & 0xF];
241 ToSend[++ToSendMax] = encode_4bits[cmd[i] >> 4];
242 }
243
244 // EOF
245 ToSend[++ToSendMax] = 0xB8; // 10111000
246
247 ToSendMax++;
248 }
249
250
251 // Transmit the command (to the tag) that was placed in cmd[].
252 void TransmitTo15693Tag(const uint8_t *cmd, int len, uint32_t *start_time) {
253
254 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SEND_FULL_MOD);
255
256 if (*start_time < DELAY_ARM_TO_TAG) {
257 *start_time = DELAY_ARM_TO_TAG;
258 }
259
260 *start_time = (*start_time - DELAY_ARM_TO_TAG) & 0xfffffff0;
261
262 if (GetCountSspClk() > *start_time) { // we may miss the intended time
263 *start_time = (GetCountSspClk() + 16) & 0xfffffff0; // next possible time
264 }
265
266 while (GetCountSspClk() < *start_time)
267 /* wait */ ;
268
269 LED_B_ON();
270 for (int c = 0; c < len; c++) {
271 uint8_t data = cmd[c];
272 for (int i = 0; i < 8; i++) {
273 uint16_t send_word = (data & 0x80) ? 0xffff : 0x0000;
274 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
275 AT91C_BASE_SSC->SSC_THR = send_word;
276 while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))) ;
277 AT91C_BASE_SSC->SSC_THR = send_word;
278
279 data <<= 1;
280 }
281 WDT_HIT();
282 }
283 LED_B_OFF();
284
285 *start_time = *start_time + DELAY_ARM_TO_TAG;
286
287 }
288
289
290 //-----------------------------------------------------------------------------
291 // Transmit the tag response (to the reader) that was placed in cmd[].
292 //-----------------------------------------------------------------------------
293 void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t *start_time, uint32_t slot_time, bool slow) {
294 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
295 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
296
297 uint32_t modulation_start_time = *start_time - DELAY_ARM_TO_READER + 3 * 8; // no need to transfer the unmodulated start of SOF
298
299 while (GetCountSspClk() > (modulation_start_time & 0xfffffff8) + 3) { // we will miss the intended time
300 if (slot_time) {
301 modulation_start_time += slot_time; // use next available slot
302 } else {
303 modulation_start_time = (modulation_start_time & 0xfffffff8) + 8; // next possible time
304 }
305 }
306
307 while (GetCountSspClk() < (modulation_start_time & 0xfffffff8))
308 /* wait */ ;
309
310 uint8_t shift_delay = modulation_start_time & 0x00000007;
311
312 *start_time = modulation_start_time + DELAY_ARM_TO_READER - 3 * 8;
313
314 LED_C_ON();
315 uint8_t bits_to_shift = 0x00;
316 uint8_t bits_to_send = 0x00;
317 for (size_t c = 0; c < len; c++) {
318 for (int i = (c==0?4:7); i >= 0; i--) {
319 uint8_t cmd_bits = ((cmd[c] >> i) & 0x01) ? 0xff : 0x00;
320 for (int j = 0; j < (slow?4:1); ) {
321 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
322 bits_to_send = bits_to_shift << (8 - shift_delay) | cmd_bits >> shift_delay;
323 AT91C_BASE_SSC->SSC_THR = bits_to_send;
324 bits_to_shift = cmd_bits;
325 j++;
326 }
327 }
328 }
329 WDT_HIT();
330 }
331 // send the remaining bits, padded with 0:
332 bits_to_send = bits_to_shift << (8 - shift_delay);
333 for ( ; ; ) {
334 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
335 AT91C_BASE_SSC->SSC_THR = bits_to_send;
336 break;
337 }
338 }
339 LED_C_OFF();
340 }
341
342
343 //=============================================================================
344 // An ISO 15693 decoder for tag responses (one subcarrier only).
345 // Uses cross correlation to identify each bit and EOF.
346 // This function is called 8 times per bit (every 2 subcarrier cycles).
347 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
348 // i.e. function is called every 4,72us
349 // LED handling:
350 // LED C -> ON once we have received the SOF and are expecting the rest.
351 // LED C -> OFF once we have received EOF or are unsynced
352 //
353 // Returns: true if we received a EOF
354 // false if we are still waiting for some more
355 //=============================================================================
356
357 #define NOISE_THRESHOLD 160 // don't try to correlate noise
358 #define MAX_PREVIOUS_AMPLITUDE (-1 - NOISE_THRESHOLD)
359
360 typedef struct DecodeTag {
361 enum {
362 STATE_TAG_SOF_LOW,
363 STATE_TAG_SOF_RISING_EDGE,
364 STATE_TAG_SOF_HIGH,
365 STATE_TAG_SOF_HIGH_END,
366 STATE_TAG_RECEIVING_DATA,
367 STATE_TAG_EOF,
368 STATE_TAG_EOF_TAIL
369 } state;
370 int bitCount;
371 int posCount;
372 enum {
373 LOGIC0,
374 LOGIC1,
375 SOF_PART1,
376 SOF_PART2
377 } lastBit;
378 uint16_t shiftReg;
379 uint16_t max_len;
380 uint8_t *output;
381 int len;
382 int sum1, sum2;
383 int threshold_sof;
384 int threshold_half;
385 uint16_t previous_amplitude;
386 } DecodeTag_t;
387
388
389 static int inline __attribute__((always_inline)) Handle15693SamplesFromTag(uint16_t amplitude, DecodeTag_t *DecodeTag) {
390 switch(DecodeTag->state) {
391 case STATE_TAG_SOF_LOW:
392 // waiting for a rising edge
393 if (amplitude > NOISE_THRESHOLD + DecodeTag->previous_amplitude) {
394 if (DecodeTag->posCount > 10) {
395 DecodeTag->threshold_sof = amplitude - DecodeTag->previous_amplitude; // to be divided by 2
396 DecodeTag->threshold_half = 0;
397 DecodeTag->state = STATE_TAG_SOF_RISING_EDGE;
398 } else {
399 DecodeTag->posCount = 0;
400 }
401 } else {
402 DecodeTag->posCount++;
403 DecodeTag->previous_amplitude = amplitude;
404 }
405 break;
406
407 case STATE_TAG_SOF_RISING_EDGE:
408 if (amplitude > DecodeTag->threshold_sof + DecodeTag->previous_amplitude) { // edge still rising
409 if (amplitude > DecodeTag->threshold_sof + DecodeTag->threshold_sof) { // steeper edge, take this as time reference
410 DecodeTag->posCount = 1;
411 } else {
412 DecodeTag->posCount = 2;
413 }
414 DecodeTag->threshold_sof = (amplitude - DecodeTag->previous_amplitude) / 2;
415 } else {
416 DecodeTag->posCount = 2;
417 DecodeTag->threshold_sof = DecodeTag->threshold_sof/2;
418 }
419 // DecodeTag->posCount = 2;
420 DecodeTag->state = STATE_TAG_SOF_HIGH;
421 break;
422
423 case STATE_TAG_SOF_HIGH:
424 // waiting for 10 times high. Take average over the last 8
425 if (amplitude > DecodeTag->threshold_sof) {
426 DecodeTag->posCount++;
427 if (DecodeTag->posCount > 2) {
428 DecodeTag->threshold_half += amplitude; // keep track of average high value
429 }
430 if (DecodeTag->posCount == 10) {
431 DecodeTag->threshold_half >>= 2; // (4 times 1/2 average)
432 DecodeTag->state = STATE_TAG_SOF_HIGH_END;
433 }
434 } else { // high phase was too short
435 DecodeTag->posCount = 1;
436 DecodeTag->previous_amplitude = amplitude;
437 DecodeTag->state = STATE_TAG_SOF_LOW;
438 }
439 break;
440
441 case STATE_TAG_SOF_HIGH_END:
442 // check for falling edge
443 if (DecodeTag->posCount == 13 && amplitude < DecodeTag->threshold_sof) {
444 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF (12 samples low and 12 samples high)
445 DecodeTag->shiftReg = 0;
446 DecodeTag->bitCount = 0;
447 DecodeTag->len = 0;
448 DecodeTag->sum1 = amplitude;
449 DecodeTag->sum2 = 0;
450 DecodeTag->posCount = 2;
451 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
452 // FpgaDisableTracing(); // DEBUGGING
453 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
454 // amplitude,
455 // DecodeTag->threshold_sof,
456 // DecodeTag->threshold_half/4,
457 // DecodeTag->previous_amplitude); // DEBUGGING
458 LED_C_ON();
459 } else {
460 DecodeTag->posCount++;
461 if (DecodeTag->posCount > 13) { // high phase too long
462 DecodeTag->posCount = 0;
463 DecodeTag->previous_amplitude = amplitude;
464 DecodeTag->state = STATE_TAG_SOF_LOW;
465 LED_C_OFF();
466 }
467 }
468 break;
469
470 case STATE_TAG_RECEIVING_DATA:
471 // FpgaDisableTracing(); // DEBUGGING
472 // Dbprintf("amplitude = %d, threshold_sof = %d, threshold_half/4 = %d, previous_amplitude = %d",
473 // amplitude,
474 // DecodeTag->threshold_sof,
475 // DecodeTag->threshold_half/4,
476 // DecodeTag->previous_amplitude); // DEBUGGING
477 if (DecodeTag->posCount == 1) {
478 DecodeTag->sum1 = 0;
479 DecodeTag->sum2 = 0;
480 }
481 if (DecodeTag->posCount <= 4) {
482 DecodeTag->sum1 += amplitude;
483 } else {
484 DecodeTag->sum2 += amplitude;
485 }
486 if (DecodeTag->posCount == 8) {
487 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in both halves
488 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
489 DecodeTag->state = STATE_TAG_EOF;
490 } else {
491 DecodeTag->posCount = 0;
492 DecodeTag->previous_amplitude = amplitude;
493 DecodeTag->state = STATE_TAG_SOF_LOW;
494 LED_C_OFF();
495 }
496 } else if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 > DecodeTag->threshold_half) { // modulation in second half
497 // logic 1
498 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
499 DecodeTag->lastBit = SOF_PART2; // SOF completed
500 } else {
501 DecodeTag->lastBit = LOGIC1;
502 DecodeTag->shiftReg >>= 1;
503 DecodeTag->shiftReg |= 0x80;
504 DecodeTag->bitCount++;
505 if (DecodeTag->bitCount == 8) {
506 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
507 DecodeTag->len++;
508 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
509 if (DecodeTag->len > DecodeTag->max_len) {
510 // buffer overflow, give up
511 LED_C_OFF();
512 return true;
513 }
514 DecodeTag->bitCount = 0;
515 DecodeTag->shiftReg = 0;
516 }
517 }
518 } else if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
519 // logic 0
520 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
521 DecodeTag->posCount = 0;
522 DecodeTag->previous_amplitude = amplitude;
523 DecodeTag->state = STATE_TAG_SOF_LOW;
524 LED_C_OFF();
525 } else {
526 DecodeTag->lastBit = LOGIC0;
527 DecodeTag->shiftReg >>= 1;
528 DecodeTag->bitCount++;
529 if (DecodeTag->bitCount == 8) {
530 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
531 DecodeTag->len++;
532 // if (DecodeTag->shiftReg == 0x12 && DecodeTag->len == 1) FpgaDisableTracing(); // DEBUGGING
533 if (DecodeTag->len > DecodeTag->max_len) {
534 // buffer overflow, give up
535 DecodeTag->posCount = 0;
536 DecodeTag->previous_amplitude = amplitude;
537 DecodeTag->state = STATE_TAG_SOF_LOW;
538 LED_C_OFF();
539 }
540 DecodeTag->bitCount = 0;
541 DecodeTag->shiftReg = 0;
542 }
543 }
544 } else { // no modulation
545 if (DecodeTag->lastBit == SOF_PART2) { // only SOF (this is OK for iClass)
546 LED_C_OFF();
547 return true;
548 } else {
549 DecodeTag->posCount = 0;
550 DecodeTag->state = STATE_TAG_SOF_LOW;
551 LED_C_OFF();
552 }
553 }
554 DecodeTag->posCount = 0;
555 }
556 DecodeTag->posCount++;
557 break;
558
559 case STATE_TAG_EOF:
560 if (DecodeTag->posCount == 1) {
561 DecodeTag->sum1 = 0;
562 DecodeTag->sum2 = 0;
563 }
564 if (DecodeTag->posCount <= 4) {
565 DecodeTag->sum1 += amplitude;
566 } else {
567 DecodeTag->sum2 += amplitude;
568 }
569 if (DecodeTag->posCount == 8) {
570 if (DecodeTag->sum1 > DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // modulation in first half
571 DecodeTag->posCount = 0;
572 DecodeTag->state = STATE_TAG_EOF_TAIL;
573 } else {
574 DecodeTag->posCount = 0;
575 DecodeTag->previous_amplitude = amplitude;
576 DecodeTag->state = STATE_TAG_SOF_LOW;
577 LED_C_OFF();
578 }
579 }
580 DecodeTag->posCount++;
581 break;
582
583 case STATE_TAG_EOF_TAIL:
584 if (DecodeTag->posCount == 1) {
585 DecodeTag->sum1 = 0;
586 DecodeTag->sum2 = 0;
587 }
588 if (DecodeTag->posCount <= 4) {
589 DecodeTag->sum1 += amplitude;
590 } else {
591 DecodeTag->sum2 += amplitude;
592 }
593 if (DecodeTag->posCount == 8) {
594 if (DecodeTag->sum1 < DecodeTag->threshold_half && DecodeTag->sum2 < DecodeTag->threshold_half) { // no modulation in both halves
595 LED_C_OFF();
596 return true;
597 } else {
598 DecodeTag->posCount = 0;
599 DecodeTag->previous_amplitude = amplitude;
600 DecodeTag->state = STATE_TAG_SOF_LOW;
601 LED_C_OFF();
602 }
603 }
604 DecodeTag->posCount++;
605 break;
606 }
607
608 return false;
609 }
610
611
612 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data, uint16_t max_len) {
613 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
614 DecodeTag->posCount = 0;
615 DecodeTag->state = STATE_TAG_SOF_LOW;
616 DecodeTag->output = data;
617 DecodeTag->max_len = max_len;
618 }
619
620
621 static void DecodeTagReset(DecodeTag_t *DecodeTag) {
622 DecodeTag->posCount = 0;
623 DecodeTag->state = STATE_TAG_SOF_LOW;
624 DecodeTag->previous_amplitude = MAX_PREVIOUS_AMPLITUDE;
625 }
626
627
628 /*
629 * Receive and decode the tag response, also log to tracebuffer
630 */
631 int GetIso15693AnswerFromTag(uint8_t* response, uint16_t max_len, uint16_t timeout, uint32_t *eof_time) {
632
633 int samples = 0;
634 int ret = 0;
635
636 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
637
638 // the Decoder data structure
639 DecodeTag_t DecodeTag = { 0 };
640 DecodeTagInit(&DecodeTag, response, max_len);
641
642 // wait for last transfer to complete
643 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
644
645 // And put the FPGA in the appropriate mode
646 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
647
648 // Setup and start DMA.
649 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
650 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
651 uint32_t dma_start_time = 0;
652 uint16_t *upTo = dmaBuf;
653
654 for(;;) {
655 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
656
657 if (behindBy == 0) continue;
658
659 samples++;
660 if (samples == 1) {
661 // DMA has transferred the very first data
662 dma_start_time = GetCountSspClk() & 0xfffffff0;
663 }
664
665 uint16_t tagdata = *upTo++;
666
667 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
668 upTo = dmaBuf; // start reading the circular buffer from the beginning
669 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
670 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
671 ret = -1;
672 break;
673 }
674 }
675 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
676 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
677 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
678 }
679
680 if (Handle15693SamplesFromTag(tagdata, &DecodeTag)) {
681 *eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM; // end of EOF
682 if (DecodeTag.lastBit == SOF_PART2) {
683 *eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
684 }
685 if (DecodeTag.len > DecodeTag.max_len) {
686 ret = -2; // buffer overflow
687 }
688 break;
689 }
690
691 if (samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
692 ret = -1; // timeout
693 break;
694 }
695
696 }
697
698 FpgaDisableSscDma();
699
700 if (DEBUG) Dbprintf("samples = %d, ret = %d, Decoder: state = %d, lastBit = %d, len = %d, bitCount = %d, posCount = %d",
701 samples, ret, DecodeTag.state, DecodeTag.lastBit, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
702
703 if (ret < 0) {
704 return ret;
705 }
706
707 uint32_t sof_time = *eof_time
708 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
709 - 32 * 16 // time for SOF transfer
710 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
711
712 if (DEBUG) Dbprintf("timing: sof_time = %d, eof_time = %d", sof_time, *eof_time);
713
714 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, *eof_time*4, NULL, false);
715
716 return DecodeTag.len;
717 }
718
719
720 //=============================================================================
721 // An ISO15693 decoder for reader commands.
722 //
723 // This function is called 4 times per bit (every 2 subcarrier cycles).
724 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
725 // LED handling:
726 // LED B -> ON once we have received the SOF and are expecting the rest.
727 // LED B -> OFF once we have received EOF or are in error state or unsynced
728 //
729 // Returns: true if we received a EOF
730 // false if we are still waiting for some more
731 //=============================================================================
732
733 typedef struct DecodeReader {
734 enum {
735 STATE_READER_UNSYNCD,
736 STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF,
737 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
738 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
739 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
740 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
741 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
742 STATE_READER_RECEIVE_DATA_1_OUT_OF_256
743 } state;
744 enum {
745 CODING_1_OUT_OF_4,
746 CODING_1_OUT_OF_256
747 } Coding;
748 uint8_t shiftReg;
749 uint8_t bitCount;
750 int byteCount;
751 int byteCountMax;
752 int posCount;
753 int sum1, sum2;
754 uint8_t *output;
755 } DecodeReader_t;
756
757
758 static void DecodeReaderInit(DecodeReader_t* DecodeReader, uint8_t *data, uint16_t max_len)
759 {
760 DecodeReader->output = data;
761 DecodeReader->byteCountMax = max_len;
762 DecodeReader->state = STATE_READER_UNSYNCD;
763 DecodeReader->byteCount = 0;
764 DecodeReader->bitCount = 0;
765 DecodeReader->posCount = 1;
766 DecodeReader->shiftReg = 0;
767 }
768
769
770 static void DecodeReaderReset(DecodeReader_t* DecodeReader)
771 {
772 DecodeReader->state = STATE_READER_UNSYNCD;
773 }
774
775
776 static int inline __attribute__((always_inline)) Handle15693SampleFromReader(uint8_t bit, DecodeReader_t *restrict DecodeReader)
777 {
778 switch (DecodeReader->state) {
779 case STATE_READER_UNSYNCD:
780 // wait for unmodulated carrier
781 if (bit) {
782 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
783 }
784 break;
785
786 case STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF:
787 if (!bit) {
788 // we went low, so this could be the beginning of a SOF
789 DecodeReader->posCount = 1;
790 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
791 }
792 break;
793
794 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
795 DecodeReader->posCount++;
796 if (bit) { // detected rising edge
797 if (DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
798 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
799 } else { // SOF
800 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
801 }
802 } else {
803 if (DecodeReader->posCount > 5) { // stayed low for too long
804 DecodeReaderReset(DecodeReader);
805 } else {
806 // do nothing, keep waiting
807 }
808 }
809 break;
810
811 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
812 DecodeReader->posCount++;
813 if (!bit) { // detected a falling edge
814 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
815 DecodeReaderReset(DecodeReader);
816 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
817 DecodeReader->Coding = CODING_1_OUT_OF_4;
818 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
819 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
820 DecodeReaderReset(DecodeReader);
821 } else { // SOF for 1 out of 256 coding
822 DecodeReader->Coding = CODING_1_OUT_OF_256;
823 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
824 }
825 } else {
826 if (DecodeReader->posCount > 29) { // stayed high for too long
827 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
828 } else {
829 // do nothing, keep waiting
830 }
831 }
832 break;
833
834 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
835 DecodeReader->posCount++;
836 if (bit) { // detected rising edge
837 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
838 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
839 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
840 } else {
841 DecodeReader->posCount = 1;
842 DecodeReader->bitCount = 0;
843 DecodeReader->byteCount = 0;
844 DecodeReader->sum1 = 1;
845 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
846 LED_B_ON();
847 }
848 } else { // CODING_1_OUT_OF_4
849 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
850 DecodeReader->state = STATE_READER_AWAIT_1ST_FALLING_EDGE_OF_SOF;
851 } else {
852 DecodeReader->posCount = 1;
853 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
854 }
855 }
856 } else {
857 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
858 if (DecodeReader->posCount > 34) { // signal stayed low for too long
859 DecodeReaderReset(DecodeReader);
860 } else {
861 // do nothing, keep waiting
862 }
863 } else { // CODING_1_OUT_OF_4
864 if (DecodeReader->posCount > 26) { // signal stayed low for too long
865 DecodeReaderReset(DecodeReader);
866 } else {
867 // do nothing, keep waiting
868 }
869 }
870 }
871 break;
872
873 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
874 DecodeReader->posCount++;
875 if (bit) {
876 if (DecodeReader->posCount == 9) {
877 DecodeReader->posCount = 1;
878 DecodeReader->bitCount = 0;
879 DecodeReader->byteCount = 0;
880 DecodeReader->sum1 = 1;
881 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
882 LED_B_ON();
883 } else {
884 // do nothing, keep waiting
885 }
886 } else { // unexpected falling edge
887 DecodeReaderReset(DecodeReader);
888 }
889 break;
890
891 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
892 bit = !!bit;
893 DecodeReader->posCount++;
894 if (DecodeReader->posCount == 1) {
895 DecodeReader->sum1 = bit;
896 } else if (DecodeReader->posCount <= 4) {
897 DecodeReader->sum1 += bit;
898 } else if (DecodeReader->posCount == 5) {
899 DecodeReader->sum2 = bit;
900 } else {
901 DecodeReader->sum2 += bit;
902 }
903 if (DecodeReader->posCount == 8) {
904 DecodeReader->posCount = 0;
905 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
906 LED_B_OFF(); // Finished receiving
907 DecodeReaderReset(DecodeReader);
908 if (DecodeReader->byteCount != 0) {
909 return true;
910 }
911 }
912 if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected a 2bit position
913 DecodeReader->shiftReg >>= 2;
914 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
915 }
916 if (DecodeReader->bitCount == 15) { // we have a full byte
917 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
918 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
919 // buffer overflow, give up
920 LED_B_OFF();
921 DecodeReaderReset(DecodeReader);
922 }
923 DecodeReader->bitCount = 0;
924 DecodeReader->shiftReg = 0;
925 } else {
926 DecodeReader->bitCount++;
927 }
928 }
929 break;
930
931 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
932 bit = !!bit;
933 DecodeReader->posCount++;
934 if (DecodeReader->posCount == 1) {
935 DecodeReader->sum1 = bit;
936 } else if (DecodeReader->posCount <= 4) {
937 DecodeReader->sum1 += bit;
938 } else if (DecodeReader->posCount == 5) {
939 DecodeReader->sum2 = bit;
940 } else {
941 DecodeReader->sum2 += bit;
942 }
943 if (DecodeReader->posCount == 8) {
944 DecodeReader->posCount = 0;
945 if (DecodeReader->sum1 <= 1 && DecodeReader->sum2 >= 3) { // EOF
946 LED_B_OFF(); // Finished receiving
947 DecodeReaderReset(DecodeReader);
948 if (DecodeReader->byteCount != 0) {
949 return true;
950 }
951 }
952 if (DecodeReader->sum1 >= 3 && DecodeReader->sum2 <= 1) { // detected the bit position
953 DecodeReader->shiftReg = DecodeReader->bitCount;
954 }
955 if (DecodeReader->bitCount == 255) { // we have a full byte
956 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
957 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
958 // buffer overflow, give up
959 LED_B_OFF();
960 DecodeReaderReset(DecodeReader);
961 }
962 }
963 DecodeReader->bitCount++;
964 }
965 break;
966
967 default:
968 LED_B_OFF();
969 DecodeReaderReset(DecodeReader);
970 break;
971 }
972
973 return false;
974 }
975
976
977 //-----------------------------------------------------------------------------
978 // Receive a command (from the reader to us, where we are the simulated tag),
979 // and store it in the given buffer, up to the given maximum length. Keeps
980 // spinning, waiting for a well-framed command, until either we get one
981 // (returns len) or someone presses the pushbutton on the board (returns -1).
982 //
983 // Assume that we're called with the SSC (to the FPGA) and ADC path set
984 // correctly.
985 //-----------------------------------------------------------------------------
986
987 int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time) {
988 int samples = 0;
989 bool gotFrame = false;
990 uint8_t b;
991
992 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
993
994 // the decoder data structure
995 DecodeReader_t DecodeReader = {0};
996 DecodeReaderInit(&DecodeReader, received, max_len);
997
998 // wait for last transfer to complete
999 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
1000
1001 LED_D_OFF();
1002 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1003
1004 // clear receive register and wait for next transfer
1005 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
1006 (void) temp;
1007 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
1008
1009 uint32_t dma_start_time = GetCountSspClk() & 0xfffffff8;
1010
1011 // Setup and start DMA.
1012 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1013 uint8_t *upTo = dmaBuf;
1014
1015 for (;;) {
1016 uint16_t behindBy = ((uint8_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1017
1018 if (behindBy == 0) continue;
1019
1020 b = *upTo++;
1021 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1022 upTo = dmaBuf; // start reading the circular buffer from the beginning
1023 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1024 Dbprintf("About to blow circular buffer - aborted! behindBy=%d", behindBy);
1025 break;
1026 }
1027 }
1028 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1029 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1030 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1031 }
1032
1033 for (int i = 7; i >= 0; i--) {
1034 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
1035 *eof_time = dma_start_time + samples - DELAY_READER_TO_ARM; // end of EOF
1036 gotFrame = true;
1037 break;
1038 }
1039 samples++;
1040 }
1041
1042 if (gotFrame) {
1043 break;
1044 }
1045
1046 if (BUTTON_PRESS()) {
1047 DecodeReader.byteCount = -1;
1048 break;
1049 }
1050
1051 WDT_HIT();
1052 }
1053
1054 FpgaDisableSscDma();
1055
1056 if (DEBUG) Dbprintf("samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
1057 samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
1058
1059 if (DecodeReader.byteCount > 0) {
1060 uint32_t sof_time = *eof_time
1061 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128:2048) // time for byte transfers
1062 - 32 // time for SOF transfer
1063 - 16; // time for EOF transfer
1064 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*32, *eof_time*32, NULL, true);
1065 }
1066
1067 return DecodeReader.byteCount;
1068 }
1069
1070
1071 // Encode (into the ToSend buffers) an identify request, which is the first
1072 // thing that you must send to a tag to get a response.
1073 static void BuildIdentifyRequest(void)
1074 {
1075 uint8_t cmd[5];
1076
1077 uint16_t crc;
1078 // one sub-carrier, inventory, 1 slot, fast rate
1079 // AFI is at bit 5 (1<<4) when doing an INVENTORY
1080 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
1081 // inventory command code
1082 cmd[1] = 0x01;
1083 // no mask
1084 cmd[2] = 0x00;
1085 //Now the CRC
1086 crc = Iso15693Crc(cmd, 3);
1087 cmd[3] = crc & 0xff;
1088 cmd[4] = crc >> 8;
1089
1090 CodeIso15693AsReader(cmd, sizeof(cmd));
1091 }
1092
1093
1094 //-----------------------------------------------------------------------------
1095 // Start to read an ISO 15693 tag. We send an identify request, then wait
1096 // for the response. The response is not demodulated, just left in the buffer
1097 // so that it can be downloaded to a PC and processed there.
1098 //-----------------------------------------------------------------------------
1099 void AcquireRawAdcSamplesIso15693(void)
1100 {
1101 LED_A_ON();
1102
1103 uint8_t *dest = BigBuf_get_addr();
1104
1105 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1106 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1107 LED_D_ON();
1108 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1109 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1110
1111 BuildIdentifyRequest();
1112
1113 // Give the tags time to energize
1114 SpinDelay(100);
1115
1116 // Now send the command
1117 uint32_t start_time = 0;
1118 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1119
1120 // wait for last transfer to complete
1121 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY)) ;
1122
1123 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_SUBCARRIER_424_KHZ | FPGA_HF_READER_MODE_RECEIVE_AMPLITUDE);
1124
1125 for(int c = 0; c < 4000; ) {
1126 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1127 uint16_t r = AT91C_BASE_SSC->SSC_RHR;
1128 dest[c++] = r >> 5;
1129 }
1130 }
1131
1132 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1133 LEDsoff();
1134 }
1135
1136
1137 void SnoopIso15693(void) {
1138
1139 LED_A_ON();
1140
1141 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1142
1143 clear_trace();
1144 set_tracing(true);
1145
1146 // The DMA buffer, used to stream samples from the FPGA
1147 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
1148
1149 // Count of samples received so far, so that we can include timing
1150 // information in the trace buffer.
1151 int samples = 0;
1152
1153 DecodeTag_t DecodeTag = {0};
1154 uint8_t response[ISO15693_MAX_RESPONSE_LENGTH];
1155 DecodeTagInit(&DecodeTag, response, sizeof(response));
1156
1157 DecodeReader_t DecodeReader = {0};;
1158 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1159 DecodeReaderInit(&DecodeReader, cmd, sizeof(cmd));
1160
1161 // Print some debug information about the buffer sizes
1162 if (DEBUG) {
1163 Dbprintf("Snooping buffers initialized:");
1164 Dbprintf(" Trace: %i bytes", BigBuf_max_traceLen());
1165 Dbprintf(" Reader -> tag: %i bytes", ISO15693_MAX_COMMAND_LENGTH);
1166 Dbprintf(" tag -> Reader: %i bytes", ISO15693_MAX_RESPONSE_LENGTH);
1167 Dbprintf(" DMA: %i bytes", ISO15693_DMA_BUFFER_SIZE * sizeof(uint16_t));
1168 }
1169 Dbprintf("Snoop started. Press PM3 Button to stop.");
1170
1171 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER | FPGA_HF_READER_MODE_SNOOP_AMPLITUDE);
1172 LED_D_OFF();
1173 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1174 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1175 StartCountSspClk();
1176 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1177
1178 bool TagIsActive = false;
1179 bool ReaderIsActive = false;
1180 bool ExpectTagAnswer = false;
1181 uint32_t dma_start_time = 0;
1182 uint16_t *upTo = dmaBuf;
1183
1184 // And now we loop, receiving samples.
1185 for(;;) {
1186 uint16_t behindBy = ((uint16_t*)AT91C_BASE_PDC_SSC->PDC_RPR - upTo) & (ISO15693_DMA_BUFFER_SIZE-1);
1187
1188 if (behindBy == 0) continue;
1189
1190 samples++;
1191 if (samples == 1) {
1192 // DMA has transferred the very first data
1193 dma_start_time = GetCountSspClk() & 0xfffffff0;
1194 }
1195
1196 uint16_t snoopdata = *upTo++;
1197
1198 if (upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
1199 upTo = dmaBuf; // start reading the circular buffer from the beginning
1200 if (behindBy > (9*ISO15693_DMA_BUFFER_SIZE/10)) {
1201 Dbprintf("About to blow circular buffer - aborted! behindBy=%d, samples=%d", behindBy, samples);
1202 break;
1203 }
1204 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
1205 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
1206 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
1207 WDT_HIT();
1208 if (BUTTON_PRESS()) {
1209 DbpString("Snoop stopped.");
1210 break;
1211 }
1212 }
1213 }
1214
1215 if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
1216 if (Handle15693SampleFromReader(snoopdata & 0x02, &DecodeReader)) {
1217 // FpgaDisableSscDma();
1218 uint32_t eof_time = dma_start_time + samples*16 + 8 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1219 if (DecodeReader.byteCount > 0) {
1220 uint32_t sof_time = eof_time
1221 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1222 - 32*16 // time for SOF transfer
1223 - 16*16; // time for EOF transfer
1224 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1225 }
1226 /* And ready to receive another command. */
1227 DecodeReaderReset(&DecodeReader);
1228 /* And also reset the demod code, which might have been */
1229 /* false-triggered by the commands from the reader. */
1230 DecodeTagReset(&DecodeTag);
1231 ReaderIsActive = false;
1232 ExpectTagAnswer = true;
1233 // upTo = dmaBuf;
1234 // samples = 0;
1235 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1236 // continue;
1237 } else if (Handle15693SampleFromReader(snoopdata & 0x01, &DecodeReader)) {
1238 // FpgaDisableSscDma();
1239 uint32_t eof_time = dma_start_time + samples*16 + 16 - DELAY_READER_TO_ARM_SNOOP; // end of EOF
1240 if (DecodeReader.byteCount > 0) {
1241 uint32_t sof_time = eof_time
1242 - DecodeReader.byteCount * (DecodeReader.Coding==CODING_1_OUT_OF_4?128*16:2048*16) // time for byte transfers
1243 - 32*16 // time for SOF transfer
1244 - 16*16; // time for EOF transfer
1245 LogTrace_ISO15693(DecodeReader.output, DecodeReader.byteCount, sof_time*4, eof_time*4, NULL, true);
1246 }
1247 /* And ready to receive another command. */
1248 DecodeReaderReset(&DecodeReader);
1249 /* And also reset the demod code, which might have been */
1250 /* false-triggered by the commands from the reader. */
1251 DecodeTagReset(&DecodeTag);
1252 ReaderIsActive = false;
1253 ExpectTagAnswer = true;
1254 // upTo = dmaBuf;
1255 // samples = 0;
1256 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1257 // continue;
1258 } else {
1259 ReaderIsActive = (DecodeReader.state >= STATE_READER_RECEIVE_DATA_1_OUT_OF_4);
1260 }
1261 }
1262
1263 if (!ReaderIsActive && ExpectTagAnswer) { // no need to try decoding tag data if the reader is currently sending or no answer expected yet
1264 if (Handle15693SamplesFromTag(snoopdata >> 2, &DecodeTag)) {
1265 // FpgaDisableSscDma();
1266 uint32_t eof_time = dma_start_time + samples*16 - DELAY_TAG_TO_ARM_SNOOP; // end of EOF
1267 if (DecodeTag.lastBit == SOF_PART2) {
1268 eof_time -= 8*16; // needed 8 additional samples to confirm single SOF (iCLASS)
1269 }
1270 uint32_t sof_time = eof_time
1271 - DecodeTag.len * 8 * 8 * 16 // time for byte transfers
1272 - 32 * 16 // time for SOF transfer
1273 - (DecodeTag.lastBit != SOF_PART2?32*16:0); // time for EOF transfer
1274 LogTrace_ISO15693(DecodeTag.output, DecodeTag.len, sof_time*4, eof_time*4, NULL, false);
1275 // And ready to receive another response.
1276 DecodeTagReset(&DecodeTag);
1277 DecodeReaderReset(&DecodeReader);
1278 ExpectTagAnswer = false;
1279 TagIsActive = false;
1280 // upTo = dmaBuf;
1281 // samples = 0;
1282 // FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
1283 // continue;
1284 } else {
1285 TagIsActive = (DecodeTag.state >= STATE_TAG_RECEIVING_DATA);
1286 }
1287 }
1288
1289 }
1290
1291 FpgaDisableSscDma();
1292
1293 LEDsoff();
1294
1295 DbpString("Snoop statistics:");
1296 Dbprintf(" ExpectTagAnswer: %d", ExpectTagAnswer);
1297 Dbprintf(" DecodeTag State: %d", DecodeTag.state);
1298 Dbprintf(" DecodeTag byteCnt: %d", DecodeTag.len);
1299 Dbprintf(" DecodeReader State: %d", DecodeReader.state);
1300 Dbprintf(" DecodeReader byteCnt: %d", DecodeReader.byteCount);
1301 Dbprintf(" Trace length: %d", BigBuf_get_traceLen());
1302 }
1303
1304
1305 // Initialize the proxmark as iso15k reader
1306 void Iso15693InitReader() {
1307 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1308
1309 // Start from off (no field generated)
1310 LED_D_OFF();
1311 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1312 SpinDelay(10);
1313
1314 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1315 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1316
1317 // Give the tags time to energize
1318 LED_D_ON();
1319 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1320 SpinDelay(250);
1321 }
1322
1323 ///////////////////////////////////////////////////////////////////////
1324 // ISO 15693 Part 3 - Air Interface
1325 // This section basically contains transmission and receiving of bits
1326 ///////////////////////////////////////////////////////////////////////
1327
1328
1329 // uid is in transmission order (which is reverse of display order)
1330 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1331 {
1332 uint8_t cmd[13];
1333
1334 uint16_t crc;
1335 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1336 // followed by the block data
1337 cmd[0] = ISO15693_REQ_OPTION | ISO15693_REQ_ADDRESS | ISO15693_REQ_DATARATE_HIGH;
1338 // READ BLOCK command code
1339 cmd[1] = ISO15693_READBLOCK;
1340 // UID may be optionally specified here
1341 // 64-bit UID
1342 cmd[2] = uid[0];
1343 cmd[3] = uid[1];
1344 cmd[4] = uid[2];
1345 cmd[5] = uid[3];
1346 cmd[6] = uid[4];
1347 cmd[7] = uid[5];
1348 cmd[8] = uid[6];
1349 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1350 // Block number to read
1351 cmd[10] = blockNumber;
1352 //Now the CRC
1353 crc = Iso15693Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1354 cmd[11] = crc & 0xff;
1355 cmd[12] = crc >> 8;
1356
1357 CodeIso15693AsReader(cmd, sizeof(cmd));
1358 }
1359
1360
1361 // Now the VICC>VCD responses when we are simulating a tag
1362 static void BuildInventoryResponse(uint8_t *uid)
1363 {
1364 uint8_t cmd[12];
1365
1366 uint16_t crc;
1367
1368 cmd[0] = 0; // No error, no protocol format extension
1369 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1370 // 64-bit UID
1371 cmd[2] = uid[7]; //0x32;
1372 cmd[3] = uid[6]; //0x4b;
1373 cmd[4] = uid[5]; //0x03;
1374 cmd[5] = uid[4]; //0x01;
1375 cmd[6] = uid[3]; //0x00;
1376 cmd[7] = uid[2]; //0x10;
1377 cmd[8] = uid[1]; //0x05;
1378 cmd[9] = uid[0]; //0xe0;
1379 //Now the CRC
1380 crc = Iso15693Crc(cmd, 10);
1381 cmd[10] = crc & 0xff;
1382 cmd[11] = crc >> 8;
1383
1384 CodeIso15693AsTag(cmd, sizeof(cmd));
1385 }
1386
1387 // Universal Method for sending to and recv bytes from a tag
1388 // init ... should we initialize the reader?
1389 // speed ... 0 low speed, 1 hi speed
1390 // *recv will contain the tag's answer
1391 // return: length of received data, or -1 for timeout
1392 int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t *recv, uint16_t max_recv_len, uint32_t start_time, uint32_t *eof_time) {
1393
1394 if (init) {
1395 Iso15693InitReader();
1396 StartCountSspClk();
1397 }
1398
1399 int answerLen = 0;
1400
1401 if (!speed) {
1402 // low speed (1 out of 256)
1403 CodeIso15693AsReader256(send, sendlen);
1404 } else {
1405 // high speed (1 out of 4)
1406 CodeIso15693AsReader(send, sendlen);
1407 }
1408
1409 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1410
1411 // Now wait for a response
1412 if (recv != NULL) {
1413 answerLen = GetIso15693AnswerFromTag(recv, max_recv_len, ISO15693_READER_TIMEOUT, eof_time);
1414 }
1415
1416 return answerLen;
1417 }
1418
1419
1420 // --------------------------------------------------------------------
1421 // Debug Functions
1422 // --------------------------------------------------------------------
1423
1424 // Decodes a message from a tag and displays its metadata and content
1425 #define DBD15STATLEN 48
1426 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1427 char status[DBD15STATLEN+1]={0};
1428 uint16_t crc;
1429
1430 if (len > 3) {
1431 if (d[0] & ISO15693_RES_EXT)
1432 strncat(status,"ProtExt ", DBD15STATLEN);
1433 if (d[0] & ISO15693_RES_ERROR) {
1434 // error
1435 strncat(status,"Error ", DBD15STATLEN);
1436 switch (d[1]) {
1437 case 0x01:
1438 strncat(status,"01:notSupp", DBD15STATLEN);
1439 break;
1440 case 0x02:
1441 strncat(status,"02:notRecog", DBD15STATLEN);
1442 break;
1443 case 0x03:
1444 strncat(status,"03:optNotSupp", DBD15STATLEN);
1445 break;
1446 case 0x0f:
1447 strncat(status,"0f:noInfo", DBD15STATLEN);
1448 break;
1449 case 0x10:
1450 strncat(status,"10:doesn'tExist", DBD15STATLEN);
1451 break;
1452 case 0x11:
1453 strncat(status,"11:lockAgain", DBD15STATLEN);
1454 break;
1455 case 0x12:
1456 strncat(status,"12:locked", DBD15STATLEN);
1457 break;
1458 case 0x13:
1459 strncat(status,"13:progErr", DBD15STATLEN);
1460 break;
1461 case 0x14:
1462 strncat(status,"14:lockErr", DBD15STATLEN);
1463 break;
1464 default:
1465 strncat(status,"unknownErr", DBD15STATLEN);
1466 }
1467 strncat(status," ", DBD15STATLEN);
1468 } else {
1469 strncat(status,"NoErr ", DBD15STATLEN);
1470 }
1471
1472 crc=Iso15693Crc(d,len-2);
1473 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1474 strncat(status,"CrcOK",DBD15STATLEN);
1475 else
1476 strncat(status,"CrcFail!",DBD15STATLEN);
1477
1478 Dbprintf("%s",status);
1479 }
1480 }
1481
1482
1483
1484 ///////////////////////////////////////////////////////////////////////
1485 // Functions called via USB/Client
1486 ///////////////////////////////////////////////////////////////////////
1487
1488 void SetDebugIso15693(uint32_t debug) {
1489 DEBUG=debug;
1490 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1491 return;
1492 }
1493
1494
1495 //---------------------------------------------------------------------------------------
1496 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector.
1497 // all demodulation performed in arm rather than host. - greg
1498 //---------------------------------------------------------------------------------------
1499 void ReaderIso15693(uint32_t parameter) {
1500
1501 LED_A_ON();
1502
1503 set_tracing(true);
1504
1505 int answerLen = 0;
1506 uint8_t TagUID[8] = {0x00};
1507
1508 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1509
1510 uint8_t answer[ISO15693_MAX_RESPONSE_LENGTH];
1511
1512 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1513 // Setup SSC
1514 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER);
1515
1516 // Start from off (no field generated)
1517 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1518 SpinDelay(200);
1519
1520 // Give the tags time to energize
1521 LED_D_ON();
1522 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER);
1523 SpinDelay(200);
1524 StartCountSspClk();
1525
1526
1527 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1528 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1529
1530 // Now send the IDENTIFY command
1531 BuildIdentifyRequest();
1532 uint32_t start_time = 0;
1533 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1534
1535 // Now wait for a response
1536 uint32_t eof_time;
1537 answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time) ;
1538 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1539
1540 if (answerLen >=12) // we should do a better check than this
1541 {
1542 TagUID[0] = answer[2];
1543 TagUID[1] = answer[3];
1544 TagUID[2] = answer[4];
1545 TagUID[3] = answer[5];
1546 TagUID[4] = answer[6];
1547 TagUID[5] = answer[7];
1548 TagUID[6] = answer[8]; // IC Manufacturer code
1549 TagUID[7] = answer[9]; // always E0
1550
1551 }
1552
1553 Dbprintf("%d octets read from IDENTIFY request:", answerLen);
1554 DbdecodeIso15693Answer(answerLen, answer);
1555 Dbhexdump(answerLen, answer, false);
1556
1557 // UID is reverse
1558 if (answerLen >= 12)
1559 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1560 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1561 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1562
1563
1564 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1565 // DbdecodeIso15693Answer(answerLen2,answer2);
1566 // Dbhexdump(answerLen2,answer2,true);
1567
1568 // Dbprintf("%d octets read from XXX request:", answerLen3);
1569 // DbdecodeIso15693Answer(answerLen3,answer3);
1570 // Dbhexdump(answerLen3,answer3,true);
1571
1572 // read all pages
1573 if (answerLen >= 12 && DEBUG) {
1574 for (int i = 0; i < 32; i++) { // sanity check, assume max 32 pages
1575 BuildReadBlockRequest(TagUID, i);
1576 TransmitTo15693Tag(ToSend, ToSendMax, &start_time);
1577 int answerLen = GetIso15693AnswerFromTag(answer, sizeof(answer), DELAY_ISO15693_VCD_TO_VICC_READER * 2, &eof_time);
1578 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1579 if (answerLen > 0) {
1580 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen);
1581 DbdecodeIso15693Answer(answerLen, answer);
1582 Dbhexdump(answerLen, answer, false);
1583 if ( *((uint32_t*) answer) == 0x07160101 ) break; // exit on NoPageErr
1584 }
1585 }
1586 }
1587
1588 // for the time being, switch field off to protect rdv4.0
1589 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1590 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1591 LED_D_OFF();
1592
1593 LED_A_OFF();
1594 }
1595
1596
1597 // Simulate an ISO15693 TAG.
1598 // For Inventory command: print command and send Inventory Response with given UID
1599 // TODO: interpret other reader commands and send appropriate response
1600 void SimTagIso15693(uint32_t parameter, uint8_t *uid) {
1601
1602 LED_A_ON();
1603
1604 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1605 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1606 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1607 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1608
1609 StartCountSspClk();
1610
1611 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1612
1613 // Build a suitable response to the reader INVENTORY command
1614 BuildInventoryResponse(uid);
1615
1616 // Listen to reader
1617 while (!BUTTON_PRESS()) {
1618 uint32_t eof_time = 0, start_time = 0;
1619 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1620
1621 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1622 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1623 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC_SIM;
1624 TransmitTo15693Reader(ToSend, ToSendMax, &start_time, 0, slow);
1625 }
1626
1627 Dbprintf("%d bytes read from reader:", cmd_len);
1628 Dbhexdump(cmd_len, cmd, false);
1629 }
1630
1631 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1632 LED_D_OFF();
1633 LED_A_OFF();
1634 }
1635
1636
1637 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1638 // (some manufactures offer a way to read the AFI, though)
1639 void BruteforceIso15693Afi(uint32_t speed)
1640 {
1641 LED_A_ON();
1642
1643 uint8_t data[6];
1644 uint8_t recv[ISO15693_MAX_RESPONSE_LENGTH];
1645 int datalen = 0, recvlen = 0;
1646 uint32_t eof_time;
1647
1648 // first without AFI
1649 // Tags should respond without AFI and with AFI=0 even when AFI is active
1650
1651 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1652 data[1] = ISO15693_INVENTORY;
1653 data[2] = 0; // mask length
1654 datalen = Iso15693AddCrc(data,3);
1655 uint32_t start_time = GetCountSspClk();
1656 recvlen = SendDataTag(data, datalen, true, speed, recv, sizeof(recv), 0, &eof_time);
1657 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1658 WDT_HIT();
1659 if (recvlen>=12) {
1660 Dbprintf("NoAFI UID=%s", Iso15693sprintUID(NULL, &recv[2]));
1661 }
1662
1663 // now with AFI
1664
1665 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1666 data[1] = ISO15693_INVENTORY;
1667 data[2] = 0; // AFI
1668 data[3] = 0; // mask length
1669
1670 for (int i = 0; i < 256; i++) {
1671 data[2] = i & 0xFF;
1672 datalen = Iso15693AddCrc(data,4);
1673 recvlen = SendDataTag(data, datalen, false, speed, recv, sizeof(recv), start_time, &eof_time);
1674 start_time = eof_time + DELAY_ISO15693_VICC_TO_VCD_READER;
1675 WDT_HIT();
1676 if (recvlen >= 12) {
1677 Dbprintf("AFI=%i UID=%s", i, Iso15693sprintUID(NULL, &recv[2]));
1678 }
1679 }
1680 Dbprintf("AFI Bruteforcing done.");
1681
1682 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1683 LED_D_OFF();
1684 LED_A_OFF();
1685
1686 }
1687
1688 // Allows to directly send commands to the tag via the client
1689 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1690
1691 LED_A_ON();
1692
1693 int recvlen = 0;
1694 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1695 uint32_t eof_time;
1696
1697 if (DEBUG) {
1698 Dbprintf("SEND:");
1699 Dbhexdump(datalen, data, false);
1700 }
1701
1702 recvlen = SendDataTag(data, datalen, true, speed, (recv?recvbuf:NULL), sizeof(recvbuf), 0, &eof_time);
1703
1704 // for the time being, switch field off to protect rdv4.0
1705 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1706 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1707 LED_D_OFF();
1708
1709 if (recv) {
1710 if (DEBUG) {
1711 Dbprintf("RECV:");
1712 if (recvlen > 0) {
1713 Dbhexdump(recvlen, recvbuf, false);
1714 DbdecodeIso15693Answer(recvlen, recvbuf);
1715 }
1716 }
1717 if (recvlen > ISO15693_MAX_RESPONSE_LENGTH) {
1718 recvlen = ISO15693_MAX_RESPONSE_LENGTH;
1719 }
1720 cmd_send(CMD_ACK, recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1721 }
1722
1723 LED_A_OFF();
1724 }
1725
1726 //-----------------------------------------------------------------------------
1727 // Work with "magic Chinese" card.
1728 //
1729 //-----------------------------------------------------------------------------
1730
1731 // Set the UID to the tag (based on Iceman work).
1732 void SetTag15693Uid(uint8_t *uid) {
1733
1734 LED_A_ON();
1735
1736 uint8_t cmd[4][9] = {0x00};
1737 uint16_t crc;
1738
1739 int recvlen = 0;
1740 uint8_t recvbuf[ISO15693_MAX_RESPONSE_LENGTH];
1741 uint32_t eof_time;
1742
1743 // Command 1 : 02213E00000000
1744 cmd[0][0] = 0x02;
1745 cmd[0][1] = 0x21;
1746 cmd[0][2] = 0x3e;
1747 cmd[0][3] = 0x00;
1748 cmd[0][4] = 0x00;
1749 cmd[0][5] = 0x00;
1750 cmd[0][6] = 0x00;
1751
1752 // Command 2 : 02213F69960000
1753 cmd[1][0] = 0x02;
1754 cmd[1][1] = 0x21;
1755 cmd[1][2] = 0x3f;
1756 cmd[1][3] = 0x69;
1757 cmd[1][4] = 0x96;
1758 cmd[1][5] = 0x00;
1759 cmd[1][6] = 0x00;
1760
1761 // Command 3 : 022138u8u7u6u5 (where uX = uid byte X)
1762 cmd[2][0] = 0x02;
1763 cmd[2][1] = 0x21;
1764 cmd[2][2] = 0x38;
1765 cmd[2][3] = uid[7];
1766 cmd[2][4] = uid[6];
1767 cmd[2][5] = uid[5];
1768 cmd[2][6] = uid[4];
1769
1770 // Command 4 : 022139u4u3u2u1 (where uX = uid byte X)
1771 cmd[3][0] = 0x02;
1772 cmd[3][1] = 0x21;
1773 cmd[3][2] = 0x39;
1774 cmd[3][3] = uid[3];
1775 cmd[3][4] = uid[2];
1776 cmd[3][5] = uid[1];
1777 cmd[3][6] = uid[0];
1778
1779 for (int i = 0; i < 4; i++) {
1780 // Add the CRC
1781 crc = Iso15693Crc(cmd[i], 7);
1782 cmd[i][7] = crc & 0xff;
1783 cmd[i][8] = crc >> 8;
1784
1785 if (DEBUG) {
1786 Dbprintf("SEND:");
1787 Dbhexdump(sizeof(cmd[i]), cmd[i], false);
1788 }
1789
1790 recvlen = SendDataTag(cmd[i], sizeof(cmd[i]), true, 1, recvbuf, sizeof(recvbuf), 0, &eof_time);
1791
1792 if (DEBUG) {
1793 Dbprintf("RECV:");
1794 if (recvlen > 0) {
1795 Dbhexdump(recvlen, recvbuf, false);
1796 DbdecodeIso15693Answer(recvlen, recvbuf);
1797 }
1798 }
1799
1800 cmd_send(CMD_ACK, recvlen>ISO15693_MAX_RESPONSE_LENGTH?ISO15693_MAX_RESPONSE_LENGTH:recvlen, 0, 0, recvbuf, ISO15693_MAX_RESPONSE_LENGTH);
1801 }
1802
1803 LED_A_OFF();
1804 }
1805
1806
1807
1808 // --------------------------------------------------------------------
1809 // -- Misc & deprecated functions
1810 // --------------------------------------------------------------------
1811
1812 /*
1813
1814 // do not use; has a fix UID
1815 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1816 {
1817 uint8_t cmd[12];
1818
1819 uint16_t crc;
1820 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1821 // followed by the block data
1822 // one sub-carrier, inventory, 1 slot, fast rate
1823 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1824 // System Information command code
1825 cmd[1] = 0x2B;
1826 // UID may be optionally specified here
1827 // 64-bit UID
1828 cmd[2] = 0x32;
1829 cmd[3]= 0x4b;
1830 cmd[4] = 0x03;
1831 cmd[5] = 0x01;
1832 cmd[6] = 0x00;
1833 cmd[7] = 0x10;
1834 cmd[8] = 0x05;
1835 cmd[9]= 0xe0; // always e0 (not exactly unique)
1836 //Now the CRC
1837 crc = Iso15693Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1838 cmd[10] = crc & 0xff;
1839 cmd[11] = crc >> 8;
1840
1841 CodeIso15693AsReader(cmd, sizeof(cmd));
1842 }
1843
1844
1845 // do not use; has a fix UID
1846 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1847 {
1848 uint8_t cmd[14];
1849
1850 uint16_t crc;
1851 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1852 // followed by the block data
1853 // one sub-carrier, inventory, 1 slot, fast rate
1854 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1855 // READ Multi BLOCK command code
1856 cmd[1] = 0x23;
1857 // UID may be optionally specified here
1858 // 64-bit UID
1859 cmd[2] = 0x32;
1860 cmd[3]= 0x4b;
1861 cmd[4] = 0x03;
1862 cmd[5] = 0x01;
1863 cmd[6] = 0x00;
1864 cmd[7] = 0x10;
1865 cmd[8] = 0x05;
1866 cmd[9]= 0xe0; // always e0 (not exactly unique)
1867 // First Block number to read
1868 cmd[10] = 0x00;
1869 // Number of Blocks to read
1870 cmd[11] = 0x2f; // read quite a few
1871 //Now the CRC
1872 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1873 cmd[12] = crc & 0xff;
1874 cmd[13] = crc >> 8;
1875
1876 CodeIso15693AsReader(cmd, sizeof(cmd));
1877 }
1878
1879 // do not use; has a fix UID
1880 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1881 {
1882 uint8_t cmd[14];
1883
1884 uint16_t crc;
1885 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1886 // followed by the block data
1887 // one sub-carrier, inventory, 1 slot, fast rate
1888 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1889 // READ BLOCK command code
1890 cmd[1] = CmdCode;
1891 // UID may be optionally specified here
1892 // 64-bit UID
1893 cmd[2] = 0x32;
1894 cmd[3]= 0x4b;
1895 cmd[4] = 0x03;
1896 cmd[5] = 0x01;
1897 cmd[6] = 0x00;
1898 cmd[7] = 0x10;
1899 cmd[8] = 0x05;
1900 cmd[9]= 0xe0; // always e0 (not exactly unique)
1901 // Parameter
1902 cmd[10] = 0x00;
1903 cmd[11] = 0x0a;
1904
1905 // cmd[12] = 0x00;
1906 // cmd[13] = 0x00; //Now the CRC
1907 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1908 cmd[12] = crc & 0xff;
1909 cmd[13] = crc >> 8;
1910
1911 CodeIso15693AsReader(cmd, sizeof(cmd));
1912 }
1913
1914 // do not use; has a fix UID
1915 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1916 {
1917 uint8_t cmd[14];
1918
1919 uint16_t crc;
1920 // If we set the Option_Flag in this request, the VICC will respond with the security status of the block
1921 // followed by the block data
1922 // one sub-carrier, inventory, 1 slot, fast rate
1923 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1924 // READ BLOCK command code
1925 cmd[1] = CmdCode;
1926 // UID may be optionally specified here
1927 // 64-bit UID
1928 cmd[2] = 0x32;
1929 cmd[3]= 0x4b;
1930 cmd[4] = 0x03;
1931 cmd[5] = 0x01;
1932 cmd[6] = 0x00;
1933 cmd[7] = 0x10;
1934 cmd[8] = 0x05;
1935 cmd[9]= 0xe0; // always e0 (not exactly unique)
1936 // Parameter
1937 cmd[10] = 0x05; // for custom codes this must be manufacturer code
1938 cmd[11] = 0x00;
1939
1940 // cmd[12] = 0x00;
1941 // cmd[13] = 0x00; //Now the CRC
1942 crc = Iso15693Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1943 cmd[12] = crc & 0xff;
1944 cmd[13] = crc >> 8;
1945
1946 CodeIso15693AsReader(cmd, sizeof(cmd));
1947 }
1948
1949
1950
1951
1952 */
1953
1954
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