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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "cmd.h"
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22 #include "BigBuf.h"
23 static uint32_t iso14a_timeout;
24 int rsamples = 0;
25 uint8_t trigger = 0;
26 // the block number for the ISO14443-4 PCB
27 static uint8_t iso14_pcb_blocknum = 0;
28
29 //
30 // ISO14443 timing:
31 //
32 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
33 #define REQUEST_GUARD_TIME (7000/16 + 1)
34 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
35 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
36 // bool LastCommandWasRequest = FALSE;
37
38 //
39 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
40 //
41 // When the PM acts as reader and is receiving tag data, it takes
42 // 3 ticks delay in the AD converter
43 // 16 ticks until the modulation detector completes and sets curbit
44 // 8 ticks until bit_to_arm is assigned from curbit
45 // 8*16 ticks for the transfer from FPGA to ARM
46 // 4*16 ticks until we measure the time
47 // - 8*16 ticks because we measure the time of the previous transfer
48 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
49
50 // When the PM acts as a reader and is sending, it takes
51 // 4*16 ticks until we can write data to the sending hold register
52 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
53 // 8 ticks until the first transfer starts
54 // 8 ticks later the FPGA samples the data
55 // 1 tick to assign mod_sig_coil
56 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
57
58 // When the PM acts as tag and is receiving it takes
59 // 2 ticks delay in the RF part (for the first falling edge),
60 // 3 ticks for the A/D conversion,
61 // 8 ticks on average until the start of the SSC transfer,
62 // 8 ticks until the SSC samples the first data
63 // 7*16 ticks to complete the transfer from FPGA to ARM
64 // 8 ticks until the next ssp_clk rising edge
65 // 4*16 ticks until we measure the time
66 // - 8*16 ticks because we measure the time of the previous transfer
67 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
68
69 // The FPGA will report its internal sending delay in
70 uint16_t FpgaSendQueueDelay;
71 // the 5 first bits are the number of bits buffered in mod_sig_buf
72 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
73 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
74
75 // When the PM acts as tag and is sending, it takes
76 // 4*16 ticks until we can write data to the sending hold register
77 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
78 // 8 ticks until the first transfer starts
79 // 8 ticks later the FPGA samples the data
80 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
81 // + 1 tick to assign mod_sig_coil
82 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
83
84 // When the PM acts as sniffer and is receiving tag data, it takes
85 // 3 ticks A/D conversion
86 // 14 ticks to complete the modulation detection
87 // 8 ticks (on average) until the result is stored in to_arm
88 // + the delays in transferring data - which is the same for
89 // sniffing reader and tag data and therefore not relevant
90 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
91
92 // When the PM acts as sniffer and is receiving reader data, it takes
93 // 2 ticks delay in analogue RF receiver (for the falling edge of the
94 // start bit, which marks the start of the communication)
95 // 3 ticks A/D conversion
96 // 8 ticks on average until the data is stored in to_arm.
97 // + the delays in transferring data - which is the same for
98 // sniffing reader and tag data and therefore not relevant
99 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
100
101 //variables used for timing purposes:
102 //these are in ssp_clk cycles:
103 static uint32_t NextTransferTime;
104 static uint32_t LastTimeProxToAirStart;
105 static uint32_t LastProxToAirDuration;
106
107
108
109 // CARD TO READER - manchester
110 // Sequence D: 11110000 modulation with subcarrier during first half
111 // Sequence E: 00001111 modulation with subcarrier during second half
112 // Sequence F: 00000000 no modulation with subcarrier
113 // READER TO CARD - miller
114 // Sequence X: 00001100 drop after half a period
115 // Sequence Y: 00000000 no drop
116 // Sequence Z: 11000000 drop at start
117 #define SEC_D 0xf0
118 #define SEC_E 0x0f
119 #define SEC_F 0x00
120 #define SEC_X 0x0c
121 #define SEC_Y 0x00
122 #define SEC_Z 0xc0
123
124 const uint8_t OddByteParity[256] = {
125 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
126 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
127 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
141 };
142
143
144 void iso14a_set_trigger(bool enable) {
145 trigger = enable;
146 }
147
148
149 void iso14a_set_timeout(uint32_t timeout) {
150 iso14a_timeout = timeout;
151 if(MF_DBGLEVEL >= 3) Dbprintf("ISO14443A Timeout set to %ld (%dms)", iso14a_timeout, iso14a_timeout / 106);
152 }
153
154
155 void iso14a_set_ATS_timeout(uint8_t *ats) {
156
157 uint8_t tb1;
158 uint8_t fwi;
159 uint32_t fwt;
160
161 if (ats[0] > 1) { // there is a format byte T0
162 if ((ats[1] & 0x20) == 0x20) { // there is an interface byte TB(1)
163 if ((ats[1] & 0x10) == 0x10) { // there is an interface byte TA(1) preceding TB(1)
164 tb1 = ats[3];
165 } else {
166 tb1 = ats[2];
167 }
168 fwi = (tb1 & 0xf0) >> 4; // frame waiting indicator (FWI)
169 fwt = 256 * 16 * (1 << fwi); // frame waiting time (FWT) in 1/fc
170
171 iso14a_set_timeout(fwt/(8*16));
172 }
173 }
174 }
175
176
177 //-----------------------------------------------------------------------------
178 // Generate the parity value for a byte sequence
179 //
180 //-----------------------------------------------------------------------------
181 byte_t oddparity (const byte_t bt)
182 {
183 return OddByteParity[bt];
184 }
185
186 void GetParity(const uint8_t *pbtCmd, uint16_t iLen, uint8_t *par)
187 {
188 uint16_t paritybit_cnt = 0;
189 uint16_t paritybyte_cnt = 0;
190 uint8_t parityBits = 0;
191
192 for (uint16_t i = 0; i < iLen; i++) {
193 // Generate the parity bits
194 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
195 if (paritybit_cnt == 7) {
196 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
197 parityBits = 0; // and advance to next Parity Byte
198 paritybyte_cnt++;
199 paritybit_cnt = 0;
200 } else {
201 paritybit_cnt++;
202 }
203 }
204
205 // save remaining parity bits
206 par[paritybyte_cnt] = parityBits;
207
208 }
209
210 void AppendCrc14443a(uint8_t* data, int len)
211 {
212 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
213 }
214
215 void AppendCrc14443b(uint8_t* data, int len)
216 {
217 ComputeCrc14443(CRC_14443_B,data,len,data+len,data+len+1);
218 }
219
220
221 //=============================================================================
222 // ISO 14443 Type A - Miller decoder
223 //=============================================================================
224 // Basics:
225 // This decoder is used when the PM3 acts as a tag.
226 // The reader will generate "pauses" by temporarily switching of the field.
227 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
228 // The FPGA does a comparison with a threshold and would deliver e.g.:
229 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
230 // The Miller decoder needs to identify the following sequences:
231 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
232 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
233 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
234 // Note 1: the bitstream may start at any time. We therefore need to sync.
235 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
236 //-----------------------------------------------------------------------------
237 static tUart Uart;
238
239 // Lookup-Table to decide if 4 raw bits are a modulation.
240 // We accept the following:
241 // 0001 - a 3 tick wide pause
242 // 0011 - a 2 tick wide pause, or a three tick wide pause shifted left
243 // 0111 - a 2 tick wide pause shifted left
244 // 1001 - a 2 tick wide pause shifted right
245 const bool Mod_Miller_LUT[] = {
246 FALSE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, TRUE,
247 FALSE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
248 };
249 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x000000F0) >> 4])
250 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x0000000F)])
251
252 void UartReset()
253 {
254 Uart.state = STATE_UNSYNCD;
255 Uart.bitCount = 0;
256 Uart.len = 0; // number of decoded data bytes
257 Uart.parityLen = 0; // number of decoded parity bytes
258 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
259 Uart.parityBits = 0; // holds 8 parity bits
260 Uart.startTime = 0;
261 Uart.endTime = 0;
262
263 Uart.byteCntMax = 0;
264 Uart.posCnt = 0;
265 Uart.syncBit = 9999;
266 }
267
268 void UartInit(uint8_t *data, uint8_t *parity)
269 {
270 Uart.output = data;
271 Uart.parity = parity;
272 Uart.fourBits = 0x00000000; // clear the buffer for 4 Bits
273 UartReset();
274 }
275
276 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
277 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
278 {
279
280 Uart.fourBits = (Uart.fourBits << 8) | bit;
281
282 if (Uart.state == STATE_UNSYNCD) { // not yet synced
283
284 Uart.syncBit = 9999; // not set
285
286 // 00x11111 2|3 ticks pause followed by 6|5 ticks unmodulated Sequence Z (a "0" or "start of communication")
287 // 11111111 8 ticks unmodulation Sequence Y (a "0" or "end of communication" or "no information")
288 // 111100x1 4 ticks unmodulated followed by 2|3 ticks pause Sequence X (a "1")
289
290 // The start bit is one ore more Sequence Y followed by a Sequence Z (... 11111111 00x11111). We need to distinguish from
291 // Sequence X followed by Sequence Y followed by Sequence Z (111100x1 11111111 00x11111)
292 // we therefore look for a ...xx1111 11111111 00x11111xxxxxx... pattern
293 // (12 '1's followed by 2 '0's, eventually followed by another '0', followed by 5 '1's)
294 //
295 #define ISO14443A_STARTBIT_MASK 0x07FFEF80 // mask is 00001111 11111111 1110 1111 10000000
296 #define ISO14443A_STARTBIT_PATTERN 0x07FF8F80 // pattern is 00001111 11111111 1000 1111 10000000
297
298 if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 0)) == ISO14443A_STARTBIT_PATTERN >> 0) Uart.syncBit = 7;
299 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 1)) == ISO14443A_STARTBIT_PATTERN >> 1) Uart.syncBit = 6;
300 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 2)) == ISO14443A_STARTBIT_PATTERN >> 2) Uart.syncBit = 5;
301 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 3)) == ISO14443A_STARTBIT_PATTERN >> 3) Uart.syncBit = 4;
302 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 4)) == ISO14443A_STARTBIT_PATTERN >> 4) Uart.syncBit = 3;
303 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 5)) == ISO14443A_STARTBIT_PATTERN >> 5) Uart.syncBit = 2;
304 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 6)) == ISO14443A_STARTBIT_PATTERN >> 6) Uart.syncBit = 1;
305 else if ((Uart.fourBits & (ISO14443A_STARTBIT_MASK >> 7)) == ISO14443A_STARTBIT_PATTERN >> 7) Uart.syncBit = 0;
306
307 if (Uart.syncBit != 9999) { // found a sync bit
308 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
309 Uart.startTime -= Uart.syncBit;
310 Uart.endTime = Uart.startTime;
311 Uart.state = STATE_START_OF_COMMUNICATION;
312 }
313
314 } else {
315
316 if (IsMillerModulationNibble1(Uart.fourBits >> Uart.syncBit)) {
317 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation in both halves - error
318 UartReset();
319 } else { // Modulation in first half = Sequence Z = logic "0"
320 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
321 UartReset();
322 } else {
323 Uart.bitCount++;
324 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
325 Uart.state = STATE_MILLER_Z;
326 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
327 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
328 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
329 Uart.parityBits <<= 1; // make room for the parity bit
330 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
331 Uart.bitCount = 0;
332 Uart.shiftReg = 0;
333 if((Uart.len&0x0007) == 0) { // every 8 data bytes
334 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
335 Uart.parityBits = 0;
336 }
337 }
338 }
339 }
340 } else {
341 if (IsMillerModulationNibble2(Uart.fourBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
342 Uart.bitCount++;
343 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
344 Uart.state = STATE_MILLER_X;
345 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
346 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
347 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
348 Uart.parityBits <<= 1; // make room for the new parity bit
349 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
350 Uart.bitCount = 0;
351 Uart.shiftReg = 0;
352 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
353 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
354 Uart.parityBits = 0;
355 }
356 }
357 } else { // no modulation in both halves - Sequence Y
358 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
359 Uart.state = STATE_UNSYNCD;
360 Uart.bitCount--; // last "0" was part of EOC sequence
361 Uart.shiftReg <<= 1; // drop it
362 if(Uart.bitCount > 0) { // if we decoded some bits
363 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
364 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
365 Uart.parityBits <<= 1; // add a (void) parity bit
366 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align parity bits
367 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
368 return TRUE;
369 } else if (Uart.len & 0x0007) { // there are some parity bits to store
370 Uart.parityBits <<= (8 - (Uart.len&0x0007)); // left align remaining parity bits
371 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
372 }
373 if (Uart.len) {
374 return TRUE; // we are finished with decoding the raw data sequence
375 } else {
376 UartReset(); // Nothing received - start over
377 }
378 }
379 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
380 UartReset();
381 } else { // a logic "0"
382 Uart.bitCount++;
383 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
384 Uart.state = STATE_MILLER_Y;
385 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
386 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
387 Uart.parityBits <<= 1; // make room for the parity bit
388 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
389 Uart.bitCount = 0;
390 Uart.shiftReg = 0;
391 if ((Uart.len&0x0007) == 0) { // every 8 data bytes
392 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
393 Uart.parityBits = 0;
394 }
395 }
396 }
397 }
398 }
399
400 }
401
402 return FALSE; // not finished yet, need more data
403 }
404
405
406
407 //=============================================================================
408 // ISO 14443 Type A - Manchester decoder
409 //=============================================================================
410 // Basics:
411 // This decoder is used when the PM3 acts as a reader.
412 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
413 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
414 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
415 // The Manchester decoder needs to identify the following sequences:
416 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
417 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
418 // 8 ticks unmodulated: Sequence F = end of communication
419 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
420 // Note 1: the bitstream may start at any time. We therefore need to sync.
421 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
422 static tDemod Demod;
423
424 // Lookup-Table to decide if 4 raw bits are a modulation.
425 // We accept three or four "1" in any position
426 const bool Mod_Manchester_LUT[] = {
427 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
428 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
429 };
430
431 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
432 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
433
434
435 void DemodReset()
436 {
437 Demod.state = DEMOD_UNSYNCD;
438 Demod.len = 0; // number of decoded data bytes
439 Demod.parityLen = 0;
440 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
441 Demod.parityBits = 0; //
442 Demod.collisionPos = 0; // Position of collision bit
443 Demod.twoBits = 0xffff; // buffer for 2 Bits
444 Demod.highCnt = 0;
445 Demod.startTime = 0;
446 Demod.endTime = 0;
447
448 //
449 Demod.bitCount = 0;
450 Demod.syncBit = 0xFFFF;
451 Demod.samples = 0;
452 }
453
454 void DemodInit(uint8_t *data, uint8_t *parity)
455 {
456 Demod.output = data;
457 Demod.parity = parity;
458 DemodReset();
459 }
460
461 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
462 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
463 {
464
465 Demod.twoBits = (Demod.twoBits << 8) | bit;
466
467 if (Demod.state == DEMOD_UNSYNCD) {
468
469 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
470 if (Demod.twoBits == 0x0000) {
471 Demod.highCnt++;
472 } else {
473 Demod.highCnt = 0;
474 }
475 } else {
476 Demod.syncBit = 0xFFFF; // not set
477 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
478 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
479 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
480 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
481 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
482 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
483 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
484 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
485 if (Demod.syncBit != 0xFFFF) {
486 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
487 Demod.startTime -= Demod.syncBit;
488 Demod.bitCount = offset; // number of decoded data bits
489 Demod.state = DEMOD_MANCHESTER_DATA;
490 }
491 }
492
493 } else {
494
495 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
496 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
497 if (!Demod.collisionPos) {
498 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
499 }
500 } // modulation in first half only - Sequence D = 1
501 Demod.bitCount++;
502 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
503 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
504 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
505 Demod.parityBits <<= 1; // make room for the parity bit
506 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
507 Demod.bitCount = 0;
508 Demod.shiftReg = 0;
509 if((Demod.len&0x0007) == 0) { // every 8 data bytes
510 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
511 Demod.parityBits = 0;
512 }
513 }
514 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
515 } else { // no modulation in first half
516 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
517 Demod.bitCount++;
518 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
519 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
520 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
521 Demod.parityBits <<= 1; // make room for the new parity bit
522 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
523 Demod.bitCount = 0;
524 Demod.shiftReg = 0;
525 if ((Demod.len&0x0007) == 0) { // every 8 data bytes
526 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
527 Demod.parityBits = 0;
528 }
529 }
530 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
531 } else { // no modulation in both halves - End of communication
532 if(Demod.bitCount > 0) { // there are some remaining data bits
533 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
534 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
535 Demod.parityBits <<= 1; // add a (void) parity bit
536 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
537 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
538 return TRUE;
539 } else if (Demod.len & 0x0007) { // there are some parity bits to store
540 Demod.parityBits <<= (8 - (Demod.len&0x0007)); // left align remaining parity bits
541 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
542 }
543 if (Demod.len) {
544 return TRUE; // we are finished with decoding the raw data sequence
545 } else { // nothing received. Start over
546 DemodReset();
547 }
548 }
549 }
550 }
551 return FALSE; // not finished yet, need more data
552 }
553
554 //=============================================================================
555 // Finally, a `sniffer' for ISO 14443 Type A
556 // Both sides of communication!
557 //=============================================================================
558
559 //-----------------------------------------------------------------------------
560 // Record the sequence of commands sent by the reader to the tag, with
561 // triggering so that we start recording at the point that the tag is moved
562 // near the reader.
563 //-----------------------------------------------------------------------------
564 void RAMFUNC SniffIso14443a(uint8_t param) {
565 // param:
566 // bit 0 - trigger from first card answer
567 // bit 1 - trigger from first reader 7-bit request
568
569 LEDsoff();
570
571 // We won't start recording the frames that we acquire until we trigger;
572 // a good trigger condition to get started is probably when we see a
573 // response from the tag.
574 // triggered == FALSE -- to wait first for card
575 bool triggered = !(param & 0x03);
576
577 // Allocate memory from BigBuf for some buffers
578 // free all previous allocations first
579 BigBuf_free();
580
581 // The command (reader -> tag) that we're receiving.
582 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
583 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
584
585 // The response (tag -> reader) that we're receiving.
586 uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
587 uint8_t *receivedResponsePar = BigBuf_malloc(MAX_PARITY_SIZE);
588
589 // The DMA buffer, used to stream samples from the FPGA
590 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
591
592 // init trace buffer
593 clear_trace();
594 set_tracing(TRUE);
595
596 uint8_t *data = dmaBuf;
597 uint8_t previous_data = 0;
598 int maxDataLen = 0;
599 int dataLen = 0;
600 bool TagIsActive = FALSE;
601 bool ReaderIsActive = FALSE;
602
603 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
604
605 // Set up the demodulator for tag -> reader responses.
606 DemodInit(receivedResponse, receivedResponsePar);
607
608 // Set up the demodulator for the reader -> tag commands
609 UartInit(receivedCmd, receivedCmdPar);
610
611 // Setup and start DMA.
612 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
613
614 // And now we loop, receiving samples.
615 for(uint32_t rsamples = 0; TRUE; ) {
616
617 if(BUTTON_PRESS()) {
618 DbpString("cancelled by button");
619 break;
620 }
621
622 LED_A_ON();
623 WDT_HIT();
624
625 int register readBufDataP = data - dmaBuf;
626 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
627 if (readBufDataP <= dmaBufDataP){
628 dataLen = dmaBufDataP - readBufDataP;
629 } else {
630 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
631 }
632 // test for length of buffer
633 if(dataLen > maxDataLen) {
634 maxDataLen = dataLen;
635 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
636 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
637 break;
638 }
639 }
640 if(dataLen < 1) continue;
641
642 // primary buffer was stopped( <-- we lost data!
643 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
644 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
645 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
646 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
647 }
648 // secondary buffer sets as primary, secondary buffer was stopped
649 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
650 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
651 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
652 }
653
654 LED_A_OFF();
655
656 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
657
658 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
659 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
660 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
661 LED_C_ON();
662
663 // check - if there is a short 7bit request from reader
664 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
665
666 if(triggered) {
667 if (!LogTrace(receivedCmd,
668 Uart.len,
669 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
670 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
671 Uart.parity,
672 TRUE)) break;
673 }
674 /* And ready to receive another command. */
675 UartReset();
676 //UartInit(receivedCmd, receivedCmdPar);
677 /* And also reset the demod code, which might have been */
678 /* false-triggered by the commands from the reader. */
679 DemodReset();
680 LED_B_OFF();
681 }
682 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
683 }
684
685 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
686 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
687 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
688 LED_B_ON();
689
690 if (!LogTrace(receivedResponse,
691 Demod.len,
692 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
693 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
694 Demod.parity,
695 FALSE)) break;
696
697 if ((!triggered) && (param & 0x01)) triggered = TRUE;
698
699 // And ready to receive another response.
700 DemodReset();
701 // And reset the Miller decoder including itS (now outdated) input buffer
702 UartInit(receivedCmd, receivedCmdPar);
703
704 LED_C_OFF();
705 }
706 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
707 }
708 }
709
710 previous_data = *data;
711 rsamples++;
712 data++;
713 if(data == dmaBuf + DMA_BUFFER_SIZE) {
714 data = dmaBuf;
715 }
716 } // main cycle
717
718 DbpString("COMMAND FINISHED");
719
720 FpgaDisableSscDma();
721 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
722 Dbprintf("traceLen=%d, Uart.output[0]=%08x", BigBuf_get_traceLen(), (uint32_t)Uart.output[0]);
723 LEDsoff();
724 }
725
726 //-----------------------------------------------------------------------------
727 // Prepare tag messages
728 //-----------------------------------------------------------------------------
729 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
730 {
731 ToSendReset();
732
733 // Correction bit, might be removed when not needed
734 ToSendStuffBit(0);
735 ToSendStuffBit(0);
736 ToSendStuffBit(0);
737 ToSendStuffBit(0);
738 ToSendStuffBit(1); // 1
739 ToSendStuffBit(0);
740 ToSendStuffBit(0);
741 ToSendStuffBit(0);
742
743 // Send startbit
744 ToSend[++ToSendMax] = SEC_D;
745 LastProxToAirDuration = 8 * ToSendMax - 4;
746
747 for(uint16_t i = 0; i < len; i++) {
748 uint8_t b = cmd[i];
749
750 // Data bits
751 for(uint16_t j = 0; j < 8; j++) {
752 if(b & 1) {
753 ToSend[++ToSendMax] = SEC_D;
754 } else {
755 ToSend[++ToSendMax] = SEC_E;
756 }
757 b >>= 1;
758 }
759
760 // Get the parity bit
761 if (parity[i>>3] & (0x80>>(i&0x0007))) {
762 ToSend[++ToSendMax] = SEC_D;
763 LastProxToAirDuration = 8 * ToSendMax - 4;
764 } else {
765 ToSend[++ToSendMax] = SEC_E;
766 LastProxToAirDuration = 8 * ToSendMax;
767 }
768 }
769
770 // Send stopbit
771 ToSend[++ToSendMax] = SEC_F;
772
773 // Convert from last byte pos to length
774 ToSendMax++;
775 }
776
777 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
778 {
779 uint8_t par[MAX_PARITY_SIZE];
780
781 GetParity(cmd, len, par);
782 CodeIso14443aAsTagPar(cmd, len, par);
783 }
784
785
786 static void Code4bitAnswerAsTag(uint8_t cmd)
787 {
788 int i;
789
790 ToSendReset();
791
792 // Correction bit, might be removed when not needed
793 ToSendStuffBit(0);
794 ToSendStuffBit(0);
795 ToSendStuffBit(0);
796 ToSendStuffBit(0);
797 ToSendStuffBit(1); // 1
798 ToSendStuffBit(0);
799 ToSendStuffBit(0);
800 ToSendStuffBit(0);
801
802 // Send startbit
803 ToSend[++ToSendMax] = SEC_D;
804
805 uint8_t b = cmd;
806 for(i = 0; i < 4; i++) {
807 if(b & 1) {
808 ToSend[++ToSendMax] = SEC_D;
809 LastProxToAirDuration = 8 * ToSendMax - 4;
810 } else {
811 ToSend[++ToSendMax] = SEC_E;
812 LastProxToAirDuration = 8 * ToSendMax;
813 }
814 b >>= 1;
815 }
816
817 // Send stopbit
818 ToSend[++ToSendMax] = SEC_F;
819
820 // Convert from last byte pos to length
821 ToSendMax++;
822 }
823
824 //-----------------------------------------------------------------------------
825 // Wait for commands from reader
826 // Stop when button is pressed
827 // Or return TRUE when command is captured
828 //-----------------------------------------------------------------------------
829 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
830 {
831 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
832 // only, since we are receiving, not transmitting).
833 // Signal field is off with the appropriate LED
834 LED_D_OFF();
835 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
836
837 // Now run a `software UART' on the stream of incoming samples.
838 UartInit(received, parity);
839
840 // clear RXRDY:
841 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
842
843 for(;;) {
844 WDT_HIT();
845
846 if(BUTTON_PRESS()) return FALSE;
847
848 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
849 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
850 if(MillerDecoding(b, 0)) {
851 *len = Uart.len;
852 return TRUE;
853 }
854 }
855 }
856 }
857
858 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
859 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
860 int EmSend4bit(uint8_t resp);
861 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
862 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
863 int EmSendCmd(uint8_t *resp, uint16_t respLen);
864 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
865 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
866 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
867
868 static uint8_t* free_buffer_pointer;
869
870 typedef struct {
871 uint8_t* response;
872 size_t response_n;
873 uint8_t* modulation;
874 size_t modulation_n;
875 uint32_t ProxToAirDuration;
876 } tag_response_info_t;
877
878 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
879 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
880 // This will need the following byte array for a modulation sequence
881 // 144 data bits (18 * 8)
882 // 18 parity bits
883 // 2 Start and stop
884 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
885 // 1 just for the case
886 // ----------- +
887 // 166 bytes, since every bit that needs to be send costs us a byte
888 //
889
890
891 // Prepare the tag modulation bits from the message
892 CodeIso14443aAsTag(response_info->response,response_info->response_n);
893
894 // Make sure we do not exceed the free buffer space
895 if (ToSendMax > max_buffer_size) {
896 Dbprintf("Out of memory, when modulating bits for tag answer:");
897 Dbhexdump(response_info->response_n,response_info->response,false);
898 return false;
899 }
900
901 // Copy the byte array, used for this modulation to the buffer position
902 memcpy(response_info->modulation,ToSend,ToSendMax);
903
904 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
905 response_info->modulation_n = ToSendMax;
906 response_info->ProxToAirDuration = LastProxToAirDuration;
907
908 return true;
909 }
910
911
912 // "precompile" responses. There are 7 predefined responses with a total of 28 bytes data to transmit.
913 // Coded responses need one byte per bit to transfer (data, parity, start, stop, correction)
914 // 28 * 8 data bits, 28 * 1 parity bits, 7 start bits, 7 stop bits, 7 correction bits
915 // -> need 273 bytes buffer
916 // 44 * 8 data bits, 44 * 1 parity bits, 9 start bits, 9 stop bits, 9 correction bits --370
917 // 47 * 8 data bits, 47 * 1 parity bits, 10 start bits, 10 stop bits, 10 correction bits
918 #define ALLOCATED_TAG_MODULATION_BUFFER_SIZE 453
919
920 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
921 // Retrieve and store the current buffer index
922 response_info->modulation = free_buffer_pointer;
923
924 // Determine the maximum size we can use from our buffer
925 size_t max_buffer_size = ALLOCATED_TAG_MODULATION_BUFFER_SIZE;
926
927 // Forward the prepare tag modulation function to the inner function
928 if (prepare_tag_modulation(response_info, max_buffer_size)) {
929 // Update the free buffer offset
930 free_buffer_pointer += ToSendMax;
931 return true;
932 } else {
933 return false;
934 }
935 }
936
937 //-----------------------------------------------------------------------------
938 // Main loop of simulated tag: receive commands from reader, decide what
939 // response to send, and send it.
940 //-----------------------------------------------------------------------------
941 void SimulateIso14443aTag(int tagType, int flags, int uid_2nd, byte_t* data)
942 {
943
944 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
945 // This can be used in a reader-only attack.
946 // (it can also be retrieved via 'hf 14a list', but hey...
947 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
948 uint8_t ar_nr_collected = 0;
949
950 uint8_t sak;
951
952 uint8_t blockzeros[512];
953 memset(blockzeros, 0x00, sizeof(blockzeros));
954
955 // PACK response to PWD AUTH for EV1/NTAG
956 uint8_t response8[4];
957
958 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
959 uint8_t response1[2];
960
961 switch (tagType) {
962 case 1: { // MIFARE Classic
963 // Says: I am Mifare 1k - original line
964 response1[0] = 0x04;
965 response1[1] = 0x00;
966 sak = 0x08;
967 } break;
968 case 2: { // MIFARE Ultralight
969 // Says: I am a stupid memory tag, no crypto
970 response1[0] = 0x44;
971 response1[1] = 0x00;
972 sak = 0x00;
973 } break;
974 case 3: { // MIFARE DESFire
975 // Says: I am a DESFire tag, ph33r me
976 response1[0] = 0x04;
977 response1[1] = 0x03;
978 sak = 0x20;
979 } break;
980 case 4: { // ISO/IEC 14443-4
981 // Says: I am a javacard (JCOP)
982 response1[0] = 0x04;
983 response1[1] = 0x00;
984 sak = 0x28;
985 } break;
986 case 5: { // MIFARE TNP3XXX
987 // Says: I am a toy
988 response1[0] = 0x01;
989 response1[1] = 0x0f;
990 sak = 0x01;
991 } break;
992 case 6: { // MIFARE Mini
993 // Says: I am a Mifare Mini, 320b
994 response1[0] = 0x44;
995 response1[1] = 0x00;
996 sak = 0x09;
997 } break;
998 case 7: { // NTAG?
999 // Says: I am a NTAG,
1000 response1[0] = 0x44;
1001 response1[1] = 0x00;
1002 sak = 0x00;
1003 // PACK
1004 response8[0] = 0x80;
1005 response8[1] = 0x80;
1006 ComputeCrc14443(CRC_14443_A, response8, 2, &response8[2], &response8[3]);
1007 } break;
1008 default: {
1009 Dbprintf("Error: unkown tagtype (%d)",tagType);
1010 return;
1011 } break;
1012 }
1013
1014 // The second response contains the (mandatory) first 24 bits of the UID
1015 uint8_t response2[5] = {0x00};
1016
1017 // Check if the uid uses the (optional) part
1018 uint8_t response2a[5] = {0x00};
1019
1020 if (flags & FLAG_7B_UID_IN_DATA) {
1021 response2[0] = 0x88;
1022 response2[1] = data[0];
1023 response2[2] = data[1];
1024 response2[3] = data[2];
1025
1026 response2a[0] = data[3];
1027 response2a[1] = data[4];
1028 response2a[2] = data[5];
1029 response2a[3] = data[6]; //??
1030 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1031
1032 // Configure the ATQA and SAK accordingly
1033 response1[0] |= 0x40;
1034 sak |= 0x04;
1035 } else {
1036 memcpy(response2, data, 4);
1037 //num_to_bytes(uid_1st,4,response2);
1038 // Configure the ATQA and SAK accordingly
1039 response1[0] &= 0xBF;
1040 sak &= 0xFB;
1041 }
1042
1043 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1044 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1045
1046 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1047 uint8_t response3[3] = {0x00};
1048 response3[0] = sak;
1049 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1050
1051 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1052 uint8_t response3a[3] = {0x00};
1053 response3a[0] = sak & 0xFB;
1054 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1055
1056 uint8_t response5[] = { 0x01, 0x01, 0x01, 0x01 }; // Very random tag nonce
1057 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1058 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1059 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1060 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1061 // TC(1) = 0x02: CID supported, NAD not supported
1062 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1063
1064 // Prepare GET_VERSION (different for EV-1 / NTAG)
1065 //uint8_t response7_EV1[] = {0x00, 0x04, 0x03, 0x01, 0x01, 0x00, 0x0b, 0x03, 0xfd, 0xf7}; //EV1 48bytes VERSION.
1066 uint8_t response7_NTAG[] = {0x00, 0x04, 0x04, 0x02, 0x01, 0x00, 0x11, 0x03, 0x01, 0x9e}; //NTAG 215
1067
1068 // Prepare CHK_TEARING
1069 uint8_t response9[] = {0xBD,0x90,0x3f};
1070
1071 #define TAG_RESPONSE_COUNT 10
1072 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1073 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1074 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1075 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1076 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1077 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1078 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1079 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1080 { .response = response7_NTAG, .response_n = sizeof(response7_NTAG) }, // EV1/NTAG GET_VERSION response
1081 { .response = response8, .response_n = sizeof(response8) }, // EV1/NTAG PACK response
1082 { .response = response9, .response_n = sizeof(response9) } // EV1/NTAG CHK_TEAR response
1083 };
1084
1085 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1086 // Such a response is less time critical, so we can prepare them on the fly
1087 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1088 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1089 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1090 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1091 tag_response_info_t dynamic_response_info = {
1092 .response = dynamic_response_buffer,
1093 .response_n = 0,
1094 .modulation = dynamic_modulation_buffer,
1095 .modulation_n = 0
1096 };
1097
1098 BigBuf_free_keep_EM();
1099
1100 // allocate buffers:
1101 uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
1102 uint8_t *receivedCmdPar = BigBuf_malloc(MAX_PARITY_SIZE);
1103 free_buffer_pointer = BigBuf_malloc(ALLOCATED_TAG_MODULATION_BUFFER_SIZE);
1104
1105 // clear trace
1106 clear_trace();
1107 set_tracing(TRUE);
1108
1109 // Prepare the responses of the anticollision phase
1110 // there will be not enough time to do this at the moment the reader sends it REQA
1111 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1112 prepare_allocated_tag_modulation(&responses[i]);
1113 }
1114
1115 int len = 0;
1116
1117 // To control where we are in the protocol
1118 int order = 0;
1119 int lastorder;
1120
1121 // Just to allow some checks
1122 int happened = 0;
1123 int happened2 = 0;
1124 int cmdsRecvd = 0;
1125
1126 // We need to listen to the high-frequency, peak-detected path.
1127 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1128
1129 cmdsRecvd = 0;
1130 tag_response_info_t* p_response;
1131
1132 LED_A_ON();
1133 for(;;) {
1134 // Clean receive command buffer
1135
1136 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1137 DbpString("Button press");
1138 break;
1139 }
1140
1141 p_response = NULL;
1142
1143 // Okay, look at the command now.
1144 lastorder = order;
1145 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1146 p_response = &responses[0]; order = 1;
1147 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1148 p_response = &responses[0]; order = 6;
1149 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1150 p_response = &responses[1]; order = 2;
1151 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1152 p_response = &responses[2]; order = 20;
1153 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1154 p_response = &responses[3]; order = 3;
1155 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1156 p_response = &responses[4]; order = 30;
1157 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1158 uint8_t block = receivedCmd[1];
1159 if ( tagType == 7 ) {
1160
1161 if ( block < 4 ) {
1162 //NTAG 215
1163 uint8_t start = 4 * block;
1164
1165 uint8_t blockdata[50] = {
1166 data[0],data[1],data[2], 0x88 ^ data[0] ^ data[1] ^ data[2],
1167 data[3],data[4],data[5],data[6],
1168 data[3] ^ data[4] ^ data[5] ^ data[6],0x48,0x0f,0xe0,
1169 0xe1,0x10,0x12,0x00,
1170 0x03,0x00,0xfe,0x00,
1171 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1172 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
1173 0x00,0x00,0x00,0x00,
1174 0x00,0x00};
1175 AppendCrc14443a(blockdata+start, 16);
1176
1177 EmSendCmdEx( blockdata+start, 18, false);
1178 } else {
1179 AppendCrc14443a(blockzeros, 16);
1180 EmSendCmdEx(blockzeros,18,false);
1181 }
1182 p_response = NULL;
1183
1184 } else {
1185 EmSendCmdEx(data+(4*block),16,false);
1186 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1187 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1188 p_response = NULL;
1189 }
1190 } else if(receivedCmd[0] == 0x3A) { // Received a FAST READ (ranged read) -- just returns all zeros.
1191 uint8_t len = (receivedCmd[2] - receivedCmd[1] ) * 4;
1192 AppendCrc14443a(blockzeros,len);
1193 EmSendCmdEx(blockzeros,len+2,false);
1194 p_response = NULL;
1195 } else if(receivedCmd[0] == 0x3C && tagType == 7) { // Received a READ SIGNATURE --
1196 // ECC data, taken from a NTAG215 amiibo token. might work. LEN: 32, + 2 crc
1197 uint8_t data[] = {0x56,0x06,0xa6,0x4f,0x43,0x32,0x53,0x6f,
1198 0x43,0xda,0x45,0xd6,0x61,0x38,0xaa,0x1e,
1199 0xcf,0xd3,0x61,0x36,0xca,0x5f,0xbb,0x05,
1200 0xce,0x21,0x24,0x5b,0xa6,0x7a,0x79,0x07,
1201 0x00,0x00};
1202 AppendCrc14443a(data, sizeof(data));
1203 EmSendCmdEx(data,sizeof(data),false);
1204 p_response = NULL;
1205 } else if(receivedCmd[0] == 0x39 && tagType == 7) { // Received a READ COUNTER --
1206 uint8_t data[] = {0x00,0x00,0x00,0x14,0xa5};
1207 //AppendCrc14443a(data, sizeof(data));
1208 EmSendCmdEx(data,sizeof(data),false);
1209 p_response = NULL;
1210 } else if(receivedCmd[0] == 0x3E && tagType == 7) { // Received a CHECK_TEARING_EVENT --
1211 p_response = &responses[9];
1212 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1213
1214 if (tracing) {
1215 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1216 }
1217 p_response = NULL;
1218 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1219
1220 if ( tagType == 7 ) { // IF NTAG /EV1 0x60 == GET_VERSION, not a authentication request.
1221 p_response = &responses[7];
1222 } else {
1223 p_response = &responses[5]; order = 7;
1224 }
1225 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1226 if (tagType == 1 || tagType == 2) { // RATS not supported
1227 EmSend4bit(CARD_NACK_NA);
1228 p_response = NULL;
1229 } else {
1230 p_response = &responses[6]; order = 70;
1231 }
1232 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1233 if (tracing) {
1234 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1235 }
1236 uint32_t nonce = bytes_to_num(response5,4);
1237 uint32_t nr = bytes_to_num(receivedCmd,4);
1238 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1239 //Dbprintf("Auth attempt {nonce}{nr}{ar}: %08x %08x %08x", nonce, nr, ar);
1240
1241 if(flags & FLAG_NR_AR_ATTACK )
1242 {
1243 if(ar_nr_collected < 2){
1244 // Avoid duplicates... probably not necessary, nr should vary.
1245 //if(ar_nr_responses[3] != nr){
1246 ar_nr_responses[ar_nr_collected*5] = 0;
1247 ar_nr_responses[ar_nr_collected*5+1] = 0;
1248 ar_nr_responses[ar_nr_collected*5+2] = nonce;
1249 ar_nr_responses[ar_nr_collected*5+3] = nr;
1250 ar_nr_responses[ar_nr_collected*5+4] = ar;
1251 ar_nr_collected++;
1252 //}
1253 }
1254
1255 if(ar_nr_collected > 1 ) {
1256
1257 if (MF_DBGLEVEL >= 2) {
1258 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
1259 Dbprintf("../tools/mfkey/mfkey32 %07x%08x %08x %08x %08x %08x %08x",
1260 ar_nr_responses[0], // UID1
1261 ar_nr_responses[1], // UID2
1262 ar_nr_responses[2], // NT
1263 ar_nr_responses[3], // AR1
1264 ar_nr_responses[4], // NR1
1265 ar_nr_responses[8], // AR2
1266 ar_nr_responses[9] // NR2
1267 );
1268 }
1269 uint8_t len = ar_nr_collected*5*4;
1270 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,len,0,&ar_nr_responses,len);
1271 ar_nr_collected = 0;
1272 memset(ar_nr_responses, 0x00, len);
1273 }
1274 }
1275 } else if (receivedCmd[0] == 0x1a ) // ULC authentication
1276 {
1277
1278 }
1279 else if (receivedCmd[0] == 0x1b) // NTAG / EV-1 authentication
1280 {
1281 if ( tagType == 7 ) {
1282 p_response = &responses[8]; // PACK response
1283 }
1284 }
1285 else {
1286 // Check for ISO 14443A-4 compliant commands, look at left nibble
1287 switch (receivedCmd[0]) {
1288
1289 case 0x0B:
1290 case 0x0A: { // IBlock (command)
1291 dynamic_response_info.response[0] = receivedCmd[0];
1292 dynamic_response_info.response[1] = 0x00;
1293 dynamic_response_info.response[2] = 0x90;
1294 dynamic_response_info.response[3] = 0x00;
1295 dynamic_response_info.response_n = 4;
1296 } break;
1297
1298 case 0x1A:
1299 case 0x1B: { // Chaining command
1300 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1301 dynamic_response_info.response_n = 2;
1302 } break;
1303
1304 case 0xaa:
1305 case 0xbb: {
1306 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1307 dynamic_response_info.response_n = 2;
1308 } break;
1309
1310 case 0xBA: { //
1311 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1312 dynamic_response_info.response_n = 2;
1313 } break;
1314
1315 case 0xCA:
1316 case 0xC2: { // Readers sends deselect command
1317 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1318 dynamic_response_info.response_n = 2;
1319 } break;
1320
1321 default: {
1322 // Never seen this command before
1323 if (tracing) {
1324 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1325 }
1326 Dbprintf("Received unknown command (len=%d):",len);
1327 Dbhexdump(len,receivedCmd,false);
1328 // Do not respond
1329 dynamic_response_info.response_n = 0;
1330 } break;
1331 }
1332
1333 if (dynamic_response_info.response_n > 0) {
1334 // Copy the CID from the reader query
1335 dynamic_response_info.response[1] = receivedCmd[1];
1336
1337 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1338 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1339 dynamic_response_info.response_n += 2;
1340
1341 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1342 Dbprintf("Error preparing tag response");
1343 if (tracing) {
1344 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1345 }
1346 break;
1347 }
1348 p_response = &dynamic_response_info;
1349 }
1350 }
1351
1352 // Count number of wakeups received after a halt
1353 if(order == 6 && lastorder == 5) { happened++; }
1354
1355 // Count number of other messages after a halt
1356 if(order != 6 && lastorder == 5) { happened2++; }
1357
1358 if(cmdsRecvd > 999) {
1359 DbpString("1000 commands later...");
1360 break;
1361 }
1362 cmdsRecvd++;
1363
1364 if (p_response != NULL) {
1365 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1366 // do the tracing for the previous reader request and this tag answer:
1367 uint8_t par[MAX_PARITY_SIZE];
1368 GetParity(p_response->response, p_response->response_n, par);
1369
1370 EmLogTrace(Uart.output,
1371 Uart.len,
1372 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1373 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1374 Uart.parity,
1375 p_response->response,
1376 p_response->response_n,
1377 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1378 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1379 par);
1380 }
1381
1382 if (!tracing) {
1383 Dbprintf("Trace Full. Simulation stopped.");
1384 break;
1385 }
1386 }
1387
1388 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1389 BigBuf_free_keep_EM();
1390 LED_A_OFF();
1391
1392 Dbprintf("-[ Wake ups after halt [%d]", happened);
1393 Dbprintf("-[ Messages after halt [%d]", happened2);
1394 Dbprintf("-[ Num of received cmd [%d]", cmdsRecvd);
1395 }
1396
1397
1398 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1399 // of bits specified in the delay parameter.
1400 void PrepareDelayedTransfer(uint16_t delay)
1401 {
1402 uint8_t bitmask = 0;
1403 uint8_t bits_to_shift = 0;
1404 uint8_t bits_shifted = 0;
1405
1406 delay &= 0x07;
1407 if (delay) {
1408 for (uint16_t i = 0; i < delay; i++) {
1409 bitmask |= (0x01 << i);
1410 }
1411 ToSend[ToSendMax++] = 0x00;
1412 for (uint16_t i = 0; i < ToSendMax; i++) {
1413 bits_to_shift = ToSend[i] & bitmask;
1414 ToSend[i] = ToSend[i] >> delay;
1415 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1416 bits_shifted = bits_to_shift;
1417 }
1418 }
1419 }
1420
1421
1422 //-------------------------------------------------------------------------------------
1423 // Transmit the command (to the tag) that was placed in ToSend[].
1424 // Parameter timing:
1425 // if NULL: transfer at next possible time, taking into account
1426 // request guard time and frame delay time
1427 // if == 0: transfer immediately and return time of transfer
1428 // if != 0: delay transfer until time specified
1429 //-------------------------------------------------------------------------------------
1430 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1431 {
1432
1433 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1434
1435 uint32_t ThisTransferTime = 0;
1436
1437 if (timing) {
1438 if(*timing == 0) { // Measure time
1439 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1440 } else {
1441 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1442 }
1443 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1444 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1445 LastTimeProxToAirStart = *timing;
1446 } else {
1447 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1448 while(GetCountSspClk() < ThisTransferTime);
1449 LastTimeProxToAirStart = ThisTransferTime;
1450 }
1451
1452 // clear TXRDY
1453 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1454
1455 uint16_t c = 0;
1456 for(;;) {
1457 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1458 AT91C_BASE_SSC->SSC_THR = cmd[c];
1459 c++;
1460 if(c >= len) {
1461 break;
1462 }
1463 }
1464 }
1465
1466 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1467 }
1468
1469
1470 //-----------------------------------------------------------------------------
1471 // Prepare reader command (in bits, support short frames) to send to FPGA
1472 //-----------------------------------------------------------------------------
1473 void CodeIso14443aBitsAsReaderPar(const uint8_t *cmd, uint16_t bits, const uint8_t *parity)
1474 {
1475 int i, j;
1476 int last;
1477 uint8_t b;
1478
1479 ToSendReset();
1480
1481 // Start of Communication (Seq. Z)
1482 ToSend[++ToSendMax] = SEC_Z;
1483 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1484 last = 0;
1485
1486 size_t bytecount = nbytes(bits);
1487 // Generate send structure for the data bits
1488 for (i = 0; i < bytecount; i++) {
1489 // Get the current byte to send
1490 b = cmd[i];
1491 size_t bitsleft = MIN((bits-(i*8)),8);
1492
1493 for (j = 0; j < bitsleft; j++) {
1494 if (b & 1) {
1495 // Sequence X
1496 ToSend[++ToSendMax] = SEC_X;
1497 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1498 last = 1;
1499 } else {
1500 if (last == 0) {
1501 // Sequence Z
1502 ToSend[++ToSendMax] = SEC_Z;
1503 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1504 } else {
1505 // Sequence Y
1506 ToSend[++ToSendMax] = SEC_Y;
1507 last = 0;
1508 }
1509 }
1510 b >>= 1;
1511 }
1512
1513 // Only transmit parity bit if we transmitted a complete byte
1514 if (j == 8 && parity != NULL) {
1515 // Get the parity bit
1516 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1517 // Sequence X
1518 ToSend[++ToSendMax] = SEC_X;
1519 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1520 last = 1;
1521 } else {
1522 if (last == 0) {
1523 // Sequence Z
1524 ToSend[++ToSendMax] = SEC_Z;
1525 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1526 } else {
1527 // Sequence Y
1528 ToSend[++ToSendMax] = SEC_Y;
1529 last = 0;
1530 }
1531 }
1532 }
1533 }
1534
1535 // End of Communication: Logic 0 followed by Sequence Y
1536 if (last == 0) {
1537 // Sequence Z
1538 ToSend[++ToSendMax] = SEC_Z;
1539 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1540 } else {
1541 // Sequence Y
1542 ToSend[++ToSendMax] = SEC_Y;
1543 last = 0;
1544 }
1545 ToSend[++ToSendMax] = SEC_Y;
1546
1547 // Convert to length of command:
1548 ToSendMax++;
1549 }
1550
1551 //-----------------------------------------------------------------------------
1552 // Prepare reader command to send to FPGA
1553 //-----------------------------------------------------------------------------
1554 void CodeIso14443aAsReaderPar(const uint8_t *cmd, uint16_t len, const uint8_t *parity)
1555 {
1556 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1557 }
1558
1559
1560 //-----------------------------------------------------------------------------
1561 // Wait for commands from reader
1562 // Stop when button is pressed (return 1) or field was gone (return 2)
1563 // Or return 0 when command is captured
1564 //-----------------------------------------------------------------------------
1565 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1566 {
1567 *len = 0;
1568
1569 uint32_t timer = 0, vtime = 0;
1570 int analogCnt = 0;
1571 int analogAVG = 0;
1572
1573 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1574 // only, since we are receiving, not transmitting).
1575 // Signal field is off with the appropriate LED
1576 LED_D_OFF();
1577 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1578
1579 // Set ADC to read field strength
1580 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1581 AT91C_BASE_ADC->ADC_MR =
1582 ADC_MODE_PRESCALE(63) |
1583 ADC_MODE_STARTUP_TIME(1) |
1584 ADC_MODE_SAMPLE_HOLD_TIME(15);
1585 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1586 // start ADC
1587 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1588
1589 // Now run a 'software UART' on the stream of incoming samples.
1590 UartInit(received, parity);
1591
1592 // Clear RXRDY:
1593 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1594
1595 for(;;) {
1596 WDT_HIT();
1597
1598 if (BUTTON_PRESS()) return 1;
1599
1600 // test if the field exists
1601 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1602 analogCnt++;
1603 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1604 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1605 if (analogCnt >= 32) {
1606 if ((MAX_ADC_HF_VOLTAGE * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1607 vtime = GetTickCount();
1608 if (!timer) timer = vtime;
1609 // 50ms no field --> card to idle state
1610 if (vtime - timer > 50) return 2;
1611 } else
1612 if (timer) timer = 0;
1613 analogCnt = 0;
1614 analogAVG = 0;
1615 }
1616 }
1617
1618 // receive and test the miller decoding
1619 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1620 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1621 if(MillerDecoding(b, 0)) {
1622 *len = Uart.len;
1623 return 0;
1624 }
1625 }
1626
1627 }
1628 }
1629
1630
1631 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1632 {
1633 uint8_t b;
1634 uint16_t i = 0;
1635 uint32_t ThisTransferTime;
1636
1637 // Modulate Manchester
1638 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1639
1640 // include correction bit if necessary
1641 if (Uart.parityBits & 0x01) {
1642 correctionNeeded = TRUE;
1643 }
1644 if(correctionNeeded) {
1645 // 1236, so correction bit needed
1646 i = 0;
1647 } else {
1648 i = 1;
1649 }
1650
1651 // clear receiving shift register and holding register
1652 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1653 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1654 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1655 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1656
1657 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1658 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1659 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1660 if (AT91C_BASE_SSC->SSC_RHR) break;
1661 }
1662
1663 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1664
1665 // Clear TXRDY:
1666 AT91C_BASE_SSC->SSC_THR = SEC_F;
1667
1668 // send cycle
1669 for(; i < respLen; ) {
1670 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1671 AT91C_BASE_SSC->SSC_THR = resp[i++];
1672 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1673 }
1674
1675 if(BUTTON_PRESS()) {
1676 break;
1677 }
1678 }
1679
1680 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1681 uint8_t fpga_queued_bits = FpgaSendQueueDelay >> 3;
1682 for (i = 0; i <= fpga_queued_bits/8 + 1; ) {
1683 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1684 AT91C_BASE_SSC->SSC_THR = SEC_F;
1685 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1686 i++;
1687 }
1688 }
1689
1690 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1691
1692 return 0;
1693 }
1694
1695 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1696 Code4bitAnswerAsTag(resp);
1697 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1698 // do the tracing for the previous reader request and this tag answer:
1699 uint8_t par[1];
1700 GetParity(&resp, 1, par);
1701 EmLogTrace(Uart.output,
1702 Uart.len,
1703 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1704 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1705 Uart.parity,
1706 &resp,
1707 1,
1708 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1709 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1710 par);
1711 return res;
1712 }
1713
1714 int EmSend4bit(uint8_t resp){
1715 return EmSend4bitEx(resp, false);
1716 }
1717
1718 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1719 CodeIso14443aAsTagPar(resp, respLen, par);
1720 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1721 // do the tracing for the previous reader request and this tag answer:
1722 EmLogTrace(Uart.output,
1723 Uart.len,
1724 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1725 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1726 Uart.parity,
1727 resp,
1728 respLen,
1729 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1730 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1731 par);
1732 return res;
1733 }
1734
1735 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1736 uint8_t par[MAX_PARITY_SIZE];
1737 GetParity(resp, respLen, par);
1738 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1739 }
1740
1741 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1742 uint8_t par[MAX_PARITY_SIZE];
1743 GetParity(resp, respLen, par);
1744 return EmSendCmdExPar(resp, respLen, false, par);
1745 }
1746
1747 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1748 return EmSendCmdExPar(resp, respLen, false, par);
1749 }
1750
1751 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1752 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1753 {
1754 if (tracing) {
1755 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1756 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1757 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1758 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1759 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1760 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1761 reader_EndTime = tag_StartTime - exact_fdt;
1762 reader_StartTime = reader_EndTime - reader_modlen;
1763 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1764 return FALSE;
1765 } else return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1766 } else {
1767 return TRUE;
1768 }
1769 }
1770
1771 //-----------------------------------------------------------------------------
1772 // Wait a certain time for tag response
1773 // If a response is captured return TRUE
1774 // If it takes too long return FALSE
1775 //-----------------------------------------------------------------------------
1776 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1777 {
1778 uint32_t c = 0x00;
1779
1780 // Set FPGA mode to "reader listen mode", no modulation (listen
1781 // only, since we are receiving, not transmitting).
1782 // Signal field is on with the appropriate LED
1783 LED_D_ON();
1784 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1785
1786 // Now get the answer from the card
1787 DemodInit(receivedResponse, receivedResponsePar);
1788
1789 // clear RXRDY:
1790 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1791
1792 for(;;) {
1793 WDT_HIT();
1794
1795 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1796 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1797 if(ManchesterDecoding(b, offset, 0)) {
1798 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1799 return TRUE;
1800 } else if (c++ > iso14a_timeout && Demod.state == DEMOD_UNSYNCD) {
1801 return FALSE;
1802 }
1803 }
1804 }
1805 }
1806
1807
1808 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1809 {
1810 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1811
1812 // Send command to tag
1813 TransmitFor14443a(ToSend, ToSendMax, timing);
1814 if(trigger)
1815 LED_A_ON();
1816
1817 // Log reader command in trace buffer
1818 if (tracing) {
1819 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1820 }
1821 }
1822
1823
1824 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1825 {
1826 ReaderTransmitBitsPar(frame, len*8, par, timing);
1827 }
1828
1829
1830 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1831 {
1832 // Generate parity and redirect
1833 uint8_t par[MAX_PARITY_SIZE];
1834 GetParity(frame, len/8, par);
1835 ReaderTransmitBitsPar(frame, len, par, timing);
1836 }
1837
1838
1839 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1840 {
1841 // Generate parity and redirect
1842 uint8_t par[MAX_PARITY_SIZE];
1843 GetParity(frame, len, par);
1844 ReaderTransmitBitsPar(frame, len*8, par, timing);
1845 }
1846
1847 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1848 {
1849 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, offset)) return FALSE;
1850 if (tracing) {
1851 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1852 }
1853 return Demod.len;
1854 }
1855
1856 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1857 {
1858 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1859 if (tracing) {
1860 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1861 }
1862 return Demod.len;
1863 }
1864
1865 /* performs iso14443a anticollision procedure
1866 * fills the uid pointer unless NULL
1867 * fills resp_data unless NULL */
1868 int iso14443a_select_card(byte_t *uid_ptr, iso14a_card_select_t *p_hi14a_card, uint32_t *cuid_ptr) {
1869 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1870 uint8_t sel_all[] = { 0x93,0x20 };
1871 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1872 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1873 uint8_t resp[MAX_FRAME_SIZE]; // theoretically. A usual RATS will be much smaller
1874 uint8_t resp_par[MAX_PARITY_SIZE];
1875 byte_t uid_resp[4];
1876 size_t uid_resp_len;
1877
1878 uint8_t sak = 0x04; // cascade uid
1879 int cascade_level = 0;
1880 int len;
1881
1882 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1883 ReaderTransmitBitsPar(wupa,7,0, NULL);
1884
1885 // Receive the ATQA
1886 if(!ReaderReceive(resp, resp_par)) return 0;
1887
1888 if(p_hi14a_card) {
1889 memcpy(p_hi14a_card->atqa, resp, 2);
1890 p_hi14a_card->uidlen = 0;
1891 memset(p_hi14a_card->uid,0,10);
1892 }
1893
1894 // clear uid
1895 if (uid_ptr) {
1896 memset(uid_ptr,0,10);
1897 }
1898
1899 // check for proprietary anticollision:
1900 if ((resp[0] & 0x1F) == 0) {
1901 return 3;
1902 }
1903
1904 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1905 // which case we need to make a cascade 2 request and select - this is a long UID
1906 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1907 for(; sak & 0x04; cascade_level++) {
1908 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1909 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1910
1911 // SELECT_ALL
1912 ReaderTransmit(sel_all, sizeof(sel_all), NULL);
1913 if (!ReaderReceive(resp, resp_par)) return 0;
1914
1915 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1916 memset(uid_resp, 0, 4);
1917 uint16_t uid_resp_bits = 0;
1918 uint16_t collision_answer_offset = 0;
1919 // anti-collision-loop:
1920 while (Demod.collisionPos) {
1921 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1922 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1923 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1924 uid_resp[uid_resp_bits / 8] |= UIDbit << (uid_resp_bits % 8);
1925 }
1926 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1927 uid_resp_bits++;
1928 // construct anticollosion command:
1929 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1930 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1931 sel_uid[2+i] = uid_resp[i];
1932 }
1933 collision_answer_offset = uid_resp_bits%8;
1934 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1935 if (!ReaderReceiveOffset(resp, collision_answer_offset, resp_par)) return 0;
1936 }
1937 // finally, add the last bits and BCC of the UID
1938 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1939 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1940 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1941 }
1942
1943 } else { // no collision, use the response to SELECT_ALL as current uid
1944 memcpy(uid_resp, resp, 4);
1945 }
1946 uid_resp_len = 4;
1947
1948 // calculate crypto UID. Always use last 4 Bytes.
1949 if(cuid_ptr) {
1950 *cuid_ptr = bytes_to_num(uid_resp, 4);
1951 }
1952
1953 // Construct SELECT UID command
1954 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1955 memcpy(sel_uid+2, uid_resp, 4); // the UID
1956 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1957 AppendCrc14443a(sel_uid, 7); // calculate and add CRC
1958 ReaderTransmit(sel_uid, sizeof(sel_uid), NULL);
1959
1960 // Receive the SAK
1961 if (!ReaderReceive(resp, resp_par)) return 0;
1962 sak = resp[0];
1963
1964 // Test if more parts of the uid are coming
1965 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1966 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1967 // http://www.nxp.com/documents/application_note/AN10927.pdf
1968 uid_resp[0] = uid_resp[1];
1969 uid_resp[1] = uid_resp[2];
1970 uid_resp[2] = uid_resp[3];
1971
1972 uid_resp_len = 3;
1973 }
1974
1975 if(uid_ptr) {
1976 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1977 }
1978
1979 if(p_hi14a_card) {
1980 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1981 p_hi14a_card->uidlen += uid_resp_len;
1982 }
1983 }
1984
1985 if(p_hi14a_card) {
1986 p_hi14a_card->sak = sak;
1987 p_hi14a_card->ats_len = 0;
1988 }
1989
1990 // non iso14443a compliant tag
1991 if( (sak & 0x20) == 0) return 2;
1992
1993 // Request for answer to select
1994 AppendCrc14443a(rats, 2);
1995 ReaderTransmit(rats, sizeof(rats), NULL);
1996
1997 if (!(len = ReaderReceive(resp, resp_par))) return 0;
1998
1999
2000 if(p_hi14a_card) {
2001 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
2002 p_hi14a_card->ats_len = len;
2003 }
2004
2005 // reset the PCB block number
2006 iso14_pcb_blocknum = 0;
2007
2008 // set default timeout based on ATS
2009 iso14a_set_ATS_timeout(resp);
2010
2011 return 1;
2012 }
2013
2014 void iso14443a_setup(uint8_t fpga_minor_mode) {
2015 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
2016 // Set up the synchronous serial port
2017 FpgaSetupSsc();
2018 // connect Demodulated Signal to ADC:
2019 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2020
2021 // Signal field is on with the appropriate LED
2022 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD
2023 || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
2024 LED_D_ON();
2025 } else {
2026 LED_D_OFF();
2027 }
2028 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
2029
2030 // Start the timer
2031 StartCountSspClk();
2032
2033 DemodReset();
2034 UartReset();
2035 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
2036 iso14a_set_timeout(10*106); // 10ms default
2037 }
2038
2039 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
2040 uint8_t parity[MAX_PARITY_SIZE];
2041 uint8_t real_cmd[cmd_len+4];
2042 real_cmd[0] = 0x0a; //I-Block
2043 // put block number into the PCB
2044 real_cmd[0] |= iso14_pcb_blocknum;
2045 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
2046 memcpy(real_cmd+2, cmd, cmd_len);
2047 AppendCrc14443a(real_cmd,cmd_len+2);
2048
2049 ReaderTransmit(real_cmd, cmd_len+4, NULL);
2050 size_t len = ReaderReceive(data, parity);
2051 uint8_t *data_bytes = (uint8_t *) data;
2052 if (!len)
2053 return 0; //DATA LINK ERROR
2054 // if we received an I- or R(ACK)-Block with a block number equal to the
2055 // current block number, toggle the current block number
2056 else if (len >= 4 // PCB+CID+CRC = 4 bytes
2057 && ((data_bytes[0] & 0xC0) == 0 // I-Block
2058 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
2059 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
2060 {
2061 iso14_pcb_blocknum ^= 1;
2062 }
2063
2064 return len;
2065 }
2066
2067 //-----------------------------------------------------------------------------
2068 // Read an ISO 14443a tag. Send out commands and store answers.
2069 //
2070 //-----------------------------------------------------------------------------
2071 void ReaderIso14443a(UsbCommand *c)
2072 {
2073 iso14a_command_t param = c->arg[0];
2074 uint8_t *cmd = c->d.asBytes;
2075 size_t len = c->arg[1] & 0xffff;
2076 size_t lenbits = c->arg[1] >> 16;
2077 uint32_t timeout = c->arg[2];
2078 uint32_t arg0 = 0;
2079 byte_t buf[USB_CMD_DATA_SIZE];
2080 uint8_t par[MAX_PARITY_SIZE];
2081
2082 if(param & ISO14A_CONNECT) {
2083 clear_trace();
2084 }
2085
2086 set_tracing(TRUE);
2087
2088 if(param & ISO14A_REQUEST_TRIGGER) {
2089 iso14a_set_trigger(TRUE);
2090 }
2091
2092 if(param & ISO14A_CONNECT) {
2093 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
2094 if(!(param & ISO14A_NO_SELECT)) {
2095 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
2096 arg0 = iso14443a_select_card(NULL,card,NULL);
2097 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
2098 }
2099 }
2100
2101 if(param & ISO14A_SET_TIMEOUT) {
2102 iso14a_set_timeout(timeout);
2103 }
2104
2105 if(param & ISO14A_APDU) {
2106 arg0 = iso14_apdu(cmd, len, buf);
2107 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2108 }
2109
2110 if(param & ISO14A_RAW) {
2111 if(param & ISO14A_APPEND_CRC) {
2112 if(param & ISO14A_TOPAZMODE) {
2113 AppendCrc14443b(cmd,len);
2114 } else {
2115 AppendCrc14443a(cmd,len);
2116 }
2117 len += 2;
2118 if (lenbits) lenbits += 16;
2119 }
2120 if(lenbits>0) { // want to send a specific number of bits (e.g. short commands)
2121 if(param & ISO14A_TOPAZMODE) {
2122 int bits_to_send = lenbits;
2123 uint16_t i = 0;
2124 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 7), NULL, NULL); // first byte is always short (7bits) and no parity
2125 bits_to_send -= 7;
2126 while (bits_to_send > 0) {
2127 ReaderTransmitBitsPar(&cmd[i++], MIN(bits_to_send, 8), NULL, NULL); // following bytes are 8 bit and no parity
2128 bits_to_send -= 8;
2129 }
2130 } else {
2131 GetParity(cmd, lenbits/8, par);
2132 ReaderTransmitBitsPar(cmd, lenbits, par, NULL); // bytes are 8 bit with odd parity
2133 }
2134 } else { // want to send complete bytes only
2135 if(param & ISO14A_TOPAZMODE) {
2136 uint16_t i = 0;
2137 ReaderTransmitBitsPar(&cmd[i++], 7, NULL, NULL); // first byte: 7 bits, no paritiy
2138 while (i < len) {
2139 ReaderTransmitBitsPar(&cmd[i++], 8, NULL, NULL); // following bytes: 8 bits, no paritiy
2140 }
2141 } else {
2142 ReaderTransmit(cmd,len, NULL); // 8 bits, odd parity
2143 }
2144 }
2145 arg0 = ReaderReceive(buf, par);
2146 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
2147 }
2148
2149 if(param & ISO14A_REQUEST_TRIGGER) {
2150 iso14a_set_trigger(FALSE);
2151 }
2152
2153 if(param & ISO14A_NO_DISCONNECT) {
2154 return;
2155 }
2156
2157 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2158 LEDsoff();
2159 }
2160
2161
2162 // Determine the distance between two nonces.
2163 // Assume that the difference is small, but we don't know which is first.
2164 // Therefore try in alternating directions.
2165 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
2166
2167 if (nt1 == nt2) return 0;
2168
2169 uint16_t i;
2170 uint32_t nttmp1 = nt1;
2171 uint32_t nttmp2 = nt2;
2172
2173 for (i = 1; i < 32768; i++) {
2174 nttmp1 = prng_successor(nttmp1, 1);
2175 if (nttmp1 == nt2) return i;
2176 nttmp2 = prng_successor(nttmp2, 1);
2177 if (nttmp2 == nt1) return -i;
2178 }
2179
2180 return(-99999); // either nt1 or nt2 are invalid nonces
2181 }
2182
2183
2184 //-----------------------------------------------------------------------------
2185 // Recover several bits of the cypher stream. This implements (first stages of)
2186 // the algorithm described in "The Dark Side of Security by Obscurity and
2187 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2188 // (article by Nicolas T. Courtois, 2009)
2189 //-----------------------------------------------------------------------------
2190 void ReaderMifare(bool first_try) {
2191 // free eventually allocated BigBuf memory. We want all for tracing.
2192 BigBuf_free();
2193
2194 clear_trace();
2195 set_tracing(TRUE);
2196
2197 // Mifare AUTH
2198 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2199 uint8_t mf_nr_ar[8] = { 0x00 }; //{ 0x01,0x01,0x01,0x01,0x01,0x01,0x01,0x01 };
2200 static uint8_t mf_nr_ar3 = 0;
2201
2202 uint8_t receivedAnswer[MAX_MIFARE_FRAME_SIZE] = { 0x00 };
2203 uint8_t receivedAnswerPar[MAX_MIFARE_PARITY_SIZE] = { 0x00 };
2204
2205 byte_t nt_diff = 0;
2206 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2207 static byte_t par_low = 0;
2208 bool led_on = TRUE;
2209 uint8_t uid[10] = {0x00};
2210 //uint32_t cuid = 0x00;
2211
2212 uint32_t nt = 0;
2213 uint32_t previous_nt = 0;
2214 static uint32_t nt_attacked = 0;
2215 byte_t par_list[8] = {0x00};
2216 byte_t ks_list[8] = {0x00};
2217
2218 static uint32_t sync_time = 0;
2219 static uint32_t sync_cycles = 0;
2220 int catch_up_cycles = 0;
2221 int last_catch_up = 0;
2222 uint16_t consecutive_resyncs = 0;
2223 int isOK = 0;
2224
2225 int numWrongDistance = 0;
2226
2227 if (first_try) {
2228 mf_nr_ar3 = 0;
2229 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2230 sync_time = GetCountSspClk() & 0xfffffff8;
2231 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2232 nt_attacked = 0;
2233 nt = 0;
2234 par[0] = 0;
2235 }
2236 else {
2237 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2238 mf_nr_ar3++;
2239 mf_nr_ar[3] = mf_nr_ar3;
2240 par[0] = par_low;
2241 }
2242
2243 LED_A_ON();
2244 LED_B_OFF();
2245 LED_C_OFF();
2246 LED_C_ON();
2247
2248 for(uint16_t i = 0; TRUE; i++) {
2249
2250 WDT_HIT();
2251
2252 // Test if the action was cancelled
2253 if(BUTTON_PRESS()) break;
2254
2255 if (numWrongDistance > 1000) {
2256 isOK = 0;
2257 break;
2258 }
2259
2260 //if(!iso14443a_select_card(uid, NULL, &cuid)) {
2261 if(!iso14443a_select_card(uid, NULL, NULL)) {
2262 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2263 continue;
2264 }
2265
2266 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2267 catch_up_cycles = 0;
2268
2269 // if we missed the sync time already, advance to the next nonce repeat
2270 while(GetCountSspClk() > sync_time) {
2271 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2272 }
2273
2274 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2275 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2276
2277 // Receive the (4 Byte) "random" nonce
2278 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2279 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2280 continue;
2281 }
2282
2283 previous_nt = nt;
2284 nt = bytes_to_num(receivedAnswer, 4);
2285
2286 // Transmit reader nonce with fake par
2287 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2288
2289 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2290 int nt_distance = dist_nt(previous_nt, nt);
2291 if (nt_distance == 0) {
2292 nt_attacked = nt;
2293 }
2294 else {
2295
2296 // invalid nonce received, try again
2297 if (nt_distance == -99999) {
2298 numWrongDistance++;
2299 if (MF_DBGLEVEL >= 3) Dbprintf("The two nonces has invalid distance, tag could have good PRNG\n");
2300 continue;
2301 }
2302
2303 sync_cycles = (sync_cycles - nt_distance);
2304 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2305 continue;
2306 }
2307 }
2308
2309 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2310 catch_up_cycles = -dist_nt(nt_attacked, nt);
2311 if (catch_up_cycles >= 99999) { // invalid nonce received. Don't resync on that one.
2312 catch_up_cycles = 0;
2313 continue;
2314 }
2315 if (catch_up_cycles == last_catch_up) {
2316 consecutive_resyncs++;
2317 }
2318 else {
2319 last_catch_up = catch_up_cycles;
2320 consecutive_resyncs = 0;
2321 }
2322 if (consecutive_resyncs < 3) {
2323 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2324 }
2325 else {
2326 sync_cycles = sync_cycles + catch_up_cycles;
2327 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2328 }
2329 continue;
2330 }
2331
2332 consecutive_resyncs = 0;
2333
2334 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2335 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2336 {
2337 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2338
2339 if (nt_diff == 0)
2340 {
2341 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2342 }
2343
2344 led_on = !led_on;
2345 if(led_on) LED_B_ON(); else LED_B_OFF();
2346
2347 par_list[nt_diff] = SwapBits(par[0], 8);
2348 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2349
2350 // Test if the information is complete
2351 if (nt_diff == 0x07) {
2352 isOK = 1;
2353 break;
2354 }
2355
2356 nt_diff = (nt_diff + 1) & 0x07;
2357 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2358 par[0] = par_low;
2359 } else {
2360 if (nt_diff == 0 && first_try)
2361 {
2362 par[0]++;
2363 } else {
2364 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2365 }
2366 }
2367 }
2368
2369 mf_nr_ar[3] &= 0x1F;
2370
2371 byte_t buf[28] = {0x00};
2372
2373 memcpy(buf + 0, uid, 4);
2374 num_to_bytes(nt, 4, buf + 4);
2375 memcpy(buf + 8, par_list, 8);
2376 memcpy(buf + 16, ks_list, 8);
2377 memcpy(buf + 24, mf_nr_ar, 4);
2378
2379 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2380
2381 set_tracing(FALSE);
2382 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2383 LEDsoff();
2384 }
2385
2386
2387 /*
2388 *MIFARE 1K simulate.
2389 *
2390 *@param flags :
2391 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2392 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2393 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2394 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2395 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2396 */
2397 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2398 {
2399 int cardSTATE = MFEMUL_NOFIELD;
2400 int _7BUID = 0;
2401 int vHf = 0; // in mV
2402 int res;
2403 uint32_t selTimer = 0;
2404 uint32_t authTimer = 0;
2405 uint16_t len = 0;
2406 uint8_t cardWRBL = 0;
2407 uint8_t cardAUTHSC = 0;
2408 uint8_t cardAUTHKEY = 0xff; // no authentication
2409 // uint32_t cardRr = 0;
2410 uint32_t cuid = 0;
2411 //uint32_t rn_enc = 0;
2412 uint32_t ans = 0;
2413 uint32_t cardINTREG = 0;
2414 uint8_t cardINTBLOCK = 0;
2415 struct Crypto1State mpcs = {0, 0};
2416 struct Crypto1State *pcs;
2417 pcs = &mpcs;
2418 uint32_t numReads = 0;//Counts numer of times reader read a block
2419 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2420 uint8_t receivedCmd_par[MAX_MIFARE_PARITY_SIZE];
2421 uint8_t response[MAX_MIFARE_FRAME_SIZE];
2422 uint8_t response_par[MAX_MIFARE_PARITY_SIZE];
2423
2424 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2425 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2426 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2427 //uint8_t rSAK[] = {0x08, 0xb6, 0xdd}; // Mifare Classic
2428 uint8_t rSAK[] = {0x09, 0x3f, 0xcc }; // Mifare Mini
2429 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2430
2431 uint8_t rAUTH_NT[] = {0x01, 0x01, 0x01, 0x01};
2432 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2433
2434 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2435 // This can be used in a reader-only attack.
2436 // (it can also be retrieved via 'hf 14a list', but hey...
2437 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0,0,0};
2438 uint8_t ar_nr_collected = 0;
2439
2440 // free eventually allocated BigBuf memory but keep Emulator Memory
2441 BigBuf_free_keep_EM();
2442
2443 // clear trace
2444 clear_trace();
2445 set_tracing(TRUE);
2446
2447 // Authenticate response - nonce
2448 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2449
2450 //-- Determine the UID
2451 // Can be set from emulator memory, incoming data
2452 // and can be 7 or 4 bytes long
2453 if (flags & FLAG_4B_UID_IN_DATA)
2454 {
2455 // 4B uid comes from data-portion of packet
2456 memcpy(rUIDBCC1,datain,4);
2457 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2458
2459 } else if (flags & FLAG_7B_UID_IN_DATA) {
2460 // 7B uid comes from data-portion of packet
2461 memcpy(&rUIDBCC1[1],datain,3);
2462 memcpy(rUIDBCC2, datain+3, 4);
2463 _7BUID = true;
2464 } else {
2465 // get UID from emul memory
2466 emlGetMemBt(receivedCmd, 7, 1);
2467 _7BUID = !(receivedCmd[0] == 0x00);
2468 if (!_7BUID) { // ---------- 4BUID
2469 emlGetMemBt(rUIDBCC1, 0, 4);
2470 } else { // ---------- 7BUID
2471 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2472 emlGetMemBt(rUIDBCC2, 3, 4);
2473 }
2474 }
2475
2476 // save uid.
2477 ar_nr_responses[0*5] = bytes_to_num(rUIDBCC1+1, 3);
2478 if ( _7BUID )
2479 ar_nr_responses[0*5+1] = bytes_to_num(rUIDBCC2, 4);
2480
2481 /*
2482 * Regardless of what method was used to set the UID, set fifth byte and modify
2483 * the ATQA for 4 or 7-byte UID
2484 */
2485 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2486 if (_7BUID) {
2487 rATQA[0] = 0x44;
2488 rUIDBCC1[0] = 0x88;
2489 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2490 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2491 }
2492
2493 // We need to listen to the high-frequency, peak-detected path.
2494 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2495
2496
2497 if (MF_DBGLEVEL >= 1) {
2498 if (!_7BUID) {
2499 Dbprintf("4B UID: %02x%02x%02x%02x",
2500 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2501 } else {
2502 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2503 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2504 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2505 }
2506 }
2507
2508 bool finished = FALSE;
2509 while (!BUTTON_PRESS() && !finished) {
2510 WDT_HIT();
2511
2512 // find reader field
2513 if (cardSTATE == MFEMUL_NOFIELD) {
2514 vHf = (MAX_ADC_HF_VOLTAGE * AvgAdc(ADC_CHAN_HF)) >> 10;
2515 if (vHf > MF_MINFIELDV) {
2516 cardSTATE_TO_IDLE();
2517 LED_A_ON();
2518 }
2519 }
2520 if(cardSTATE == MFEMUL_NOFIELD) continue;
2521
2522 //Now, get data
2523 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2524 if (res == 2) { //Field is off!
2525 cardSTATE = MFEMUL_NOFIELD;
2526 LEDsoff();
2527 continue;
2528 } else if (res == 1) {
2529 break; //return value 1 means button press
2530 }
2531
2532 // REQ or WUP request in ANY state and WUP in HALTED state
2533 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2534 selTimer = GetTickCount();
2535 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2536 cardSTATE = MFEMUL_SELECT1;
2537
2538 // init crypto block
2539 LED_B_OFF();
2540 LED_C_OFF();
2541 crypto1_destroy(pcs);
2542 cardAUTHKEY = 0xff;
2543 continue;
2544 }
2545
2546 switch (cardSTATE) {
2547 case MFEMUL_NOFIELD:
2548 case MFEMUL_HALTED:
2549 case MFEMUL_IDLE:{
2550 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2551 break;
2552 }
2553 case MFEMUL_SELECT1:{
2554 // select all
2555 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2556 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2557 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2558 break;
2559 }
2560
2561 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2562 {
2563 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2564 }
2565 // select card
2566 if (len == 9 &&
2567 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2568 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2569 cuid = bytes_to_num(rUIDBCC1, 4);
2570 if (!_7BUID) {
2571 cardSTATE = MFEMUL_WORK;
2572 LED_B_ON();
2573 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2574 break;
2575 } else {
2576 cardSTATE = MFEMUL_SELECT2;
2577 }
2578 }
2579 break;
2580 }
2581 case MFEMUL_AUTH1:{
2582 if( len != 8)
2583 {
2584 cardSTATE_TO_IDLE();
2585 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2586 break;
2587 }
2588
2589 uint32_t ar = bytes_to_num(receivedCmd, 4);
2590 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2591
2592 //Collect AR/NR
2593 //if(ar_nr_collected < 2 && cardAUTHSC == 2){
2594 if(ar_nr_collected < 2){
2595 if(ar_nr_responses[2] != ar)
2596 {// Avoid duplicates... probably not necessary, ar should vary.
2597 //ar_nr_responses[ar_nr_collected*5] = 0;
2598 //ar_nr_responses[ar_nr_collected*5+1] = 0;
2599 ar_nr_responses[ar_nr_collected*5+2] = nonce;
2600 ar_nr_responses[ar_nr_collected*5+3] = nr;
2601 ar_nr_responses[ar_nr_collected*5+4] = ar;
2602 ar_nr_collected++;
2603 }
2604 // Interactive mode flag, means we need to send ACK
2605 if(flags & FLAG_INTERACTIVE && ar_nr_collected == 2)
2606 {
2607 finished = true;
2608 }
2609 }
2610
2611 // --- crypto
2612 //crypto1_word(pcs, ar , 1);
2613 //cardRr = nr ^ crypto1_word(pcs, 0, 0);
2614
2615 //test if auth OK
2616 //if (cardRr != prng_successor(nonce, 64)){
2617
2618 //if (MF_DBGLEVEL >= 4) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2619 // cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2620 // cardRr, prng_successor(nonce, 64));
2621 // Shouldn't we respond anything here?
2622 // Right now, we don't nack or anything, which causes the
2623 // reader to do a WUPA after a while. /Martin
2624 // -- which is the correct response. /piwi
2625 //cardSTATE_TO_IDLE();
2626 //LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2627 //break;
2628 //}
2629
2630 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2631
2632 num_to_bytes(ans, 4, rAUTH_AT);
2633 // --- crypto
2634 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2635 LED_C_ON();
2636 cardSTATE = MFEMUL_WORK;
2637 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2638 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2639 GetTickCount() - authTimer);
2640 break;
2641 }
2642 case MFEMUL_SELECT2:{
2643 if (!len) {
2644 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2645 break;
2646 }
2647 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2648 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2649 break;
2650 }
2651
2652 // select 2 card
2653 if (len == 9 &&
2654 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2655 EmSendCmd(rSAK, sizeof(rSAK));
2656 cuid = bytes_to_num(rUIDBCC2, 4);
2657 cardSTATE = MFEMUL_WORK;
2658 LED_B_ON();
2659 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2660 break;
2661 }
2662
2663 // i guess there is a command). go into the work state.
2664 if (len != 4) {
2665 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2666 break;
2667 }
2668 cardSTATE = MFEMUL_WORK;
2669 //goto lbWORK;
2670 //intentional fall-through to the next case-stmt
2671 }
2672
2673 case MFEMUL_WORK:{
2674 if (len == 0) {
2675 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2676 break;
2677 }
2678
2679 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2680
2681 if(encrypted_data) {
2682 // decrypt seqence
2683 mf_crypto1_decrypt(pcs, receivedCmd, len);
2684 }
2685
2686 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2687 authTimer = GetTickCount();
2688 cardAUTHSC = receivedCmd[1] / 4; // received block num
2689 cardAUTHKEY = receivedCmd[0] - 0x60;
2690 crypto1_destroy(pcs);//Added by martin
2691 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2692
2693 if (!encrypted_data) { // first authentication
2694 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2695
2696 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2697 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2698 } else { // nested authentication
2699 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2700 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2701 num_to_bytes(ans, 4, rAUTH_AT);
2702 }
2703
2704 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2705 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2706 cardSTATE = MFEMUL_AUTH1;
2707 break;
2708 }
2709
2710 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2711 // BUT... ACK --> NACK
2712 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2713 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2714 break;
2715 }
2716
2717 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2718 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2719 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2720 break;
2721 }
2722
2723 if(len != 4) {
2724 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2725 break;
2726 }
2727
2728 if(receivedCmd[0] == 0x30 // read block
2729 || receivedCmd[0] == 0xA0 // write block
2730 || receivedCmd[0] == 0xC0 // inc
2731 || receivedCmd[0] == 0xC1 // dec
2732 || receivedCmd[0] == 0xC2 // restore
2733 || receivedCmd[0] == 0xB0) { // transfer
2734 if (receivedCmd[1] >= 16 * 4) {
2735 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2736 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2737 break;
2738 }
2739
2740 if (receivedCmd[1] / 4 != cardAUTHSC) {
2741 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2742 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2743 break;
2744 }
2745 }
2746 // read block
2747 if (receivedCmd[0] == 0x30) {
2748 if (MF_DBGLEVEL >= 4) {
2749 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2750 }
2751 emlGetMem(response, receivedCmd[1], 1);
2752 AppendCrc14443a(response, 16);
2753 mf_crypto1_encrypt(pcs, response, 18, response_par);
2754 EmSendCmdPar(response, 18, response_par);
2755 numReads++;
2756 if(exitAfterNReads > 0 && numReads >= exitAfterNReads) {
2757 Dbprintf("%d reads done, exiting", numReads);
2758 finished = true;
2759 }
2760 break;
2761 }
2762 // write block
2763 if (receivedCmd[0] == 0xA0) {
2764 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2765 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2766 cardSTATE = MFEMUL_WRITEBL2;
2767 cardWRBL = receivedCmd[1];
2768 break;
2769 }
2770 // increment, decrement, restore
2771 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2772 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2773 if (emlCheckValBl(receivedCmd[1])) {
2774 if (MF_DBGLEVEL >= 4) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2775 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2776 break;
2777 }
2778 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2779 if (receivedCmd[0] == 0xC1)
2780 cardSTATE = MFEMUL_INTREG_INC;
2781 if (receivedCmd[0] == 0xC0)
2782 cardSTATE = MFEMUL_INTREG_DEC;
2783 if (receivedCmd[0] == 0xC2)
2784 cardSTATE = MFEMUL_INTREG_REST;
2785 cardWRBL = receivedCmd[1];
2786 break;
2787 }
2788 // transfer
2789 if (receivedCmd[0] == 0xB0) {
2790 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2791 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2792 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2793 else
2794 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2795 break;
2796 }
2797 // halt
2798 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2799 LED_B_OFF();
2800 LED_C_OFF();
2801 cardSTATE = MFEMUL_HALTED;
2802 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2803 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2804 break;
2805 }
2806 // RATS
2807 if (receivedCmd[0] == 0xe0) {//RATS
2808 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2809 break;
2810 }
2811 // command not allowed
2812 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2813 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2814 break;
2815 }
2816 case MFEMUL_WRITEBL2:{
2817 if (len == 18){
2818 mf_crypto1_decrypt(pcs, receivedCmd, len);
2819 emlSetMem(receivedCmd, cardWRBL, 1);
2820 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2821 cardSTATE = MFEMUL_WORK;
2822 } else {
2823 cardSTATE_TO_IDLE();
2824 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2825 }
2826 break;
2827 }
2828
2829 case MFEMUL_INTREG_INC:{
2830 mf_crypto1_decrypt(pcs, receivedCmd, len);
2831 memcpy(&ans, receivedCmd, 4);
2832 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2833 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2834 cardSTATE_TO_IDLE();
2835 break;
2836 }
2837 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2838 cardINTREG = cardINTREG + ans;
2839 cardSTATE = MFEMUL_WORK;
2840 break;
2841 }
2842 case MFEMUL_INTREG_DEC:{
2843 mf_crypto1_decrypt(pcs, receivedCmd, len);
2844 memcpy(&ans, receivedCmd, 4);
2845 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2846 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2847 cardSTATE_TO_IDLE();
2848 break;
2849 }
2850 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2851 cardINTREG = cardINTREG - ans;
2852 cardSTATE = MFEMUL_WORK;
2853 break;
2854 }
2855 case MFEMUL_INTREG_REST:{
2856 mf_crypto1_decrypt(pcs, receivedCmd, len);
2857 memcpy(&ans, receivedCmd, 4);
2858 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2859 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2860 cardSTATE_TO_IDLE();
2861 break;
2862 }
2863 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2864 cardSTATE = MFEMUL_WORK;
2865 break;
2866 }
2867 }
2868 }
2869
2870 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2871 LEDsoff();
2872
2873 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2874 {
2875 //May just aswell send the collected ar_nr in the response aswell
2876 uint8_t len = ar_nr_collected*5*4;
2877 cmd_send(CMD_ACK, CMD_SIMULATE_MIFARE_CARD, len, 0, &ar_nr_responses, len);
2878 }
2879
2880 if(flags & FLAG_NR_AR_ATTACK && MF_DBGLEVEL >= 1 )
2881 {
2882 if(ar_nr_collected > 1 ) {
2883 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2884 Dbprintf("../tools/mfkey/mfkey32 %06x%08x %08x %08x %08x %08x %08x",
2885 ar_nr_responses[0], // UID1
2886 ar_nr_responses[1], // UID2
2887 ar_nr_responses[2], // NT
2888 ar_nr_responses[3], // AR1
2889 ar_nr_responses[4], // NR1
2890 ar_nr_responses[8], // AR2
2891 ar_nr_responses[9] // NR2
2892 );
2893 } else {
2894 Dbprintf("Failed to obtain two AR/NR pairs!");
2895 if(ar_nr_collected > 0 ) {
2896 Dbprintf("Only got these: UID=%07x%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2897 ar_nr_responses[0], // UID1
2898 ar_nr_responses[1], // UID2
2899 ar_nr_responses[2], // NT
2900 ar_nr_responses[3], // AR1
2901 ar_nr_responses[4] // NR1
2902 );
2903 }
2904 }
2905 }
2906 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, BigBuf_get_traceLen());
2907 }
2908
2909
2910 //-----------------------------------------------------------------------------
2911 // MIFARE sniffer.
2912 //
2913 //-----------------------------------------------------------------------------
2914 void RAMFUNC SniffMifare(uint8_t param) {
2915 // param:
2916 // bit 0 - trigger from first card answer
2917 // bit 1 - trigger from first reader 7-bit request
2918
2919 // free eventually allocated BigBuf memory
2920 BigBuf_free();
2921
2922 // C(red) A(yellow) B(green)
2923 LEDsoff();
2924 // init trace buffer
2925 clear_trace();
2926 set_tracing(TRUE);
2927
2928 // The command (reader -> tag) that we're receiving.
2929 // The length of a received command will in most cases be no more than 18 bytes.
2930 // So 32 should be enough!
2931 uint8_t receivedCmd[MAX_MIFARE_FRAME_SIZE];
2932 uint8_t receivedCmdPar[MAX_MIFARE_PARITY_SIZE];
2933 // The response (tag -> reader) that we're receiving.
2934 uint8_t receivedResponse[MAX_MIFARE_FRAME_SIZE];
2935 uint8_t receivedResponsePar[MAX_MIFARE_PARITY_SIZE];
2936
2937 // allocate the DMA buffer, used to stream samples from the FPGA
2938 uint8_t *dmaBuf = BigBuf_malloc(DMA_BUFFER_SIZE);
2939 uint8_t *data = dmaBuf;
2940 uint8_t previous_data = 0;
2941 int maxDataLen = 0;
2942 int dataLen = 0;
2943 bool ReaderIsActive = FALSE;
2944 bool TagIsActive = FALSE;
2945
2946 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2947
2948 // Set up the demodulator for tag -> reader responses.
2949 DemodInit(receivedResponse, receivedResponsePar);
2950
2951 // Set up the demodulator for the reader -> tag commands
2952 UartInit(receivedCmd, receivedCmdPar);
2953
2954 // Setup for the DMA.
2955 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2956
2957 LED_D_OFF();
2958
2959 // init sniffer
2960 MfSniffInit();
2961
2962 // And now we loop, receiving samples.
2963 for(uint32_t sniffCounter = 0; TRUE; ) {
2964
2965 if(BUTTON_PRESS()) {
2966 DbpString("cancelled by button");
2967 break;
2968 }
2969
2970 LED_A_ON();
2971 WDT_HIT();
2972
2973 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2974 // check if a transaction is completed (timeout after 2000ms).
2975 // if yes, stop the DMA transfer and send what we have so far to the client
2976 if (MfSniffSend(2000)) {
2977 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2978 sniffCounter = 0;
2979 data = dmaBuf;
2980 maxDataLen = 0;
2981 ReaderIsActive = FALSE;
2982 TagIsActive = FALSE;
2983 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2984 }
2985 }
2986
2987 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2988 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2989 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2990 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2991 } else {
2992 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2993 }
2994 // test for length of buffer
2995 if(dataLen > maxDataLen) { // we are more behind than ever...
2996 maxDataLen = dataLen;
2997 if(dataLen > (9 * DMA_BUFFER_SIZE / 10)) {
2998 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2999 break;
3000 }
3001 }
3002 if(dataLen < 1) continue;
3003
3004 // primary buffer was stopped ( <-- we lost data!
3005 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
3006 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
3007 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
3008 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
3009 }
3010 // secondary buffer sets as primary, secondary buffer was stopped
3011 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
3012 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
3013 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
3014 }
3015
3016 LED_A_OFF();
3017
3018 if (sniffCounter & 0x01) {
3019
3020 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
3021 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
3022 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
3023 LED_C_INV();
3024 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
3025
3026 /* And ready to receive another command. */
3027 //UartInit(receivedCmd, receivedCmdPar);
3028 UartReset();
3029
3030 /* And also reset the demod code */
3031 DemodReset();
3032 }
3033 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
3034 }
3035
3036 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
3037 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
3038 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
3039 LED_C_INV();
3040
3041 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
3042
3043 // And ready to receive another response.
3044 DemodReset();
3045
3046 // And reset the Miller decoder including its (now outdated) input buffer
3047 UartInit(receivedCmd, receivedCmdPar);
3048 }
3049 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
3050 }
3051 }
3052
3053 previous_data = *data;
3054 sniffCounter++;
3055 data++;
3056 if(data == dmaBuf + DMA_BUFFER_SIZE) {
3057 data = dmaBuf;
3058 }
3059
3060 } // main cycle
3061
3062 DbpString("COMMAND FINISHED");
3063
3064 FpgaDisableSscDma();
3065 MfSniffEnd();
3066
3067 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
3068 LEDsoff();
3069 }
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