cvs.zerfleddert.de Git - proxmark3-svn/blob - bootrom/bootrom.c

   1 //-----------------------------------------------------------------------------
   2 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
   3 // at your option, any later version. See the LICENSE.txt file for the text of
   4 // the license.
   5 //-----------------------------------------------------------------------------
   6 // Main code for the bootloader
   7 //-----------------------------------------------------------------------------
   8
   9 #include <proxmark3.h>
  10 #include "usb_cdc.h"
  11 #include "cmd.h"
  12
  13 void DbpString(char *str) {
  14         byte_t len = 0;
  15         while (str[len] != 0x00)
  16                 ++len;
  17
  18         cmd_send(CMD_DEBUG_PRINT_STRING,len,0,0,(byte_t*)str,len);
  19 }
  20
  21 struct common_area common_area __attribute__((section(".commonarea")));
  22 unsigned int start_addr, end_addr, bootrom_unlocked;
  23 extern char _bootrom_start, _bootrom_end, _flash_start, _flash_end;
  24
  25 static void ConfigClocks(void)
  26 {
  27     // we are using a 16 MHz crystal as the basis for everything
  28     // slow clock runs at 32Khz typical regardless of crystal
  29
  30     // enable system clock and USB clock
  31     AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_PCK | AT91C_PMC_UDP;
  32
  33         // enable the clock to the following peripherals
  34     AT91C_BASE_PMC->PMC_PCER =
  35                 (1<<AT91C_ID_PIOA)      |
  36                 (1<<AT91C_ID_ADC)       |
  37                 (1<<AT91C_ID_SPI)       |
  38                 (1<<AT91C_ID_SSC)       |
  39                 (1<<AT91C_ID_PWMC)      |
  40                 (1<<AT91C_ID_UDP);
  41
  42         // worst case scenario, with MAINCK = 16Mhz xtal, startup delay is 1.4ms
  43         // if SLCK slow clock runs at its worst case (max) frequency of 42khz
  44         // max startup delay = (1.4ms*42k)/8 = 7.356 so round up to 8
  45
  46         // enable main oscillator and set startup delay
  47     AT91C_BASE_PMC->PMC_MOR =
  48         AT91C_CKGR_MOSCEN |
  49         PMC_MAIN_OSC_STARTUP_DELAY(8);
  50
  51         // wait for main oscillator to stabilize
  52         while ( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS) )
  53                 ;
  54
  55     // PLL output clock frequency in range  80 - 160 MHz needs CKGR_PLL = 00
  56     // PLL output clock frequency in range 150 - 180 MHz needs CKGR_PLL = 10
  57     // PLL output is MAINCK * multiplier / divisor = 16Mhz * 12 / 2 = 96Mhz
  58     AT91C_BASE_PMC->PMC_PLLR =
  59         PMC_PLL_DIVISOR(2) |
  60                 PMC_PLL_COUNT_BEFORE_LOCK(0x50) |
  61                 PMC_PLL_FREQUENCY_RANGE(0) |
  62                 PMC_PLL_MULTIPLIER(12) |
  63                 PMC_PLL_USB_DIVISOR(1);
  64
  65         // wait for PLL to lock
  66         while ( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK) )
  67                 ;
  68
  69         // we want a master clock (MCK) to be PLL clock / 2 = 96Mhz / 2 = 48Mhz
  70         // datasheet recommends that this register is programmed in two operations
  71         // when changing to PLL, program the prescaler first then the source
  72     AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2;
  73
  74         // wait for main clock ready signal
  75         while ( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) )
  76                 ;
  77
  78         // set the source to PLL
  79     AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_PRES_CLK_2 | AT91C_PMC_CSS_PLL_CLK;
  80
  81         // wait for main clock ready signal
  82         while ( !(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY) )
  83                 ;
  84 }
  85
  86 static void Fatal(void) {
  87   for(;;);
  88 }
  89
  90 void UsbPacketReceived(uint8_t *packet, int len) {
  91         int i, dont_ack=0;
  92         UsbCommand* c = (UsbCommand *)packet;
  93         volatile uint32_t *p;
  94
  95         if(len != sizeof(UsbCommand)) Fatal();
  96
  97         uint32_t arg0 = (uint32_t)c->arg[0];
  98
  99         switch(c->cmd) {
 100                 case CMD_DEVICE_INFO: {
 101                         dont_ack = 1;
 102                         arg0 = DEVICE_INFO_FLAG_BOOTROM_PRESENT | DEVICE_INFO_FLAG_CURRENT_MODE_BOOTROM |
 103                         DEVICE_INFO_FLAG_UNDERSTANDS_START_FLASH;
 104                         if(common_area.flags.osimage_present)
 105                                 arg0 |= DEVICE_INFO_FLAG_OSIMAGE_PRESENT;
 106
 107                         cmd_send(CMD_DEVICE_INFO,arg0,1,2,0,0);
 108                 } break;
 109
 110                 case CMD_SETUP_WRITE: {
 111                         /* The temporary write buffer of the embedded flash controller is mapped to the
 112                         * whole memory region, only the last 8 bits are decoded.
 113                         */
 114                         p = (volatile uint32_t *)&_flash_start;
 115                         for(i = 0; i < 12; i++)
 116                                 p[i+arg0] = c->d.asDwords[i];
 117                 } break;
 118
 119                 case CMD_FINISH_WRITE: {
 120                         uint32_t* flash_mem = (uint32_t*)(&_flash_start);
 121                         for ( int j=0; j<2; j++) {
 122                                 for(i = 0+(64*j); i < 64+(64*j); i++) {
 123                                         flash_mem[i] = c->d.asDwords[i];
 124                                 }
 125
 126                                 uint32_t flash_address = arg0 + (0x100*j);
 127
 128                                 /* Check that the address that we are supposed to write to is within our allowed region */
 129                                 if( ((flash_address+AT91C_IFLASH_PAGE_SIZE-1) >= end_addr) || (flash_address < start_addr) ) {
 130                                         /* Disallow write */
 131                                         dont_ack = 1;
 132                                         cmd_send(CMD_NACK,0,0,0,0,0);
 133                                 } else {
 134                                         uint32_t page_n = (flash_address - ((uint32_t)flash_mem)) / AT91C_IFLASH_PAGE_SIZE;
 135                                         /* Translate address to flash page and do flash, update here for the 512k part */
 136                                         AT91C_BASE_EFC0->EFC_FCR = MC_FLASH_COMMAND_KEY |
 137                                         MC_FLASH_COMMAND_PAGEN(page_n) |
 138                                         AT91C_MC_FCMD_START_PROG;
 139                                 }
 140
 141                                 // Wait until flashing of page finishes
 142                                 uint32_t sr;
 143                                 while(!((sr = AT91C_BASE_EFC0->EFC_FSR) & AT91C_MC_FRDY));
 144                 if(sr & (AT91C_MC_LOCKE | AT91C_MC_PROGE)) {
 145                     dont_ack = 1;
 146                     cmd_send(CMD_NACK,sr,0,0,0,0);
 147                 }
 148                         }
 149                 } break;
 150
 151                 case CMD_HARDWARE_RESET: {
 152                         usb_disable();
 153                         AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
 154                 } break;
 155
 156                 case CMD_START_FLASH: {
 157                         if(c->arg[2] == START_FLASH_MAGIC)
 158                                 bootrom_unlocked = 1;
 159                         else
 160                                 bootrom_unlocked = 0;
 161
 162                         int prot_start = (int)&_bootrom_start;
 163                         int prot_end = (int)&_bootrom_end;
 164                         int allow_start = (int)&_flash_start;
 165                         int allow_end = (int)&_flash_end;
 166                         int cmd_start = c->arg[0];
 167                         int cmd_end = c->arg[1];
 168
 169                         /* Only allow command if the bootrom is unlocked, or the parameters are outside of the protected
 170                         * bootrom area. In any case they must be within the flash area.
 171                         */
 172                         if( (bootrom_unlocked || ((cmd_start >= prot_end) || (cmd_end < prot_start))) &&
 173                                 (cmd_start >= allow_start) &&
 174                                 (cmd_end <= allow_end) ) {
 175                                 start_addr = cmd_start;
 176                                 end_addr = cmd_end;
 177                         } else {
 178                                 start_addr = end_addr = 0;
 179                                 dont_ack = 1;
 180                                 cmd_send(CMD_NACK,0,0,0,0,0);
 181                         }
 182                 } break;
 183
 184                 default: {
 185                         Fatal();
 186                 } break;
 187         }
 188
 189         if(!dont_ack)
 190                 cmd_send(CMD_ACK,arg0,0,0,0,0);
 191 }
 192
 193 static void flash_mode(int externally_entered)
 194 {
 195         start_addr = 0;
 196         end_addr = 0;
 197         bootrom_unlocked = 0;
 198         byte_t rx[sizeof(UsbCommand)];
 199         size_t rx_len;
 200
 201         usb_enable();
 202         for (volatile size_t i=0; i<0x100000; i++)
 203                 ;
 204
 205         for(;;) {
 206                 WDT_HIT();
 207
 208                 if (usb_poll()) {
 209                         rx_len = usb_read(rx,sizeof(UsbCommand));
 210                         if (rx_len)
 211                                 UsbPacketReceived(rx,rx_len);
 212                 }
 213
 214                 if(!externally_entered && !BUTTON_PRESS()) {
 215                         /* Perform a reset to leave flash mode */
 216                         usb_disable();
 217                         LED_B_ON();
 218                         AT91C_BASE_RSTC->RSTC_RCR = RST_CONTROL_KEY | AT91C_RSTC_PROCRST;
 219                         for(;;)
 220                                 ;
 221                 }
 222                 if(externally_entered && BUTTON_PRESS()) {
 223                         /* Let the user's button press override the automatic leave */
 224                         externally_entered = 0;
 225                 }
 226         }
 227 }
 228
 229 extern uint32_t _osimage_entry;
 230 void BootROM(void)
 231 {
 232     //------------
 233     // First set up all the I/O pins; GPIOs configured directly, other ones
 234     // just need to be assigned to the appropriate peripheral.
 235
 236     // Kill all the pullups, especially the one on USB D+; leave them for
 237     // the unused pins, though.
 238     AT91C_BASE_PIOA->PIO_PPUDR =
 239         GPIO_USB_PU                     |
 240                 GPIO_LED_A                      |
 241                 GPIO_LED_B                      |
 242                 GPIO_LED_C                      |
 243                 GPIO_LED_D                      |
 244                 GPIO_FPGA_DIN           |
 245                 GPIO_FPGA_DOUT          |
 246                 GPIO_FPGA_CCLK          |
 247                 GPIO_FPGA_NINIT         |
 248                 GPIO_FPGA_NPROGRAM      |
 249                 GPIO_FPGA_DONE          |
 250                 GPIO_MUXSEL_HIPKD       |
 251                 GPIO_MUXSEL_HIRAW       |
 252                 GPIO_MUXSEL_LOPKD       |
 253                 GPIO_MUXSEL_LORAW       |
 254                 GPIO_RELAY                      |
 255                 GPIO_NVDD_ON;
 256                 // (and add GPIO_FPGA_ON)
 257         // These pins are outputs
 258     AT91C_BASE_PIOA->PIO_OER =
 259         GPIO_LED_A                      |
 260                 GPIO_LED_B                      |
 261                 GPIO_LED_C                      |
 262                 GPIO_LED_D                      |
 263                 GPIO_RELAY                      |
 264                 GPIO_NVDD_ON;
 265         // PIO controls the following pins
 266     AT91C_BASE_PIOA->PIO_PER =
 267         GPIO_USB_PU                     |
 268                 GPIO_LED_A                      |
 269                 GPIO_LED_B                      |
 270                 GPIO_LED_C                      |
 271                 GPIO_LED_D;
 272
 273 //    USB_D_PLUS_PULLUP_OFF();
 274         usb_disable();
 275         LED_D_OFF();
 276         LED_C_ON();
 277         LED_B_OFF();
 278         LED_A_OFF();
 279
 280         AT91C_BASE_EFC0->EFC_FMR =
 281                 AT91C_MC_FWS_1FWS |
 282                 MC_FLASH_MODE_MASTER_CLK_IN_MHZ(48);
 283
 284     // Initialize all system clocks
 285     ConfigClocks();
 286
 287     LED_A_ON();
 288
 289     int common_area_present = 0;
 290     switch(AT91C_BASE_RSTC->RSTC_RSR & AT91C_RSTC_RSTTYP) {
 291     case AT91C_RSTC_RSTTYP_WATCHDOG:
 292     case AT91C_RSTC_RSTTYP_SOFTWARE:
 293     case AT91C_RSTC_RSTTYP_USER:
 294             /* In these cases the common_area in RAM should be ok, retain it if it's there */
 295             if(common_area.magic == COMMON_AREA_MAGIC && common_area.version == 1) {
 296                     common_area_present = 1;
 297             }
 298             break;
 299     default: /* Otherwise, initialize it from scratch */
 300             break;
 301     }
 302
 303     if(!common_area_present){
 304             /* Common area not ok, initialize it */
 305             int i;
 306                 /* Makeshift memset, no need to drag util.c into this */
 307                 for(i=0; i<sizeof(common_area); i++)
 308                     ((char*)&common_area)[i] = 0;
 309
 310             common_area.magic = COMMON_AREA_MAGIC;
 311             common_area.version = 1;
 312             common_area.flags.bootrom_present = 1;
 313     }
 314
 315     common_area.flags.bootrom_present = 1;
 316     if(common_area.command == COMMON_AREA_COMMAND_ENTER_FLASH_MODE) {
 317             common_area.command = COMMON_AREA_COMMAND_NONE;
 318             flash_mode(1);
 319     } else if(BUTTON_PRESS()) {
 320             flash_mode(0);
 321     } else if(_osimage_entry == 0xffffffffU) {
 322             flash_mode(1);
 323     } else {
 324             // jump to Flash address of the osimage entry point (LSBit set for thumb mode)
 325             __asm("bx %0\n" : : "r" ( ((int)&_osimage_entry) | 0x1 ) );
 326     }
 327 }