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1 //-----------------------------------------------------------------------------
2 // Jonathan Westhues, split Nov 2006
3 // Modified by Greg Jones, Jan 2009
4 // Modified by Adrian Dabrowski "atrox", Mar-Sept 2010,Oct 2011
5 // Modified by piwi, Oct 2018
6 //
7 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
8 // at your option, any later version. See the LICENSE.txt file for the text of
9 // the license.
10 //-----------------------------------------------------------------------------
11 // Routines to support ISO 15693. This includes both the reader software and
12 // the `fake tag' modes.
13 //-----------------------------------------------------------------------------
14
15 // The ISO 15693 describes two transmission modes from reader to tag, and four
16 // transmission modes from tag to reader. As of Oct 2018 this code supports
17 // both reader modes and the high speed variant with one subcarrier from card to reader.
18 // As long as the card fully support ISO 15693 this is no problem, since the
19 // reader chooses both data rates, but some non-standard tags do not.
20 // For card simulation, the code supports both high and low speed modes with one subcarrier.
21 //
22 // VCD (reader) -> VICC (tag)
23 // 1 out of 256:
24 // data rate: 1,66 kbit/s (fc/8192)
25 // used for long range
26 // 1 out of 4:
27 // data rate: 26,48 kbit/s (fc/512)
28 // used for short range, high speed
29 //
30 // VICC (tag) -> VCD (reader)
31 // Modulation:
32 // ASK / one subcarrier (423,75 khz)
33 // FSK / two subcarriers (423,75 khz && 484,28 khz)
34 // Data Rates / Modes:
35 // low ASK: 6,62 kbit/s
36 // low FSK: 6.67 kbit/s
37 // high ASK: 26,48 kbit/s
38 // high FSK: 26,69 kbit/s
39 //-----------------------------------------------------------------------------
40
41
42 // Random Remarks:
43 // *) UID is always used "transmission order" (LSB), which is reverse to display order
44
45 // TODO / BUGS / ISSUES:
46 // *) signal decoding is unable to detect collisions.
47 // *) add anti-collision support for inventory-commands
48 // *) read security status of a block
49 // *) sniffing and simulation do not support two subcarrier modes.
50 // *) remove or refactor code under "depricated"
51 // *) document all the functions
52
53
54 #include "proxmark3.h"
55 #include "util.h"
56 #include "apps.h"
57 #include "string.h"
58 #include "iso15693tools.h"
59 #include "protocols.h"
60 #include "cmd.h"
61
62 #define arraylen(x) (sizeof(x)/sizeof((x)[0]))
63
64 static int DEBUG = 0;
65
66 ///////////////////////////////////////////////////////////////////////
67 // ISO 15693 Part 2 - Air Interface
68 // This section basicly contains transmission and receiving of bits
69 ///////////////////////////////////////////////////////////////////////
70
71 #define FrameSOF Iso15693FrameSOF
72 #define Logic0 Iso15693Logic0
73 #define Logic1 Iso15693Logic1
74 #define FrameEOF Iso15693FrameEOF
75
76 #define Crc(data,datalen) Iso15693Crc(data,datalen)
77 #define AddCrc(data,datalen) Iso15693AddCrc(data,datalen)
78 #define sprintUID(target,uid) Iso15693sprintUID(target,uid)
79
80 // approximate amplitude=sqrt(ci^2+cq^2) by amplitude = max(|ci|,|cq|) + 1/2*min(|ci|,|cq|)
81 #define AMPLITUDE(ci, cq) (MAX(ABS(ci), ABS(cq)) + MIN(ABS(ci), ABS(cq))/2)
82
83 // buffers
84 #define ISO15693_DMA_BUFFER_SIZE 128
85 #define ISO15693_MAX_RESPONSE_LENGTH 36 // allows read single block with the maximum block size of 256bits. Read multiple blocks not supported yet
86 #define ISO15693_MAX_COMMAND_LENGTH 45 // allows write single block with the maximum block size of 256bits. Write multiple blocks not supported yet
87
88 // timing. Delays in SSP_CLK ticks.
89 #define DELAY_READER_TO_ARM 8
90 #define DELAY_ARM_TO_READER 1
91 #define DELAY_ISO15693_VCD_TO_VICC 132 // 132/423.75kHz = 311.5us from end of EOF to start of tag response
92
93 // ---------------------------
94 // Signal Processing
95 // ---------------------------
96
97 // prepare data using "1 out of 4" code for later transmission
98 // resulting data rate is 26.48 kbit/s (fc/512)
99 // cmd ... data
100 // n ... length of data
101 static void CodeIso15693AsReader(uint8_t *cmd, int n)
102 {
103 int i, j;
104
105 ToSendReset();
106
107 // Give it a bit of slack at the beginning
108 for(i = 0; i < 24; i++) {
109 ToSendStuffBit(1);
110 }
111
112 // SOF for 1of4
113 ToSendStuffBit(0);
114 ToSendStuffBit(1);
115 ToSendStuffBit(1);
116 ToSendStuffBit(1);
117 ToSendStuffBit(1);
118 ToSendStuffBit(0);
119 ToSendStuffBit(1);
120 ToSendStuffBit(1);
121 for(i = 0; i < n; i++) {
122 for(j = 0; j < 8; j += 2) {
123 int these = (cmd[i] >> j) & 3;
124 switch(these) {
125 case 0:
126 ToSendStuffBit(1);
127 ToSendStuffBit(0);
128 ToSendStuffBit(1);
129 ToSendStuffBit(1);
130 ToSendStuffBit(1);
131 ToSendStuffBit(1);
132 ToSendStuffBit(1);
133 ToSendStuffBit(1);
134 break;
135 case 1:
136 ToSendStuffBit(1);
137 ToSendStuffBit(1);
138 ToSendStuffBit(1);
139 ToSendStuffBit(0);
140 ToSendStuffBit(1);
141 ToSendStuffBit(1);
142 ToSendStuffBit(1);
143 ToSendStuffBit(1);
144 break;
145 case 2:
146 ToSendStuffBit(1);
147 ToSendStuffBit(1);
148 ToSendStuffBit(1);
149 ToSendStuffBit(1);
150 ToSendStuffBit(1);
151 ToSendStuffBit(0);
152 ToSendStuffBit(1);
153 ToSendStuffBit(1);
154 break;
155 case 3:
156 ToSendStuffBit(1);
157 ToSendStuffBit(1);
158 ToSendStuffBit(1);
159 ToSendStuffBit(1);
160 ToSendStuffBit(1);
161 ToSendStuffBit(1);
162 ToSendStuffBit(1);
163 ToSendStuffBit(0);
164 break;
165 }
166 }
167 }
168 // EOF
169 ToSendStuffBit(1);
170 ToSendStuffBit(1);
171 ToSendStuffBit(0);
172 ToSendStuffBit(1);
173
174 // Fill remainder of last byte with 1
175 for(i = 0; i < 4; i++) {
176 ToSendStuffBit(1);
177 }
178 }
179
180 // encode data using "1 out of 256" scheme
181 // data rate is 1,66 kbit/s (fc/8192)
182 // is designed for more robust communication over longer distances
183 static void CodeIso15693AsReader256(uint8_t *cmd, int n)
184 {
185 int i, j;
186
187 ToSendReset();
188
189 // Give it a bit of slack at the beginning
190 for(i = 0; i < 24; i++) {
191 ToSendStuffBit(1);
192 }
193
194 // SOF for 1of256
195 ToSendStuffBit(0);
196 ToSendStuffBit(1);
197 ToSendStuffBit(1);
198 ToSendStuffBit(1);
199 ToSendStuffBit(1);
200 ToSendStuffBit(1);
201 ToSendStuffBit(1);
202 ToSendStuffBit(0);
203
204 for(i = 0; i < n; i++) {
205 for (j = 0; j<=255; j++) {
206 if (cmd[i]==j) {
207 ToSendStuffBit(1);
208 ToSendStuffBit(0);
209 } else {
210 ToSendStuffBit(1);
211 ToSendStuffBit(1);
212 }
213 }
214 }
215 // EOF
216 ToSendStuffBit(1);
217 ToSendStuffBit(1);
218 ToSendStuffBit(0);
219 ToSendStuffBit(1);
220
221 // Fill remainder of last byte with 1
222 for(i = 0; i < 4; i++) {
223 ToSendStuffBit(1);
224 }
225
226 ToSendMax++;
227 }
228
229
230 static void CodeIso15693AsTag(uint8_t *cmd, int n)
231 {
232 ToSendReset();
233
234 // SOF
235 ToSendStuffBit(0);
236 ToSendStuffBit(0);
237 ToSendStuffBit(0);
238 ToSendStuffBit(1);
239 ToSendStuffBit(1);
240 ToSendStuffBit(1);
241 ToSendStuffBit(0);
242 ToSendStuffBit(1);
243
244 // data
245 for(int i = 0; i < n; i++) {
246 for(int j = 0; j < 8; j++) {
247 if ((cmd[i] >> j) & 0x01) {
248 ToSendStuffBit(0);
249 ToSendStuffBit(1);
250 } else {
251 ToSendStuffBit(1);
252 ToSendStuffBit(0);
253 }
254 }
255 }
256
257 // EOF
258 ToSendStuffBit(1);
259 ToSendStuffBit(0);
260 ToSendStuffBit(1);
261 ToSendStuffBit(1);
262 ToSendStuffBit(1);
263 ToSendStuffBit(0);
264 ToSendStuffBit(0);
265 ToSendStuffBit(0);
266
267 ToSendMax++;
268 }
269
270
271 // Transmit the command (to the tag) that was placed in cmd[].
272 static void TransmitTo15693Tag(const uint8_t *cmd, int len)
273 {
274 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
275 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
276
277 LED_B_ON();
278 for(int c = 0; c < len; ) {
279 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
280 AT91C_BASE_SSC->SSC_THR = ~cmd[c];
281 c++;
282 }
283 WDT_HIT();
284 }
285 LED_B_OFF();
286 }
287
288 //-----------------------------------------------------------------------------
289 // Transmit the tag response (to the reader) that was placed in cmd[].
290 //-----------------------------------------------------------------------------
291 static void TransmitTo15693Reader(const uint8_t *cmd, size_t len, uint32_t start_time, bool slow)
292 {
293 // don't use the FPGA_HF_SIMULATOR_MODULATE_424K_8BIT minor mode. It would spoil GetCountSspClk()
294 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_424K);
295
296 uint8_t shift_delay = start_time & 0x00000007;
297 uint8_t bitmask = 0x00;
298 for (int i = 0; i < shift_delay; i++) {
299 bitmask |= (0x01 << i);
300 }
301
302 while (GetCountSspClk() < (start_time & 0xfffffff8)) ;
303 AT91C_BASE_SSC->SSC_THR = 0x00; // clear TXRDY
304
305 LED_C_ON();
306 uint8_t bits_to_shift = 0x00;
307 for(size_t c = 0; c <= len; c++) {
308 uint8_t bits_to_send = bits_to_shift << (8 - shift_delay) | (c==len?0x00:cmd[c]) >> shift_delay;
309 bits_to_shift = cmd[c] & bitmask;
310 for (int i = 7; i >= 0; i--) {
311 for (int j = 0; j < (slow?4:1); ) {
312 if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
313 if (bits_to_send >> i & 0x01) {
314 AT91C_BASE_SSC->SSC_THR = 0xff;
315 } else {
316 AT91C_BASE_SSC->SSC_THR = 0x00;
317 }
318 j++;
319 }
320 WDT_HIT();
321 }
322 }
323 }
324 LED_C_OFF();
325 }
326
327
328 //=============================================================================
329 // An ISO 15693 decoder for tag responses (one subcarrier only).
330 // Uses cross correlation to identify the SOF, each bit, and EOF.
331 // This function is called 8 times per bit (every 2 subcarrier cycles).
332 // Subcarrier frequency fs is 424kHz, 1/fs = 2,36us,
333 // i.e. function is called every 4,72us
334 // LED handling:
335 // LED C -> ON once we have received the SOF and are expecting the rest.
336 // LED C -> OFF once we have received EOF or are unsynced
337 //
338 // Returns: true if we received a EOF
339 // false if we are still waiting for some more
340 //=============================================================================
341
342 #define SUBCARRIER_DETECT_THRESHOLD 2
343 #define SOF_CORRELATOR_LEN (1<<5)
344
345 typedef struct DecodeTag {
346 enum {
347 STATE_TAG_UNSYNCD,
348 STATE_TAG_AWAIT_SOF_1,
349 STATE_TAG_AWAIT_SOF_2,
350 STATE_TAG_RECEIVING_DATA,
351 STATE_TAG_AWAIT_EOF
352 } state;
353 int bitCount;
354 int posCount;
355 enum {
356 LOGIC0,
357 LOGIC1,
358 SOF_PART1,
359 SOF_PART2
360 } lastBit;
361 uint16_t shiftReg;
362 uint8_t *output;
363 int len;
364 int sum1, sum2;
365 uint8_t SOF_low;
366 uint8_t SOF_high;
367 uint8_t SOF_last;
368 int32_t SOF_corr;
369 int32_t SOF_corr_prev;
370 uint8_t SOF_correlator[SOF_CORRELATOR_LEN];
371 } DecodeTag_t;
372
373 static int Handle15693SamplesFromTag(int8_t ci, int8_t cq, DecodeTag_t *DecodeTag)
374 {
375 switch(DecodeTag->state) {
376 case STATE_TAG_UNSYNCD:
377 // initialize SOF correlator. We are looking for 12 samples low and 12 samples high.
378 DecodeTag->SOF_low = 0;
379 DecodeTag->SOF_high = 12;
380 DecodeTag->SOF_last = 23;
381 memset(DecodeTag->SOF_correlator, 0x00, DecodeTag->SOF_last + 1);
382 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
383 DecodeTag->SOF_corr = DecodeTag->SOF_correlator[DecodeTag->SOF_last];
384 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
385 // initialize Decoder
386 DecodeTag->posCount = 0;
387 DecodeTag->bitCount = 0;
388 DecodeTag->len = 0;
389 DecodeTag->state = STATE_TAG_AWAIT_SOF_1;
390 break;
391
392 case STATE_TAG_AWAIT_SOF_1:
393 // calculate the correlation in real time. Look at differences only.
394 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_low++];
395 DecodeTag->SOF_corr -= 2*DecodeTag->SOF_correlator[DecodeTag->SOF_high++];
396 DecodeTag->SOF_last++;
397 DecodeTag->SOF_low &= (SOF_CORRELATOR_LEN-1);
398 DecodeTag->SOF_high &= (SOF_CORRELATOR_LEN-1);
399 DecodeTag->SOF_last &= (SOF_CORRELATOR_LEN-1);
400 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
401 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_last];
402
403 // if correlation increases for 10 consecutive samples, we are close to maximum correlation
404 if (DecodeTag->SOF_corr > DecodeTag->SOF_corr_prev + SUBCARRIER_DETECT_THRESHOLD) {
405 DecodeTag->posCount++;
406 } else {
407 DecodeTag->posCount = 0;
408 }
409
410 if (DecodeTag->posCount == 10) { // correlation increased 10 times
411 DecodeTag->state = STATE_TAG_AWAIT_SOF_2;
412 }
413
414 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
415
416 break;
417
418 case STATE_TAG_AWAIT_SOF_2:
419 // calculate the correlation in real time. Look at differences only.
420 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_low++];
421 DecodeTag->SOF_corr -= 2*DecodeTag->SOF_correlator[DecodeTag->SOF_high++];
422 DecodeTag->SOF_last++;
423 DecodeTag->SOF_low &= (SOF_CORRELATOR_LEN-1);
424 DecodeTag->SOF_high &= (SOF_CORRELATOR_LEN-1);
425 DecodeTag->SOF_last &= (SOF_CORRELATOR_LEN-1);
426 DecodeTag->SOF_correlator[DecodeTag->SOF_last] = AMPLITUDE(ci,cq);
427 DecodeTag->SOF_corr += DecodeTag->SOF_correlator[DecodeTag->SOF_last];
428
429 if (DecodeTag->SOF_corr >= DecodeTag->SOF_corr_prev) { // we are looking for the maximum correlation
430 DecodeTag->SOF_corr_prev = DecodeTag->SOF_corr;
431 } else {
432 DecodeTag->lastBit = SOF_PART1; // detected 1st part of SOF
433 DecodeTag->sum1 = DecodeTag->SOF_correlator[DecodeTag->SOF_last];
434 DecodeTag->sum2 = 0;
435 DecodeTag->posCount = 2;
436 DecodeTag->state = STATE_TAG_RECEIVING_DATA;
437 LED_C_ON();
438 }
439
440 break;
441
442 case STATE_TAG_RECEIVING_DATA:
443 if (DecodeTag->posCount == 1) {
444 DecodeTag->sum1 = 0;
445 DecodeTag->sum2 = 0;
446 }
447
448 if (DecodeTag->posCount <= 4) {
449 DecodeTag->sum1 += AMPLITUDE(ci, cq);
450 } else {
451 DecodeTag->sum2 += AMPLITUDE(ci, cq);
452 }
453
454 if (DecodeTag->posCount == 8) {
455 int16_t corr_1 = (DecodeTag->sum2 - DecodeTag->sum1) / 4;
456 int16_t corr_0 = (DecodeTag->sum1 - DecodeTag->sum2) / 4;
457 int16_t corr_EOF = (DecodeTag->sum1 + DecodeTag->sum2) / 8;
458 if (corr_EOF > corr_0 && corr_EOF > corr_1) {
459 DecodeTag->state = STATE_TAG_AWAIT_EOF;
460 } else if (corr_1 > corr_0) {
461 // logic 1
462 if (DecodeTag->lastBit == SOF_PART1) { // still part of SOF
463 DecodeTag->lastBit = SOF_PART2;
464 } else {
465 DecodeTag->lastBit = LOGIC1;
466 DecodeTag->shiftReg >>= 1;
467 DecodeTag->shiftReg |= 0x80;
468 DecodeTag->bitCount++;
469 if (DecodeTag->bitCount == 8) {
470 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
471 DecodeTag->len++;
472 DecodeTag->bitCount = 0;
473 DecodeTag->shiftReg = 0;
474 }
475 }
476 } else {
477 // logic 0
478 if (DecodeTag->lastBit == SOF_PART1) { // incomplete SOF
479 DecodeTag->state = STATE_TAG_UNSYNCD;
480 LED_C_OFF();
481 } else {
482 DecodeTag->lastBit = LOGIC0;
483 DecodeTag->shiftReg >>= 1;
484 DecodeTag->bitCount++;
485 if (DecodeTag->bitCount == 8) {
486 DecodeTag->output[DecodeTag->len] = DecodeTag->shiftReg;
487 DecodeTag->len++;
488 DecodeTag->bitCount = 0;
489 DecodeTag->shiftReg = 0;
490 }
491 }
492 }
493 DecodeTag->posCount = 0;
494 }
495 DecodeTag->posCount++;
496 break;
497
498 case STATE_TAG_AWAIT_EOF:
499 if (DecodeTag->lastBit == LOGIC0) { // this was already part of EOF
500 LED_C_OFF();
501 return true;
502 } else {
503 DecodeTag->state = STATE_TAG_UNSYNCD;
504 LED_C_OFF();
505 }
506 break;
507
508 default:
509 DecodeTag->state = STATE_TAG_UNSYNCD;
510 LED_C_OFF();
511 break;
512 }
513
514 return false;
515 }
516
517
518 static void DecodeTagInit(DecodeTag_t *DecodeTag, uint8_t *data)
519 {
520 DecodeTag->output = data;
521 DecodeTag->state = STATE_TAG_UNSYNCD;
522 }
523
524 /*
525 * Receive and decode the tag response, also log to tracebuffer
526 */
527 static int GetIso15693AnswerFromTag(uint8_t* response, int timeout)
528 {
529 int maxBehindBy = 0;
530 int lastRxCounter, samples = 0;
531 int8_t ci, cq;
532 bool gotFrame = false;
533
534 uint16_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
535
536 // the Decoder data structure
537 DecodeTag_t DecodeTag;
538 DecodeTagInit(&DecodeTag, response);
539
540 // wait for last transfer to complete
541 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
542
543 // And put the FPGA in the appropriate mode
544 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
545
546 // Setup and start DMA.
547 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
548 FpgaSetupSscDma((uint8_t*) dmaBuf, ISO15693_DMA_BUFFER_SIZE);
549 uint16_t *upTo = dmaBuf;
550 lastRxCounter = ISO15693_DMA_BUFFER_SIZE;
551
552 for(;;) {
553 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO15693_DMA_BUFFER_SIZE-1);
554 if(behindBy > maxBehindBy) {
555 maxBehindBy = behindBy;
556 }
557
558 if (behindBy < 1) continue;
559
560 ci = (int8_t)(*upTo >> 8);
561 cq = (int8_t)(*upTo & 0xff);
562
563 upTo++;
564 lastRxCounter--;
565 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
566 upTo = dmaBuf; // start reading the circular buffer from the beginning
567 lastRxCounter += ISO15693_DMA_BUFFER_SIZE;
568 }
569 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
570 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
571 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
572 }
573 samples++;
574
575 if (Handle15693SamplesFromTag(ci, cq, &DecodeTag)) {
576 gotFrame = true;
577 break;
578 }
579
580 if(samples > timeout && DecodeTag.state < STATE_TAG_RECEIVING_DATA) {
581 DecodeTag.len = 0;
582 break;
583 }
584
585 }
586
587 FpgaDisableSscDma();
588
589 if (DEBUG) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
590 maxBehindBy, samples, gotFrame, DecodeTag.state, DecodeTag.len, DecodeTag.bitCount, DecodeTag.posCount);
591
592 if (tracing && DecodeTag.len > 0) {
593 LogTrace(DecodeTag.output, DecodeTag.len, 0, 0, NULL, false);
594 }
595
596 return DecodeTag.len;
597 }
598
599
600 //=============================================================================
601 // An ISO15693 decoder for reader commands.
602 //
603 // This function is called 4 times per bit (every 2 subcarrier cycles).
604 // Subcarrier frequency fs is 848kHz, 1/fs = 1,18us, i.e. function is called every 2,36us
605 // LED handling:
606 // LED B -> ON once we have received the SOF and are expecting the rest.
607 // LED B -> OFF once we have received EOF or are in error state or unsynced
608 //
609 // Returns: true if we received a EOF
610 // false if we are still waiting for some more
611 //=============================================================================
612
613 typedef struct DecodeReader {
614 enum {
615 STATE_READER_UNSYNCD,
616 STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF,
617 STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF,
618 STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF,
619 STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4,
620 STATE_READER_RECEIVE_DATA_1_OUT_OF_4,
621 STATE_READER_RECEIVE_DATA_1_OUT_OF_256
622 } state;
623 enum {
624 CODING_1_OUT_OF_4,
625 CODING_1_OUT_OF_256
626 } Coding;
627 uint8_t shiftReg;
628 uint8_t bitCount;
629 int byteCount;
630 int byteCountMax;
631 int posCount;
632 int sum1, sum2;
633 uint8_t *output;
634 } DecodeReader_t;
635
636
637 static int Handle15693SampleFromReader(uint8_t bit, DecodeReader_t* DecodeReader)
638 {
639 switch(DecodeReader->state) {
640 case STATE_READER_UNSYNCD:
641 if(!bit) {
642 // we went low, so this could be the beginning of a SOF
643 DecodeReader->state = STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF;
644 DecodeReader->posCount = 1;
645 }
646 break;
647
648 case STATE_READER_AWAIT_1ST_RISING_EDGE_OF_SOF:
649 DecodeReader->posCount++;
650 if(bit) { // detected rising edge
651 if(DecodeReader->posCount < 4) { // rising edge too early (nominally expected at 5)
652 DecodeReader->state = STATE_READER_UNSYNCD;
653 } else { // SOF
654 DecodeReader->state = STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF;
655 }
656 } else {
657 if(DecodeReader->posCount > 5) { // stayed low for too long
658 DecodeReader->state = STATE_READER_UNSYNCD;
659 } else {
660 // do nothing, keep waiting
661 }
662 }
663 break;
664
665 case STATE_READER_AWAIT_2ND_FALLING_EDGE_OF_SOF:
666 DecodeReader->posCount++;
667 if(!bit) { // detected a falling edge
668 if (DecodeReader->posCount < 20) { // falling edge too early (nominally expected at 21 earliest)
669 DecodeReader->state = STATE_READER_UNSYNCD;
670 } else if (DecodeReader->posCount < 23) { // SOF for 1 out of 4 coding
671 DecodeReader->Coding = CODING_1_OUT_OF_4;
672 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
673 } else if (DecodeReader->posCount < 28) { // falling edge too early (nominally expected at 29 latest)
674 DecodeReader->state = STATE_READER_UNSYNCD;
675 } else { // SOF for 1 out of 4 coding
676 DecodeReader->Coding = CODING_1_OUT_OF_256;
677 DecodeReader->state = STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF;
678 }
679 } else {
680 if(DecodeReader->posCount > 29) { // stayed high for too long
681 DecodeReader->state = STATE_READER_UNSYNCD;
682 } else {
683 // do nothing, keep waiting
684 }
685 }
686 break;
687
688 case STATE_READER_AWAIT_2ND_RISING_EDGE_OF_SOF:
689 DecodeReader->posCount++;
690 if (bit) { // detected rising edge
691 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
692 if (DecodeReader->posCount < 32) { // rising edge too early (nominally expected at 33)
693 DecodeReader->state = STATE_READER_UNSYNCD;
694 } else {
695 DecodeReader->posCount = 1;
696 DecodeReader->bitCount = 0;
697 DecodeReader->byteCount = 0;
698 DecodeReader->sum1 = 1;
699 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_256;
700 LED_B_ON();
701 }
702 } else { // CODING_1_OUT_OF_4
703 if (DecodeReader->posCount < 24) { // rising edge too early (nominally expected at 25)
704 DecodeReader->state = STATE_READER_UNSYNCD;
705 } else {
706 DecodeReader->state = STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4;
707 }
708 }
709 } else {
710 if (DecodeReader->Coding == CODING_1_OUT_OF_256) {
711 if (DecodeReader->posCount > 34) { // signal stayed low for too long
712 DecodeReader->state = STATE_READER_UNSYNCD;
713 } else {
714 // do nothing, keep waiting
715 }
716 } else { // CODING_1_OUT_OF_4
717 if (DecodeReader->posCount > 26) { // signal stayed low for too long
718 DecodeReader->state = STATE_READER_UNSYNCD;
719 } else {
720 // do nothing, keep waiting
721 }
722 }
723 }
724 break;
725
726 case STATE_READER_AWAIT_END_OF_SOF_1_OUT_OF_4:
727 DecodeReader->posCount++;
728 if (bit) {
729 if (DecodeReader->posCount == 33) {
730 DecodeReader->posCount = 1;
731 DecodeReader->bitCount = 0;
732 DecodeReader->byteCount = 0;
733 DecodeReader->sum1 = 1;
734 DecodeReader->state = STATE_READER_RECEIVE_DATA_1_OUT_OF_4;
735 LED_B_ON();
736 } else {
737 // do nothing, keep waiting
738 }
739 } else { // unexpected falling edge
740 DecodeReader->state = STATE_READER_UNSYNCD;
741 }
742 break;
743
744 case STATE_READER_RECEIVE_DATA_1_OUT_OF_4:
745 DecodeReader->posCount++;
746 if (DecodeReader->posCount == 1) {
747 DecodeReader->sum1 = bit;
748 } else if (DecodeReader->posCount <= 4) {
749 DecodeReader->sum1 += bit;
750 } else if (DecodeReader->posCount == 5) {
751 DecodeReader->sum2 = bit;
752 } else {
753 DecodeReader->sum2 += bit;
754 }
755 if (DecodeReader->posCount == 8) {
756 DecodeReader->posCount = 0;
757 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
758 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
759 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
760 if (corr01 > corr11 && corr01 > corr10) { // EOF
761 LED_B_OFF(); // Finished receiving
762 DecodeReader->state = STATE_READER_UNSYNCD;
763 if (DecodeReader->byteCount != 0) {
764 return true;
765 }
766 }
767 if (corr10 > corr11) { // detected a 2bit position
768 DecodeReader->shiftReg >>= 2;
769 DecodeReader->shiftReg |= (DecodeReader->bitCount << 6);
770 }
771 if (DecodeReader->bitCount == 15) { // we have a full byte
772 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
773 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
774 // buffer overflow, give up
775 LED_B_OFF();
776 DecodeReader->state = STATE_READER_UNSYNCD;
777 }
778 DecodeReader->bitCount = 0;
779 } else {
780 DecodeReader->bitCount++;
781 }
782 }
783 break;
784
785 case STATE_READER_RECEIVE_DATA_1_OUT_OF_256:
786 DecodeReader->posCount++;
787 if (DecodeReader->posCount == 1) {
788 DecodeReader->sum1 = bit;
789 } else if (DecodeReader->posCount <= 4) {
790 DecodeReader->sum1 += bit;
791 } else if (DecodeReader->posCount == 5) {
792 DecodeReader->sum2 = bit;
793 } else {
794 DecodeReader->sum2 += bit;
795 }
796 if (DecodeReader->posCount == 8) {
797 DecodeReader->posCount = 0;
798 int corr10 = DecodeReader->sum1 - DecodeReader->sum2;
799 int corr01 = DecodeReader->sum2 - DecodeReader->sum1;
800 int corr11 = (DecodeReader->sum1 + DecodeReader->sum2) / 2;
801 if (corr01 > corr11 && corr01 > corr10) { // EOF
802 LED_B_OFF(); // Finished receiving
803 DecodeReader->state = STATE_READER_UNSYNCD;
804 if (DecodeReader->byteCount != 0) {
805 return true;
806 }
807 }
808 if (corr10 > corr11) { // detected the bit position
809 DecodeReader->shiftReg = DecodeReader->bitCount;
810 }
811 if (DecodeReader->bitCount == 255) { // we have a full byte
812 DecodeReader->output[DecodeReader->byteCount++] = DecodeReader->shiftReg;
813 if (DecodeReader->byteCount > DecodeReader->byteCountMax) {
814 // buffer overflow, give up
815 LED_B_OFF();
816 DecodeReader->state = STATE_READER_UNSYNCD;
817 }
818 }
819 DecodeReader->bitCount++;
820 }
821 break;
822
823 default:
824 LED_B_OFF();
825 DecodeReader->state = STATE_READER_UNSYNCD;
826 break;
827 }
828
829 return false;
830 }
831
832
833 static void DecodeReaderInit(uint8_t *data, uint16_t max_len, DecodeReader_t* DecodeReader)
834 {
835 DecodeReader->output = data;
836 DecodeReader->byteCountMax = max_len;
837 DecodeReader->state = STATE_READER_UNSYNCD;
838 DecodeReader->byteCount = 0;
839 DecodeReader->bitCount = 0;
840 DecodeReader->shiftReg = 0;
841 }
842
843
844 //-----------------------------------------------------------------------------
845 // Receive a command (from the reader to us, where we are the simulated tag),
846 // and store it in the given buffer, up to the given maximum length. Keeps
847 // spinning, waiting for a well-framed command, until either we get one
848 // (returns true) or someone presses the pushbutton on the board (false).
849 //
850 // Assume that we're called with the SSC (to the FPGA) and ADC path set
851 // correctly.
852 //-----------------------------------------------------------------------------
853
854 static int GetIso15693CommandFromReader(uint8_t *received, size_t max_len, uint32_t *eof_time)
855 {
856 int maxBehindBy = 0;
857 int lastRxCounter, samples = 0;
858 bool gotFrame = false;
859 uint8_t b;
860
861 uint8_t dmaBuf[ISO15693_DMA_BUFFER_SIZE];
862
863 // the decoder data structure
864 DecodeReader_t DecodeReader;
865 DecodeReaderInit(received, max_len, &DecodeReader);
866
867 // wait for last transfer to complete
868 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
869
870 LED_D_OFF();
871 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
872
873 // clear receive register and wait for next transfer
874 uint32_t temp = AT91C_BASE_SSC->SSC_RHR;
875 (void) temp;
876 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY)) ;
877
878 uint32_t bit_time = GetCountSspClk() & 0xfffffff8;
879
880 // Setup and start DMA.
881 FpgaSetupSscDma(dmaBuf, ISO15693_DMA_BUFFER_SIZE);
882 uint8_t *upTo = dmaBuf;
883 lastRxCounter = ISO15693_DMA_BUFFER_SIZE;
884
885 for(;;) {
886 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) & (ISO15693_DMA_BUFFER_SIZE-1);
887 if(behindBy > maxBehindBy) {
888 maxBehindBy = behindBy;
889 }
890
891 if (behindBy < 1) continue;
892
893 b = *upTo++;
894 lastRxCounter--;
895 if(upTo >= dmaBuf + ISO15693_DMA_BUFFER_SIZE) { // we have read all of the DMA buffer content.
896 upTo = dmaBuf; // start reading the circular buffer from the beginning
897 lastRxCounter += ISO15693_DMA_BUFFER_SIZE;
898 }
899 if (AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX)) { // DMA Counter Register had reached 0, already rotated.
900 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf; // refresh the DMA Next Buffer and
901 AT91C_BASE_PDC_SSC->PDC_RNCR = ISO15693_DMA_BUFFER_SIZE; // DMA Next Counter registers
902 }
903
904 for (int i = 7; i >= 0; i--) {
905 if (Handle15693SampleFromReader((b >> i) & 0x01, &DecodeReader)) {
906 *eof_time = bit_time + samples - DELAY_READER_TO_ARM; // end of EOF
907 gotFrame = true;
908 break;
909 }
910 samples++;
911 }
912
913 if (gotFrame) {
914 break;
915 }
916
917 if (BUTTON_PRESS()) {
918 DecodeReader.byteCount = 0;
919 break;
920 }
921
922 WDT_HIT();
923 }
924
925
926 FpgaDisableSscDma();
927
928 if (DEBUG) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Decoder: state = %d, len = %d, bitCount = %d, posCount = %d",
929 maxBehindBy, samples, gotFrame, DecodeReader.state, DecodeReader.byteCount, DecodeReader.bitCount, DecodeReader.posCount);
930
931 if (tracing && DecodeReader.byteCount > 0) {
932 LogTrace(DecodeReader.output, DecodeReader.byteCount, 0, 0, NULL, true);
933 }
934
935 return DecodeReader.byteCount;
936 }
937
938
939 static void BuildIdentifyRequest(void);
940 //-----------------------------------------------------------------------------
941 // Start to read an ISO 15693 tag. We send an identify request, then wait
942 // for the response. The response is not demodulated, just left in the buffer
943 // so that it can be downloaded to a PC and processed there.
944 //-----------------------------------------------------------------------------
945 void AcquireRawAdcSamplesIso15693(void)
946 {
947 LEDsoff();
948 LED_A_ON();
949
950 uint8_t *dest = BigBuf_get_addr();
951
952 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
953 BuildIdentifyRequest();
954
955 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
956
957 // Give the tags time to energize
958 LED_D_ON();
959 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
960 SpinDelay(100);
961
962 // Now send the command
963 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_TX);
964 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
965
966 LED_B_ON();
967 for(int c = 0; c < ToSendMax; ) {
968 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
969 AT91C_BASE_SSC->SSC_THR = ~ToSend[c];
970 c++;
971 }
972 WDT_HIT();
973 }
974 LED_B_OFF();
975
976 // wait for last transfer to complete
977 while (!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXEMPTY));
978
979 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
980 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
981
982 for(int c = 0; c < 4000; ) {
983 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
984 uint16_t iq = AT91C_BASE_SSC->SSC_RHR;
985 // The samples are correlations against I and Q versions of the
986 // tone that the tag AM-modulates. We just want power,
987 // so abs(I) + abs(Q) is close to what we want.
988 int8_t i = (int8_t)(iq >> 8);
989 int8_t q = (int8_t)(iq & 0xff);
990 uint8_t r = AMPLITUDE(i, q);
991 dest[c++] = r;
992 }
993 }
994
995 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
996 LEDsoff();
997 }
998
999
1000 // TODO: there is no trigger condition. The 14000 samples represent a time frame of 66ms.
1001 // It is unlikely that we get something meaningful.
1002 // TODO: Currently we only record tag answers. Add tracing of reader commands.
1003 // TODO: would we get something at all? The carrier is switched on...
1004 void RecordRawAdcSamplesIso15693(void)
1005 {
1006 LEDsoff();
1007 LED_A_ON();
1008
1009 uint8_t *dest = BigBuf_get_addr();
1010
1011 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1012 // Setup SSC
1013 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1014
1015 // Start from off (no field generated)
1016 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1017 SpinDelay(200);
1018
1019 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1020
1021 SpinDelay(100);
1022
1023 LED_D_ON();
1024 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1025
1026 for(int c = 0; c < 14000;) {
1027 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1028 uint16_t iq = AT91C_BASE_SSC->SSC_RHR;
1029 // The samples are correlations against I and Q versions of the
1030 // tone that the tag AM-modulates. We just want power,
1031 // so abs(I) + abs(Q) is close to what we want.
1032 int8_t i = (int8_t)(iq >> 8);
1033 int8_t q = (int8_t)(iq & 0xff);
1034 uint8_t r = AMPLITUDE(i, q);
1035 dest[c++] = r;
1036 }
1037 }
1038
1039 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1040 LED_D_OFF();
1041 Dbprintf("finished recording");
1042 LED_A_OFF();
1043 }
1044
1045
1046 // Initialize the proxmark as iso15k reader
1047 // (this might produces glitches that confuse some tags
1048 static void Iso15693InitReader() {
1049 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1050 // Setup SSC
1051 // FpgaSetupSsc();
1052
1053 // Start from off (no field generated)
1054 LED_D_OFF();
1055 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1056 SpinDelay(10);
1057
1058 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1059 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1060
1061 // Give the tags time to energize
1062 LED_D_ON();
1063 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1064 SpinDelay(250);
1065 }
1066
1067 ///////////////////////////////////////////////////////////////////////
1068 // ISO 15693 Part 3 - Air Interface
1069 // This section basically contains transmission and receiving of bits
1070 ///////////////////////////////////////////////////////////////////////
1071
1072 // Encode (into the ToSend buffers) an identify request, which is the first
1073 // thing that you must send to a tag to get a response.
1074 static void BuildIdentifyRequest(void)
1075 {
1076 uint8_t cmd[5];
1077
1078 uint16_t crc;
1079 // one sub-carrier, inventory, 1 slot, fast rate
1080 // AFI is at bit 5 (1<<4) when doing an INVENTORY
1081 cmd[0] = (1 << 2) | (1 << 5) | (1 << 1);
1082 // inventory command code
1083 cmd[1] = 0x01;
1084 // no mask
1085 cmd[2] = 0x00;
1086 //Now the CRC
1087 crc = Crc(cmd, 3);
1088 cmd[3] = crc & 0xff;
1089 cmd[4] = crc >> 8;
1090
1091 CodeIso15693AsReader(cmd, sizeof(cmd));
1092 }
1093
1094 // uid is in transmission order (which is reverse of display order)
1095 static void BuildReadBlockRequest(uint8_t *uid, uint8_t blockNumber )
1096 {
1097 uint8_t cmd[13];
1098
1099 uint16_t crc;
1100 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1101 // followed by teh block data
1102 // one sub-carrier, inventory, 1 slot, fast rate
1103 cmd[0] = (1 << 6)| (1 << 5) | (1 << 1); // no SELECT bit, ADDR bit, OPTION bit
1104 // READ BLOCK command code
1105 cmd[1] = 0x20;
1106 // UID may be optionally specified here
1107 // 64-bit UID
1108 cmd[2] = uid[0];
1109 cmd[3] = uid[1];
1110 cmd[4] = uid[2];
1111 cmd[5] = uid[3];
1112 cmd[6] = uid[4];
1113 cmd[7] = uid[5];
1114 cmd[8] = uid[6];
1115 cmd[9] = uid[7]; // 0xe0; // always e0 (not exactly unique)
1116 // Block number to read
1117 cmd[10] = blockNumber;//0x00;
1118 //Now the CRC
1119 crc = Crc(cmd, 11); // the crc needs to be calculated over 11 bytes
1120 cmd[11] = crc & 0xff;
1121 cmd[12] = crc >> 8;
1122
1123 CodeIso15693AsReader(cmd, sizeof(cmd));
1124 }
1125
1126
1127 // Now the VICC>VCD responses when we are simulating a tag
1128 static void BuildInventoryResponse(uint8_t *uid)
1129 {
1130 uint8_t cmd[12];
1131
1132 uint16_t crc;
1133
1134 cmd[0] = 0; // No error, no protocol format extension
1135 cmd[1] = 0; // DSFID (data storage format identifier). 0x00 = not supported
1136 // 64-bit UID
1137 cmd[2] = uid[7]; //0x32;
1138 cmd[3] = uid[6]; //0x4b;
1139 cmd[4] = uid[5]; //0x03;
1140 cmd[5] = uid[4]; //0x01;
1141 cmd[6] = uid[3]; //0x00;
1142 cmd[7] = uid[2]; //0x10;
1143 cmd[8] = uid[1]; //0x05;
1144 cmd[9] = uid[0]; //0xe0;
1145 //Now the CRC
1146 crc = Crc(cmd, 10);
1147 cmd[10] = crc & 0xff;
1148 cmd[11] = crc >> 8;
1149
1150 CodeIso15693AsTag(cmd, sizeof(cmd));
1151 }
1152
1153 // Universal Method for sending to and recv bytes from a tag
1154 // init ... should we initialize the reader?
1155 // speed ... 0 low speed, 1 hi speed
1156 // **recv will return you a pointer to the received data
1157 // If you do not need the answer use NULL for *recv[]
1158 // return: lenght of received data
1159 int SendDataTag(uint8_t *send, int sendlen, bool init, int speed, uint8_t **recv) {
1160
1161 LED_A_ON();
1162 LED_B_OFF();
1163 LED_C_OFF();
1164
1165 if (init) Iso15693InitReader();
1166
1167 int answerLen=0;
1168 uint8_t *answer = BigBuf_get_addr() + 4000;
1169 if (recv != NULL) memset(answer, 0, 100);
1170
1171 if (!speed) {
1172 // low speed (1 out of 256)
1173 CodeIso15693AsReader256(send, sendlen);
1174 } else {
1175 // high speed (1 out of 4)
1176 CodeIso15693AsReader(send, sendlen);
1177 }
1178
1179 TransmitTo15693Tag(ToSend,ToSendMax);
1180 // Now wait for a response
1181 if (recv!=NULL) {
1182 answerLen = GetIso15693AnswerFromTag(answer, 100);
1183 *recv=answer;
1184 }
1185
1186 LED_A_OFF();
1187
1188 return answerLen;
1189 }
1190
1191
1192 // --------------------------------------------------------------------
1193 // Debug Functions
1194 // --------------------------------------------------------------------
1195
1196 // Decodes a message from a tag and displays its metadata and content
1197 #define DBD15STATLEN 48
1198 void DbdecodeIso15693Answer(int len, uint8_t *d) {
1199 char status[DBD15STATLEN+1]={0};
1200 uint16_t crc;
1201
1202 if (len>3) {
1203 if (d[0]&(1<<3))
1204 strncat(status,"ProtExt ",DBD15STATLEN);
1205 if (d[0]&1) {
1206 // error
1207 strncat(status,"Error ",DBD15STATLEN);
1208 switch (d[1]) {
1209 case 0x01:
1210 strncat(status,"01:notSupp",DBD15STATLEN);
1211 break;
1212 case 0x02:
1213 strncat(status,"02:notRecog",DBD15STATLEN);
1214 break;
1215 case 0x03:
1216 strncat(status,"03:optNotSupp",DBD15STATLEN);
1217 break;
1218 case 0x0f:
1219 strncat(status,"0f:noInfo",DBD15STATLEN);
1220 break;
1221 case 0x10:
1222 strncat(status,"10:dontExist",DBD15STATLEN);
1223 break;
1224 case 0x11:
1225 strncat(status,"11:lockAgain",DBD15STATLEN);
1226 break;
1227 case 0x12:
1228 strncat(status,"12:locked",DBD15STATLEN);
1229 break;
1230 case 0x13:
1231 strncat(status,"13:progErr",DBD15STATLEN);
1232 break;
1233 case 0x14:
1234 strncat(status,"14:lockErr",DBD15STATLEN);
1235 break;
1236 default:
1237 strncat(status,"unknownErr",DBD15STATLEN);
1238 }
1239 strncat(status," ",DBD15STATLEN);
1240 } else {
1241 strncat(status,"NoErr ",DBD15STATLEN);
1242 }
1243
1244 crc=Crc(d,len-2);
1245 if ( (( crc & 0xff ) == d[len-2]) && (( crc >> 8 ) == d[len-1]) )
1246 strncat(status,"CrcOK",DBD15STATLEN);
1247 else
1248 strncat(status,"CrcFail!",DBD15STATLEN);
1249
1250 Dbprintf("%s",status);
1251 }
1252 }
1253
1254
1255
1256 ///////////////////////////////////////////////////////////////////////
1257 // Functions called via USB/Client
1258 ///////////////////////////////////////////////////////////////////////
1259
1260 void SetDebugIso15693(uint32_t debug) {
1261 DEBUG=debug;
1262 Dbprintf("Iso15693 Debug is now %s",DEBUG?"on":"off");
1263 return;
1264 }
1265
1266 //-----------------------------------------------------------------------------
1267 // Simulate an ISO15693 reader, perform anti-collision and then attempt to read a sector
1268 // all demodulation performed in arm rather than host. - greg
1269 //-----------------------------------------------------------------------------
1270 void ReaderIso15693(uint32_t parameter)
1271 {
1272 LEDsoff();
1273 LED_A_ON();
1274
1275 int answerLen1 = 0;
1276 uint8_t TagUID[8] = {0x00};
1277
1278 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1279
1280 uint8_t *answer1 = BigBuf_get_addr() + 4000;
1281 memset(answer1, 0x00, 200);
1282
1283 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1284 // Setup SSC
1285 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1286
1287 // Start from off (no field generated)
1288 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1289 SpinDelay(200);
1290
1291 // Give the tags time to energize
1292 LED_D_ON();
1293 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR);
1294 SpinDelay(200);
1295
1296 // FIRST WE RUN AN INVENTORY TO GET THE TAG UID
1297 // THIS MEANS WE CAN PRE-BUILD REQUESTS TO SAVE CPU TIME
1298
1299 // Now send the IDENTIFY command
1300 BuildIdentifyRequest();
1301
1302 TransmitTo15693Tag(ToSend,ToSendMax);
1303
1304 // Now wait for a response
1305 answerLen1 = GetIso15693AnswerFromTag(answer1, 100) ;
1306
1307 if (answerLen1 >=12) // we should do a better check than this
1308 {
1309 TagUID[0] = answer1[2];
1310 TagUID[1] = answer1[3];
1311 TagUID[2] = answer1[4];
1312 TagUID[3] = answer1[5];
1313 TagUID[4] = answer1[6];
1314 TagUID[5] = answer1[7];
1315 TagUID[6] = answer1[8]; // IC Manufacturer code
1316 TagUID[7] = answer1[9]; // always E0
1317
1318 }
1319
1320 Dbprintf("%d octets read from IDENTIFY request:", answerLen1);
1321 DbdecodeIso15693Answer(answerLen1, answer1);
1322 Dbhexdump(answerLen1, answer1, false);
1323
1324 // UID is reverse
1325 if (answerLen1 >= 12)
1326 Dbprintf("UID = %02hX%02hX%02hX%02hX%02hX%02hX%02hX%02hX",
1327 TagUID[7],TagUID[6],TagUID[5],TagUID[4],
1328 TagUID[3],TagUID[2],TagUID[1],TagUID[0]);
1329
1330
1331 // Dbprintf("%d octets read from SELECT request:", answerLen2);
1332 // DbdecodeIso15693Answer(answerLen2,answer2);
1333 // Dbhexdump(answerLen2,answer2,true);
1334
1335 // Dbprintf("%d octets read from XXX request:", answerLen3);
1336 // DbdecodeIso15693Answer(answerLen3,answer3);
1337 // Dbhexdump(answerLen3,answer3,true);
1338
1339 // read all pages
1340 if (answerLen1 >= 12 && DEBUG) {
1341 uint8_t *answer2 = BigBuf_get_addr() + 4100;
1342 int i = 0;
1343 while (i < 32) { // sanity check, assume max 32 pages
1344 BuildReadBlockRequest(TagUID, i);
1345 TransmitTo15693Tag(ToSend, ToSendMax);
1346 int answerLen2 = GetIso15693AnswerFromTag(answer2, 100);
1347 if (answerLen2 > 0) {
1348 Dbprintf("READ SINGLE BLOCK %d returned %d octets:", i, answerLen2);
1349 DbdecodeIso15693Answer(answerLen2, answer2);
1350 Dbhexdump(answerLen2, answer2, false);
1351 if ( *((uint32_t*) answer2) == 0x07160101 ) break; // exit on NoPageErr
1352 }
1353 i++;
1354 }
1355 }
1356
1357 // for the time being, switch field off to protect rdv4.0
1358 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1359 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1360 LED_D_OFF();
1361
1362 LED_A_OFF();
1363 }
1364
1365
1366 // Simulate an ISO15693 TAG.
1367 // For Inventory command: print command and send Inventory Response with given UID
1368 // TODO: interpret other reader commands and send appropriate response
1369 void SimTagIso15693(uint32_t parameter, uint8_t *uid)
1370 {
1371 LEDsoff();
1372 LED_A_ON();
1373
1374 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1375 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1376 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
1377 FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SIMULATOR);
1378
1379 StartCountSspClk();
1380
1381 uint8_t cmd[ISO15693_MAX_COMMAND_LENGTH];
1382
1383 // Build a suitable response to the reader INVENTORY command
1384 BuildInventoryResponse(uid);
1385
1386 // Listen to reader
1387 while (!BUTTON_PRESS()) {
1388 uint32_t eof_time = 0, start_time = 0;
1389 int cmd_len = GetIso15693CommandFromReader(cmd, sizeof(cmd), &eof_time);
1390
1391 if ((cmd_len >= 5) && (cmd[0] & ISO15693_REQ_INVENTORY) && (cmd[1] == ISO15693_INVENTORY)) { // TODO: check more flags
1392 bool slow = !(cmd[0] & ISO15693_REQ_DATARATE_HIGH);
1393 start_time = eof_time + DELAY_ISO15693_VCD_TO_VICC - DELAY_ARM_TO_READER;
1394 TransmitTo15693Reader(ToSend, ToSendMax, start_time, slow);
1395 }
1396
1397 Dbprintf("%d bytes read from reader:", cmd_len);
1398 Dbhexdump(cmd_len, cmd, false);
1399 }
1400
1401 LEDsoff();
1402 }
1403
1404
1405 // Since there is no standardized way of reading the AFI out of a tag, we will brute force it
1406 // (some manufactures offer a way to read the AFI, though)
1407 void BruteforceIso15693Afi(uint32_t speed)
1408 {
1409 LEDsoff();
1410 LED_A_ON();
1411
1412 uint8_t data[20];
1413 uint8_t *recv=data;
1414 int datalen=0, recvlen=0;
1415
1416 Iso15693InitReader();
1417
1418 // first without AFI
1419 // Tags should respond without AFI and with AFI=0 even when AFI is active
1420
1421 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_SLOT1;
1422 data[1] = ISO15693_INVENTORY;
1423 data[2] = 0; // mask length
1424 datalen = AddCrc(data,3);
1425 recvlen = SendDataTag(data, datalen, false, speed, &recv);
1426 WDT_HIT();
1427 if (recvlen>=12) {
1428 Dbprintf("NoAFI UID=%s",sprintUID(NULL,&recv[2]));
1429 }
1430
1431 // now with AFI
1432
1433 data[0] = ISO15693_REQ_DATARATE_HIGH | ISO15693_REQ_INVENTORY | ISO15693_REQINV_AFI | ISO15693_REQINV_SLOT1;
1434 data[1] = ISO15693_INVENTORY;
1435 data[2] = 0; // AFI
1436 data[3] = 0; // mask length
1437
1438 for (int i=0;i<256;i++) {
1439 data[2]=i & 0xFF;
1440 datalen=AddCrc(data,4);
1441 recvlen=SendDataTag(data, datalen, false, speed, &recv);
1442 WDT_HIT();
1443 if (recvlen>=12) {
1444 Dbprintf("AFI=%i UID=%s", i, sprintUID(NULL,&recv[2]));
1445 }
1446 }
1447 Dbprintf("AFI Bruteforcing done.");
1448
1449 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1450 LEDsoff();
1451 }
1452
1453 // Allows to directly send commands to the tag via the client
1454 void DirectTag15693Command(uint32_t datalen, uint32_t speed, uint32_t recv, uint8_t data[]) {
1455
1456 int recvlen=0;
1457 uint8_t *recvbuf = BigBuf_get_addr();
1458
1459 LED_A_ON();
1460
1461 if (DEBUG) {
1462 Dbprintf("SEND");
1463 Dbhexdump(datalen, data, false);
1464 }
1465
1466 recvlen = SendDataTag(data, datalen, true, speed, (recv?&recvbuf:NULL));
1467
1468 if (recv) {
1469 cmd_send(CMD_ACK, recvlen>48?48:recvlen, 0, 0, recvbuf, 48);
1470
1471 if (DEBUG) {
1472 Dbprintf("RECV");
1473 DbdecodeIso15693Answer(recvlen,recvbuf);
1474 Dbhexdump(recvlen, recvbuf, false);
1475 }
1476 }
1477
1478 // for the time being, switch field off to protect rdv4.0
1479 // note: this prevents using hf 15 cmd with s option - which isn't implemented yet anyway
1480 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1481 LED_D_OFF();
1482
1483 LED_A_OFF();
1484 }
1485
1486
1487
1488
1489 // --------------------------------------------------------------------
1490 // -- Misc & deprecated functions
1491 // --------------------------------------------------------------------
1492
1493 /*
1494
1495 // do not use; has a fix UID
1496 static void __attribute__((unused)) BuildSysInfoRequest(uint8_t *uid)
1497 {
1498 uint8_t cmd[12];
1499
1500 uint16_t crc;
1501 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1502 // followed by teh block data
1503 // one sub-carrier, inventory, 1 slot, fast rate
1504 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1505 // System Information command code
1506 cmd[1] = 0x2B;
1507 // UID may be optionally specified here
1508 // 64-bit UID
1509 cmd[2] = 0x32;
1510 cmd[3]= 0x4b;
1511 cmd[4] = 0x03;
1512 cmd[5] = 0x01;
1513 cmd[6] = 0x00;
1514 cmd[7] = 0x10;
1515 cmd[8] = 0x05;
1516 cmd[9]= 0xe0; // always e0 (not exactly unique)
1517 //Now the CRC
1518 crc = Crc(cmd, 10); // the crc needs to be calculated over 2 bytes
1519 cmd[10] = crc & 0xff;
1520 cmd[11] = crc >> 8;
1521
1522 CodeIso15693AsReader(cmd, sizeof(cmd));
1523 }
1524
1525
1526 // do not use; has a fix UID
1527 static void __attribute__((unused)) BuildReadMultiBlockRequest(uint8_t *uid)
1528 {
1529 uint8_t cmd[14];
1530
1531 uint16_t crc;
1532 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1533 // followed by teh block data
1534 // one sub-carrier, inventory, 1 slot, fast rate
1535 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1536 // READ Multi BLOCK command code
1537 cmd[1] = 0x23;
1538 // UID may be optionally specified here
1539 // 64-bit UID
1540 cmd[2] = 0x32;
1541 cmd[3]= 0x4b;
1542 cmd[4] = 0x03;
1543 cmd[5] = 0x01;
1544 cmd[6] = 0x00;
1545 cmd[7] = 0x10;
1546 cmd[8] = 0x05;
1547 cmd[9]= 0xe0; // always e0 (not exactly unique)
1548 // First Block number to read
1549 cmd[10] = 0x00;
1550 // Number of Blocks to read
1551 cmd[11] = 0x2f; // read quite a few
1552 //Now the CRC
1553 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1554 cmd[12] = crc & 0xff;
1555 cmd[13] = crc >> 8;
1556
1557 CodeIso15693AsReader(cmd, sizeof(cmd));
1558 }
1559
1560 // do not use; has a fix UID
1561 static void __attribute__((unused)) BuildArbitraryRequest(uint8_t *uid,uint8_t CmdCode)
1562 {
1563 uint8_t cmd[14];
1564
1565 uint16_t crc;
1566 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1567 // followed by teh block data
1568 // one sub-carrier, inventory, 1 slot, fast rate
1569 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1570 // READ BLOCK command code
1571 cmd[1] = CmdCode;
1572 // UID may be optionally specified here
1573 // 64-bit UID
1574 cmd[2] = 0x32;
1575 cmd[3]= 0x4b;
1576 cmd[4] = 0x03;
1577 cmd[5] = 0x01;
1578 cmd[6] = 0x00;
1579 cmd[7] = 0x10;
1580 cmd[8] = 0x05;
1581 cmd[9]= 0xe0; // always e0 (not exactly unique)
1582 // Parameter
1583 cmd[10] = 0x00;
1584 cmd[11] = 0x0a;
1585
1586 // cmd[12] = 0x00;
1587 // cmd[13] = 0x00; //Now the CRC
1588 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1589 cmd[12] = crc & 0xff;
1590 cmd[13] = crc >> 8;
1591
1592 CodeIso15693AsReader(cmd, sizeof(cmd));
1593 }
1594
1595 // do not use; has a fix UID
1596 static void __attribute__((unused)) BuildArbitraryCustomRequest(uint8_t uid[], uint8_t CmdCode)
1597 {
1598 uint8_t cmd[14];
1599
1600 uint16_t crc;
1601 // If we set the Option_Flag in this request, the VICC will respond with the secuirty status of the block
1602 // followed by teh block data
1603 // one sub-carrier, inventory, 1 slot, fast rate
1604 cmd[0] = (1 << 5) | (1 << 1); // no SELECT bit
1605 // READ BLOCK command code
1606 cmd[1] = CmdCode;
1607 // UID may be optionally specified here
1608 // 64-bit UID
1609 cmd[2] = 0x32;
1610 cmd[3]= 0x4b;
1611 cmd[4] = 0x03;
1612 cmd[5] = 0x01;
1613 cmd[6] = 0x00;
1614 cmd[7] = 0x10;
1615 cmd[8] = 0x05;
1616 cmd[9]= 0xe0; // always e0 (not exactly unique)
1617 // Parameter
1618 cmd[10] = 0x05; // for custom codes this must be manufcturer code
1619 cmd[11] = 0x00;
1620
1621 // cmd[12] = 0x00;
1622 // cmd[13] = 0x00; //Now the CRC
1623 crc = Crc(cmd, 12); // the crc needs to be calculated over 2 bytes
1624 cmd[12] = crc & 0xff;
1625 cmd[13] = crc >> 8;
1626
1627 CodeIso15693AsReader(cmd, sizeof(cmd));
1628 }
1629
1630
1631
1632
1633 */
1634
1635
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