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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011, 2012
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "../include/proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17 #include "../common/cmd.h"
18 #include "../common/iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22
23 static uint32_t iso14a_timeout;
24 uint8_t *trace = (uint8_t *) BigBuf+TRACE_OFFSET;
25 int rsamples = 0;
26 int traceLen = 0;
27 int tracing = TRUE;
28 uint8_t trigger = 0;
29 // the block number for the ISO14443-4 PCB
30 static uint8_t iso14_pcb_blocknum = 0;
31
32 //
33 // ISO14443 timing:
34 //
35 // minimum time between the start bits of consecutive transfers from reader to tag: 7000 carrier (13.56Mhz) cycles
36 #define REQUEST_GUARD_TIME (7000/16 + 1)
37 // minimum time between last modulation of tag and next start bit from reader to tag: 1172 carrier cycles
38 #define FRAME_DELAY_TIME_PICC_TO_PCD (1172/16 + 1)
39 // bool LastCommandWasRequest = FALSE;
40
41 //
42 // Total delays including SSC-Transfers between ARM and FPGA. These are in carrier clock cycles (1/13,56MHz)
43 //
44 // When the PM acts as reader and is receiving tag data, it takes
45 // 3 ticks delay in the AD converter
46 // 16 ticks until the modulation detector completes and sets curbit
47 // 8 ticks until bit_to_arm is assigned from curbit
48 // 8*16 ticks for the transfer from FPGA to ARM
49 // 4*16 ticks until we measure the time
50 // - 8*16 ticks because we measure the time of the previous transfer
51 #define DELAY_AIR2ARM_AS_READER (3 + 16 + 8 + 8*16 + 4*16 - 8*16)
52
53 // When the PM acts as a reader and is sending, it takes
54 // 4*16 ticks until we can write data to the sending hold register
55 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
56 // 8 ticks until the first transfer starts
57 // 8 ticks later the FPGA samples the data
58 // 1 tick to assign mod_sig_coil
59 #define DELAY_ARM2AIR_AS_READER (4*16 + 8*16 + 8 + 8 + 1)
60
61 // When the PM acts as tag and is receiving it takes
62 // 2 ticks delay in the RF part (for the first falling edge),
63 // 3 ticks for the A/D conversion,
64 // 8 ticks on average until the start of the SSC transfer,
65 // 8 ticks until the SSC samples the first data
66 // 7*16 ticks to complete the transfer from FPGA to ARM
67 // 8 ticks until the next ssp_clk rising edge
68 // 4*16 ticks until we measure the time
69 // - 8*16 ticks because we measure the time of the previous transfer
70 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
71
72 // The FPGA will report its internal sending delay in
73 uint16_t FpgaSendQueueDelay;
74 // the 5 first bits are the number of bits buffered in mod_sig_buf
75 // the last three bits are the remaining ticks/2 after the mod_sig_buf shift
76 #define DELAY_FPGA_QUEUE (FpgaSendQueueDelay<<1)
77
78 // When the PM acts as tag and is sending, it takes
79 // 4*16 ticks until we can write data to the sending hold register
80 // 8*16 ticks until the SHR is transferred to the Sending Shift Register
81 // 8 ticks until the first transfer starts
82 // 8 ticks later the FPGA samples the data
83 // + a varying number of ticks in the FPGA Delay Queue (mod_sig_buf)
84 // + 1 tick to assign mod_sig_coil
85 #define DELAY_ARM2AIR_AS_TAG (4*16 + 8*16 + 8 + 8 + DELAY_FPGA_QUEUE + 1)
86
87 // When the PM acts as sniffer and is receiving tag data, it takes
88 // 3 ticks A/D conversion
89 // 14 ticks to complete the modulation detection
90 // 8 ticks (on average) until the result is stored in to_arm
91 // + the delays in transferring data - which is the same for
92 // sniffing reader and tag data and therefore not relevant
93 #define DELAY_TAG_AIR2ARM_AS_SNIFFER (3 + 14 + 8)
94
95 // When the PM acts as sniffer and is receiving reader data, it takes
96 // 2 ticks delay in analogue RF receiver (for the falling edge of the
97 // start bit, which marks the start of the communication)
98 // 3 ticks A/D conversion
99 // 8 ticks on average until the data is stored in to_arm.
100 // + the delays in transferring data - which is the same for
101 // sniffing reader and tag data and therefore not relevant
102 #define DELAY_READER_AIR2ARM_AS_SNIFFER (2 + 3 + 8)
103
104 //variables used for timing purposes:
105 //these are in ssp_clk cycles:
106 static uint32_t NextTransferTime;
107 static uint32_t LastTimeProxToAirStart;
108 static uint32_t LastProxToAirDuration;
109
110
111
112 // CARD TO READER - manchester
113 // Sequence D: 11110000 modulation with subcarrier during first half
114 // Sequence E: 00001111 modulation with subcarrier during second half
115 // Sequence F: 00000000 no modulation with subcarrier
116 // READER TO CARD - miller
117 // Sequence X: 00001100 drop after half a period
118 // Sequence Y: 00000000 no drop
119 // Sequence Z: 11000000 drop at start
120 #define SEC_D 0xf0
121 #define SEC_E 0x0f
122 #define SEC_F 0x00
123 #define SEC_X 0x0c
124 #define SEC_Y 0x00
125 #define SEC_Z 0xc0
126
127 const uint8_t OddByteParity[256] = {
128 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
129 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
130 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
131 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
132 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
133 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
134 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
135 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
136 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
137 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
138 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
139 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
140 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
141 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
142 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
143 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
144 };
145
146 void iso14a_set_trigger(bool enable) {
147 trigger = enable;
148 }
149
150 void iso14a_clear_trace() {
151 memset(trace, 0x44, TRACE_SIZE);
152 traceLen = 0;
153 }
154
155 void iso14a_set_tracing(bool enable) {
156 tracing = enable;
157 }
158
159 void iso14a_set_timeout(uint32_t timeout) {
160 iso14a_timeout = timeout;
161 }
162
163 //-----------------------------------------------------------------------------
164 // Generate the parity value for a byte sequence
165 //
166 //-----------------------------------------------------------------------------
167 byte_t oddparity (const byte_t bt)
168 {
169 return OddByteParity[bt];
170 }
171
172 void GetParity(const uint8_t * pbtCmd, uint16_t iLen, uint8_t *par)
173 {
174 uint16_t paritybit_cnt = 0;
175 uint16_t paritybyte_cnt = 0;
176 uint8_t parityBits = 0;
177
178 for (uint16_t i = 0; i < iLen; i++) {
179 // Generate the parity bits
180 parityBits |= ((OddByteParity[pbtCmd[i]]) << (7-paritybit_cnt));
181 if (paritybit_cnt == 7) {
182 par[paritybyte_cnt] = parityBits; // save 8 Bits parity
183 parityBits = 0; // and advance to next Parity Byte
184 paritybyte_cnt++;
185 paritybit_cnt = 0;
186 } else {
187 paritybit_cnt++;
188 }
189 }
190
191 // save remaining parity bits
192 par[paritybyte_cnt] = parityBits;
193
194 }
195
196 void AppendCrc14443a(uint8_t* data, int len)
197 {
198 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
199 }
200
201 // The function LogTrace() is also used by the iClass implementation in iClass.c
202 bool RAMFUNC LogTrace(const uint8_t *btBytes, uint16_t iLen, uint32_t timestamp_start, uint32_t timestamp_end, uint8_t *parity, bool readerToTag)
203 {
204 if (!tracing) return FALSE;
205
206 uint16_t num_paritybytes = (iLen-1)/8 + 1; // number of valid paritybytes in *parity
207 uint16_t duration = timestamp_end - timestamp_start;
208
209 // Return when trace is full
210 if (traceLen + sizeof(iLen) + sizeof(timestamp_start) + sizeof(duration) + num_paritybytes + iLen >= TRACE_SIZE) {
211 tracing = FALSE; // don't trace any more
212 return FALSE;
213 }
214
215 // Traceformat:
216 // 32 bits timestamp (little endian)
217 // 16 bits duration (little endian)
218 // 16 bits data length (little endian, Highest Bit used as readerToTag flag)
219 // y Bytes data
220 // x Bytes parity (one byte per 8 bytes data)
221
222 // timestamp (start)
223 trace[traceLen++] = ((timestamp_start >> 0) & 0xff);
224 trace[traceLen++] = ((timestamp_start >> 8) & 0xff);
225 trace[traceLen++] = ((timestamp_start >> 16) & 0xff);
226 trace[traceLen++] = ((timestamp_start >> 24) & 0xff);
227
228 // duration
229 trace[traceLen++] = ((duration >> 0) & 0xff);
230 trace[traceLen++] = ((duration >> 8) & 0xff);
231
232 // data length
233 trace[traceLen++] = ((iLen >> 0) & 0xff);
234 trace[traceLen++] = ((iLen >> 8) & 0xff);
235
236 // readerToTag flag
237 if (!readerToTag) {
238 trace[traceLen - 1] |= 0x80;
239 }
240
241 // data bytes
242 if (btBytes != NULL && iLen != 0) {
243 memcpy(trace + traceLen, btBytes, iLen);
244 }
245 traceLen += iLen;
246
247 // parity bytes
248 if (parity != NULL && iLen != 0) {
249 memcpy(trace + traceLen, parity, num_paritybytes);
250 }
251 traceLen += num_paritybytes;
252
253 return TRUE;
254 }
255
256 //=============================================================================
257 // ISO 14443 Type A - Miller decoder
258 //=============================================================================
259 // Basics:
260 // This decoder is used when the PM3 acts as a tag.
261 // The reader will generate "pauses" by temporarily switching of the field.
262 // At the PM3 antenna we will therefore measure a modulated antenna voltage.
263 // The FPGA does a comparison with a threshold and would deliver e.g.:
264 // ........ 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 0 0 1 1 1 1 1 1 1 1 1 1 .......
265 // The Miller decoder needs to identify the following sequences:
266 // 2 (or 3) ticks pause followed by 6 (or 5) ticks unmodulated: pause at beginning - Sequence Z ("start of communication" or a "0")
267 // 8 ticks without a modulation: no pause - Sequence Y (a "0" or "end of communication" or "no information")
268 // 4 ticks unmodulated followed by 2 (or 3) ticks pause: pause in second half - Sequence X (a "1")
269 // Note 1: the bitstream may start at any time. We therefore need to sync.
270 // Note 2: the interpretation of Sequence Y and Z depends on the preceding sequence.
271 //-----------------------------------------------------------------------------
272 static tUart Uart;
273
274 // Lookup-Table to decide if 4 raw bits are a modulation.
275 // We accept two or three consecutive "0" in any position with the rest "1"
276 const bool Mod_Miller_LUT[] = {
277 TRUE, TRUE, FALSE, TRUE, FALSE, FALSE, FALSE, FALSE,
278 TRUE, TRUE, FALSE, FALSE, TRUE, FALSE, FALSE, FALSE
279 };
280 #define IsMillerModulationNibble1(b) (Mod_Miller_LUT[(b & 0x00F0) >> 4])
281 #define IsMillerModulationNibble2(b) (Mod_Miller_LUT[(b & 0x000F)])
282
283 void UartReset()
284 {
285 Uart.state = STATE_UNSYNCD;
286 Uart.bitCount = 0;
287 Uart.len = 0; // number of decoded data bytes
288 Uart.parityLen = 0; // number of decoded parity bytes
289 Uart.shiftReg = 0; // shiftreg to hold decoded data bits
290 Uart.parityBits = 0; // holds 8 parity bits
291 Uart.twoBits = 0x0000; // buffer for 2 Bits
292 Uart.highCnt = 0;
293 Uart.startTime = 0;
294 Uart.endTime = 0;
295 }
296
297 void UartInit(uint8_t *data, uint8_t *parity)
298 {
299 Uart.output = data;
300 Uart.parity = parity;
301 UartReset();
302 }
303
304 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
305 static RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time)
306 {
307
308 Uart.twoBits = (Uart.twoBits << 8) | bit;
309
310 if (Uart.state == STATE_UNSYNCD) { // not yet synced
311
312 if (Uart.highCnt < 7) { // wait for a stable unmodulated signal
313 if (Uart.twoBits == 0xffff)
314 Uart.highCnt++;
315 else
316 Uart.highCnt = 0;
317 } else {
318 Uart.syncBit = 0xFFFF; // not set
319 // look for 00xx1111 (the start bit)
320 if ((Uart.twoBits & 0x6780) == 0x0780) Uart.syncBit = 7;
321 else if ((Uart.twoBits & 0x33C0) == 0x03C0) Uart.syncBit = 6;
322 else if ((Uart.twoBits & 0x19E0) == 0x01E0) Uart.syncBit = 5;
323 else if ((Uart.twoBits & 0x0CF0) == 0x00F0) Uart.syncBit = 4;
324 else if ((Uart.twoBits & 0x0678) == 0x0078) Uart.syncBit = 3;
325 else if ((Uart.twoBits & 0x033C) == 0x003C) Uart.syncBit = 2;
326 else if ((Uart.twoBits & 0x019E) == 0x001E) Uart.syncBit = 1;
327 else if ((Uart.twoBits & 0x00CF) == 0x000F) Uart.syncBit = 0;
328 if (Uart.syncBit != 0xFFFF) {
329 Uart.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
330 Uart.startTime -= Uart.syncBit;
331 Uart.endTime = Uart.startTime;
332 Uart.state = STATE_START_OF_COMMUNICATION;
333 }
334 }
335
336 } else {
337
338 if (IsMillerModulationNibble1(Uart.twoBits >> Uart.syncBit)) {
339 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation in both halves - error
340 UartReset();
341 Uart.highCnt = 6;
342 } else { // Modulation in first half = Sequence Z = logic "0"
343 if (Uart.state == STATE_MILLER_X) { // error - must not follow after X
344 UartReset();
345 Uart.highCnt = 6;
346 } else {
347 Uart.bitCount++;
348 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
349 Uart.state = STATE_MILLER_Z;
350 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 6;
351 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
352 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
353 Uart.parityBits <<= 1; // make room for the parity bit
354 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
355 Uart.bitCount = 0;
356 Uart.shiftReg = 0;
357 if((Uart.len & 0x0007) == 0) { // every 8 data bytes
358 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
359 Uart.parityBits = 0;
360 }
361 }
362 }
363 }
364 } else {
365 if (IsMillerModulationNibble2(Uart.twoBits >> Uart.syncBit)) { // Modulation second half = Sequence X = logic "1"
366 Uart.bitCount++;
367 Uart.shiftReg = (Uart.shiftReg >> 1) | 0x100; // add a 1 to the shiftreg
368 Uart.state = STATE_MILLER_X;
369 Uart.endTime = Uart.startTime + 8*(9*Uart.len + Uart.bitCount + 1) - 2;
370 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
371 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
372 Uart.parityBits <<= 1; // make room for the new parity bit
373 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
374 Uart.bitCount = 0;
375 Uart.shiftReg = 0;
376 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
377 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
378 Uart.parityBits = 0;
379 }
380 }
381 } else { // no modulation in both halves - Sequence Y
382 if (Uart.state == STATE_MILLER_Z || Uart.state == STATE_MILLER_Y) { // Y after logic "0" - End of Communication
383 Uart.state = STATE_UNSYNCD;
384 Uart.bitCount--; // last "0" was part of EOC sequence
385 Uart.shiftReg <<= 1; // drop it
386 if(Uart.bitCount > 0) { // if we decoded some bits
387 Uart.shiftReg >>= (9 - Uart.bitCount); // right align them
388 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff); // add last byte to the output
389 Uart.parityBits <<= 1; // add a (void) parity bit
390 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align parity bits
391 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store it
392 return TRUE;
393 } else if (Uart.len & 0x0007) { // there are some parity bits to store
394 Uart.parityBits <<= (8 - (Uart.len & 0x0007)); // left align remaining parity bits
395 Uart.parity[Uart.parityLen++] = Uart.parityBits; // and store them
396 return TRUE; // we are finished with decoding the raw data sequence
397 }
398 }
399 if (Uart.state == STATE_START_OF_COMMUNICATION) { // error - must not follow directly after SOC
400 UartReset();
401 Uart.highCnt = 6;
402 } else { // a logic "0"
403 Uart.bitCount++;
404 Uart.shiftReg = (Uart.shiftReg >> 1); // add a 0 to the shiftreg
405 Uart.state = STATE_MILLER_Y;
406 if(Uart.bitCount >= 9) { // if we decoded a full byte (including parity)
407 Uart.output[Uart.len++] = (Uart.shiftReg & 0xff);
408 Uart.parityBits <<= 1; // make room for the parity bit
409 Uart.parityBits |= ((Uart.shiftReg >> 8) & 0x01); // store parity bit
410 Uart.bitCount = 0;
411 Uart.shiftReg = 0;
412 if ((Uart.len & 0x0007) == 0) { // every 8 data bytes
413 Uart.parity[Uart.parityLen++] = Uart.parityBits; // store 8 parity bits
414 Uart.parityBits = 0;
415 }
416 }
417 }
418 }
419 }
420
421 }
422
423 return FALSE; // not finished yet, need more data
424 }
425
426
427
428 //=============================================================================
429 // ISO 14443 Type A - Manchester decoder
430 //=============================================================================
431 // Basics:
432 // This decoder is used when the PM3 acts as a reader.
433 // The tag will modulate the reader field by asserting different loads to it. As a consequence, the voltage
434 // at the reader antenna will be modulated as well. The FPGA detects the modulation for us and would deliver e.g. the following:
435 // ........ 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 .......
436 // The Manchester decoder needs to identify the following sequences:
437 // 4 ticks modulated followed by 4 ticks unmodulated: Sequence D = 1 (also used as "start of communication")
438 // 4 ticks unmodulated followed by 4 ticks modulated: Sequence E = 0
439 // 8 ticks unmodulated: Sequence F = end of communication
440 // 8 ticks modulated: A collision. Save the collision position and treat as Sequence D
441 // Note 1: the bitstream may start at any time. We therefore need to sync.
442 // Note 2: parameter offset is used to determine the position of the parity bits (required for the anticollision command only)
443 static tDemod Demod;
444
445 // Lookup-Table to decide if 4 raw bits are a modulation.
446 // We accept three or four "1" in any position
447 const bool Mod_Manchester_LUT[] = {
448 FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, TRUE,
449 FALSE, FALSE, FALSE, TRUE, FALSE, TRUE, TRUE, TRUE
450 };
451
452 #define IsManchesterModulationNibble1(b) (Mod_Manchester_LUT[(b & 0x00F0) >> 4])
453 #define IsManchesterModulationNibble2(b) (Mod_Manchester_LUT[(b & 0x000F)])
454
455
456 void DemodReset()
457 {
458 Demod.state = DEMOD_UNSYNCD;
459 Demod.len = 0; // number of decoded data bytes
460 Demod.parityLen = 0;
461 Demod.shiftReg = 0; // shiftreg to hold decoded data bits
462 Demod.parityBits = 0; //
463 Demod.collisionPos = 0; // Position of collision bit
464 Demod.twoBits = 0xffff; // buffer for 2 Bits
465 Demod.highCnt = 0;
466 Demod.startTime = 0;
467 Demod.endTime = 0;
468 }
469
470 void DemodInit(uint8_t *data, uint8_t *parity)
471 {
472 Demod.output = data;
473 Demod.parity = parity;
474 DemodReset();
475 }
476
477 // use parameter non_real_time to provide a timestamp. Set to 0 if the decoder should measure real time
478 static RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time)
479 {
480
481 Demod.twoBits = (Demod.twoBits << 8) | bit;
482
483 if (Demod.state == DEMOD_UNSYNCD) {
484
485 if (Demod.highCnt < 2) { // wait for a stable unmodulated signal
486 if (Demod.twoBits == 0x0000) {
487 Demod.highCnt++;
488 } else {
489 Demod.highCnt = 0;
490 }
491 } else {
492 Demod.syncBit = 0xFFFF; // not set
493 if ((Demod.twoBits & 0x7700) == 0x7000) Demod.syncBit = 7;
494 else if ((Demod.twoBits & 0x3B80) == 0x3800) Demod.syncBit = 6;
495 else if ((Demod.twoBits & 0x1DC0) == 0x1C00) Demod.syncBit = 5;
496 else if ((Demod.twoBits & 0x0EE0) == 0x0E00) Demod.syncBit = 4;
497 else if ((Demod.twoBits & 0x0770) == 0x0700) Demod.syncBit = 3;
498 else if ((Demod.twoBits & 0x03B8) == 0x0380) Demod.syncBit = 2;
499 else if ((Demod.twoBits & 0x01DC) == 0x01C0) Demod.syncBit = 1;
500 else if ((Demod.twoBits & 0x00EE) == 0x00E0) Demod.syncBit = 0;
501 if (Demod.syncBit != 0xFFFF) {
502 Demod.startTime = non_real_time?non_real_time:(GetCountSspClk() & 0xfffffff8);
503 Demod.startTime -= Demod.syncBit;
504 Demod.bitCount = offset; // number of decoded data bits
505 Demod.state = DEMOD_MANCHESTER_DATA;
506 }
507 }
508
509 } else {
510
511 if (IsManchesterModulationNibble1(Demod.twoBits >> Demod.syncBit)) { // modulation in first half
512 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // ... and in second half = collision
513 if (!Demod.collisionPos) {
514 Demod.collisionPos = (Demod.len << 3) + Demod.bitCount;
515 }
516 } // modulation in first half only - Sequence D = 1
517 Demod.bitCount++;
518 Demod.shiftReg = (Demod.shiftReg >> 1) | 0x100; // in both cases, add a 1 to the shiftreg
519 if(Demod.bitCount == 9) { // if we decoded a full byte (including parity)
520 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
521 Demod.parityBits <<= 1; // make room for the parity bit
522 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
523 Demod.bitCount = 0;
524 Demod.shiftReg = 0;
525 if((Demod.len & 0x0007) == 0) { // every 8 data bytes
526 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits
527 Demod.parityBits = 0;
528 }
529 }
530 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1) - 4;
531 } else { // no modulation in first half
532 if (IsManchesterModulationNibble2(Demod.twoBits >> Demod.syncBit)) { // and modulation in second half = Sequence E = 0
533 Demod.bitCount++;
534 Demod.shiftReg = (Demod.shiftReg >> 1); // add a 0 to the shiftreg
535 if(Demod.bitCount >= 9) { // if we decoded a full byte (including parity)
536 Demod.output[Demod.len++] = (Demod.shiftReg & 0xff);
537 Demod.parityBits <<= 1; // make room for the new parity bit
538 Demod.parityBits |= ((Demod.shiftReg >> 8) & 0x01); // store parity bit
539 Demod.bitCount = 0;
540 Demod.shiftReg = 0;
541 if ((Demod.len & 0x0007) == 0) { // every 8 data bytes
542 Demod.parity[Demod.parityLen++] = Demod.parityBits; // store 8 parity bits1
543 Demod.parityBits = 0;
544 }
545 }
546 Demod.endTime = Demod.startTime + 8*(9*Demod.len + Demod.bitCount + 1);
547 } else { // no modulation in both halves - End of communication
548 if(Demod.bitCount > 0) { // there are some remaining data bits
549 Demod.shiftReg >>= (9 - Demod.bitCount); // right align the decoded bits
550 Demod.output[Demod.len++] = Demod.shiftReg & 0xff; // and add them to the output
551 Demod.parityBits <<= 1; // add a (void) parity bit
552 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
553 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
554 return TRUE;
555 } else if (Demod.len & 0x0007) { // there are some parity bits to store
556 Demod.parityBits <<= (8 - (Demod.len & 0x0007)); // left align remaining parity bits
557 Demod.parity[Demod.parityLen++] = Demod.parityBits; // and store them
558 return TRUE; // we are finished with decoding the raw data sequence
559 } else { // nothing received. Start over
560 DemodReset();
561 }
562 }
563 }
564
565 }
566
567 return FALSE; // not finished yet, need more data
568 }
569
570 //=============================================================================
571 // Finally, a `sniffer' for ISO 14443 Type A
572 // Both sides of communication!
573 //=============================================================================
574
575 //-----------------------------------------------------------------------------
576 // Record the sequence of commands sent by the reader to the tag, with
577 // triggering so that we start recording at the point that the tag is moved
578 // near the reader.
579 //-----------------------------------------------------------------------------
580 void RAMFUNC SnoopIso14443a(uint8_t param) {
581 // param:
582 // bit 0 - trigger from first card answer
583 // bit 1 - trigger from first reader 7-bit request
584
585 LEDsoff();
586 // init trace buffer
587 iso14a_clear_trace();
588 iso14a_set_tracing(TRUE);
589
590 // We won't start recording the frames that we acquire until we trigger;
591 // a good trigger condition to get started is probably when we see a
592 // response from the tag.
593 // triggered == FALSE -- to wait first for card
594 bool triggered = !(param & 0x03);
595
596 // The command (reader -> tag) that we're receiving.
597 // The length of a received command will in most cases be no more than 18 bytes.
598 // So 32 should be enough!
599 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
600 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
601
602 // The response (tag -> reader) that we're receiving.
603 uint8_t *receivedResponse = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
604 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
605
606 // As we receive stuff, we copy it from receivedCmd or receivedResponse
607 // into trace, along with its length and other annotations.
608 //uint8_t *trace = (uint8_t *)BigBuf;
609
610 // The DMA buffer, used to stream samples from the FPGA
611 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
612 uint8_t *data = dmaBuf;
613 uint8_t previous_data = 0;
614 int maxDataLen = 0;
615 int dataLen = 0;
616 bool TagIsActive = FALSE;
617 bool ReaderIsActive = FALSE;
618
619 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
620
621 // Set up the demodulator for tag -> reader responses.
622 DemodInit(receivedResponse, receivedResponsePar);
623
624 // Set up the demodulator for the reader -> tag commands
625 UartInit(receivedCmd, receivedCmdPar);
626
627 // Setup and start DMA.
628 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
629
630 // And now we loop, receiving samples.
631 for(uint32_t rsamples = 0; TRUE; ) {
632
633 if(BUTTON_PRESS()) {
634 DbpString("cancelled by button");
635 break;
636 }
637
638 LED_A_ON();
639 WDT_HIT();
640
641 int register readBufDataP = data - dmaBuf;
642 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR;
643 if (readBufDataP <= dmaBufDataP){
644 dataLen = dmaBufDataP - readBufDataP;
645 } else {
646 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP;
647 }
648 // test for length of buffer
649 if(dataLen > maxDataLen) {
650 maxDataLen = dataLen;
651 if(dataLen > 400) {
652 Dbprintf("blew circular buffer! dataLen=%d", dataLen);
653 break;
654 }
655 }
656 if(dataLen < 1) continue;
657
658 // primary buffer was stopped( <-- we lost data!
659 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
660 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
661 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
662 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
663 }
664 // secondary buffer sets as primary, secondary buffer was stopped
665 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
666 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
667 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
668 }
669
670 LED_A_OFF();
671
672 if (rsamples & 0x01) { // Need two samples to feed Miller and Manchester-Decoder
673
674 if(!TagIsActive) { // no need to try decoding reader data if the tag is sending
675 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
676 if (MillerDecoding(readerdata, (rsamples-1)*4)) {
677 LED_C_ON();
678
679 // check - if there is a short 7bit request from reader
680 if ((!triggered) && (param & 0x02) && (Uart.len == 1) && (Uart.bitCount == 7)) triggered = TRUE;
681
682 if(triggered) {
683 if (!LogTrace(receivedCmd,
684 Uart.len,
685 Uart.startTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
686 Uart.endTime*16 - DELAY_READER_AIR2ARM_AS_SNIFFER,
687 Uart.parity,
688 TRUE)) break;
689 }
690 /* And ready to receive another command. */
691 UartReset();
692 /* And also reset the demod code, which might have been */
693 /* false-triggered by the commands from the reader. */
694 DemodReset();
695 LED_B_OFF();
696 }
697 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
698 }
699
700 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
701 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
702 if(ManchesterDecoding(tagdata, 0, (rsamples-1)*4)) {
703 LED_B_ON();
704
705 if (!LogTrace(receivedResponse,
706 Demod.len,
707 Demod.startTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
708 Demod.endTime*16 - DELAY_TAG_AIR2ARM_AS_SNIFFER,
709 Demod.parity,
710 FALSE)) break;
711
712 if ((!triggered) && (param & 0x01)) triggered = TRUE;
713
714 // And ready to receive another response.
715 DemodReset();
716 LED_C_OFF();
717 }
718 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
719 }
720 }
721
722 previous_data = *data;
723 rsamples++;
724 data++;
725 if(data == dmaBuf + DMA_BUFFER_SIZE) {
726 data = dmaBuf;
727 }
728 } // main cycle
729
730 DbpString("COMMAND FINISHED");
731
732 FpgaDisableSscDma();
733 Dbprintf("maxDataLen=%d, Uart.state=%x, Uart.len=%d", maxDataLen, Uart.state, Uart.len);
734 Dbprintf("traceLen=%d, Uart.output[0]=%08x", traceLen, (uint32_t)Uart.output[0]);
735 LEDsoff();
736 }
737
738 //-----------------------------------------------------------------------------
739 // Prepare tag messages
740 //-----------------------------------------------------------------------------
741 static void CodeIso14443aAsTagPar(const uint8_t *cmd, uint16_t len, uint8_t *parity)
742 {
743 ToSendReset();
744
745 // Correction bit, might be removed when not needed
746 ToSendStuffBit(0);
747 ToSendStuffBit(0);
748 ToSendStuffBit(0);
749 ToSendStuffBit(0);
750 ToSendStuffBit(1); // 1
751 ToSendStuffBit(0);
752 ToSendStuffBit(0);
753 ToSendStuffBit(0);
754
755 // Send startbit
756 ToSend[++ToSendMax] = SEC_D;
757 LastProxToAirDuration = 8 * ToSendMax - 4;
758
759 for( uint16_t i = 0; i < len; i++) {
760 uint8_t b = cmd[i];
761
762 // Data bits
763 for(uint16_t j = 0; j < 8; j++) {
764 if(b & 1) {
765 ToSend[++ToSendMax] = SEC_D;
766 } else {
767 ToSend[++ToSendMax] = SEC_E;
768 }
769 b >>= 1;
770 }
771
772 // Get the parity bit
773 if (parity[i>>3] & (0x80>>(i&0x0007))) {
774 ToSend[++ToSendMax] = SEC_D;
775 LastProxToAirDuration = 8 * ToSendMax - 4;
776 } else {
777 ToSend[++ToSendMax] = SEC_E;
778 LastProxToAirDuration = 8 * ToSendMax;
779 }
780 }
781
782 // Send stopbit
783 ToSend[++ToSendMax] = SEC_F;
784
785 // Convert from last byte pos to length
786 ToSendMax++;
787 }
788
789 static void CodeIso14443aAsTag(const uint8_t *cmd, uint16_t len)
790 {
791 uint8_t par[MAX_PARITY_SIZE];
792
793 GetParity(cmd, len, par);
794 CodeIso14443aAsTagPar(cmd, len, par);
795 }
796
797
798 static void Code4bitAnswerAsTag(uint8_t cmd)
799 {
800 int i;
801
802 ToSendReset();
803
804 // Correction bit, might be removed when not needed
805 ToSendStuffBit(0);
806 ToSendStuffBit(0);
807 ToSendStuffBit(0);
808 ToSendStuffBit(0);
809 ToSendStuffBit(1); // 1
810 ToSendStuffBit(0);
811 ToSendStuffBit(0);
812 ToSendStuffBit(0);
813
814 // Send startbit
815 ToSend[++ToSendMax] = SEC_D;
816
817 uint8_t b = cmd;
818 for(i = 0; i < 4; i++) {
819 if(b & 1) {
820 ToSend[++ToSendMax] = SEC_D;
821 LastProxToAirDuration = 8 * ToSendMax - 4;
822 } else {
823 ToSend[++ToSendMax] = SEC_E;
824 LastProxToAirDuration = 8 * ToSendMax;
825 }
826 b >>= 1;
827 }
828
829 // Send stopbit
830 ToSend[++ToSendMax] = SEC_F;
831
832 // Convert from last byte pos to length
833 ToSendMax++;
834 }
835
836 //-----------------------------------------------------------------------------
837 // Wait for commands from reader
838 // Stop when button is pressed
839 // Or return TRUE when command is captured
840 //-----------------------------------------------------------------------------
841 static int GetIso14443aCommandFromReader(uint8_t *received, uint8_t *parity, int *len)
842 {
843 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
844 // only, since we are receiving, not transmitting).
845 // Signal field is off with the appropriate LED
846 LED_D_OFF();
847 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
848
849 // Now run a `software UART' on the stream of incoming samples.
850 UartInit(received, parity);
851
852 // clear RXRDY:
853 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
854
855 for(;;) {
856 WDT_HIT();
857
858 if(BUTTON_PRESS()) return FALSE;
859
860 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
861 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
862 if(MillerDecoding(b, 0)) {
863 *len = Uart.len;
864 return TRUE;
865 }
866 }
867 }
868 }
869
870 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
871 int EmSend4bitEx(uint8_t resp, bool correctionNeeded);
872 int EmSend4bit(uint8_t resp);
873 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par);
874 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded);
875 int EmSendCmd(uint8_t *resp, uint16_t respLen);
876 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
877 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
878 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
879
880 static uint8_t* free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
881
882 typedef struct {
883 uint8_t* response;
884 size_t response_n;
885 uint8_t* modulation;
886 size_t modulation_n;
887 uint32_t ProxToAirDuration;
888 } tag_response_info_t;
889
890 void reset_free_buffer() {
891 free_buffer_pointer = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET);
892 }
893
894 bool prepare_tag_modulation(tag_response_info_t* response_info, size_t max_buffer_size) {
895 // Example response, answer to MIFARE Classic read block will be 16 bytes + 2 CRC = 18 bytes
896 // This will need the following byte array for a modulation sequence
897 // 144 data bits (18 * 8)
898 // 18 parity bits
899 // 2 Start and stop
900 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
901 // 1 just for the case
902 // ----------- +
903 // 166 bytes, since every bit that needs to be send costs us a byte
904 //
905
906 // Prepare the tag modulation bits from the message
907 CodeIso14443aAsTag(response_info->response,response_info->response_n);
908
909 // Make sure we do not exceed the free buffer space
910 if (ToSendMax > max_buffer_size) {
911 Dbprintf("Out of memory, when modulating bits for tag answer:");
912 Dbhexdump(response_info->response_n,response_info->response,false);
913 return false;
914 }
915
916 // Copy the byte array, used for this modulation to the buffer position
917 memcpy(response_info->modulation,ToSend,ToSendMax);
918
919 // Store the number of bytes that were used for encoding/modulation and the time needed to transfer them
920 response_info->modulation_n = ToSendMax;
921 response_info->ProxToAirDuration = LastProxToAirDuration;
922
923 return true;
924 }
925
926 bool prepare_allocated_tag_modulation(tag_response_info_t* response_info) {
927 // Retrieve and store the current buffer index
928 response_info->modulation = free_buffer_pointer;
929
930 // Determine the maximum size we can use from our buffer
931 size_t max_buffer_size = (((uint8_t *)BigBuf) + FREE_BUFFER_OFFSET + FREE_BUFFER_SIZE) - free_buffer_pointer;
932
933 // Forward the prepare tag modulation function to the inner function
934 if (prepare_tag_modulation(response_info,max_buffer_size)) {
935 // Update the free buffer offset
936 free_buffer_pointer += ToSendMax;
937 return true;
938 } else {
939 return false;
940 }
941 }
942
943 //-----------------------------------------------------------------------------
944 // Main loop of simulated tag: receive commands from reader, decide what
945 // response to send, and send it.
946 //-----------------------------------------------------------------------------
947 void SimulateIso14443aTag(int tagType, int uid_1st, int uid_2nd, byte_t* data)
948 {
949 // Enable and clear the trace
950 iso14a_clear_trace();
951 iso14a_set_tracing(TRUE);
952
953 uint8_t sak;
954
955 // The first response contains the ATQA (note: bytes are transmitted in reverse order).
956 uint8_t response1[2];
957
958 switch (tagType) {
959 case 1: { // MIFARE Classic
960 // Says: I am Mifare 1k - original line
961 response1[0] = 0x04;
962 response1[1] = 0x00;
963 sak = 0x08;
964 } break;
965 case 2: { // MIFARE Ultralight
966 // Says: I am a stupid memory tag, no crypto
967 response1[0] = 0x04;
968 response1[1] = 0x00;
969 sak = 0x00;
970 } break;
971 case 3: { // MIFARE DESFire
972 // Says: I am a DESFire tag, ph33r me
973 response1[0] = 0x04;
974 response1[1] = 0x03;
975 sak = 0x20;
976 } break;
977 case 4: { // ISO/IEC 14443-4
978 // Says: I am a javacard (JCOP)
979 response1[0] = 0x04;
980 response1[1] = 0x00;
981 sak = 0x28;
982 } break;
983 case 5: { // MIFARE TNP3XXX
984 // Says: I am a toy
985 response1[0] = 0x01;
986 response1[1] = 0x0f;
987 sak = 0x01;
988 } break;
989 default: {
990 Dbprintf("Error: unkown tagtype (%d)",tagType);
991 return;
992 } break;
993 }
994
995 // The second response contains the (mandatory) first 24 bits of the UID
996 uint8_t response2[5];
997
998 // Check if the uid uses the (optional) part
999 uint8_t response2a[5];
1000 if (uid_2nd) {
1001 response2[0] = 0x88;
1002 num_to_bytes(uid_1st,3,response2+1);
1003 num_to_bytes(uid_2nd,4,response2a);
1004 response2a[4] = response2a[0] ^ response2a[1] ^ response2a[2] ^ response2a[3];
1005
1006 // Configure the ATQA and SAK accordingly
1007 response1[0] |= 0x40;
1008 sak |= 0x04;
1009 } else {
1010 num_to_bytes(uid_1st,4,response2);
1011 // Configure the ATQA and SAK accordingly
1012 response1[0] &= 0xBF;
1013 sak &= 0xFB;
1014 }
1015
1016 // Calculate the BitCountCheck (BCC) for the first 4 bytes of the UID.
1017 response2[4] = response2[0] ^ response2[1] ^ response2[2] ^ response2[3];
1018
1019 // Prepare the mandatory SAK (for 4 and 7 byte UID)
1020 uint8_t response3[3];
1021 response3[0] = sak;
1022 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1023
1024 // Prepare the optional second SAK (for 7 byte UID), drop the cascade bit
1025 uint8_t response3a[3];
1026 response3a[0] = sak & 0xFB;
1027 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1028
1029 uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1030 uint8_t response6[] = { 0x04, 0x58, 0x80, 0x02, 0x00, 0x00 }; // dummy ATS (pseudo-ATR), answer to RATS:
1031 // Format byte = 0x58: FSCI=0x08 (FSC=256), TA(1) and TC(1) present,
1032 // TA(1) = 0x80: different divisors not supported, DR = 1, DS = 1
1033 // TB(1) = not present. Defaults: FWI = 4 (FWT = 256 * 16 * 2^4 * 1/fc = 4833us), SFGI = 0 (SFG = 256 * 16 * 2^0 * 1/fc = 302us)
1034 // TC(1) = 0x02: CID supported, NAD not supported
1035 ComputeCrc14443(CRC_14443_A, response6, 4, &response6[4], &response6[5]);
1036
1037 #define TAG_RESPONSE_COUNT 7
1038 tag_response_info_t responses[TAG_RESPONSE_COUNT] = {
1039 { .response = response1, .response_n = sizeof(response1) }, // Answer to request - respond with card type
1040 { .response = response2, .response_n = sizeof(response2) }, // Anticollision cascade1 - respond with uid
1041 { .response = response2a, .response_n = sizeof(response2a) }, // Anticollision cascade2 - respond with 2nd half of uid if asked
1042 { .response = response3, .response_n = sizeof(response3) }, // Acknowledge select - cascade 1
1043 { .response = response3a, .response_n = sizeof(response3a) }, // Acknowledge select - cascade 2
1044 { .response = response5, .response_n = sizeof(response5) }, // Authentication answer (random nonce)
1045 { .response = response6, .response_n = sizeof(response6) }, // dummy ATS (pseudo-ATR), answer to RATS
1046 };
1047
1048 // Allocate 512 bytes for the dynamic modulation, created when the reader queries for it
1049 // Such a response is less time critical, so we can prepare them on the fly
1050 #define DYNAMIC_RESPONSE_BUFFER_SIZE 64
1051 #define DYNAMIC_MODULATION_BUFFER_SIZE 512
1052 uint8_t dynamic_response_buffer[DYNAMIC_RESPONSE_BUFFER_SIZE];
1053 uint8_t dynamic_modulation_buffer[DYNAMIC_MODULATION_BUFFER_SIZE];
1054 tag_response_info_t dynamic_response_info = {
1055 .response = dynamic_response_buffer,
1056 .response_n = 0,
1057 .modulation = dynamic_modulation_buffer,
1058 .modulation_n = 0
1059 };
1060
1061 // Reset the offset pointer of the free buffer
1062 reset_free_buffer();
1063
1064 // Prepare the responses of the anticollision phase
1065 // there will be not enough time to do this at the moment the reader sends it REQA
1066 for (size_t i=0; i<TAG_RESPONSE_COUNT; i++) {
1067 prepare_allocated_tag_modulation(&responses[i]);
1068 }
1069
1070 int len = 0;
1071
1072 // To control where we are in the protocol
1073 int order = 0;
1074 int lastorder;
1075
1076 // Just to allow some checks
1077 int happened = 0;
1078 int happened2 = 0;
1079 int cmdsRecvd = 0;
1080
1081 // We need to listen to the high-frequency, peak-detected path.
1082 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1083
1084 // buffers used on software Uart:
1085 uint8_t *receivedCmd = ((uint8_t *)BigBuf) + RECV_CMD_OFFSET;
1086 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
1087
1088 cmdsRecvd = 0;
1089 tag_response_info_t* p_response;
1090
1091 LED_A_ON();
1092 for(;;) {
1093 // Clean receive command buffer
1094
1095 if(!GetIso14443aCommandFromReader(receivedCmd, receivedCmdPar, &len)) {
1096 DbpString("Button press");
1097 break;
1098 }
1099
1100 p_response = NULL;
1101
1102 // Okay, look at the command now.
1103 lastorder = order;
1104 if(receivedCmd[0] == 0x26) { // Received a REQUEST
1105 p_response = &responses[0]; order = 1;
1106 } else if(receivedCmd[0] == 0x52) { // Received a WAKEUP
1107 p_response = &responses[0]; order = 6;
1108 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // Received request for UID (cascade 1)
1109 p_response = &responses[1]; order = 2;
1110 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x95) { // Received request for UID (cascade 2)
1111 p_response = &responses[2]; order = 20;
1112 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x93) { // Received a SELECT (cascade 1)
1113 p_response = &responses[3]; order = 3;
1114 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] == 0x95) { // Received a SELECT (cascade 2)
1115 p_response = &responses[4]; order = 30;
1116 } else if(receivedCmd[0] == 0x30) { // Received a (plain) READ
1117 EmSendCmdEx(data+(4*receivedCmd[1]),16,false);
1118 // Dbprintf("Read request from reader: %x %x",receivedCmd[0],receivedCmd[1]);
1119 // We already responded, do not send anything with the EmSendCmd14443aRaw() that is called below
1120 p_response = NULL;
1121 } else if(receivedCmd[0] == 0x50) { // Received a HALT
1122
1123 if (tracing) {
1124 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1125 }
1126 p_response = NULL;
1127 } else if(receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61) { // Received an authentication request
1128 p_response = &responses[5]; order = 7;
1129 } else if(receivedCmd[0] == 0xE0) { // Received a RATS request
1130 if (tagType == 1 || tagType == 2) { // RATS not supported
1131 EmSend4bit(CARD_NACK_NA);
1132 p_response = NULL;
1133 } else {
1134 p_response = &responses[6]; order = 70;
1135 }
1136 } else if (order == 7 && len == 8) { // Received {nr] and {ar} (part of authentication)
1137 if (tracing) {
1138 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1139 }
1140 uint32_t nr = bytes_to_num(receivedCmd,4);
1141 uint32_t ar = bytes_to_num(receivedCmd+4,4);
1142 Dbprintf("Auth attempt {nr}{ar}: %08x %08x",nr,ar);
1143 } else {
1144 // Check for ISO 14443A-4 compliant commands, look at left nibble
1145 switch (receivedCmd[0]) {
1146
1147 case 0x0B:
1148 case 0x0A: { // IBlock (command)
1149 dynamic_response_info.response[0] = receivedCmd[0];
1150 dynamic_response_info.response[1] = 0x00;
1151 dynamic_response_info.response[2] = 0x90;
1152 dynamic_response_info.response[3] = 0x00;
1153 dynamic_response_info.response_n = 4;
1154 } break;
1155
1156 case 0x1A:
1157 case 0x1B: { // Chaining command
1158 dynamic_response_info.response[0] = 0xaa | ((receivedCmd[0]) & 1);
1159 dynamic_response_info.response_n = 2;
1160 } break;
1161
1162 case 0xaa:
1163 case 0xbb: {
1164 dynamic_response_info.response[0] = receivedCmd[0] ^ 0x11;
1165 dynamic_response_info.response_n = 2;
1166 } break;
1167
1168 case 0xBA: { //
1169 memcpy(dynamic_response_info.response,"\xAB\x00",2);
1170 dynamic_response_info.response_n = 2;
1171 } break;
1172
1173 case 0xCA:
1174 case 0xC2: { // Readers sends deselect command
1175 memcpy(dynamic_response_info.response,"\xCA\x00",2);
1176 dynamic_response_info.response_n = 2;
1177 } break;
1178
1179 default: {
1180 // Never seen this command before
1181 if (tracing) {
1182 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1183 }
1184 Dbprintf("Received unknown command (len=%d):",len);
1185 Dbhexdump(len,receivedCmd,false);
1186 // Do not respond
1187 dynamic_response_info.response_n = 0;
1188 } break;
1189 }
1190
1191 if (dynamic_response_info.response_n > 0) {
1192 // Copy the CID from the reader query
1193 dynamic_response_info.response[1] = receivedCmd[1];
1194
1195 // Add CRC bytes, always used in ISO 14443A-4 compliant cards
1196 AppendCrc14443a(dynamic_response_info.response,dynamic_response_info.response_n);
1197 dynamic_response_info.response_n += 2;
1198
1199 if (prepare_tag_modulation(&dynamic_response_info,DYNAMIC_MODULATION_BUFFER_SIZE) == false) {
1200 Dbprintf("Error preparing tag response");
1201 if (tracing) {
1202 LogTrace(receivedCmd, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
1203 }
1204 break;
1205 }
1206 p_response = &dynamic_response_info;
1207 }
1208 }
1209
1210 // Count number of wakeups received after a halt
1211 if(order == 6 && lastorder == 5) { happened++; }
1212
1213 // Count number of other messages after a halt
1214 if(order != 6 && lastorder == 5) { happened2++; }
1215
1216 if(cmdsRecvd > 999) {
1217 DbpString("1000 commands later...");
1218 break;
1219 }
1220 cmdsRecvd++;
1221
1222 if (p_response != NULL) {
1223 EmSendCmd14443aRaw(p_response->modulation, p_response->modulation_n, receivedCmd[0] == 0x52);
1224 // do the tracing for the previous reader request and this tag answer:
1225 uint8_t par[MAX_PARITY_SIZE];
1226 GetParity(p_response->response, p_response->response_n, par);
1227
1228 EmLogTrace(Uart.output,
1229 Uart.len,
1230 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1231 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1232 Uart.parity,
1233 p_response->response,
1234 p_response->response_n,
1235 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1236 (LastTimeProxToAirStart + p_response->ProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1237 par);
1238 }
1239
1240 if (!tracing) {
1241 Dbprintf("Trace Full. Simulation stopped.");
1242 break;
1243 }
1244 }
1245
1246 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1247 LED_A_OFF();
1248 }
1249
1250
1251 // prepare a delayed transfer. This simply shifts ToSend[] by a number
1252 // of bits specified in the delay parameter.
1253 void PrepareDelayedTransfer(uint16_t delay)
1254 {
1255 uint8_t bitmask = 0;
1256 uint8_t bits_to_shift = 0;
1257 uint8_t bits_shifted = 0;
1258
1259 delay &= 0x07;
1260 if (delay) {
1261 for (uint16_t i = 0; i < delay; i++) {
1262 bitmask |= (0x01 << i);
1263 }
1264 ToSend[ToSendMax++] = 0x00;
1265 for (uint16_t i = 0; i < ToSendMax; i++) {
1266 bits_to_shift = ToSend[i] & bitmask;
1267 ToSend[i] = ToSend[i] >> delay;
1268 ToSend[i] = ToSend[i] | (bits_shifted << (8 - delay));
1269 bits_shifted = bits_to_shift;
1270 }
1271 }
1272 }
1273
1274
1275 //-------------------------------------------------------------------------------------
1276 // Transmit the command (to the tag) that was placed in ToSend[].
1277 // Parameter timing:
1278 // if NULL: transfer at next possible time, taking into account
1279 // request guard time and frame delay time
1280 // if == 0: transfer immediately and return time of transfer
1281 // if != 0: delay transfer until time specified
1282 //-------------------------------------------------------------------------------------
1283 static void TransmitFor14443a(const uint8_t *cmd, uint16_t len, uint32_t *timing)
1284 {
1285
1286 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1287
1288 uint32_t ThisTransferTime = 0;
1289
1290 if (timing) {
1291 if(*timing == 0) { // Measure time
1292 *timing = (GetCountSspClk() + 8) & 0xfffffff8;
1293 } else {
1294 PrepareDelayedTransfer(*timing & 0x00000007); // Delay transfer (fine tuning - up to 7 MF clock ticks)
1295 }
1296 if(MF_DBGLEVEL >= 4 && GetCountSspClk() >= (*timing & 0xfffffff8)) Dbprintf("TransmitFor14443a: Missed timing");
1297 while(GetCountSspClk() < (*timing & 0xfffffff8)); // Delay transfer (multiple of 8 MF clock ticks)
1298 LastTimeProxToAirStart = *timing;
1299 } else {
1300 ThisTransferTime = ((MAX(NextTransferTime, GetCountSspClk()) & 0xfffffff8) + 8);
1301 while(GetCountSspClk() < ThisTransferTime);
1302 LastTimeProxToAirStart = ThisTransferTime;
1303 }
1304
1305 // clear TXRDY
1306 AT91C_BASE_SSC->SSC_THR = SEC_Y;
1307
1308 uint16_t c = 0;
1309 for(;;) {
1310 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1311 AT91C_BASE_SSC->SSC_THR = cmd[c];
1312 c++;
1313 if(c >= len) {
1314 break;
1315 }
1316 }
1317 }
1318
1319 NextTransferTime = MAX(NextTransferTime, LastTimeProxToAirStart + REQUEST_GUARD_TIME);
1320 }
1321
1322
1323 //-----------------------------------------------------------------------------
1324 // Prepare reader command (in bits, support short frames) to send to FPGA
1325 //-----------------------------------------------------------------------------
1326 void CodeIso14443aBitsAsReaderPar(const uint8_t * cmd, uint16_t bits, const uint8_t *parity)
1327 {
1328 int i, j;
1329 int last;
1330 uint8_t b;
1331
1332 ToSendReset();
1333
1334 // Start of Communication (Seq. Z)
1335 ToSend[++ToSendMax] = SEC_Z;
1336 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1337 last = 0;
1338
1339 size_t bytecount = nbytes(bits);
1340 // Generate send structure for the data bits
1341 for (i = 0; i < bytecount; i++) {
1342 // Get the current byte to send
1343 b = cmd[i];
1344 size_t bitsleft = MIN((bits-(i*8)),8);
1345
1346 for (j = 0; j < bitsleft; j++) {
1347 if (b & 1) {
1348 // Sequence X
1349 ToSend[++ToSendMax] = SEC_X;
1350 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1351 last = 1;
1352 } else {
1353 if (last == 0) {
1354 // Sequence Z
1355 ToSend[++ToSendMax] = SEC_Z;
1356 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1357 } else {
1358 // Sequence Y
1359 ToSend[++ToSendMax] = SEC_Y;
1360 last = 0;
1361 }
1362 }
1363 b >>= 1;
1364 }
1365
1366 // Only transmit parity bit if we transmitted a complete byte
1367 if (j == 8) {
1368 // Get the parity bit
1369 if (parity[i>>3] & (0x80 >> (i&0x0007))) {
1370 // Sequence X
1371 ToSend[++ToSendMax] = SEC_X;
1372 LastProxToAirDuration = 8 * (ToSendMax+1) - 2;
1373 last = 1;
1374 } else {
1375 if (last == 0) {
1376 // Sequence Z
1377 ToSend[++ToSendMax] = SEC_Z;
1378 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1379 } else {
1380 // Sequence Y
1381 ToSend[++ToSendMax] = SEC_Y;
1382 last = 0;
1383 }
1384 }
1385 }
1386 }
1387
1388 // End of Communication: Logic 0 followed by Sequence Y
1389 if (last == 0) {
1390 // Sequence Z
1391 ToSend[++ToSendMax] = SEC_Z;
1392 LastProxToAirDuration = 8 * (ToSendMax+1) - 6;
1393 } else {
1394 // Sequence Y
1395 ToSend[++ToSendMax] = SEC_Y;
1396 last = 0;
1397 }
1398 ToSend[++ToSendMax] = SEC_Y;
1399
1400 // Convert to length of command:
1401 ToSendMax++;
1402 }
1403
1404 //-----------------------------------------------------------------------------
1405 // Prepare reader command to send to FPGA
1406 //-----------------------------------------------------------------------------
1407 void CodeIso14443aAsReaderPar(const uint8_t * cmd, uint16_t len, const uint8_t *parity)
1408 {
1409 CodeIso14443aBitsAsReaderPar(cmd, len*8, parity);
1410 }
1411
1412 //-----------------------------------------------------------------------------
1413 // Wait for commands from reader
1414 // Stop when button is pressed (return 1) or field was gone (return 2)
1415 // Or return 0 when command is captured
1416 //-----------------------------------------------------------------------------
1417 static int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *parity)
1418 {
1419 *len = 0;
1420
1421 uint32_t timer = 0, vtime = 0;
1422 int analogCnt = 0;
1423 int analogAVG = 0;
1424
1425 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1426 // only, since we are receiving, not transmitting).
1427 // Signal field is off with the appropriate LED
1428 LED_D_OFF();
1429 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1430
1431 // Set ADC to read field strength
1432 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1433 AT91C_BASE_ADC->ADC_MR =
1434 ADC_MODE_PRESCALE(32) |
1435 ADC_MODE_STARTUP_TIME(16) |
1436 ADC_MODE_SAMPLE_HOLD_TIME(8);
1437 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1438 // start ADC
1439 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1440
1441 // Now run a 'software UART' on the stream of incoming samples.
1442 UartInit(received, parity);
1443
1444 // Clear RXRDY:
1445 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1446
1447 for(;;) {
1448 WDT_HIT();
1449
1450 if (BUTTON_PRESS()) return 1;
1451
1452 // test if the field exists
1453 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1454 analogCnt++;
1455 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1456 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1457 if (analogCnt >= 32) {
1458 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1459 vtime = GetTickCount();
1460 if (!timer) timer = vtime;
1461 // 50ms no field --> card to idle state
1462 if (vtime - timer > 50) return 2;
1463 } else
1464 if (timer) timer = 0;
1465 analogCnt = 0;
1466 analogAVG = 0;
1467 }
1468 }
1469
1470 // receive and test the miller decoding
1471 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1472 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1473 if(MillerDecoding(b, 0)) {
1474 *len = Uart.len;
1475 return 0;
1476 }
1477 }
1478
1479 }
1480 }
1481
1482
1483 static int EmSendCmd14443aRaw(uint8_t *resp, uint16_t respLen, bool correctionNeeded)
1484 {
1485 uint8_t b;
1486 uint16_t i = 0;
1487 uint32_t ThisTransferTime;
1488
1489 // Modulate Manchester
1490 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1491
1492 // include correction bit if necessary
1493 if (Uart.parityBits & 0x01) {
1494 correctionNeeded = TRUE;
1495 }
1496 if(correctionNeeded) {
1497 // 1236, so correction bit needed
1498 i = 0;
1499 } else {
1500 i = 1;
1501 }
1502
1503 // clear receiving shift register and holding register
1504 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1505 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1506 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1507 b = AT91C_BASE_SSC->SSC_RHR; (void) b;
1508
1509 // wait for the FPGA to signal fdt_indicator == 1 (the FPGA is ready to queue new data in its delay line)
1510 for (uint16_t j = 0; j < 5; j++) { // allow timeout - better late than never
1511 while(!(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY));
1512 if (AT91C_BASE_SSC->SSC_RHR) break;
1513 }
1514
1515 while ((ThisTransferTime = GetCountSspClk()) & 0x00000007);
1516
1517 // Clear TXRDY:
1518 AT91C_BASE_SSC->SSC_THR = SEC_F;
1519
1520 // send cycle
1521 for(; i <= respLen; ) {
1522 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1523 AT91C_BASE_SSC->SSC_THR = resp[i++];
1524 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1525 }
1526
1527 if(BUTTON_PRESS()) {
1528 break;
1529 }
1530 }
1531
1532 // Ensure that the FPGA Delay Queue is empty before we switch to TAGSIM_LISTEN again:
1533 for (i = 0; i < 2 ; ) {
1534 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1535 AT91C_BASE_SSC->SSC_THR = SEC_F;
1536 FpgaSendQueueDelay = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1537 i++;
1538 }
1539 }
1540
1541 LastTimeProxToAirStart = ThisTransferTime + (correctionNeeded?8:0);
1542
1543 return 0;
1544 }
1545
1546 int EmSend4bitEx(uint8_t resp, bool correctionNeeded){
1547 Code4bitAnswerAsTag(resp);
1548 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1549 // do the tracing for the previous reader request and this tag answer:
1550 uint8_t par[1];
1551 GetParity(&resp, 1, par);
1552 EmLogTrace(Uart.output,
1553 Uart.len,
1554 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1555 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1556 Uart.parity,
1557 &resp,
1558 1,
1559 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1560 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1561 par);
1562 return res;
1563 }
1564
1565 int EmSend4bit(uint8_t resp){
1566 return EmSend4bitEx(resp, false);
1567 }
1568
1569 int EmSendCmdExPar(uint8_t *resp, uint16_t respLen, bool correctionNeeded, uint8_t *par){
1570 CodeIso14443aAsTagPar(resp, respLen, par);
1571 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1572 // do the tracing for the previous reader request and this tag answer:
1573 EmLogTrace(Uart.output,
1574 Uart.len,
1575 Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG,
1576 Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG,
1577 Uart.parity,
1578 resp,
1579 respLen,
1580 LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_TAG,
1581 (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_TAG,
1582 par);
1583 return res;
1584 }
1585
1586 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool correctionNeeded){
1587 uint8_t par[MAX_PARITY_SIZE];
1588 GetParity(resp, respLen, par);
1589 return EmSendCmdExPar(resp, respLen, correctionNeeded, par);
1590 }
1591
1592 int EmSendCmd(uint8_t *resp, uint16_t respLen){
1593 uint8_t par[MAX_PARITY_SIZE];
1594 GetParity(resp, respLen, par);
1595 return EmSendCmdExPar(resp, respLen, false, par);
1596 }
1597
1598 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par){
1599 return EmSendCmdExPar(resp, respLen, false, par);
1600 }
1601
1602 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
1603 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity)
1604 {
1605 if (!tracing) return true;
1606
1607 // we cannot exactly measure the end and start of a received command from reader. However we know that the delay from
1608 // end of the received command to start of the tag's (simulated by us) answer is n*128+20 or n*128+84 resp.
1609 // with n >= 9. The start of the tags answer can be measured and therefore the end of the received command be calculated:
1610 uint16_t reader_modlen = reader_EndTime - reader_StartTime;
1611 uint16_t approx_fdt = tag_StartTime - reader_EndTime;
1612 uint16_t exact_fdt = (approx_fdt - 20 + 32)/64 * 64 + 20;
1613 reader_EndTime = tag_StartTime - exact_fdt;
1614 reader_StartTime = reader_EndTime - reader_modlen;
1615 if (!LogTrace(reader_data, reader_len, reader_StartTime, reader_EndTime, reader_Parity, TRUE)) {
1616 return FALSE;
1617 } else
1618 return(!LogTrace(tag_data, tag_len, tag_StartTime, tag_EndTime, tag_Parity, FALSE));
1619 }
1620
1621 //-----------------------------------------------------------------------------
1622 // Wait a certain time for tag response
1623 // If a response is captured return TRUE
1624 // If it takes too long return FALSE
1625 //-----------------------------------------------------------------------------
1626 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, uint8_t *receivedResponsePar, uint16_t offset)
1627 {
1628 uint16_t c;
1629
1630 // Set FPGA mode to "reader listen mode", no modulation (listen
1631 // only, since we are receiving, not transmitting).
1632 // Signal field is on with the appropriate LED
1633 LED_D_ON();
1634 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1635
1636 // Now get the answer from the card
1637 DemodInit(receivedResponse, receivedResponsePar);
1638
1639 // clear RXRDY:
1640 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1641
1642 c = 0;
1643 for(;;) {
1644 WDT_HIT();
1645
1646 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1647 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1648 if(ManchesterDecoding(b, offset, 0)) {
1649 NextTransferTime = MAX(NextTransferTime, Demod.endTime - (DELAY_AIR2ARM_AS_READER + DELAY_ARM2AIR_AS_READER)/16 + FRAME_DELAY_TIME_PICC_TO_PCD);
1650 return TRUE;
1651 } else if (c++ > iso14a_timeout) {
1652 return FALSE;
1653 }
1654 }
1655 }
1656 }
1657
1658 void ReaderTransmitBitsPar(uint8_t* frame, uint16_t bits, uint8_t *par, uint32_t *timing)
1659 {
1660 CodeIso14443aBitsAsReaderPar(frame, bits, par);
1661
1662 // Send command to tag
1663 TransmitFor14443a(ToSend, ToSendMax, timing);
1664 if(trigger)
1665 LED_A_ON();
1666
1667 // Log reader command in trace buffer
1668 if (tracing) {
1669 LogTrace(frame, nbytes(bits), LastTimeProxToAirStart*16 + DELAY_ARM2AIR_AS_READER, (LastTimeProxToAirStart + LastProxToAirDuration)*16 + DELAY_ARM2AIR_AS_READER, par, TRUE);
1670 }
1671 }
1672
1673 void ReaderTransmitPar(uint8_t* frame, uint16_t len, uint8_t *par, uint32_t *timing)
1674 {
1675 ReaderTransmitBitsPar(frame, len*8, par, timing);
1676 }
1677
1678 void ReaderTransmitBits(uint8_t* frame, uint16_t len, uint32_t *timing)
1679 {
1680 // Generate parity and redirect
1681 uint8_t par[MAX_PARITY_SIZE];
1682 GetParity(frame, len/8, par);
1683 ReaderTransmitBitsPar(frame, len, par, timing);
1684 }
1685
1686 void ReaderTransmit(uint8_t* frame, uint16_t len, uint32_t *timing)
1687 {
1688 // Generate parity and redirect
1689 uint8_t par[MAX_PARITY_SIZE];
1690 GetParity(frame, len, par);
1691 ReaderTransmitBitsPar(frame, len*8, par, timing);
1692 }
1693
1694 int ReaderReceiveOffset(uint8_t* receivedAnswer, uint16_t offset, uint8_t *parity)
1695 {
1696 if (!GetIso14443aAnswerFromTag(receivedAnswer,parity,offset)) return FALSE;
1697 if (tracing) {
1698 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1699 }
1700 return Demod.len;
1701 }
1702
1703 int ReaderReceive(uint8_t *receivedAnswer, uint8_t *parity)
1704 {
1705 if (!GetIso14443aAnswerFromTag(receivedAnswer, parity, 0)) return FALSE;
1706
1707 if (tracing) {
1708 LogTrace(receivedAnswer, Demod.len, Demod.startTime*16 - DELAY_AIR2ARM_AS_READER, Demod.endTime*16 - DELAY_AIR2ARM_AS_READER, parity, FALSE);
1709 }
1710 return Demod.len;
1711 }
1712
1713 /* performs iso14443a anticollision procedure
1714 * fills the uid pointer unless NULL
1715 * fills resp_data unless NULL */
1716 int iso14443a_select_card(byte_t* uid_ptr, iso14a_card_select_t* p_hi14a_card, uint32_t* cuid_ptr) {
1717 uint8_t halt[] = { 0x50 }; // HALT
1718 uint8_t wupa[] = { 0x52 }; // WAKE-UP
1719 //uint8_t reqa[] = { 0x26 }; // REQUEST A
1720 uint8_t sel_all[] = { 0x93,0x20 };
1721 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
1722 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1723 uint8_t *resp = ((uint8_t *)BigBuf) + RECV_RESP_OFFSET;
1724 uint8_t *resp_par = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
1725
1726 byte_t uid_resp[4];
1727 size_t uid_resp_len;
1728
1729 uint8_t sak = 0x04; // cascade uid
1730 int cascade_level = 0;
1731 int len;
1732
1733 ReaderTransmit(halt,sizeof(halt), NULL);
1734
1735 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1736 ReaderTransmitBitsPar(wupa,7,0, NULL);
1737
1738 // Receive the ATQA
1739 if(!ReaderReceive(resp, resp_par)) return 0;
1740 // Dbprintf("atqa: %02x %02x",resp[0],resp[1]);
1741
1742 if(p_hi14a_card) {
1743 memcpy(p_hi14a_card->atqa, resp, 2);
1744 p_hi14a_card->uidlen = 0;
1745 memset(p_hi14a_card->uid,0,10);
1746 }
1747
1748 // clear uid
1749 if (uid_ptr) {
1750 memset(uid_ptr,0,10);
1751 }
1752
1753 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1754 // which case we need to make a cascade 2 request and select - this is a long UID
1755 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1756 for(; sak & 0x04; cascade_level++) {
1757 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1758 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1759
1760 // SELECT_ALL
1761 ReaderTransmit(sel_all,sizeof(sel_all), NULL);
1762 if (!ReaderReceive(resp, resp_par)) return 0;
1763
1764 if (Demod.collisionPos) { // we had a collision and need to construct the UID bit by bit
1765 memset(uid_resp, 0, 4);
1766 uint16_t uid_resp_bits = 0;
1767 uint16_t collision_answer_offset = 0;
1768 // anti-collision-loop:
1769 while (Demod.collisionPos) {
1770 Dbprintf("Multiple tags detected. Collision after Bit %d", Demod.collisionPos);
1771 for (uint16_t i = collision_answer_offset; i < Demod.collisionPos; i++, uid_resp_bits++) { // add valid UID bits before collision point
1772 uint16_t UIDbit = (resp[i/8] >> (i % 8)) & 0x01;
1773 uid_resp[uid_resp_bits & 0xf8] |= UIDbit << (uid_resp_bits % 8);
1774 }
1775 uid_resp[uid_resp_bits/8] |= 1 << (uid_resp_bits % 8); // next time select the card(s) with a 1 in the collision position
1776 uid_resp_bits++;
1777 // construct anticollosion command:
1778 sel_uid[1] = ((2 + uid_resp_bits/8) << 4) | (uid_resp_bits & 0x07); // length of data in bytes and bits
1779 for (uint16_t i = 0; i <= uid_resp_bits/8; i++) {
1780 sel_uid[2+i] = uid_resp[i];
1781 }
1782 collision_answer_offset = uid_resp_bits%8;
1783 ReaderTransmitBits(sel_uid, 16 + uid_resp_bits, NULL);
1784 if (!ReaderReceiveOffset(resp, collision_answer_offset,resp_par)) return 0;
1785 }
1786 // finally, add the last bits and BCC of the UID
1787 for (uint16_t i = collision_answer_offset; i < (Demod.len-1)*8; i++, uid_resp_bits++) {
1788 uint16_t UIDbit = (resp[i/8] >> (i%8)) & 0x01;
1789 uid_resp[uid_resp_bits/8] |= UIDbit << (uid_resp_bits % 8);
1790 }
1791
1792 } else { // no collision, use the response to SELECT_ALL as current uid
1793 memcpy(uid_resp,resp,4);
1794 }
1795 uid_resp_len = 4;
1796
1797
1798 // calculate crypto UID. Always use last 4 Bytes.
1799 if(cuid_ptr) {
1800 *cuid_ptr = bytes_to_num(uid_resp, 4);
1801 }
1802
1803 // Construct SELECT UID command
1804 sel_uid[1] = 0x70; // transmitting a full UID (1 Byte cmd, 1 Byte NVB, 4 Byte UID, 1 Byte BCC, 2 Bytes CRC)
1805 memcpy(sel_uid+2,uid_resp,4); // the UID
1806 sel_uid[6] = sel_uid[2] ^ sel_uid[3] ^ sel_uid[4] ^ sel_uid[5]; // calculate and add BCC
1807 AppendCrc14443a(sel_uid,7); // calculate and add CRC
1808 ReaderTransmit(sel_uid,sizeof(sel_uid), NULL);
1809
1810 // Receive the SAK
1811 if (!ReaderReceive(resp, resp_par)) return 0;
1812 sak = resp[0];
1813
1814 //Dbprintf("SAK: %02x",resp[0]);
1815
1816 // Test if more parts of the uid are comming
1817 if ((sak & 0x04) /* && uid_resp[0] == 0x88 */) {
1818 // Remove first byte, 0x88 is not an UID byte, it CT, see page 3 of:
1819 // http://www.nxp.com/documents/application_note/AN10927.pdf
1820 // This was earlier:
1821 //memcpy(uid_resp, uid_resp + 1, 3);
1822 // But memcpy should not be used for overlapping arrays,
1823 // and memmove appears to not be available in the arm build.
1824 // Therefore:
1825 uid_resp[0] = uid_resp[1];
1826 uid_resp[1] = uid_resp[2];
1827 uid_resp[2] = uid_resp[3];
1828
1829 uid_resp_len = 3;
1830 }
1831
1832 if(uid_ptr) {
1833 memcpy(uid_ptr + (cascade_level*3), uid_resp, uid_resp_len);
1834 }
1835
1836 if(p_hi14a_card) {
1837 memcpy(p_hi14a_card->uid + (cascade_level*3), uid_resp, uid_resp_len);
1838 p_hi14a_card->uidlen += uid_resp_len;
1839 }
1840 }
1841
1842 if(p_hi14a_card) {
1843 p_hi14a_card->sak = sak;
1844 p_hi14a_card->ats_len = 0;
1845 }
1846
1847 if( (sak & 0x20) == 0) {
1848 return 2; // non iso14443a compliant tag
1849 }
1850
1851 // Request for answer to select
1852 AppendCrc14443a(rats, 2);
1853 ReaderTransmit(rats, sizeof(rats), NULL);
1854
1855 if (!(len = ReaderReceive(resp,resp_par))) return 0;
1856
1857 if(p_hi14a_card) {
1858 memcpy(p_hi14a_card->ats, resp, sizeof(p_hi14a_card->ats));
1859 p_hi14a_card->ats_len = len;
1860 }
1861
1862 // reset the PCB block number
1863 iso14_pcb_blocknum = 0;
1864 return 1;
1865 }
1866
1867 void iso14443a_setup(uint8_t fpga_minor_mode) {
1868 FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
1869 // Set up the synchronous serial port
1870 FpgaSetupSsc();
1871 // connect Demodulated Signal to ADC:
1872 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1873
1874 // Signal field is on with the appropriate LED
1875 if (fpga_minor_mode == FPGA_HF_ISO14443A_READER_MOD || fpga_minor_mode == FPGA_HF_ISO14443A_READER_LISTEN) {
1876 LED_D_ON();
1877 } else {
1878 LED_D_OFF();
1879 }
1880 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | fpga_minor_mode);
1881
1882 // Start the timer
1883 StartCountSspClk();
1884
1885 DemodReset();
1886 UartReset();
1887 NextTransferTime = 2*DELAY_ARM2AIR_AS_READER;
1888 iso14a_set_timeout(1050); // 10ms default 10*105 =
1889 }
1890
1891 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, void *data) {
1892 uint8_t parity[MAX_PARITY_SIZE];
1893 uint8_t real_cmd[cmd_len+4];
1894 real_cmd[0] = 0x0a; //I-Block
1895 // put block number into the PCB
1896 real_cmd[0] |= iso14_pcb_blocknum;
1897 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1898 memcpy(real_cmd+2, cmd, cmd_len);
1899 AppendCrc14443a(real_cmd,cmd_len+2);
1900
1901 ReaderTransmit(real_cmd, cmd_len+4, NULL);
1902 size_t len = ReaderReceive(data, parity);
1903 uint8_t * data_bytes = (uint8_t *) data;
1904 if (!len)
1905 return 0; //DATA LINK ERROR
1906 // if we received an I- or R(ACK)-Block with a block number equal to the
1907 // current block number, toggle the current block number
1908 else if (len >= 4 // PCB+CID+CRC = 4 bytes
1909 && ((data_bytes[0] & 0xC0) == 0 // I-Block
1910 || (data_bytes[0] & 0xD0) == 0x80) // R-Block with ACK bit set to 0
1911 && (data_bytes[0] & 0x01) == iso14_pcb_blocknum) // equal block numbers
1912 {
1913 iso14_pcb_blocknum ^= 1;
1914 }
1915
1916 return len;
1917 }
1918
1919 //-----------------------------------------------------------------------------
1920 // Read an ISO 14443a tag. Send out commands and store answers.
1921 //
1922 //-----------------------------------------------------------------------------
1923 void ReaderIso14443a(UsbCommand *c)
1924 {
1925 iso14a_command_t param = c->arg[0];
1926 uint8_t *cmd = c->d.asBytes;
1927 size_t len = c->arg[1];
1928 size_t lenbits = c->arg[2];
1929 uint32_t arg0 = 0;
1930 byte_t buf[USB_CMD_DATA_SIZE];
1931 uint8_t par[MAX_PARITY_SIZE];
1932
1933 if(param & ISO14A_CONNECT) {
1934 iso14a_clear_trace();
1935 }
1936
1937 iso14a_set_tracing(TRUE);
1938
1939 if(param & ISO14A_REQUEST_TRIGGER) {
1940 iso14a_set_trigger(TRUE);
1941 }
1942
1943 if(param & ISO14A_CONNECT) {
1944 iso14443a_setup(FPGA_HF_ISO14443A_READER_LISTEN);
1945 if(!(param & ISO14A_NO_SELECT)) {
1946 iso14a_card_select_t *card = (iso14a_card_select_t*)buf;
1947 arg0 = iso14443a_select_card(NULL,card,NULL);
1948 cmd_send(CMD_ACK,arg0,card->uidlen,0,buf,sizeof(iso14a_card_select_t));
1949 }
1950 }
1951
1952 if(param & ISO14A_SET_TIMEOUT) {
1953 iso14a_set_timeout(c->arg[2]);
1954 }
1955
1956 if(param & ISO14A_APDU) {
1957 arg0 = iso14_apdu(cmd, len, buf);
1958 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1959 }
1960
1961 if(param & ISO14A_RAW) {
1962 if(param & ISO14A_APPEND_CRC) {
1963 AppendCrc14443a(cmd,len);
1964 len += 2;
1965 if (lenbits) lenbits += 16;
1966 }
1967 if(lenbits>0) {
1968 GetParity(cmd, lenbits/8, par);
1969 ReaderTransmitBitsPar(cmd, lenbits, par, NULL);
1970 } else {
1971 ReaderTransmit(cmd,len, NULL);
1972 }
1973 arg0 = ReaderReceive(buf, par);
1974 cmd_send(CMD_ACK,arg0,0,0,buf,sizeof(buf));
1975 }
1976
1977 if(param & ISO14A_REQUEST_TRIGGER) {
1978 iso14a_set_trigger(FALSE);
1979 }
1980
1981 if(param & ISO14A_NO_DISCONNECT) {
1982 return;
1983 }
1984
1985 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1986 LEDsoff();
1987 }
1988
1989
1990 // Determine the distance between two nonces.
1991 // Assume that the difference is small, but we don't know which is first.
1992 // Therefore try in alternating directions.
1993 int32_t dist_nt(uint32_t nt1, uint32_t nt2) {
1994
1995 uint16_t i;
1996 uint32_t nttmp1, nttmp2;
1997
1998 if (nt1 == nt2) return 0;
1999
2000 nttmp1 = nt1;
2001 nttmp2 = nt2;
2002
2003 for (i = 1; i < 32768; i++) {
2004 nttmp1 = prng_successor(nttmp1, 1);
2005 if (nttmp1 == nt2) return i;
2006 nttmp2 = prng_successor(nttmp2, 1);
2007 if (nttmp2 == nt1) return -i;
2008 }
2009
2010 return(-99999); // either nt1 or nt2 are invalid nonces
2011 }
2012
2013
2014 //-----------------------------------------------------------------------------
2015 // Recover several bits of the cypher stream. This implements (first stages of)
2016 // the algorithm described in "The Dark Side of Security by Obscurity and
2017 // Cloning MiFare Classic Rail and Building Passes, Anywhere, Anytime"
2018 // (article by Nicolas T. Courtois, 2009)
2019 //-----------------------------------------------------------------------------
2020 void ReaderMifare(bool first_try)
2021 {
2022 // Mifare AUTH
2023 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
2024 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
2025 static uint8_t mf_nr_ar3;
2026
2027 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2028 uint8_t* receivedAnswerPar = (((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET);
2029
2030 iso14a_clear_trace();
2031 iso14a_set_tracing(TRUE);
2032
2033 byte_t nt_diff = 0;
2034 uint8_t par[1] = {0}; // maximum 8 Bytes to be sent here, 1 byte parity is therefore enough
2035 static byte_t par_low = 0;
2036 bool led_on = TRUE;
2037 uint8_t uid[10] ={0};
2038 uint32_t cuid;
2039
2040 uint32_t nt = 0;
2041 uint32_t previous_nt = 0;
2042 static uint32_t nt_attacked = 0;
2043 byte_t par_list[8] = {0x00};
2044 byte_t ks_list[8] = {0x00};
2045
2046 static uint32_t sync_time;
2047 static uint32_t sync_cycles;
2048 int catch_up_cycles = 0;
2049 int last_catch_up = 0;
2050 uint16_t consecutive_resyncs = 0;
2051 int isOK = 0;
2052
2053 if (first_try) {
2054 mf_nr_ar3 = 0;
2055 iso14443a_setup(FPGA_HF_ISO14443A_READER_MOD);
2056 sync_time = GetCountSspClk() & 0xfffffff8;
2057 sync_cycles = 65536; // theory: Mifare Classic's random generator repeats every 2^16 cycles (and so do the nonces).
2058 nt_attacked = 0;
2059 nt = 0;
2060 par[0] = 0;
2061 }
2062 else {
2063 // we were unsuccessful on a previous call. Try another READER nonce (first 3 parity bits remain the same)
2064 mf_nr_ar3++;
2065 mf_nr_ar[3] = mf_nr_ar3;
2066 par[0] = par_low;
2067 }
2068
2069 LED_A_ON();
2070 LED_B_OFF();
2071 LED_C_OFF();
2072
2073
2074 for(uint16_t i = 0; TRUE; i++) {
2075
2076 WDT_HIT();
2077
2078 // Test if the action was cancelled
2079 if(BUTTON_PRESS()) {
2080 break;
2081 }
2082
2083 LED_C_ON();
2084
2085 if(!iso14443a_select_card(uid, NULL, &cuid)) {
2086 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Can't select card");
2087 continue;
2088 }
2089
2090 sync_time = (sync_time & 0xfffffff8) + sync_cycles + catch_up_cycles;
2091 catch_up_cycles = 0;
2092
2093 // if we missed the sync time already, advance to the next nonce repeat
2094 while(GetCountSspClk() > sync_time) {
2095 sync_time = (sync_time & 0xfffffff8) + sync_cycles;
2096 }
2097
2098 // Transmit MIFARE_CLASSIC_AUTH at synctime. Should result in returning the same tag nonce (== nt_attacked)
2099 ReaderTransmit(mf_auth, sizeof(mf_auth), &sync_time);
2100
2101 // Receive the (4 Byte) "random" nonce
2102 if (!ReaderReceive(receivedAnswer, receivedAnswerPar)) {
2103 if (MF_DBGLEVEL >= 1) Dbprintf("Mifare: Couldn't receive tag nonce");
2104 continue;
2105 }
2106
2107 previous_nt = nt;
2108 nt = bytes_to_num(receivedAnswer, 4);
2109
2110 // Transmit reader nonce with fake par
2111 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar), par, NULL);
2112
2113 if (first_try && previous_nt && !nt_attacked) { // we didn't calibrate our clock yet
2114 int nt_distance = dist_nt(previous_nt, nt);
2115 if (nt_distance == 0) {
2116 nt_attacked = nt;
2117 }
2118 else {
2119 if (nt_distance == -99999) { // invalid nonce received, try again
2120 continue;
2121 }
2122 sync_cycles = (sync_cycles - nt_distance);
2123 if (MF_DBGLEVEL >= 3) Dbprintf("calibrating in cycle %d. nt_distance=%d, Sync_cycles: %d\n", i, nt_distance, sync_cycles);
2124 continue;
2125 }
2126 }
2127
2128 if ((nt != nt_attacked) && nt_attacked) { // we somehow lost sync. Try to catch up again...
2129 catch_up_cycles = -dist_nt(nt_attacked, nt);
2130 if (catch_up_cycles == 99999) { // invalid nonce received. Don't resync on that one.
2131 catch_up_cycles = 0;
2132 continue;
2133 }
2134 if (catch_up_cycles == last_catch_up) {
2135 consecutive_resyncs++;
2136 }
2137 else {
2138 last_catch_up = catch_up_cycles;
2139 consecutive_resyncs = 0;
2140 }
2141 if (consecutive_resyncs < 3) {
2142 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d. nt_distance=%d. Consecutive Resyncs = %d. Trying one time catch up...\n", i, -catch_up_cycles, consecutive_resyncs);
2143 }
2144 else {
2145 sync_cycles = sync_cycles + catch_up_cycles;
2146 if (MF_DBGLEVEL >= 3) Dbprintf("Lost sync in cycle %d for the fourth time consecutively (nt_distance = %d). Adjusting sync_cycles to %d.\n", i, -catch_up_cycles, sync_cycles);
2147 }
2148 continue;
2149 }
2150
2151 consecutive_resyncs = 0;
2152
2153 // Receive answer. This will be a 4 Bit NACK when the 8 parity bits are OK after decoding
2154 if (ReaderReceive(receivedAnswer, receivedAnswerPar))
2155 {
2156 catch_up_cycles = 8; // the PRNG is delayed by 8 cycles due to the NAC (4Bits = 0x05 encrypted) transfer
2157
2158 if (nt_diff == 0)
2159 {
2160 par_low = par[0] & 0xE0; // there is no need to check all parities for other nt_diff. Parity Bits for mf_nr_ar[0..2] won't change
2161 }
2162
2163 led_on = !led_on;
2164 if(led_on) LED_B_ON(); else LED_B_OFF();
2165
2166 par_list[nt_diff] = SwapBits(par[0], 8);
2167 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
2168
2169 // Test if the information is complete
2170 if (nt_diff == 0x07) {
2171 isOK = 1;
2172 break;
2173 }
2174
2175 nt_diff = (nt_diff + 1) & 0x07;
2176 mf_nr_ar[3] = (mf_nr_ar[3] & 0x1F) | (nt_diff << 5);
2177 par[0] = par_low;
2178 } else {
2179 if (nt_diff == 0 && first_try)
2180 {
2181 par[0]++;
2182 } else {
2183 par[0] = ((par[0] & 0x1F) + 1) | par_low;
2184 }
2185 }
2186 }
2187
2188
2189 mf_nr_ar[3] &= 0x1F;
2190
2191 byte_t buf[28];
2192 memcpy(buf + 0, uid, 4);
2193 num_to_bytes(nt, 4, buf + 4);
2194 memcpy(buf + 8, par_list, 8);
2195 memcpy(buf + 16, ks_list, 8);
2196 memcpy(buf + 24, mf_nr_ar, 4);
2197
2198 cmd_send(CMD_ACK,isOK,0,0,buf,28);
2199
2200 // Thats it...
2201 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2202 LEDsoff();
2203
2204 iso14a_set_tracing(FALSE);
2205 }
2206
2207 /**
2208 *MIFARE 1K simulate.
2209 *
2210 *@param flags :
2211 * FLAG_INTERACTIVE - In interactive mode, we are expected to finish the operation with an ACK
2212 * 4B_FLAG_UID_IN_DATA - means that there is a 4-byte UID in the data-section, we're expected to use that
2213 * 7B_FLAG_UID_IN_DATA - means that there is a 7-byte UID in the data-section, we're expected to use that
2214 * FLAG_NR_AR_ATTACK - means we should collect NR_AR responses for bruteforcing later
2215 *@param exitAfterNReads, exit simulation after n blocks have been read, 0 is inifite
2216 */
2217 void Mifare1ksim(uint8_t flags, uint8_t exitAfterNReads, uint8_t arg2, uint8_t *datain)
2218 {
2219 int cardSTATE = MFEMUL_NOFIELD;
2220 int _7BUID = 0;
2221 int vHf = 0; // in mV
2222 int res;
2223 uint32_t selTimer = 0;
2224 uint32_t authTimer = 0;
2225 uint16_t len = 0;
2226 uint8_t cardWRBL = 0;
2227 uint8_t cardAUTHSC = 0;
2228 uint8_t cardAUTHKEY = 0xff; // no authentication
2229 uint32_t cardRr = 0;
2230 uint32_t cuid = 0;
2231 //uint32_t rn_enc = 0;
2232 uint32_t ans = 0;
2233 uint32_t cardINTREG = 0;
2234 uint8_t cardINTBLOCK = 0;
2235 struct Crypto1State mpcs = {0, 0};
2236 struct Crypto1State *pcs;
2237 pcs = &mpcs;
2238 uint32_t numReads = 0;//Counts numer of times reader read a block
2239 uint8_t* receivedCmd = get_bigbufptr_recvcmdbuf();
2240 uint8_t* receivedCmd_par = receivedCmd + MAX_FRAME_SIZE;
2241 uint8_t* response = get_bigbufptr_recvrespbuf();
2242 uint8_t* response_par = response + MAX_FRAME_SIZE;
2243
2244 uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2245 uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2246 uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2247 uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2248 uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2249
2250 uint8_t rAUTH_NT[] = {0x01, 0x02, 0x03, 0x04};
2251 uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2252
2253 //Here, we collect UID,NT,AR,NR,UID2,NT2,AR2,NR2
2254 // This can be used in a reader-only attack.
2255 // (it can also be retrieved via 'hf 14a list', but hey...
2256 uint32_t ar_nr_responses[] = {0,0,0,0,0,0,0,0};
2257 uint8_t ar_nr_collected = 0;
2258
2259 // clear trace
2260 iso14a_clear_trace();
2261 iso14a_set_tracing(TRUE);
2262
2263 // Authenticate response - nonce
2264 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2265
2266 //-- Determine the UID
2267 // Can be set from emulator memory, incoming data
2268 // and can be 7 or 4 bytes long
2269 if (flags & FLAG_4B_UID_IN_DATA)
2270 {
2271 // 4B uid comes from data-portion of packet
2272 memcpy(rUIDBCC1,datain,4);
2273 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2274
2275 } else if (flags & FLAG_7B_UID_IN_DATA) {
2276 // 7B uid comes from data-portion of packet
2277 memcpy(&rUIDBCC1[1],datain,3);
2278 memcpy(rUIDBCC2, datain+3, 4);
2279 _7BUID = true;
2280 } else {
2281 // get UID from emul memory
2282 emlGetMemBt(receivedCmd, 7, 1);
2283 _7BUID = !(receivedCmd[0] == 0x00);
2284 if (!_7BUID) { // ---------- 4BUID
2285 emlGetMemBt(rUIDBCC1, 0, 4);
2286 } else { // ---------- 7BUID
2287 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2288 emlGetMemBt(rUIDBCC2, 3, 4);
2289 }
2290 }
2291
2292 /*
2293 * Regardless of what method was used to set the UID, set fifth byte and modify
2294 * the ATQA for 4 or 7-byte UID
2295 */
2296 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2297 if (_7BUID) {
2298 rATQA[0] = 0x44;
2299 rUIDBCC1[0] = 0x88;
2300 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2301 }
2302
2303 // We need to listen to the high-frequency, peak-detected path.
2304 iso14443a_setup(FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2305
2306
2307 if (MF_DBGLEVEL >= 1) {
2308 if (!_7BUID) {
2309 Dbprintf("4B UID: %02x%02x%02x%02x",
2310 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3]);
2311 } else {
2312 Dbprintf("7B UID: (%02x)%02x%02x%02x%02x%02x%02x%02x",
2313 rUIDBCC1[0], rUIDBCC1[1], rUIDBCC1[2], rUIDBCC1[3],
2314 rUIDBCC2[0], rUIDBCC2[1] ,rUIDBCC2[2], rUIDBCC2[3]);
2315 }
2316 }
2317
2318 bool finished = FALSE;
2319 while (!BUTTON_PRESS() && !finished) {
2320 WDT_HIT();
2321
2322 // find reader field
2323 // Vref = 3300mV, and an 10:1 voltage divider on the input
2324 // can measure voltages up to 33000 mV
2325 if (cardSTATE == MFEMUL_NOFIELD) {
2326 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2327 if (vHf > MF_MINFIELDV) {
2328 cardSTATE_TO_IDLE();
2329 LED_A_ON();
2330 }
2331 }
2332 if(cardSTATE == MFEMUL_NOFIELD) continue;
2333
2334 //Now, get data
2335
2336 res = EmGetCmd(receivedCmd, &len, receivedCmd_par);
2337 if (res == 2) { //Field is off!
2338 cardSTATE = MFEMUL_NOFIELD;
2339 LEDsoff();
2340 continue;
2341 } else if (res == 1) {
2342 break; //return value 1 means button press
2343 }
2344
2345 // REQ or WUP request in ANY state and WUP in HALTED state
2346 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2347 selTimer = GetTickCount();
2348 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2349 cardSTATE = MFEMUL_SELECT1;
2350
2351 // init crypto block
2352 LED_B_OFF();
2353 LED_C_OFF();
2354 crypto1_destroy(pcs);
2355 cardAUTHKEY = 0xff;
2356 continue;
2357 }
2358
2359 switch (cardSTATE) {
2360 case MFEMUL_NOFIELD:
2361 case MFEMUL_HALTED:
2362 case MFEMUL_IDLE:{
2363 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2364 break;
2365 }
2366 case MFEMUL_SELECT1:{
2367 // select all
2368 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2369 if (MF_DBGLEVEL >= 4) Dbprintf("SELECT ALL received");
2370 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2371 break;
2372 }
2373
2374 if (MF_DBGLEVEL >= 4 && len == 9 && receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 )
2375 {
2376 Dbprintf("SELECT %02x%02x%02x%02x received",receivedCmd[2],receivedCmd[3],receivedCmd[4],receivedCmd[5]);
2377 }
2378 // select card
2379 if (len == 9 &&
2380 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2381 EmSendCmd(_7BUID?rSAK1:rSAK, _7BUID?sizeof(rSAK1):sizeof(rSAK));
2382 cuid = bytes_to_num(rUIDBCC1, 4);
2383 if (!_7BUID) {
2384 cardSTATE = MFEMUL_WORK;
2385 LED_B_ON();
2386 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2387 break;
2388 } else {
2389 cardSTATE = MFEMUL_SELECT2;
2390 }
2391 }
2392 break;
2393 }
2394 case MFEMUL_AUTH1:{
2395 if( len != 8)
2396 {
2397 cardSTATE_TO_IDLE();
2398 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2399 break;
2400 }
2401 uint32_t ar = bytes_to_num(receivedCmd, 4);
2402 uint32_t nr = bytes_to_num(&receivedCmd[4], 4);
2403
2404 //Collect AR/NR
2405 if(ar_nr_collected < 2){
2406 if(ar_nr_responses[2] != ar)
2407 {// Avoid duplicates... probably not necessary, ar should vary.
2408 ar_nr_responses[ar_nr_collected*4] = cuid;
2409 ar_nr_responses[ar_nr_collected*4+1] = nonce;
2410 ar_nr_responses[ar_nr_collected*4+2] = ar;
2411 ar_nr_responses[ar_nr_collected*4+3] = nr;
2412 ar_nr_collected++;
2413 }
2414 }
2415
2416 // --- crypto
2417 crypto1_word(pcs, ar , 1);
2418 cardRr = nr ^ crypto1_word(pcs, 0, 0);
2419
2420 // test if auth OK
2421 if (cardRr != prng_successor(nonce, 64)){
2422 if (MF_DBGLEVEL >= 2) Dbprintf("AUTH FAILED for sector %d with key %c. cardRr=%08x, succ=%08x",
2423 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2424 cardRr, prng_successor(nonce, 64));
2425 // Shouldn't we respond anything here?
2426 // Right now, we don't nack or anything, which causes the
2427 // reader to do a WUPA after a while. /Martin
2428 // -- which is the correct response. /piwi
2429 cardSTATE_TO_IDLE();
2430 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2431 break;
2432 }
2433
2434 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2435
2436 num_to_bytes(ans, 4, rAUTH_AT);
2437 // --- crypto
2438 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2439 LED_C_ON();
2440 cardSTATE = MFEMUL_WORK;
2441 if (MF_DBGLEVEL >= 4) Dbprintf("AUTH COMPLETED for sector %d with key %c. time=%d",
2442 cardAUTHSC, cardAUTHKEY == 0 ? 'A' : 'B',
2443 GetTickCount() - authTimer);
2444 break;
2445 }
2446 case MFEMUL_SELECT2:{
2447 if (!len) {
2448 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2449 break;
2450 }
2451 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2452 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2453 break;
2454 }
2455
2456 // select 2 card
2457 if (len == 9 &&
2458 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2459 EmSendCmd(rSAK, sizeof(rSAK));
2460 cuid = bytes_to_num(rUIDBCC2, 4);
2461 cardSTATE = MFEMUL_WORK;
2462 LED_B_ON();
2463 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2464 break;
2465 }
2466
2467 // i guess there is a command). go into the work state.
2468 if (len != 4) {
2469 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2470 break;
2471 }
2472 cardSTATE = MFEMUL_WORK;
2473 //goto lbWORK;
2474 //intentional fall-through to the next case-stmt
2475 }
2476
2477 case MFEMUL_WORK:{
2478 if (len == 0) {
2479 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2480 break;
2481 }
2482
2483 bool encrypted_data = (cardAUTHKEY != 0xFF) ;
2484
2485 if(encrypted_data) {
2486 // decrypt seqence
2487 mf_crypto1_decrypt(pcs, receivedCmd, len);
2488 }
2489
2490 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2491 authTimer = GetTickCount();
2492 cardAUTHSC = receivedCmd[1] / 4; // received block num
2493 cardAUTHKEY = receivedCmd[0] - 0x60;
2494 crypto1_destroy(pcs);//Added by martin
2495 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2496
2497 if (!encrypted_data) { // first authentication
2498 if (MF_DBGLEVEL >= 4) Dbprintf("Reader authenticating for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2499
2500 crypto1_word(pcs, cuid ^ nonce, 0);//Update crypto state
2501 num_to_bytes(nonce, 4, rAUTH_AT); // Send nonce
2502 } else { // nested authentication
2503 if (MF_DBGLEVEL >= 4) Dbprintf("Reader doing nested authentication for block %d (0x%02x) with key %d",receivedCmd[1] ,receivedCmd[1],cardAUTHKEY );
2504 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2505 num_to_bytes(ans, 4, rAUTH_AT);
2506 }
2507 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2508 //Dbprintf("Sending rAUTH %02x%02x%02x%02x", rAUTH_AT[0],rAUTH_AT[1],rAUTH_AT[2],rAUTH_AT[3]);
2509 cardSTATE = MFEMUL_AUTH1;
2510 break;
2511 }
2512
2513 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2514 // BUT... ACK --> NACK
2515 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2516 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2517 break;
2518 }
2519
2520 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2521 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2522 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2523 break;
2524 }
2525
2526 if(len != 4) {
2527 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2528 break;
2529 }
2530
2531 if(receivedCmd[0] == 0x30 // read block
2532 || receivedCmd[0] == 0xA0 // write block
2533 || receivedCmd[0] == 0xC0 // inc
2534 || receivedCmd[0] == 0xC1 // dec
2535 || receivedCmd[0] == 0xC2 // restore
2536 || receivedCmd[0] == 0xB0) { // transfer
2537 if (receivedCmd[1] >= 16 * 4) {
2538 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2539 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on out of range block: %d (0x%02x), nacking",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2540 break;
2541 }
2542
2543 if (receivedCmd[1] / 4 != cardAUTHSC) {
2544 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2545 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate (0x%02) on block (0x%02x) not authenticated for (0x%02x), nacking",receivedCmd[0],receivedCmd[1],cardAUTHSC);
2546 break;
2547 }
2548 }
2549 // read block
2550 if (receivedCmd[0] == 0x30) {
2551 if (MF_DBGLEVEL >= 4) {
2552 Dbprintf("Reader reading block %d (0x%02x)",receivedCmd[1],receivedCmd[1]);
2553 }
2554 emlGetMem(response, receivedCmd[1], 1);
2555 AppendCrc14443a(response, 16);
2556 mf_crypto1_encrypt(pcs, response, 18, response_par);
2557 EmSendCmdPar(response, 18, response_par);
2558 numReads++;
2559 if(exitAfterNReads > 0 && numReads == exitAfterNReads) {
2560 Dbprintf("%d reads done, exiting", numReads);
2561 finished = true;
2562 }
2563 break;
2564 }
2565 // write block
2566 if (receivedCmd[0] == 0xA0) {
2567 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0xA0 write block %d (%02x)",receivedCmd[1],receivedCmd[1]);
2568 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2569 cardSTATE = MFEMUL_WRITEBL2;
2570 cardWRBL = receivedCmd[1];
2571 break;
2572 }
2573 // increment, decrement, restore
2574 if (receivedCmd[0] == 0xC0 || receivedCmd[0] == 0xC1 || receivedCmd[0] == 0xC2) {
2575 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x inc(0xC1)/dec(0xC0)/restore(0xC2) block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2576 if (emlCheckValBl(receivedCmd[1])) {
2577 if (MF_DBGLEVEL >= 2) Dbprintf("Reader tried to operate on block, but emlCheckValBl failed, nacking");
2578 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2579 break;
2580 }
2581 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2582 if (receivedCmd[0] == 0xC1)
2583 cardSTATE = MFEMUL_INTREG_INC;
2584 if (receivedCmd[0] == 0xC0)
2585 cardSTATE = MFEMUL_INTREG_DEC;
2586 if (receivedCmd[0] == 0xC2)
2587 cardSTATE = MFEMUL_INTREG_REST;
2588 cardWRBL = receivedCmd[1];
2589 break;
2590 }
2591 // transfer
2592 if (receivedCmd[0] == 0xB0) {
2593 if (MF_DBGLEVEL >= 4) Dbprintf("RECV 0x%02x transfer block %d (%02x)",receivedCmd[0],receivedCmd[1],receivedCmd[1]);
2594 if (emlSetValBl(cardINTREG, cardINTBLOCK, receivedCmd[1]))
2595 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2596 else
2597 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2598 break;
2599 }
2600 // halt
2601 if (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00) {
2602 LED_B_OFF();
2603 LED_C_OFF();
2604 cardSTATE = MFEMUL_HALTED;
2605 if (MF_DBGLEVEL >= 4) Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2606 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2607 break;
2608 }
2609 // RATS
2610 if (receivedCmd[0] == 0xe0) {//RATS
2611 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2612 break;
2613 }
2614 // command not allowed
2615 if (MF_DBGLEVEL >= 4) Dbprintf("Received command not allowed, nacking");
2616 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2617 break;
2618 }
2619 case MFEMUL_WRITEBL2:{
2620 if (len == 18){
2621 mf_crypto1_decrypt(pcs, receivedCmd, len);
2622 emlSetMem(receivedCmd, cardWRBL, 1);
2623 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2624 cardSTATE = MFEMUL_WORK;
2625 } else {
2626 cardSTATE_TO_IDLE();
2627 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2628 }
2629 break;
2630 }
2631
2632 case MFEMUL_INTREG_INC:{
2633 mf_crypto1_decrypt(pcs, receivedCmd, len);
2634 memcpy(&ans, receivedCmd, 4);
2635 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2636 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2637 cardSTATE_TO_IDLE();
2638 break;
2639 }
2640 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2641 cardINTREG = cardINTREG + ans;
2642 cardSTATE = MFEMUL_WORK;
2643 break;
2644 }
2645 case MFEMUL_INTREG_DEC:{
2646 mf_crypto1_decrypt(pcs, receivedCmd, len);
2647 memcpy(&ans, receivedCmd, 4);
2648 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2649 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2650 cardSTATE_TO_IDLE();
2651 break;
2652 }
2653 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2654 cardINTREG = cardINTREG - ans;
2655 cardSTATE = MFEMUL_WORK;
2656 break;
2657 }
2658 case MFEMUL_INTREG_REST:{
2659 mf_crypto1_decrypt(pcs, receivedCmd, len);
2660 memcpy(&ans, receivedCmd, 4);
2661 if (emlGetValBl(&cardINTREG, &cardINTBLOCK, cardWRBL)) {
2662 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2663 cardSTATE_TO_IDLE();
2664 break;
2665 }
2666 LogTrace(Uart.output, Uart.len, Uart.startTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.endTime*16 - DELAY_AIR2ARM_AS_TAG, Uart.parity, TRUE);
2667 cardSTATE = MFEMUL_WORK;
2668 break;
2669 }
2670 }
2671 }
2672
2673 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2674 LEDsoff();
2675
2676 if(flags & FLAG_INTERACTIVE)// Interactive mode flag, means we need to send ACK
2677 {
2678 //May just aswell send the collected ar_nr in the response aswell
2679 cmd_send(CMD_ACK,CMD_SIMULATE_MIFARE_CARD,0,0,&ar_nr_responses,ar_nr_collected*4*4);
2680 }
2681
2682 if(flags & FLAG_NR_AR_ATTACK)
2683 {
2684 if(ar_nr_collected > 1) {
2685 Dbprintf("Collected two pairs of AR/NR which can be used to extract keys from reader:");
2686 Dbprintf("../tools/mfkey/mfkey32 %08x %08x %08x %08x %08x %08x",
2687 ar_nr_responses[0], // UID
2688 ar_nr_responses[1], //NT
2689 ar_nr_responses[2], //AR1
2690 ar_nr_responses[3], //NR1
2691 ar_nr_responses[6], //AR2
2692 ar_nr_responses[7] //NR2
2693 );
2694 } else {
2695 Dbprintf("Failed to obtain two AR/NR pairs!");
2696 if(ar_nr_collected >0) {
2697 Dbprintf("Only got these: UID=%08x, nonce=%08x, AR1=%08x, NR1=%08x",
2698 ar_nr_responses[0], // UID
2699 ar_nr_responses[1], //NT
2700 ar_nr_responses[2], //AR1
2701 ar_nr_responses[3] //NR1
2702 );
2703 }
2704 }
2705 }
2706 if (MF_DBGLEVEL >= 1) Dbprintf("Emulator stopped. Tracing: %d trace length: %d ", tracing, traceLen);
2707 }
2708
2709
2710
2711 //-----------------------------------------------------------------------------
2712 // MIFARE sniffer.
2713 //
2714 //-----------------------------------------------------------------------------
2715 void RAMFUNC SniffMifare(uint8_t param) {
2716 // param:
2717 // bit 0 - trigger from first card answer
2718 // bit 1 - trigger from first reader 7-bit request
2719
2720 // C(red) A(yellow) B(green)
2721 LEDsoff();
2722 // init trace buffer
2723 iso14a_clear_trace();
2724 iso14a_set_tracing(TRUE);
2725
2726 // The command (reader -> tag) that we're receiving.
2727 // The length of a received command will in most cases be no more than 18 bytes.
2728 // So 32 should be enough!
2729 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
2730 uint8_t *receivedCmdPar = ((uint8_t *)BigBuf) + RECV_CMD_PAR_OFFSET;
2731 // The response (tag -> reader) that we're receiving.
2732 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RESP_OFFSET);
2733 uint8_t *receivedResponsePar = ((uint8_t *)BigBuf) + RECV_RESP_PAR_OFFSET;
2734
2735 // As we receive stuff, we copy it from receivedCmd or receivedResponse
2736 // into trace, along with its length and other annotations.
2737 //uint8_t *trace = (uint8_t *)BigBuf;
2738
2739 // The DMA buffer, used to stream samples from the FPGA
2740 uint8_t *dmaBuf = ((uint8_t *)BigBuf) + DMA_BUFFER_OFFSET;
2741 uint8_t *data = dmaBuf;
2742 uint8_t previous_data = 0;
2743 int maxDataLen = 0;
2744 int dataLen = 0;
2745 bool ReaderIsActive = FALSE;
2746 bool TagIsActive = FALSE;
2747
2748 iso14443a_setup(FPGA_HF_ISO14443A_SNIFFER);
2749
2750 // Set up the demodulator for tag -> reader responses.
2751 DemodInit(receivedResponse, receivedResponsePar);
2752
2753 // Set up the demodulator for the reader -> tag commands
2754 UartInit(receivedCmd, receivedCmdPar);
2755
2756 // Setup for the DMA.
2757 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2758
2759 LED_D_OFF();
2760
2761 // init sniffer
2762 MfSniffInit();
2763
2764 // And now we loop, receiving samples.
2765 for(uint32_t sniffCounter = 0; TRUE; ) {
2766
2767 if(BUTTON_PRESS()) {
2768 DbpString("cancelled by button");
2769 break;
2770 }
2771
2772 LED_A_ON();
2773 WDT_HIT();
2774
2775 if ((sniffCounter & 0x0000FFFF) == 0) { // from time to time
2776 // check if a transaction is completed (timeout after 2000ms).
2777 // if yes, stop the DMA transfer and send what we have so far to the client
2778 if (MfSniffSend(2000)) {
2779 // Reset everything - we missed some sniffed data anyway while the DMA was stopped
2780 sniffCounter = 0;
2781 data = dmaBuf;
2782 maxDataLen = 0;
2783 ReaderIsActive = FALSE;
2784 TagIsActive = FALSE;
2785 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE); // set transfer address and number of bytes. Start transfer.
2786 }
2787 }
2788
2789 int register readBufDataP = data - dmaBuf; // number of bytes we have processed so far
2790 int register dmaBufDataP = DMA_BUFFER_SIZE - AT91C_BASE_PDC_SSC->PDC_RCR; // number of bytes already transferred
2791 if (readBufDataP <= dmaBufDataP){ // we are processing the same block of data which is currently being transferred
2792 dataLen = dmaBufDataP - readBufDataP; // number of bytes still to be processed
2793 } else {
2794 dataLen = DMA_BUFFER_SIZE - readBufDataP + dmaBufDataP; // number of bytes still to be processed
2795 }
2796 // test for length of buffer
2797 if(dataLen > maxDataLen) { // we are more behind than ever...
2798 maxDataLen = dataLen;
2799 if(dataLen > 400) {
2800 Dbprintf("blew circular buffer! dataLen=0x%x", dataLen);
2801 break;
2802 }
2803 }
2804 if(dataLen < 1) continue;
2805
2806 // primary buffer was stopped ( <-- we lost data!
2807 if (!AT91C_BASE_PDC_SSC->PDC_RCR) {
2808 AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) dmaBuf;
2809 AT91C_BASE_PDC_SSC->PDC_RCR = DMA_BUFFER_SIZE;
2810 Dbprintf("RxEmpty ERROR!!! data length:%d", dataLen); // temporary
2811 }
2812 // secondary buffer sets as primary, secondary buffer was stopped
2813 if (!AT91C_BASE_PDC_SSC->PDC_RNCR) {
2814 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) dmaBuf;
2815 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
2816 }
2817
2818 LED_A_OFF();
2819
2820 if (sniffCounter & 0x01) {
2821
2822 if(!TagIsActive) { // no need to try decoding tag data if the reader is sending
2823 uint8_t readerdata = (previous_data & 0xF0) | (*data >> 4);
2824 if(MillerDecoding(readerdata, (sniffCounter-1)*4)) {
2825 LED_C_INV();
2826 if (MfSniffLogic(receivedCmd, Uart.len, Uart.parity, Uart.bitCount, TRUE)) break;
2827
2828 /* And ready to receive another command. */
2829 UartReset();
2830
2831 /* And also reset the demod code */
2832 DemodReset();
2833 }
2834 ReaderIsActive = (Uart.state != STATE_UNSYNCD);
2835 }
2836
2837 if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending
2838 uint8_t tagdata = (previous_data << 4) | (*data & 0x0F);
2839 if(ManchesterDecoding(tagdata, 0, (sniffCounter-1)*4)) {
2840 LED_C_INV();
2841
2842 if (MfSniffLogic(receivedResponse, Demod.len, Demod.parity, Demod.bitCount, FALSE)) break;
2843
2844 // And ready to receive another response.
2845 DemodReset();
2846 }
2847 TagIsActive = (Demod.state != DEMOD_UNSYNCD);
2848 }
2849 }
2850
2851 previous_data = *data;
2852 sniffCounter++;
2853 data++;
2854 if(data == dmaBuf + DMA_BUFFER_SIZE) {
2855 data = dmaBuf;
2856 }
2857
2858 } // main cycle
2859
2860 DbpString("COMMAND FINISHED");
2861
2862 FpgaDisableSscDma();
2863 MfSniffEnd();
2864
2865 Dbprintf("maxDataLen=%x, Uart.state=%x, Uart.len=%x", maxDataLen, Uart.state, Uart.len);
2866 LEDsoff();
2867 }
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