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1 //-----------------------------------------------------------------------------
2 // Merlok - June 2011
3 // Gerhard de Koning Gans - May 2008
4 // Hagen Fritsch - June 2010
5 //
6 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
7 // at your option, any later version. See the LICENSE.txt file for the text of
8 // the license.
9 //-----------------------------------------------------------------------------
10 // Routines to support ISO 14443 type A.
11 //-----------------------------------------------------------------------------
12
13 #include "proxmark3.h"
14 #include "apps.h"
15 #include "util.h"
16 #include "string.h"
17
18 #include "iso14443crc.h"
19 #include "iso14443a.h"
20 #include "crapto1.h"
21 #include "mifareutil.h"
22
23 static uint8_t *trace = (uint8_t *) BigBuf;
24 static int traceLen = 0;
25 static int rsamples = 0;
26 static int tracing = TRUE;
27 static uint32_t iso14a_timeout;
28
29 // CARD TO READER - manchester
30 // Sequence D: 11110000 modulation with subcarrier during first half
31 // Sequence E: 00001111 modulation with subcarrier during second half
32 // Sequence F: 00000000 no modulation with subcarrier
33 // READER TO CARD - miller
34 // Sequence X: 00001100 drop after half a period
35 // Sequence Y: 00000000 no drop
36 // Sequence Z: 11000000 drop at start
37 #define SEC_D 0xf0
38 #define SEC_E 0x0f
39 #define SEC_F 0x00
40 #define SEC_X 0x0c
41 #define SEC_Y 0x00
42 #define SEC_Z 0xc0
43
44 static const uint8_t OddByteParity[256] = {
45 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
46 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
47 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
48 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
49 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
50 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
51 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
52 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
53 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
54 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
55 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
56 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
57 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1,
58 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
59 0, 1, 1, 0, 1, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0,
60 1, 0, 0, 1, 0, 1, 1, 0, 0, 1, 1, 0, 1, 0, 0, 1
61 };
62
63 uint8_t trigger = 0;
64 void iso14a_set_trigger(int enable) {
65 trigger = enable;
66 }
67
68 void iso14a_clear_tracelen(void) {
69 traceLen = 0;
70 }
71 void iso14a_set_tracing(int enable) {
72 tracing = enable;
73 }
74
75 //-----------------------------------------------------------------------------
76 // Generate the parity value for a byte sequence
77 //
78 //-----------------------------------------------------------------------------
79 byte_t oddparity (const byte_t bt)
80 {
81 return OddByteParity[bt];
82 }
83
84 uint32_t GetParity(const uint8_t * pbtCmd, int iLen)
85 {
86 int i;
87 uint32_t dwPar = 0;
88
89 // Generate the encrypted data
90 for (i = 0; i < iLen; i++) {
91 // Save the encrypted parity bit
92 dwPar |= ((OddByteParity[pbtCmd[i]]) << i);
93 }
94 return dwPar;
95 }
96
97 void AppendCrc14443a(uint8_t* data, int len)
98 {
99 ComputeCrc14443(CRC_14443_A,data,len,data+len,data+len+1);
100 }
101
102 int LogTrace(const uint8_t * btBytes, int iLen, int iSamples, uint32_t dwParity, int bReader)
103 {
104 // Return when trace is full
105 if (traceLen >= TRACE_LENGTH) return FALSE;
106
107 // Trace the random, i'm curious
108 rsamples += iSamples;
109 trace[traceLen++] = ((rsamples >> 0) & 0xff);
110 trace[traceLen++] = ((rsamples >> 8) & 0xff);
111 trace[traceLen++] = ((rsamples >> 16) & 0xff);
112 trace[traceLen++] = ((rsamples >> 24) & 0xff);
113 if (!bReader) {
114 trace[traceLen - 1] |= 0x80;
115 }
116 trace[traceLen++] = ((dwParity >> 0) & 0xff);
117 trace[traceLen++] = ((dwParity >> 8) & 0xff);
118 trace[traceLen++] = ((dwParity >> 16) & 0xff);
119 trace[traceLen++] = ((dwParity >> 24) & 0xff);
120 trace[traceLen++] = iLen;
121 memcpy(trace + traceLen, btBytes, iLen);
122 traceLen += iLen;
123 return TRUE;
124 }
125
126 //-----------------------------------------------------------------------------
127 // The software UART that receives commands from the reader, and its state
128 // variables.
129 //-----------------------------------------------------------------------------
130 static struct {
131 enum {
132 STATE_UNSYNCD,
133 STATE_START_OF_COMMUNICATION,
134 STATE_MILLER_X,
135 STATE_MILLER_Y,
136 STATE_MILLER_Z,
137 STATE_ERROR_WAIT
138 } state;
139 uint16_t shiftReg;
140 int bitCnt;
141 int byteCnt;
142 int byteCntMax;
143 int posCnt;
144 int syncBit;
145 int parityBits;
146 int samples;
147 int highCnt;
148 int bitBuffer;
149 enum {
150 DROP_NONE,
151 DROP_FIRST_HALF,
152 DROP_SECOND_HALF
153 } drop;
154 uint8_t *output;
155 } Uart;
156
157 static RAMFUNC int MillerDecoding(int bit)
158 {
159 int error = 0;
160 int bitright;
161
162 if(!Uart.bitBuffer) {
163 Uart.bitBuffer = bit ^ 0xFF0;
164 return FALSE;
165 }
166 else {
167 Uart.bitBuffer <<= 4;
168 Uart.bitBuffer ^= bit;
169 }
170
171 int EOC = FALSE;
172
173 if(Uart.state != STATE_UNSYNCD) {
174 Uart.posCnt++;
175
176 if((Uart.bitBuffer & Uart.syncBit) ^ Uart.syncBit) {
177 bit = 0x00;
178 }
179 else {
180 bit = 0x01;
181 }
182 if(((Uart.bitBuffer << 1) & Uart.syncBit) ^ Uart.syncBit) {
183 bitright = 0x00;
184 }
185 else {
186 bitright = 0x01;
187 }
188 if(bit != bitright) { bit = bitright; }
189
190 if(Uart.posCnt == 1) {
191 // measurement first half bitperiod
192 if(!bit) {
193 Uart.drop = DROP_FIRST_HALF;
194 }
195 }
196 else {
197 // measurement second half bitperiod
198 if(!bit & (Uart.drop == DROP_NONE)) {
199 Uart.drop = DROP_SECOND_HALF;
200 }
201 else if(!bit) {
202 // measured a drop in first and second half
203 // which should not be possible
204 Uart.state = STATE_ERROR_WAIT;
205 error = 0x01;
206 }
207
208 Uart.posCnt = 0;
209
210 switch(Uart.state) {
211 case STATE_START_OF_COMMUNICATION:
212 Uart.shiftReg = 0;
213 if(Uart.drop == DROP_SECOND_HALF) {
214 // error, should not happen in SOC
215 Uart.state = STATE_ERROR_WAIT;
216 error = 0x02;
217 }
218 else {
219 // correct SOC
220 Uart.state = STATE_MILLER_Z;
221 }
222 break;
223
224 case STATE_MILLER_Z:
225 Uart.bitCnt++;
226 Uart.shiftReg >>= 1;
227 if(Uart.drop == DROP_NONE) {
228 // logic '0' followed by sequence Y
229 // end of communication
230 Uart.state = STATE_UNSYNCD;
231 EOC = TRUE;
232 }
233 // if(Uart.drop == DROP_FIRST_HALF) {
234 // Uart.state = STATE_MILLER_Z; stay the same
235 // we see a logic '0' }
236 if(Uart.drop == DROP_SECOND_HALF) {
237 // we see a logic '1'
238 Uart.shiftReg |= 0x100;
239 Uart.state = STATE_MILLER_X;
240 }
241 break;
242
243 case STATE_MILLER_X:
244 Uart.shiftReg >>= 1;
245 if(Uart.drop == DROP_NONE) {
246 // sequence Y, we see a '0'
247 Uart.state = STATE_MILLER_Y;
248 Uart.bitCnt++;
249 }
250 if(Uart.drop == DROP_FIRST_HALF) {
251 // Would be STATE_MILLER_Z
252 // but Z does not follow X, so error
253 Uart.state = STATE_ERROR_WAIT;
254 error = 0x03;
255 }
256 if(Uart.drop == DROP_SECOND_HALF) {
257 // We see a '1' and stay in state X
258 Uart.shiftReg |= 0x100;
259 Uart.bitCnt++;
260 }
261 break;
262
263 case STATE_MILLER_Y:
264 Uart.bitCnt++;
265 Uart.shiftReg >>= 1;
266 if(Uart.drop == DROP_NONE) {
267 // logic '0' followed by sequence Y
268 // end of communication
269 Uart.state = STATE_UNSYNCD;
270 EOC = TRUE;
271 }
272 if(Uart.drop == DROP_FIRST_HALF) {
273 // we see a '0'
274 Uart.state = STATE_MILLER_Z;
275 }
276 if(Uart.drop == DROP_SECOND_HALF) {
277 // We see a '1' and go to state X
278 Uart.shiftReg |= 0x100;
279 Uart.state = STATE_MILLER_X;
280 }
281 break;
282
283 case STATE_ERROR_WAIT:
284 // That went wrong. Now wait for at least two bit periods
285 // and try to sync again
286 if(Uart.drop == DROP_NONE) {
287 Uart.highCnt = 6;
288 Uart.state = STATE_UNSYNCD;
289 }
290 break;
291
292 default:
293 Uart.state = STATE_UNSYNCD;
294 Uart.highCnt = 0;
295 break;
296 }
297
298 Uart.drop = DROP_NONE;
299
300 // should have received at least one whole byte...
301 if((Uart.bitCnt == 2) && EOC && (Uart.byteCnt > 0)) {
302 return TRUE;
303 }
304
305 if(Uart.bitCnt == 9) {
306 Uart.output[Uart.byteCnt] = (Uart.shiftReg & 0xff);
307 Uart.byteCnt++;
308
309 Uart.parityBits <<= 1;
310 Uart.parityBits ^= ((Uart.shiftReg >> 8) & 0x01);
311
312 if(EOC) {
313 // when End of Communication received and
314 // all data bits processed..
315 return TRUE;
316 }
317 Uart.bitCnt = 0;
318 }
319
320 /*if(error) {
321 Uart.output[Uart.byteCnt] = 0xAA;
322 Uart.byteCnt++;
323 Uart.output[Uart.byteCnt] = error & 0xFF;
324 Uart.byteCnt++;
325 Uart.output[Uart.byteCnt] = 0xAA;
326 Uart.byteCnt++;
327 Uart.output[Uart.byteCnt] = (Uart.bitBuffer >> 8) & 0xFF;
328 Uart.byteCnt++;
329 Uart.output[Uart.byteCnt] = Uart.bitBuffer & 0xFF;
330 Uart.byteCnt++;
331 Uart.output[Uart.byteCnt] = (Uart.syncBit >> 3) & 0xFF;
332 Uart.byteCnt++;
333 Uart.output[Uart.byteCnt] = 0xAA;
334 Uart.byteCnt++;
335 return TRUE;
336 }*/
337 }
338
339 }
340 else {
341 bit = Uart.bitBuffer & 0xf0;
342 bit >>= 4;
343 bit ^= 0x0F;
344 if(bit) {
345 // should have been high or at least (4 * 128) / fc
346 // according to ISO this should be at least (9 * 128 + 20) / fc
347 if(Uart.highCnt == 8) {
348 // we went low, so this could be start of communication
349 // it turns out to be safer to choose a less significant
350 // syncbit... so we check whether the neighbour also represents the drop
351 Uart.posCnt = 1; // apparently we are busy with our first half bit period
352 Uart.syncBit = bit & 8;
353 Uart.samples = 3;
354 if(!Uart.syncBit) { Uart.syncBit = bit & 4; Uart.samples = 2; }
355 else if(bit & 4) { Uart.syncBit = bit & 4; Uart.samples = 2; bit <<= 2; }
356 if(!Uart.syncBit) { Uart.syncBit = bit & 2; Uart.samples = 1; }
357 else if(bit & 2) { Uart.syncBit = bit & 2; Uart.samples = 1; bit <<= 1; }
358 if(!Uart.syncBit) { Uart.syncBit = bit & 1; Uart.samples = 0;
359 if(Uart.syncBit && (Uart.bitBuffer & 8)) {
360 Uart.syncBit = 8;
361
362 // the first half bit period is expected in next sample
363 Uart.posCnt = 0;
364 Uart.samples = 3;
365 }
366 }
367 else if(bit & 1) { Uart.syncBit = bit & 1; Uart.samples = 0; }
368
369 Uart.syncBit <<= 4;
370 Uart.state = STATE_START_OF_COMMUNICATION;
371 Uart.drop = DROP_FIRST_HALF;
372 Uart.bitCnt = 0;
373 Uart.byteCnt = 0;
374 Uart.parityBits = 0;
375 error = 0;
376 }
377 else {
378 Uart.highCnt = 0;
379 }
380 }
381 else {
382 if(Uart.highCnt < 8) {
383 Uart.highCnt++;
384 }
385 }
386 }
387
388 return FALSE;
389 }
390
391 //=============================================================================
392 // ISO 14443 Type A - Manchester
393 //=============================================================================
394
395 static struct {
396 enum {
397 DEMOD_UNSYNCD,
398 DEMOD_START_OF_COMMUNICATION,
399 DEMOD_MANCHESTER_D,
400 DEMOD_MANCHESTER_E,
401 DEMOD_MANCHESTER_F,
402 DEMOD_ERROR_WAIT
403 } state;
404 int bitCount;
405 int posCount;
406 int syncBit;
407 int parityBits;
408 uint16_t shiftReg;
409 int buffer;
410 int buff;
411 int samples;
412 int len;
413 enum {
414 SUB_NONE,
415 SUB_FIRST_HALF,
416 SUB_SECOND_HALF
417 } sub;
418 uint8_t *output;
419 } Demod;
420
421 static RAMFUNC int ManchesterDecoding(int v)
422 {
423 int bit;
424 int modulation;
425 int error = 0;
426
427 if(!Demod.buff) {
428 Demod.buff = 1;
429 Demod.buffer = v;
430 return FALSE;
431 }
432 else {
433 bit = Demod.buffer;
434 Demod.buffer = v;
435 }
436
437 if(Demod.state==DEMOD_UNSYNCD) {
438 Demod.output[Demod.len] = 0xfa;
439 Demod.syncBit = 0;
440 //Demod.samples = 0;
441 Demod.posCount = 1; // This is the first half bit period, so after syncing handle the second part
442
443 if(bit & 0x08) {
444 Demod.syncBit = 0x08;
445 }
446
447 if(bit & 0x04) {
448 if(Demod.syncBit) {
449 bit <<= 4;
450 }
451 Demod.syncBit = 0x04;
452 }
453
454 if(bit & 0x02) {
455 if(Demod.syncBit) {
456 bit <<= 2;
457 }
458 Demod.syncBit = 0x02;
459 }
460
461 if(bit & 0x01 && Demod.syncBit) {
462 Demod.syncBit = 0x01;
463 }
464
465 if(Demod.syncBit) {
466 Demod.len = 0;
467 Demod.state = DEMOD_START_OF_COMMUNICATION;
468 Demod.sub = SUB_FIRST_HALF;
469 Demod.bitCount = 0;
470 Demod.shiftReg = 0;
471 Demod.parityBits = 0;
472 Demod.samples = 0;
473 if(Demod.posCount) {
474 if(trigger) LED_A_OFF();
475 switch(Demod.syncBit) {
476 case 0x08: Demod.samples = 3; break;
477 case 0x04: Demod.samples = 2; break;
478 case 0x02: Demod.samples = 1; break;
479 case 0x01: Demod.samples = 0; break;
480 }
481 }
482 error = 0;
483 }
484 }
485 else {
486 //modulation = bit & Demod.syncBit;
487 modulation = ((bit << 1) ^ ((Demod.buffer & 0x08) >> 3)) & Demod.syncBit;
488
489 Demod.samples += 4;
490
491 if(Demod.posCount==0) {
492 Demod.posCount = 1;
493 if(modulation) {
494 Demod.sub = SUB_FIRST_HALF;
495 }
496 else {
497 Demod.sub = SUB_NONE;
498 }
499 }
500 else {
501 Demod.posCount = 0;
502 if(modulation && (Demod.sub == SUB_FIRST_HALF)) {
503 if(Demod.state!=DEMOD_ERROR_WAIT) {
504 Demod.state = DEMOD_ERROR_WAIT;
505 Demod.output[Demod.len] = 0xaa;
506 error = 0x01;
507 }
508 }
509 else if(modulation) {
510 Demod.sub = SUB_SECOND_HALF;
511 }
512
513 switch(Demod.state) {
514 case DEMOD_START_OF_COMMUNICATION:
515 if(Demod.sub == SUB_FIRST_HALF) {
516 Demod.state = DEMOD_MANCHESTER_D;
517 }
518 else {
519 Demod.output[Demod.len] = 0xab;
520 Demod.state = DEMOD_ERROR_WAIT;
521 error = 0x02;
522 }
523 break;
524
525 case DEMOD_MANCHESTER_D:
526 case DEMOD_MANCHESTER_E:
527 if(Demod.sub == SUB_FIRST_HALF) {
528 Demod.bitCount++;
529 Demod.shiftReg = (Demod.shiftReg >> 1) ^ 0x100;
530 Demod.state = DEMOD_MANCHESTER_D;
531 }
532 else if(Demod.sub == SUB_SECOND_HALF) {
533 Demod.bitCount++;
534 Demod.shiftReg >>= 1;
535 Demod.state = DEMOD_MANCHESTER_E;
536 }
537 else {
538 Demod.state = DEMOD_MANCHESTER_F;
539 }
540 break;
541
542 case DEMOD_MANCHESTER_F:
543 // Tag response does not need to be a complete byte!
544 if(Demod.len > 0 || Demod.bitCount > 0) {
545 if(Demod.bitCount > 0) {
546 Demod.shiftReg >>= (9 - Demod.bitCount);
547 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
548 Demod.len++;
549 // No parity bit, so just shift a 0
550 Demod.parityBits <<= 1;
551 }
552
553 Demod.state = DEMOD_UNSYNCD;
554 return TRUE;
555 }
556 else {
557 Demod.output[Demod.len] = 0xad;
558 Demod.state = DEMOD_ERROR_WAIT;
559 error = 0x03;
560 }
561 break;
562
563 case DEMOD_ERROR_WAIT:
564 Demod.state = DEMOD_UNSYNCD;
565 break;
566
567 default:
568 Demod.output[Demod.len] = 0xdd;
569 Demod.state = DEMOD_UNSYNCD;
570 break;
571 }
572
573 if(Demod.bitCount>=9) {
574 Demod.output[Demod.len] = Demod.shiftReg & 0xff;
575 Demod.len++;
576
577 Demod.parityBits <<= 1;
578 Demod.parityBits ^= ((Demod.shiftReg >> 8) & 0x01);
579
580 Demod.bitCount = 0;
581 Demod.shiftReg = 0;
582 }
583
584 /*if(error) {
585 Demod.output[Demod.len] = 0xBB;
586 Demod.len++;
587 Demod.output[Demod.len] = error & 0xFF;
588 Demod.len++;
589 Demod.output[Demod.len] = 0xBB;
590 Demod.len++;
591 Demod.output[Demod.len] = bit & 0xFF;
592 Demod.len++;
593 Demod.output[Demod.len] = Demod.buffer & 0xFF;
594 Demod.len++;
595 Demod.output[Demod.len] = Demod.syncBit & 0xFF;
596 Demod.len++;
597 Demod.output[Demod.len] = 0xBB;
598 Demod.len++;
599 return TRUE;
600 }*/
601
602 }
603
604 } // end (state != UNSYNCED)
605
606 return FALSE;
607 }
608
609 //=============================================================================
610 // Finally, a `sniffer' for ISO 14443 Type A
611 // Both sides of communication!
612 //=============================================================================
613
614 //-----------------------------------------------------------------------------
615 // Record the sequence of commands sent by the reader to the tag, with
616 // triggering so that we start recording at the point that the tag is moved
617 // near the reader.
618 //-----------------------------------------------------------------------------
619 void RAMFUNC SnoopIso14443a(void)
620 {
621 // #define RECV_CMD_OFFSET 2032 // original (working as of 21/2/09) values
622 // #define RECV_RES_OFFSET 2096 // original (working as of 21/2/09) values
623 // #define DMA_BUFFER_OFFSET 2160 // original (working as of 21/2/09) values
624 // #define DMA_BUFFER_SIZE 4096 // original (working as of 21/2/09) values
625 // #define TRACE_LENGTH 2000 // original (working as of 21/2/09) values
626
627 // We won't start recording the frames that we acquire until we trigger;
628 // a good trigger condition to get started is probably when we see a
629 // response from the tag.
630 int triggered = FALSE; // FALSE to wait first for card
631
632 // The command (reader -> tag) that we're receiving.
633 // The length of a received command will in most cases be no more than 18 bytes.
634 // So 32 should be enough!
635 uint8_t *receivedCmd = (((uint8_t *)BigBuf) + RECV_CMD_OFFSET);
636 // The response (tag -> reader) that we're receiving.
637 uint8_t *receivedResponse = (((uint8_t *)BigBuf) + RECV_RES_OFFSET);
638
639 // As we receive stuff, we copy it from receivedCmd or receivedResponse
640 // into trace, along with its length and other annotations.
641 //uint8_t *trace = (uint8_t *)BigBuf;
642
643 traceLen = 0; // uncommented to fix ISSUE 15 - gerhard - jan2011
644
645 // The DMA buffer, used to stream samples from the FPGA
646 int8_t *dmaBuf = ((int8_t *)BigBuf) + DMA_BUFFER_OFFSET;
647 int lastRxCounter;
648 int8_t *upTo;
649 int smpl;
650 int maxBehindBy = 0;
651
652 // Count of samples received so far, so that we can include timing
653 // information in the trace buffer.
654 int samples = 0;
655 int rsamples = 0;
656
657 memset(trace, 0x44, RECV_CMD_OFFSET);
658
659 // Set up the demodulator for tag -> reader responses.
660 Demod.output = receivedResponse;
661 Demod.len = 0;
662 Demod.state = DEMOD_UNSYNCD;
663
664 // Setup for the DMA.
665 FpgaSetupSsc();
666 upTo = dmaBuf;
667 lastRxCounter = DMA_BUFFER_SIZE;
668 FpgaSetupSscDma((uint8_t *)dmaBuf, DMA_BUFFER_SIZE);
669
670 // And the reader -> tag commands
671 memset(&Uart, 0, sizeof(Uart));
672 Uart.output = receivedCmd;
673 Uart.byteCntMax = 32; // was 100 (greg)////////////////////////////////////////////////////////////////////////
674 Uart.state = STATE_UNSYNCD;
675
676 // And put the FPGA in the appropriate mode
677 // Signal field is off with the appropriate LED
678 LED_D_OFF();
679 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_SNIFFER);
680 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
681
682
683 // And now we loop, receiving samples.
684 for(;;) {
685 LED_A_ON();
686 WDT_HIT();
687 int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
688 (DMA_BUFFER_SIZE-1);
689 if(behindBy > maxBehindBy) {
690 maxBehindBy = behindBy;
691 if(behindBy > 400) {
692 Dbprintf("blew circular buffer! behindBy=0x%x", behindBy);
693 goto done;
694 }
695 }
696 if(behindBy < 1) continue;
697
698 LED_A_OFF();
699 smpl = upTo[0];
700 upTo++;
701 lastRxCounter -= 1;
702 if(upTo - dmaBuf > DMA_BUFFER_SIZE) {
703 upTo -= DMA_BUFFER_SIZE;
704 lastRxCounter += DMA_BUFFER_SIZE;
705 AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) upTo;
706 AT91C_BASE_PDC_SSC->PDC_RNCR = DMA_BUFFER_SIZE;
707 }
708
709 samples += 4;
710 if(MillerDecoding((smpl & 0xF0) >> 4)) {
711 rsamples = samples - Uart.samples;
712 LED_C_ON();
713 if(triggered) {
714 trace[traceLen++] = ((rsamples >> 0) & 0xff);
715 trace[traceLen++] = ((rsamples >> 8) & 0xff);
716 trace[traceLen++] = ((rsamples >> 16) & 0xff);
717 trace[traceLen++] = ((rsamples >> 24) & 0xff);
718 trace[traceLen++] = ((Uart.parityBits >> 0) & 0xff);
719 trace[traceLen++] = ((Uart.parityBits >> 8) & 0xff);
720 trace[traceLen++] = ((Uart.parityBits >> 16) & 0xff);
721 trace[traceLen++] = ((Uart.parityBits >> 24) & 0xff);
722 trace[traceLen++] = Uart.byteCnt;
723 memcpy(trace+traceLen, receivedCmd, Uart.byteCnt);
724 traceLen += Uart.byteCnt;
725 if(traceLen > TRACE_LENGTH) break;
726 }
727 /* And ready to receive another command. */
728 Uart.state = STATE_UNSYNCD;
729 /* And also reset the demod code, which might have been */
730 /* false-triggered by the commands from the reader. */
731 Demod.state = DEMOD_UNSYNCD;
732 LED_B_OFF();
733 }
734
735 if(ManchesterDecoding(smpl & 0x0F)) {
736 rsamples = samples - Demod.samples;
737 LED_B_ON();
738
739 // timestamp, as a count of samples
740 trace[traceLen++] = ((rsamples >> 0) & 0xff);
741 trace[traceLen++] = ((rsamples >> 8) & 0xff);
742 trace[traceLen++] = ((rsamples >> 16) & 0xff);
743 trace[traceLen++] = 0x80 | ((rsamples >> 24) & 0xff);
744 trace[traceLen++] = ((Demod.parityBits >> 0) & 0xff);
745 trace[traceLen++] = ((Demod.parityBits >> 8) & 0xff);
746 trace[traceLen++] = ((Demod.parityBits >> 16) & 0xff);
747 trace[traceLen++] = ((Demod.parityBits >> 24) & 0xff);
748 // length
749 trace[traceLen++] = Demod.len;
750 memcpy(trace+traceLen, receivedResponse, Demod.len);
751 traceLen += Demod.len;
752 if(traceLen > TRACE_LENGTH) break;
753
754 triggered = TRUE;
755
756 // And ready to receive another response.
757 memset(&Demod, 0, sizeof(Demod));
758 Demod.output = receivedResponse;
759 Demod.state = DEMOD_UNSYNCD;
760 LED_C_OFF();
761 }
762
763 if(BUTTON_PRESS()) {
764 DbpString("cancelled_a");
765 goto done;
766 }
767 }
768
769 DbpString("COMMAND FINISHED");
770
771 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
772 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
773
774 done:
775 AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
776 Dbprintf("%x %x %x", maxBehindBy, Uart.state, Uart.byteCnt);
777 Dbprintf("%x %x %x", Uart.byteCntMax, traceLen, (int)Uart.output[0]);
778 LED_A_OFF();
779 LED_B_OFF();
780 LED_C_OFF();
781 LED_D_OFF();
782 }
783
784 //-----------------------------------------------------------------------------
785 // Prepare tag messages
786 //-----------------------------------------------------------------------------
787 static void CodeIso14443aAsTagPar(const uint8_t *cmd, int len, uint32_t dwParity)
788 {
789 int i;
790 // int oddparity;
791
792 ToSendReset();
793
794 // Correction bit, might be removed when not needed
795 ToSendStuffBit(0);
796 ToSendStuffBit(0);
797 ToSendStuffBit(0);
798 ToSendStuffBit(0);
799 ToSendStuffBit(1); // 1
800 ToSendStuffBit(0);
801 ToSendStuffBit(0);
802 ToSendStuffBit(0);
803
804 // Send startbit
805 ToSend[++ToSendMax] = SEC_D;
806
807 for(i = 0; i < len; i++) {
808 int j;
809 uint8_t b = cmd[i];
810
811 // Data bits
812 // oddparity = 0x01;
813 for(j = 0; j < 8; j++) {
814 // oddparity ^= (b & 1);
815 if(b & 1) {
816 ToSend[++ToSendMax] = SEC_D;
817 } else {
818 ToSend[++ToSendMax] = SEC_E;
819 }
820 b >>= 1;
821 }
822
823 // Get the parity bit
824 if ((dwParity >> i) & 0x01) {
825 ToSend[++ToSendMax] = SEC_D;
826 } else {
827 ToSend[++ToSendMax] = SEC_E;
828 }
829
830 // Parity bit
831 // if(oddparity) {
832 // ToSend[++ToSendMax] = SEC_D;
833 // } else {
834 // ToSend[++ToSendMax] = SEC_E;
835 // }
836
837 // if (oddparity != ((dwParity >> i) & 0x01))
838 // Dbprintf("par error. i=%d", i);
839 }
840
841 // Send stopbit
842 ToSend[++ToSendMax] = SEC_F;
843
844 // Flush the buffer in FPGA!!
845 for(i = 0; i < 5; i++) {
846 // ToSend[++ToSendMax] = SEC_F;
847 }
848
849 // Convert from last byte pos to length
850 ToSendMax++;
851
852 // Add a few more for slop
853 // ToSend[ToSendMax++] = 0x00;
854 // ToSend[ToSendMax++] = 0x00;
855 }
856
857 static void CodeIso14443aAsTag(const uint8_t *cmd, int len){
858 CodeIso14443aAsTagPar(cmd, len, GetParity(cmd, len));
859 }
860
861 //-----------------------------------------------------------------------------
862 // This is to send a NACK kind of answer, its only 3 bits, I know it should be 4
863 //-----------------------------------------------------------------------------
864 static void CodeStrangeAnswerAsTag()
865 {
866 int i;
867
868 ToSendReset();
869
870 // Correction bit, might be removed when not needed
871 ToSendStuffBit(0);
872 ToSendStuffBit(0);
873 ToSendStuffBit(0);
874 ToSendStuffBit(0);
875 ToSendStuffBit(1); // 1
876 ToSendStuffBit(0);
877 ToSendStuffBit(0);
878 ToSendStuffBit(0);
879
880 // Send startbit
881 ToSend[++ToSendMax] = SEC_D;
882
883 // 0
884 ToSend[++ToSendMax] = SEC_E;
885
886 // 0
887 ToSend[++ToSendMax] = SEC_E;
888
889 // 1
890 ToSend[++ToSendMax] = SEC_D;
891
892 // Send stopbit
893 ToSend[++ToSendMax] = SEC_F;
894
895 // Flush the buffer in FPGA!!
896 for(i = 0; i < 5; i++) {
897 ToSend[++ToSendMax] = SEC_F;
898 }
899
900 // Convert from last byte pos to length
901 ToSendMax++;
902 }
903
904 static void Code4bitAnswerAsTag(uint8_t cmd)
905 {
906 int i;
907
908 ToSendReset();
909
910 // Correction bit, might be removed when not needed
911 ToSendStuffBit(0);
912 ToSendStuffBit(0);
913 ToSendStuffBit(0);
914 ToSendStuffBit(0);
915 ToSendStuffBit(1); // 1
916 ToSendStuffBit(0);
917 ToSendStuffBit(0);
918 ToSendStuffBit(0);
919
920 // Send startbit
921 ToSend[++ToSendMax] = SEC_D;
922
923 uint8_t b = cmd;
924 for(i = 0; i < 4; i++) {
925 if(b & 1) {
926 ToSend[++ToSendMax] = SEC_D;
927 } else {
928 ToSend[++ToSendMax] = SEC_E;
929 }
930 b >>= 1;
931 }
932
933 // Send stopbit
934 ToSend[++ToSendMax] = SEC_F;
935
936 // Flush the buffer in FPGA!!
937 for(i = 0; i < 5; i++) {
938 ToSend[++ToSendMax] = SEC_F;
939 }
940
941 // Convert from last byte pos to length
942 ToSendMax++;
943 }
944
945 //-----------------------------------------------------------------------------
946 // Wait for commands from reader
947 // Stop when button is pressed
948 // Or return TRUE when command is captured
949 //-----------------------------------------------------------------------------
950 static int GetIso14443aCommandFromReader(uint8_t *received, int *len, int maxLen)
951 {
952 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
953 // only, since we are receiving, not transmitting).
954 // Signal field is off with the appropriate LED
955 LED_D_OFF();
956 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
957
958 // Now run a `software UART' on the stream of incoming samples.
959 Uart.output = received;
960 Uart.byteCntMax = maxLen;
961 Uart.state = STATE_UNSYNCD;
962
963 for(;;) {
964 WDT_HIT();
965
966 if(BUTTON_PRESS()) return FALSE;
967
968 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
969 AT91C_BASE_SSC->SSC_THR = 0x00;
970 }
971 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
972 uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
973 if(MillerDecoding((b & 0xf0) >> 4)) {
974 *len = Uart.byteCnt;
975 return TRUE;
976 }
977 if(MillerDecoding(b & 0x0f)) {
978 *len = Uart.byteCnt;
979 return TRUE;
980 }
981 }
982 }
983 }
984 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded);
985
986 //-----------------------------------------------------------------------------
987 // Main loop of simulated tag: receive commands from reader, decide what
988 // response to send, and send it.
989 //-----------------------------------------------------------------------------
990 void SimulateIso14443aTag(int tagType, int TagUid)
991 {
992 // This function contains the tag emulation
993
994 // Prepare protocol messages
995 // static const uint8_t cmd1[] = { 0x26 };
996 // static const uint8_t response1[] = { 0x02, 0x00 }; // Says: I am Mifare 4k - original line - greg
997 //
998 static const uint8_t response1[] = { 0x44, 0x03 }; // Says: I am a DESFire Tag, ph33r me
999 // static const uint8_t response1[] = { 0x44, 0x00 }; // Says: I am a ULTRALITE Tag, 0wn me
1000
1001 // UID response
1002 // static const uint8_t cmd2[] = { 0x93, 0x20 };
1003 //static const uint8_t response2[] = { 0x9a, 0xe5, 0xe4, 0x43, 0xd8 }; // original value - greg
1004
1005 // my desfire
1006 static const uint8_t response2[] = { 0x88, 0x04, 0x21, 0x3f, 0x4d }; // known uid - note cascade (0x88), 2nd byte (0x04) = NXP/Phillips
1007
1008
1009 // When reader selects us during cascade1 it will send cmd3
1010 //uint8_t response3[] = { 0x04, 0x00, 0x00 }; // SAK Select (cascade1) successful response (ULTRALITE)
1011 uint8_t response3[] = { 0x24, 0x00, 0x00 }; // SAK Select (cascade1) successful response (DESFire)
1012 ComputeCrc14443(CRC_14443_A, response3, 1, &response3[1], &response3[2]);
1013
1014 // send cascade2 2nd half of UID
1015 static const uint8_t response2a[] = { 0x51, 0x48, 0x1d, 0x80, 0x84 }; // uid - cascade2 - 2nd half (4 bytes) of UID+ BCCheck
1016 // NOTE : THE CRC on the above may be wrong as I have obfuscated the actual UID
1017
1018 // When reader selects us during cascade2 it will send cmd3a
1019 //uint8_t response3a[] = { 0x00, 0x00, 0x00 }; // SAK Select (cascade2) successful response (ULTRALITE)
1020 uint8_t response3a[] = { 0x20, 0x00, 0x00 }; // SAK Select (cascade2) successful response (DESFire)
1021 ComputeCrc14443(CRC_14443_A, response3a, 1, &response3a[1], &response3a[2]);
1022
1023 static const uint8_t response5[] = { 0x00, 0x00, 0x00, 0x00 }; // Very random tag nonce
1024
1025 uint8_t *resp;
1026 int respLen;
1027
1028 // Longest possible response will be 16 bytes + 2 CRC = 18 bytes
1029 // This will need
1030 // 144 data bits (18 * 8)
1031 // 18 parity bits
1032 // 2 Start and stop
1033 // 1 Correction bit (Answer in 1172 or 1236 periods, see FPGA)
1034 // 1 just for the case
1035 // ----------- +
1036 // 166
1037 //
1038 // 166 bytes, since every bit that needs to be send costs us a byte
1039 //
1040
1041 // Respond with card type
1042 uint8_t *resp1 = (((uint8_t *)BigBuf) + 800);
1043 int resp1Len;
1044
1045 // Anticollision cascade1 - respond with uid
1046 uint8_t *resp2 = (((uint8_t *)BigBuf) + 970);
1047 int resp2Len;
1048
1049 // Anticollision cascade2 - respond with 2nd half of uid if asked
1050 // we're only going to be asked if we set the 1st byte of the UID (during cascade1) to 0x88
1051 uint8_t *resp2a = (((uint8_t *)BigBuf) + 1140);
1052 int resp2aLen;
1053
1054 // Acknowledge select - cascade 1
1055 uint8_t *resp3 = (((uint8_t *)BigBuf) + 1310);
1056 int resp3Len;
1057
1058 // Acknowledge select - cascade 2
1059 uint8_t *resp3a = (((uint8_t *)BigBuf) + 1480);
1060 int resp3aLen;
1061
1062 // Response to a read request - not implemented atm
1063 uint8_t *resp4 = (((uint8_t *)BigBuf) + 1550);
1064 int resp4Len;
1065
1066 // Authenticate response - nonce
1067 uint8_t *resp5 = (((uint8_t *)BigBuf) + 1720);
1068 int resp5Len;
1069
1070 uint8_t *receivedCmd = (uint8_t *)BigBuf;
1071 int len;
1072
1073 int i;
1074 int u;
1075 uint8_t b;
1076
1077 // To control where we are in the protocol
1078 int order = 0;
1079 int lastorder;
1080
1081 // Just to allow some checks
1082 int happened = 0;
1083 int happened2 = 0;
1084
1085 int cmdsRecvd = 0;
1086
1087 int fdt_indicator;
1088
1089 memset(receivedCmd, 0x44, 400);
1090
1091 // Prepare the responses of the anticollision phase
1092 // there will be not enough time to do this at the moment the reader sends it REQA
1093
1094 // Answer to request
1095 CodeIso14443aAsTag(response1, sizeof(response1));
1096 memcpy(resp1, ToSend, ToSendMax); resp1Len = ToSendMax;
1097
1098 // Send our UID (cascade 1)
1099 CodeIso14443aAsTag(response2, sizeof(response2));
1100 memcpy(resp2, ToSend, ToSendMax); resp2Len = ToSendMax;
1101
1102 // Answer to select (cascade1)
1103 CodeIso14443aAsTag(response3, sizeof(response3));
1104 memcpy(resp3, ToSend, ToSendMax); resp3Len = ToSendMax;
1105
1106 // Send the cascade 2 2nd part of the uid
1107 CodeIso14443aAsTag(response2a, sizeof(response2a));
1108 memcpy(resp2a, ToSend, ToSendMax); resp2aLen = ToSendMax;
1109
1110 // Answer to select (cascade 2)
1111 CodeIso14443aAsTag(response3a, sizeof(response3a));
1112 memcpy(resp3a, ToSend, ToSendMax); resp3aLen = ToSendMax;
1113
1114 // Strange answer is an example of rare message size (3 bits)
1115 CodeStrangeAnswerAsTag();
1116 memcpy(resp4, ToSend, ToSendMax); resp4Len = ToSendMax;
1117
1118 // Authentication answer (random nonce)
1119 CodeIso14443aAsTag(response5, sizeof(response5));
1120 memcpy(resp5, ToSend, ToSendMax); resp5Len = ToSendMax;
1121
1122 // We need to listen to the high-frequency, peak-detected path.
1123 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1124 FpgaSetupSsc();
1125
1126 cmdsRecvd = 0;
1127
1128 LED_A_ON();
1129 for(;;) {
1130
1131 if(!GetIso14443aCommandFromReader(receivedCmd, &len, 100)) {
1132 DbpString("button press");
1133 break;
1134 }
1135 // doob - added loads of debug strings so we can see what the reader is saying to us during the sim as hi14alist is not populated
1136 // Okay, look at the command now.
1137 lastorder = order;
1138 i = 1; // first byte transmitted
1139 if(receivedCmd[0] == 0x26) {
1140 // Received a REQUEST
1141 resp = resp1; respLen = resp1Len; order = 1;
1142 //DbpString("Hello request from reader:");
1143 } else if(receivedCmd[0] == 0x52) {
1144 // Received a WAKEUP
1145 resp = resp1; respLen = resp1Len; order = 6;
1146 // //DbpString("Wakeup request from reader:");
1147
1148 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] == 0x93) { // greg - cascade 1 anti-collision
1149 // Received request for UID (cascade 1)
1150 resp = resp2; respLen = resp2Len; order = 2;
1151 // DbpString("UID (cascade 1) request from reader:");
1152 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1153
1154
1155 } else if(receivedCmd[1] == 0x20 && receivedCmd[0] ==0x95) { // greg - cascade 2 anti-collision
1156 // Received request for UID (cascade 2)
1157 resp = resp2a; respLen = resp2aLen; order = 20;
1158 // DbpString("UID (cascade 2) request from reader:");
1159 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1160
1161
1162 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] ==0x93) { // greg - cascade 1 select
1163 // Received a SELECT
1164 resp = resp3; respLen = resp3Len; order = 3;
1165 // DbpString("Select (cascade 1) request from reader:");
1166 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1167
1168
1169 } else if(receivedCmd[1] == 0x70 && receivedCmd[0] ==0x95) { // greg - cascade 2 select
1170 // Received a SELECT
1171 resp = resp3a; respLen = resp3aLen; order = 30;
1172 // DbpString("Select (cascade 2) request from reader:");
1173 // DbpIntegers(receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1174
1175
1176 } else if(receivedCmd[0] == 0x30) {
1177 // Received a READ
1178 resp = resp4; respLen = resp4Len; order = 4; // Do nothing
1179 Dbprintf("Read request from reader: %x %x %x",
1180 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1181
1182
1183 } else if(receivedCmd[0] == 0x50) {
1184 // Received a HALT
1185 resp = resp1; respLen = 0; order = 5; // Do nothing
1186 DbpString("Reader requested we HALT!:");
1187
1188 } else if(receivedCmd[0] == 0x60) {
1189 // Received an authentication request
1190 resp = resp5; respLen = resp5Len; order = 7;
1191 Dbprintf("Authenticate request from reader: %x %x %x",
1192 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1193
1194 } else if(receivedCmd[0] == 0xE0) {
1195 // Received a RATS request
1196 resp = resp1; respLen = 0;order = 70;
1197 Dbprintf("RATS request from reader: %x %x %x",
1198 receivedCmd[0], receivedCmd[1], receivedCmd[2]);
1199 } else {
1200 // Never seen this command before
1201 Dbprintf("Unknown command received from reader (len=%d): %x %x %x %x %x %x %x %x %x",
1202 len,
1203 receivedCmd[0], receivedCmd[1], receivedCmd[2],
1204 receivedCmd[3], receivedCmd[4], receivedCmd[5],
1205 receivedCmd[6], receivedCmd[7], receivedCmd[8]);
1206 // Do not respond
1207 resp = resp1; respLen = 0; order = 0;
1208 }
1209
1210 // Count number of wakeups received after a halt
1211 if(order == 6 && lastorder == 5) { happened++; }
1212
1213 // Count number of other messages after a halt
1214 if(order != 6 && lastorder == 5) { happened2++; }
1215
1216 // Look at last parity bit to determine timing of answer
1217 if((Uart.parityBits & 0x01) || receivedCmd[0] == 0x52) {
1218 // 1236, so correction bit needed
1219 i = 0;
1220 }
1221
1222 memset(receivedCmd, 0x44, 32);
1223
1224 if(cmdsRecvd > 999) {
1225 DbpString("1000 commands later...");
1226 break;
1227 }
1228 else {
1229 cmdsRecvd++;
1230 }
1231
1232 if(respLen <= 0) continue;
1233 //----------------------------
1234 u = 0;
1235 b = 0x00;
1236 fdt_indicator = FALSE;
1237
1238 EmSendCmd14443aRaw(resp, respLen, receivedCmd[0] == 0x52);
1239 /* // Modulate Manchester
1240 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1241 AT91C_BASE_SSC->SSC_THR = 0x00;
1242 FpgaSetupSsc();
1243
1244 // ### Transmit the response ###
1245 u = 0;
1246 b = 0x00;
1247 fdt_indicator = FALSE;
1248 for(;;) {
1249 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1250 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1251 (void)b;
1252 }
1253 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1254 if(i > respLen) {
1255 b = 0x00;
1256 u++;
1257 } else {
1258 b = resp[i];
1259 i++;
1260 }
1261 AT91C_BASE_SSC->SSC_THR = b;
1262
1263 if(u > 4) {
1264 break;
1265 }
1266 }
1267 if(BUTTON_PRESS()) {
1268 break;
1269 }
1270 }
1271 */
1272 }
1273
1274 Dbprintf("%x %x %x", happened, happened2, cmdsRecvd);
1275 LED_A_OFF();
1276 }
1277
1278 //-----------------------------------------------------------------------------
1279 // Transmit the command (to the tag) that was placed in ToSend[].
1280 //-----------------------------------------------------------------------------
1281 static void TransmitFor14443a(const uint8_t *cmd, int len, int *samples, int *wait)
1282 {
1283 int c;
1284
1285 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1286
1287 if (wait)
1288 if(*wait < 10)
1289 *wait = 10;
1290
1291 for(c = 0; c < *wait;) {
1292 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1293 AT91C_BASE_SSC->SSC_THR = 0x00; // For exact timing!
1294 c++;
1295 }
1296 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1297 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1298 (void)r;
1299 }
1300 WDT_HIT();
1301 }
1302
1303 c = 0;
1304 for(;;) {
1305 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1306 AT91C_BASE_SSC->SSC_THR = cmd[c];
1307 c++;
1308 if(c >= len) {
1309 break;
1310 }
1311 }
1312 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1313 volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
1314 (void)r;
1315 }
1316 WDT_HIT();
1317 }
1318 if (samples) *samples = (c + *wait) << 3;
1319 }
1320
1321 //-----------------------------------------------------------------------------
1322 // Code a 7-bit command without parity bit
1323 // This is especially for 0x26 and 0x52 (REQA and WUPA)
1324 //-----------------------------------------------------------------------------
1325 void ShortFrameFromReader(const uint8_t bt)
1326 {
1327 int j;
1328 int last;
1329 uint8_t b;
1330
1331 ToSendReset();
1332
1333 // Start of Communication (Seq. Z)
1334 ToSend[++ToSendMax] = SEC_Z;
1335 last = 0;
1336
1337 b = bt;
1338 for(j = 0; j < 7; j++) {
1339 if(b & 1) {
1340 // Sequence X
1341 ToSend[++ToSendMax] = SEC_X;
1342 last = 1;
1343 } else {
1344 if(last == 0) {
1345 // Sequence Z
1346 ToSend[++ToSendMax] = SEC_Z;
1347 }
1348 else {
1349 // Sequence Y
1350 ToSend[++ToSendMax] = SEC_Y;
1351 last = 0;
1352 }
1353 }
1354 b >>= 1;
1355 }
1356
1357 // End of Communication
1358 if(last == 0) {
1359 // Sequence Z
1360 ToSend[++ToSendMax] = SEC_Z;
1361 }
1362 else {
1363 // Sequence Y
1364 ToSend[++ToSendMax] = SEC_Y;
1365 last = 0;
1366 }
1367 // Sequence Y
1368 ToSend[++ToSendMax] = SEC_Y;
1369
1370 // Just to be sure!
1371 ToSend[++ToSendMax] = SEC_Y;
1372 ToSend[++ToSendMax] = SEC_Y;
1373 ToSend[++ToSendMax] = SEC_Y;
1374
1375 // Convert from last character reference to length
1376 ToSendMax++;
1377 }
1378
1379 //-----------------------------------------------------------------------------
1380 // Prepare reader command to send to FPGA
1381 //
1382 //-----------------------------------------------------------------------------
1383 void CodeIso14443aAsReaderPar(const uint8_t * cmd, int len, uint32_t dwParity)
1384 {
1385 int i, j;
1386 int last;
1387 uint8_t b;
1388
1389 ToSendReset();
1390
1391 // Start of Communication (Seq. Z)
1392 ToSend[++ToSendMax] = SEC_Z;
1393 last = 0;
1394
1395 // Generate send structure for the data bits
1396 for (i = 0; i < len; i++) {
1397 // Get the current byte to send
1398 b = cmd[i];
1399
1400 for (j = 0; j < 8; j++) {
1401 if (b & 1) {
1402 // Sequence X
1403 ToSend[++ToSendMax] = SEC_X;
1404 last = 1;
1405 } else {
1406 if (last == 0) {
1407 // Sequence Z
1408 ToSend[++ToSendMax] = SEC_Z;
1409 } else {
1410 // Sequence Y
1411 ToSend[++ToSendMax] = SEC_Y;
1412 last = 0;
1413 }
1414 }
1415 b >>= 1;
1416 }
1417
1418 // Get the parity bit
1419 if ((dwParity >> i) & 0x01) {
1420 // Sequence X
1421 ToSend[++ToSendMax] = SEC_X;
1422 last = 1;
1423 } else {
1424 if (last == 0) {
1425 // Sequence Z
1426 ToSend[++ToSendMax] = SEC_Z;
1427 } else {
1428 // Sequence Y
1429 ToSend[++ToSendMax] = SEC_Y;
1430 last = 0;
1431 }
1432 }
1433 }
1434
1435 // End of Communication
1436 if (last == 0) {
1437 // Sequence Z
1438 ToSend[++ToSendMax] = SEC_Z;
1439 } else {
1440 // Sequence Y
1441 ToSend[++ToSendMax] = SEC_Y;
1442 last = 0;
1443 }
1444 // Sequence Y
1445 ToSend[++ToSendMax] = SEC_Y;
1446
1447 // Just to be sure!
1448 ToSend[++ToSendMax] = SEC_Y;
1449 ToSend[++ToSendMax] = SEC_Y;
1450 ToSend[++ToSendMax] = SEC_Y;
1451
1452 // Convert from last character reference to length
1453 ToSendMax++;
1454 }
1455
1456 //-----------------------------------------------------------------------------
1457 // Wait for commands from reader
1458 // Stop when button is pressed (return 1) or field was gone (return 2)
1459 // Or return 0 when command is captured
1460 //-----------------------------------------------------------------------------
1461 static int EmGetCmd(uint8_t *received, int *len, int maxLen)
1462 {
1463 *len = 0;
1464
1465 uint32_t timer = 0, vtime = 0;
1466 int analogCnt = 0;
1467 int analogAVG = 0;
1468
1469 // Set FPGA mode to "simulated ISO 14443 tag", no modulation (listen
1470 // only, since we are receiving, not transmitting).
1471 // Signal field is off with the appropriate LED
1472 LED_D_OFF();
1473 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
1474
1475 // Set ADC to read field strength
1476 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_SWRST;
1477 AT91C_BASE_ADC->ADC_MR =
1478 ADC_MODE_PRESCALE(32) |
1479 ADC_MODE_STARTUP_TIME(16) |
1480 ADC_MODE_SAMPLE_HOLD_TIME(8);
1481 AT91C_BASE_ADC->ADC_CHER = ADC_CHANNEL(ADC_CHAN_HF);
1482 // start ADC
1483 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1484
1485 // Now run a 'software UART' on the stream of incoming samples.
1486 Uart.output = received;
1487 Uart.byteCntMax = maxLen;
1488 Uart.state = STATE_UNSYNCD;
1489
1490 for(;;) {
1491 WDT_HIT();
1492
1493 if (BUTTON_PRESS()) return 1;
1494
1495 // test if the field exists
1496 if (AT91C_BASE_ADC->ADC_SR & ADC_END_OF_CONVERSION(ADC_CHAN_HF)) {
1497 analogCnt++;
1498 analogAVG += AT91C_BASE_ADC->ADC_CDR[ADC_CHAN_HF];
1499 AT91C_BASE_ADC->ADC_CR = AT91C_ADC_START;
1500 if (analogCnt >= 32) {
1501 if ((33000 * (analogAVG / analogCnt) >> 10) < MF_MINFIELDV) {
1502 vtime = GetTickCount();
1503 if (!timer) timer = vtime;
1504 // 50ms no field --> card to idle state
1505 if (vtime - timer > 50) return 2;
1506 } else
1507 if (timer) timer = 0;
1508 analogCnt = 0;
1509 analogAVG = 0;
1510 }
1511 }
1512 // transmit none
1513 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1514 AT91C_BASE_SSC->SSC_THR = 0x00;
1515 }
1516 // receive and test the miller decoding
1517 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1518 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1519 if(MillerDecoding((b & 0xf0) >> 4)) {
1520 *len = Uart.byteCnt;
1521 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
1522 return 0;
1523 }
1524 if(MillerDecoding(b & 0x0f)) {
1525 *len = Uart.byteCnt;
1526 if (tracing) LogTrace(received, *len, GetDeltaCountUS(), Uart.parityBits, TRUE);
1527 return 0;
1528 }
1529 }
1530 }
1531 }
1532
1533 static int EmSendCmd14443aRaw(uint8_t *resp, int respLen, int correctionNeeded)
1534 {
1535 int i, u = 0;
1536 uint8_t b = 0;
1537
1538 // Modulate Manchester
1539 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_MOD);
1540 AT91C_BASE_SSC->SSC_THR = 0x00;
1541 FpgaSetupSsc();
1542
1543 // include correction bit
1544 i = 1;
1545 if((Uart.parityBits & 0x01) || correctionNeeded) {
1546 // 1236, so correction bit needed
1547 i = 0;
1548 }
1549
1550 // send cycle
1551 for(;;) {
1552 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1553 volatile uint8_t b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1554 (void)b;
1555 }
1556 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1557 if(i > respLen) {
1558 b = 0xff; // was 0x00
1559 u++;
1560 } else {
1561 b = resp[i];
1562 i++;
1563 }
1564 AT91C_BASE_SSC->SSC_THR = b;
1565
1566 if(u > 4) break;
1567 }
1568 if(BUTTON_PRESS()) {
1569 break;
1570 }
1571 }
1572
1573 return 0;
1574 }
1575
1576 int EmSend4bitEx(uint8_t resp, int correctionNeeded){
1577 Code4bitAnswerAsTag(resp);
1578 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1579 if (tracing) LogTrace(&resp, 1, GetDeltaCountUS(), GetParity(&resp, 1), FALSE);
1580 return res;
1581 }
1582
1583 int EmSend4bit(uint8_t resp){
1584 return EmSend4bitEx(resp, 0);
1585 }
1586
1587 int EmSendCmdExPar(uint8_t *resp, int respLen, int correctionNeeded, uint32_t par){
1588 CodeIso14443aAsTagPar(resp, respLen, par);
1589 int res = EmSendCmd14443aRaw(ToSend, ToSendMax, correctionNeeded);
1590 if (tracing) LogTrace(resp, respLen, GetDeltaCountUS(), par, FALSE);
1591 return res;
1592 }
1593
1594 int EmSendCmdEx(uint8_t *resp, int respLen, int correctionNeeded){
1595 return EmSendCmdExPar(resp, respLen, correctionNeeded, GetParity(resp, respLen));
1596 }
1597
1598 int EmSendCmd(uint8_t *resp, int respLen){
1599 return EmSendCmdExPar(resp, respLen, 0, GetParity(resp, respLen));
1600 }
1601
1602 int EmSendCmdPar(uint8_t *resp, int respLen, uint32_t par){
1603 return EmSendCmdExPar(resp, respLen, 0, par);
1604 }
1605
1606 //-----------------------------------------------------------------------------
1607 // Wait a certain time for tag response
1608 // If a response is captured return TRUE
1609 // If it takes to long return FALSE
1610 //-----------------------------------------------------------------------------
1611 static int GetIso14443aAnswerFromTag(uint8_t *receivedResponse, int maxLen, int *samples, int *elapsed) //uint8_t *buffer
1612 {
1613 // buffer needs to be 512 bytes
1614 int c;
1615
1616 // Set FPGA mode to "reader listen mode", no modulation (listen
1617 // only, since we are receiving, not transmitting).
1618 // Signal field is on with the appropriate LED
1619 LED_D_ON();
1620 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_LISTEN);
1621
1622 // Now get the answer from the card
1623 Demod.output = receivedResponse;
1624 Demod.len = 0;
1625 Demod.state = DEMOD_UNSYNCD;
1626
1627 uint8_t b;
1628 if (elapsed) *elapsed = 0;
1629
1630 c = 0;
1631 for(;;) {
1632 WDT_HIT();
1633
1634 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
1635 AT91C_BASE_SSC->SSC_THR = 0x00; // To make use of exact timing of next command from reader!!
1636 if (elapsed) (*elapsed)++;
1637 }
1638 if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
1639 if(c < iso14a_timeout) { c++; } else { return FALSE; }
1640 b = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
1641 if(ManchesterDecoding((b>>4) & 0xf)) {
1642 *samples = ((c - 1) << 3) + 4;
1643 return TRUE;
1644 }
1645 if(ManchesterDecoding(b & 0x0f)) {
1646 *samples = c << 3;
1647 return TRUE;
1648 }
1649 }
1650 }
1651 }
1652
1653 void ReaderTransmitShort(const uint8_t* bt)
1654 {
1655 int wait = 0;
1656 int samples = 0;
1657
1658 ShortFrameFromReader(*bt);
1659
1660 // Select the card
1661 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1662
1663 // Store reader command in buffer
1664 if (tracing) LogTrace(bt,1,0,GetParity(bt,1),TRUE);
1665 }
1666
1667 void ReaderTransmitPar(uint8_t* frame, int len, uint32_t par)
1668 {
1669 int wait = 0;
1670 int samples = 0;
1671
1672 // This is tied to other size changes
1673 // uint8_t* frame_addr = ((uint8_t*)BigBuf) + 2024;
1674 CodeIso14443aAsReaderPar(frame,len,par);
1675
1676 // Select the card
1677 TransmitFor14443a(ToSend, ToSendMax, &samples, &wait);
1678 if(trigger)
1679 LED_A_ON();
1680
1681 // Store reader command in buffer
1682 if (tracing) LogTrace(frame,len,0,par,TRUE);
1683 }
1684
1685
1686 void ReaderTransmit(uint8_t* frame, int len)
1687 {
1688 // Generate parity and redirect
1689 ReaderTransmitPar(frame,len,GetParity(frame,len));
1690 }
1691
1692 int ReaderReceive(uint8_t* receivedAnswer)
1693 {
1694 int samples = 0;
1695 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1696 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1697 if(samples == 0) return FALSE;
1698 return Demod.len;
1699 }
1700
1701 int ReaderReceivePar(uint8_t* receivedAnswer, uint32_t * parptr)
1702 {
1703 int samples = 0;
1704 if (!GetIso14443aAnswerFromTag(receivedAnswer,160,&samples,0)) return FALSE;
1705 if (tracing) LogTrace(receivedAnswer,Demod.len,samples,Demod.parityBits,FALSE);
1706 *parptr = Demod.parityBits;
1707 if(samples == 0) return FALSE;
1708 return Demod.len;
1709 }
1710
1711 /* performs iso14443a anticolision procedure
1712 * fills the uid pointer unless NULL
1713 * fills resp_data unless NULL */
1714 int iso14443a_select_card(uint8_t * uid_ptr, iso14a_card_select_t * resp_data, uint32_t * cuid_ptr) {
1715 uint8_t wupa[] = { 0x52 }; // 0x26 - REQA 0x52 - WAKE-UP
1716 uint8_t sel_all[] = { 0x93,0x20 };
1717 uint8_t sel_uid[] = { 0x93,0x70,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1718 uint8_t rats[] = { 0xE0,0x80,0x00,0x00 }; // FSD=256, FSDI=8, CID=0
1719
1720 uint8_t* resp = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1721
1722 uint8_t sak = 0x04; // cascade uid
1723 int cascade_level = 0;
1724
1725 int len;
1726
1727 // clear uid
1728 memset(uid_ptr, 0, 8);
1729
1730 // Broadcast for a card, WUPA (0x52) will force response from all cards in the field
1731 ReaderTransmitShort(wupa);
1732 // Receive the ATQA
1733 if(!ReaderReceive(resp)) return 0;
1734
1735 if(resp_data)
1736 memcpy(resp_data->atqa, resp, 2);
1737
1738 // OK we will select at least at cascade 1, lets see if first byte of UID was 0x88 in
1739 // which case we need to make a cascade 2 request and select - this is a long UID
1740 // While the UID is not complete, the 3nd bit (from the right) is set in the SAK.
1741 for(; sak & 0x04; cascade_level++)
1742 {
1743 // SELECT_* (L1: 0x93, L2: 0x95, L3: 0x97)
1744 sel_uid[0] = sel_all[0] = 0x93 + cascade_level * 2;
1745
1746 // SELECT_ALL
1747 ReaderTransmit(sel_all,sizeof(sel_all));
1748 if (!ReaderReceive(resp)) return 0;
1749 if(uid_ptr) memcpy(uid_ptr + cascade_level*4, resp, 4);
1750
1751 // calculate crypto UID
1752 if(cuid_ptr) *cuid_ptr = bytes_to_num(resp, 4);
1753
1754 // Construct SELECT UID command
1755 memcpy(sel_uid+2,resp,5);
1756 AppendCrc14443a(sel_uid,7);
1757 ReaderTransmit(sel_uid,sizeof(sel_uid));
1758
1759 // Receive the SAK
1760 if (!ReaderReceive(resp)) return 0;
1761 sak = resp[0];
1762 }
1763 if(resp_data) {
1764 resp_data->sak = sak;
1765 resp_data->ats_len = 0;
1766 }
1767 //-- this byte not UID, it CT. http://www.nxp.com/documents/application_note/AN10927.pdf page 3
1768 if (uid_ptr[0] == 0x88) {
1769 memcpy(uid_ptr, uid_ptr + 1, 7);
1770 uid_ptr[7] = 0;
1771 }
1772
1773 if( (sak & 0x20) == 0)
1774 return 2; // non iso14443a compliant tag
1775
1776 // Request for answer to select
1777 if(resp_data) { // JCOP cards - if reader sent RATS then there is no MIFARE session at all!!!
1778 AppendCrc14443a(rats, 2);
1779 ReaderTransmit(rats, sizeof(rats));
1780
1781 if (!(len = ReaderReceive(resp))) return 0;
1782
1783 memcpy(resp_data->ats, resp, sizeof(resp_data->ats));
1784 resp_data->ats_len = len;
1785 }
1786
1787 return 1;
1788 }
1789
1790 void iso14443a_setup() {
1791 // Setup SSC
1792 FpgaSetupSsc();
1793 // Start from off (no field generated)
1794 // Signal field is off with the appropriate LED
1795 LED_D_OFF();
1796 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1797 SpinDelay(200);
1798
1799 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
1800
1801 // Now give it time to spin up.
1802 // Signal field is on with the appropriate LED
1803 LED_D_ON();
1804 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1805 SpinDelay(200);
1806
1807 iso14a_timeout = 2048; //default
1808 }
1809
1810 int iso14_apdu(uint8_t * cmd, size_t cmd_len, void * data) {
1811 uint8_t real_cmd[cmd_len+4];
1812 real_cmd[0] = 0x0a; //I-Block
1813 real_cmd[1] = 0x00; //CID: 0 //FIXME: allow multiple selected cards
1814 memcpy(real_cmd+2, cmd, cmd_len);
1815 AppendCrc14443a(real_cmd,cmd_len+2);
1816
1817 ReaderTransmit(real_cmd, cmd_len+4);
1818 size_t len = ReaderReceive(data);
1819 if(!len)
1820 return -1; //DATA LINK ERROR
1821
1822 return len;
1823 }
1824
1825
1826 //-----------------------------------------------------------------------------
1827 // Read an ISO 14443a tag. Send out commands and store answers.
1828 //
1829 //-----------------------------------------------------------------------------
1830 void ReaderIso14443a(UsbCommand * c, UsbCommand * ack)
1831 {
1832 iso14a_command_t param = c->arg[0];
1833 uint8_t * cmd = c->d.asBytes;
1834 size_t len = c->arg[1];
1835
1836 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(1);
1837
1838 if(param & ISO14A_CONNECT) {
1839 iso14443a_setup();
1840 ack->arg[0] = iso14443a_select_card(ack->d.asBytes, (iso14a_card_select_t *) (ack->d.asBytes+12), NULL);
1841 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1842 }
1843
1844 if(param & ISO14A_SET_TIMEOUT) {
1845 iso14a_timeout = c->arg[2];
1846 }
1847
1848 if(param & ISO14A_SET_TIMEOUT) {
1849 iso14a_timeout = c->arg[2];
1850 }
1851
1852 if(param & ISO14A_APDU) {
1853 ack->arg[0] = iso14_apdu(cmd, len, ack->d.asBytes);
1854 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1855 }
1856
1857 if(param & ISO14A_RAW) {
1858 if(param & ISO14A_APPEND_CRC) {
1859 AppendCrc14443a(cmd,len);
1860 len += 2;
1861 }
1862 ReaderTransmit(cmd,len);
1863 ack->arg[0] = ReaderReceive(ack->d.asBytes);
1864 UsbSendPacket((void *)ack, sizeof(UsbCommand));
1865 }
1866
1867 if(param & ISO14A_REQUEST_TRIGGER) iso14a_set_trigger(0);
1868
1869 if(param & ISO14A_NO_DISCONNECT)
1870 return;
1871
1872 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1873 LEDsoff();
1874 }
1875 //-----------------------------------------------------------------------------
1876 // Read an ISO 14443a tag. Send out commands and store answers.
1877 //
1878 //-----------------------------------------------------------------------------
1879 void ReaderMifare(uint32_t parameter)
1880 {
1881 // Mifare AUTH
1882 uint8_t mf_auth[] = { 0x60,0x00,0xf5,0x7b };
1883 uint8_t mf_nr_ar[] = { 0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00 };
1884
1885 uint8_t* receivedAnswer = (((uint8_t *)BigBuf) + 3560); // was 3560 - tied to other size changes
1886 traceLen = 0;
1887 tracing = false;
1888
1889 iso14443a_setup();
1890
1891 LED_A_ON();
1892 LED_B_OFF();
1893 LED_C_OFF();
1894
1895 byte_t nt_diff = 0;
1896 LED_A_OFF();
1897 byte_t par = 0;
1898 byte_t par_mask = 0xff;
1899 byte_t par_low = 0;
1900 int led_on = TRUE;
1901 uint8_t uid[8];
1902 uint32_t cuid;
1903
1904 tracing = FALSE;
1905 byte_t nt[4] = {0,0,0,0};
1906 byte_t nt_attacked[4], nt_noattack[4];
1907 byte_t par_list[8] = {0,0,0,0,0,0,0,0};
1908 byte_t ks_list[8] = {0,0,0,0,0,0,0,0};
1909 num_to_bytes(parameter, 4, nt_noattack);
1910 int isOK = 0, isNULL = 0;
1911
1912 while(TRUE)
1913 {
1914 LED_C_ON();
1915 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1916 SpinDelay(200);
1917 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_READER_MOD);
1918 LED_C_OFF();
1919
1920 // Test if the action was cancelled
1921 if(BUTTON_PRESS()) {
1922 break;
1923 }
1924
1925 if(!iso14443a_select_card(uid, NULL, &cuid)) continue;
1926
1927 // Transmit MIFARE_CLASSIC_AUTH
1928 ReaderTransmit(mf_auth, sizeof(mf_auth));
1929
1930 // Receive the (16 bit) "random" nonce
1931 if (!ReaderReceive(receivedAnswer)) continue;
1932 memcpy(nt, receivedAnswer, 4);
1933
1934 // Transmit reader nonce and reader answer
1935 ReaderTransmitPar(mf_nr_ar, sizeof(mf_nr_ar),par);
1936
1937 // Receive 4 bit answer
1938 if (ReaderReceive(receivedAnswer))
1939 {
1940 if ( (parameter != 0) && (memcmp(nt, nt_noattack, 4) == 0) ) continue;
1941
1942 isNULL = (nt_attacked[0] = 0) && (nt_attacked[1] = 0) && (nt_attacked[2] = 0) && (nt_attacked[3] = 0);
1943 if ( (isNULL != 0 ) && (memcmp(nt, nt_attacked, 4) != 0) ) continue;
1944
1945 if (nt_diff == 0)
1946 {
1947 LED_A_ON();
1948 memcpy(nt_attacked, nt, 4);
1949 par_mask = 0xf8;
1950 par_low = par & 0x07;
1951 }
1952
1953 led_on = !led_on;
1954 if(led_on) LED_B_ON(); else LED_B_OFF();
1955 par_list[nt_diff] = par;
1956 ks_list[nt_diff] = receivedAnswer[0] ^ 0x05;
1957
1958 // Test if the information is complete
1959 if (nt_diff == 0x07) {
1960 isOK = 1;
1961 break;
1962 }
1963
1964 nt_diff = (nt_diff + 1) & 0x07;
1965 mf_nr_ar[3] = nt_diff << 5;
1966 par = par_low;
1967 } else {
1968 if (nt_diff == 0)
1969 {
1970 par++;
1971 } else {
1972 par = (((par >> 3) + 1) << 3) | par_low;
1973 }
1974 }
1975 }
1976
1977 LogTrace(nt, 4, 0, GetParity(nt, 4), TRUE);
1978 LogTrace(par_list, 8, 0, GetParity(par_list, 8), TRUE);
1979 LogTrace(ks_list, 8, 0, GetParity(ks_list, 8), TRUE);
1980
1981 UsbCommand ack = {CMD_ACK, {isOK, 0, 0}};
1982 memcpy(ack.d.asBytes + 0, uid, 4);
1983 memcpy(ack.d.asBytes + 4, nt, 4);
1984 memcpy(ack.d.asBytes + 8, par_list, 8);
1985 memcpy(ack.d.asBytes + 16, ks_list, 8);
1986
1987 LED_B_ON();
1988 UsbSendPacket((uint8_t *)&ack, sizeof(UsbCommand));
1989 LED_B_OFF();
1990
1991 // Thats it...
1992 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
1993 LEDsoff();
1994 tracing = TRUE;
1995
1996 if (MF_DBGLEVEL >= 1) DbpString("COMMAND mifare FINISHED");
1997 }
1998
1999
2000 //-----------------------------------------------------------------------------
2001 // MIFARE 1K simulate.
2002 //
2003 //-----------------------------------------------------------------------------
2004 void Mifare1ksim(uint8_t arg0, uint8_t arg1, uint8_t arg2, uint8_t *datain)
2005 {
2006 int cardSTATE = MFEMUL_NOFIELD;
2007 int _7BUID = 0;
2008 int vHf = 0; // in mV
2009 int nextCycleTimeout = 0;
2010 int res;
2011 // uint32_t timer = 0;
2012 uint32_t selTimer = 0;
2013 uint32_t authTimer = 0;
2014 uint32_t par = 0;
2015 int len = 0;
2016 uint8_t cardWRBL = 0;
2017 uint8_t cardAUTHSC = 0;
2018 uint8_t cardAUTHKEY = 0xff; // no authentication
2019 uint32_t cardRn = 0;
2020 uint32_t cardRr = 0;
2021 uint32_t cuid = 0;
2022 uint32_t rn_enc = 0;
2023 uint32_t ans = 0;
2024 struct Crypto1State mpcs = {0, 0};
2025 struct Crypto1State *pcs;
2026 pcs = &mpcs;
2027
2028 uint8_t* receivedCmd = eml_get_bigbufptr_recbuf();
2029 uint8_t *response = eml_get_bigbufptr_sendbuf();
2030
2031 static uint8_t rATQA[] = {0x04, 0x00}; // Mifare classic 1k 4BUID
2032
2033 static uint8_t rUIDBCC1[] = {0xde, 0xad, 0xbe, 0xaf, 0x62};
2034 static uint8_t rUIDBCC2[] = {0xde, 0xad, 0xbe, 0xaf, 0x62}; // !!!
2035
2036 static uint8_t rSAK[] = {0x08, 0xb6, 0xdd};
2037 static uint8_t rSAK1[] = {0x04, 0xda, 0x17};
2038
2039 static uint8_t rAUTH_NT[] = {0x1a, 0xac, 0xff, 0x4f};
2040 static uint8_t rAUTH_AT[] = {0x00, 0x00, 0x00, 0x00};
2041
2042 // clear trace
2043 traceLen = 0;
2044 tracing = true;
2045
2046 // Authenticate response - nonce
2047 uint32_t nonce = bytes_to_num(rAUTH_NT, 4);
2048
2049 // get UID from emul memory
2050 emlGetMemBt(receivedCmd, 7, 1);
2051 _7BUID = !(receivedCmd[0] == 0x00);
2052 if (!_7BUID) { // ---------- 4BUID
2053 rATQA[0] = 0x04;
2054
2055 emlGetMemBt(rUIDBCC1, 0, 4);
2056 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2057 } else { // ---------- 7BUID
2058 rATQA[0] = 0x44;
2059
2060 rUIDBCC1[0] = 0x88;
2061 emlGetMemBt(&rUIDBCC1[1], 0, 3);
2062 rUIDBCC1[4] = rUIDBCC1[0] ^ rUIDBCC1[1] ^ rUIDBCC1[2] ^ rUIDBCC1[3];
2063 emlGetMemBt(rUIDBCC2, 3, 4);
2064 rUIDBCC2[4] = rUIDBCC2[0] ^ rUIDBCC2[1] ^ rUIDBCC2[2] ^ rUIDBCC2[3];
2065 }
2066
2067 // -------------------------------------- test area
2068
2069 // -------------------------------------- END test area
2070 // start mkseconds counter
2071 StartCountUS();
2072
2073 // We need to listen to the high-frequency, peak-detected path.
2074 SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
2075 FpgaSetupSsc();
2076
2077 FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_ISO14443A | FPGA_HF_ISO14443A_TAGSIM_LISTEN);
2078 SpinDelay(200);
2079
2080 Dbprintf("--> start. 7buid=%d", _7BUID);
2081 // calibrate mkseconds counter
2082 GetDeltaCountUS();
2083 while (true) {
2084 WDT_HIT();
2085
2086 if(BUTTON_PRESS()) {
2087 break;
2088 }
2089
2090 // find reader field
2091 // Vref = 3300mV, and an 10:1 voltage divider on the input
2092 // can measure voltages up to 33000 mV
2093 if (cardSTATE == MFEMUL_NOFIELD) {
2094 vHf = (33000 * AvgAdc(ADC_CHAN_HF)) >> 10;
2095 if (vHf > MF_MINFIELDV) {
2096 cardSTATE = MFEMUL_IDLE;
2097 LED_A_ON();
2098 }
2099 }
2100
2101 if (cardSTATE != MFEMUL_NOFIELD) {
2102 res = EmGetCmd(receivedCmd, &len, 100); // (+ nextCycleTimeout)
2103 if (res == 2) {
2104 cardSTATE = MFEMUL_NOFIELD;
2105 LEDsoff();
2106 continue;
2107 }
2108 if(res) break;
2109 }
2110
2111 nextCycleTimeout = 0;
2112
2113 // if (len) Dbprintf("len:%d cmd: %02x %02x %02x %02x", len, receivedCmd[0], receivedCmd[1], receivedCmd[2], receivedCmd[3]);
2114
2115 if (len != 4 && cardSTATE != MFEMUL_NOFIELD) { // len != 4 <---- speed up the code 4 authentication
2116 // REQ or WUP request in ANY state and WUP in HALTED state
2117 if (len == 1 && ((receivedCmd[0] == 0x26 && cardSTATE != MFEMUL_HALTED) || receivedCmd[0] == 0x52)) {
2118 selTimer = GetTickCount();
2119 EmSendCmdEx(rATQA, sizeof(rATQA), (receivedCmd[0] == 0x52));
2120 cardSTATE = MFEMUL_SELECT1;
2121
2122 // init crypto block
2123 LED_B_OFF();
2124 LED_C_OFF();
2125 crypto1_destroy(pcs);
2126 cardAUTHKEY = 0xff;
2127 }
2128 }
2129
2130 switch (cardSTATE) {
2131 case MFEMUL_NOFIELD:{
2132 break;
2133 }
2134 case MFEMUL_HALTED:{
2135 break;
2136 }
2137 case MFEMUL_IDLE:{
2138 break;
2139 }
2140 case MFEMUL_SELECT1:{
2141 // select all
2142 if (len == 2 && (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x20)) {
2143 EmSendCmd(rUIDBCC1, sizeof(rUIDBCC1));
2144 }
2145
2146 // select card
2147 if (len == 9 &&
2148 (receivedCmd[0] == 0x93 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC1, 4) == 0)) {
2149 if (!_7BUID)
2150 EmSendCmd(rSAK, sizeof(rSAK));
2151 else
2152 EmSendCmd(rSAK1, sizeof(rSAK1));
2153
2154 cuid = bytes_to_num(rUIDBCC1, 4);
2155 if (!_7BUID) {
2156 cardSTATE = MFEMUL_WORK;
2157 } else {
2158 cardSTATE = MFEMUL_SELECT2;
2159 break;
2160 }
2161 LED_B_ON();
2162 if (MF_DBGLEVEL >= 4) Dbprintf("--> WORK. anticol1 time: %d", GetTickCount() - selTimer);
2163 }
2164
2165 break;
2166 }
2167 case MFEMUL_SELECT2:{
2168 if (len == 2 && (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x20)) {
2169 EmSendCmd(rUIDBCC2, sizeof(rUIDBCC2));
2170 break;
2171 }
2172
2173 // select 2 card
2174 if (len == 9 &&
2175 (receivedCmd[0] == 0x95 && receivedCmd[1] == 0x70 && memcmp(&receivedCmd[2], rUIDBCC2, 4) == 0)) {
2176 EmSendCmd(rSAK, sizeof(rSAK));
2177
2178 cuid = bytes_to_num(rUIDBCC2, 4);
2179 cardSTATE = MFEMUL_WORK;
2180 LED_B_ON();
2181 Dbprintf("--> WORK. anticol2 time: %d", GetTickCount() - selTimer);
2182 break;
2183 }
2184 // TODO: goto work state - i guess there is a command
2185 break;
2186 }
2187 case MFEMUL_AUTH1:{
2188 if (len == 8) {
2189 // --- crypto
2190 rn_enc = bytes_to_num(receivedCmd, 4);
2191 cardRn = rn_enc ^ crypto1_word(pcs, rn_enc , 1);
2192 cardRr = bytes_to_num(&receivedCmd[4], 4) ^ crypto1_word(pcs, 0, 0);
2193 // test if auth OK
2194 if (cardRr != prng_successor(nonce, 64)){
2195 Dbprintf("AUTH FAILED. cardRr=%08x, suc=%08x", cardRr, prng_successor(nonce, 64));
2196 cardSTATE = MFEMUL_IDLE;
2197 LED_B_OFF();
2198 LED_C_OFF();
2199 break;
2200 }
2201 ans = prng_successor(nonce, 96) ^ crypto1_word(pcs, 0, 0);
2202 num_to_bytes(ans, 4, rAUTH_AT);
2203 // --- crypto
2204 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2205 cardSTATE = MFEMUL_AUTH2;
2206 } else {
2207 cardSTATE = MFEMUL_IDLE;
2208 LED_B_OFF();
2209 LED_C_OFF();
2210 }
2211 if (cardSTATE != MFEMUL_AUTH2) break;
2212 }
2213 case MFEMUL_AUTH2:{
2214 // test auth info here...
2215
2216 LED_C_ON();
2217 cardSTATE = MFEMUL_WORK;
2218 Dbprintf("AUTH COMPLETED. sec=%d, key=%d time=%d", cardAUTHSC, cardAUTHKEY, GetTickCount() - authTimer);
2219 break;
2220 }
2221 case MFEMUL_WORK:{
2222 if (len == 0) break;
2223
2224 if (cardAUTHKEY == 0xff) {
2225 // first authentication
2226 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2227 authTimer = GetTickCount();
2228
2229 cardAUTHSC = receivedCmd[1] / 4; // received block num
2230 cardAUTHKEY = receivedCmd[0] - 0x60;
2231
2232 // --- crypto
2233 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2234 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2235 num_to_bytes(nonce, 4, rAUTH_AT);
2236 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2237 // --- crypto
2238
2239 // last working revision
2240 // EmSendCmd14443aRaw(resp1, resp1Len, 0);
2241 // LogTrace(NULL, 0, GetDeltaCountUS(), 0, true);
2242
2243 cardSTATE = MFEMUL_AUTH1;
2244 nextCycleTimeout = 10;
2245 break;
2246 }
2247 } else {
2248 // decrypt seqence
2249 mf_crypto1_decrypt(pcs, receivedCmd, len);
2250
2251 // nested authentication
2252 if (len == 4 && (receivedCmd[0] == 0x60 || receivedCmd[0] == 0x61)) {
2253 authTimer = GetTickCount();
2254
2255 cardAUTHSC = receivedCmd[1] / 4; // received block num
2256 cardAUTHKEY = receivedCmd[0] - 0x60;
2257
2258 // --- crypto
2259 crypto1_create(pcs, emlGetKey(cardAUTHSC, cardAUTHKEY));
2260 ans = nonce ^ crypto1_word(pcs, cuid ^ nonce, 0);
2261 num_to_bytes(ans, 4, rAUTH_AT);
2262 EmSendCmd(rAUTH_AT, sizeof(rAUTH_AT));
2263 // --- crypto
2264
2265 cardSTATE = MFEMUL_AUTH1;
2266 nextCycleTimeout = 10;
2267 break;
2268 }
2269 }
2270
2271 // rule 13 of 7.5.3. in ISO 14443-4. chaining shall be continued
2272 // BUT... ACK --> NACK
2273 if (len == 1 && receivedCmd[0] == CARD_ACK) {
2274 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2275 break;
2276 }
2277
2278 // rule 12 of 7.5.3. in ISO 14443-4. R(NAK) --> R(ACK)
2279 if (len == 1 && receivedCmd[0] == CARD_NACK_NA) {
2280 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2281 break;
2282 }
2283
2284 // read block
2285 if (len == 4 && receivedCmd[0] == 0x30) {
2286 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2287 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2288 break;
2289 }
2290 emlGetMem(response, receivedCmd[1], 1);
2291 AppendCrc14443a(response, 16);
2292 mf_crypto1_encrypt(pcs, response, 18, &par);
2293 EmSendCmdPar(response, 18, par);
2294 break;
2295 }
2296
2297 // write block
2298 if (len == 4 && receivedCmd[0] == 0xA0) {
2299 if (receivedCmd[1] >= 16 * 4 || receivedCmd[1] / 4 != cardAUTHSC) {
2300 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2301 break;
2302 }
2303 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2304 nextCycleTimeout = 50;
2305 cardSTATE = MFEMUL_WRITEBL2;
2306 cardWRBL = receivedCmd[1];
2307 break;
2308 }
2309
2310 // halt
2311 if (len == 4 && (receivedCmd[0] == 0x50 && receivedCmd[1] == 0x00)) {
2312 cardSTATE = MFEMUL_HALTED;
2313 LED_B_OFF();
2314 LED_C_OFF();
2315 Dbprintf("--> HALTED. Selected time: %d ms", GetTickCount() - selTimer);
2316 break;
2317 }
2318
2319 // command not allowed
2320 if (len == 4) {
2321 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_NACK_NA));
2322 break;
2323 }
2324
2325 // case break
2326 break;
2327 }
2328 case MFEMUL_WRITEBL2:{
2329 if (len == 18){
2330 mf_crypto1_decrypt(pcs, receivedCmd, len);
2331 emlSetMem(receivedCmd, cardWRBL, 1);
2332 EmSend4bit(mf_crypto1_encrypt4bit(pcs, CARD_ACK));
2333 cardSTATE = MFEMUL_WORK;
2334 break;
2335 } else {
2336 cardSTATE = MFEMUL_IDLE;
2337 LED_B_OFF();
2338 LED_C_OFF();
2339 break;
2340 }
2341 break;
2342 }
2343
2344 }
2345
2346 }
2347
2348 FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
2349 LEDsoff();
2350
2351 // add trace trailer
2352 memset(rAUTH_NT, 0x44, 4);
2353 LogTrace(rAUTH_NT, 4, 0, 0, TRUE);
2354
2355 DbpString("Emulator stopped.");
2356 }
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