usb communication (device side) refactoring

[proxmark3-svn] / armsrc / hfsnoop.c

diff --git a/armsrc/hfsnoop.c b/armsrc/hfsnoop.c
index 6a58b20b0e7f9fc6319abc7ea6869f5fa6e9cc60..3a0ac65f504a1bcc2020115777485671a465e27e 100644 (file)
--- a/armsrc/hfsnoop.c
+++ b/armsrc/hfsnoop.c
@@ -1,9 +1,22 @@
+//-----------------------------------------------------------------------------
+// piwi, 2019
+//
+// This code is licensed to you under the terms of the GNU GPL, version 2 or,
+// at your option, any later version. See the LICENSE.txt file for the text of
+// the license.
+//-----------------------------------------------------------------------------
+// Routines to get sample data from FPGA.
+//-----------------------------------------------------------------------------
+
+#include "hfsnoop.h"
+

 #include "proxmark3.h"
 #include "proxmark3.h"

-#include "apps.h"

 #include "BigBuf.h"
 #include "util.h"
 #include "BigBuf.h"
 #include "util.h"

-
-static void RAMFUNC optimizedSnoop(void);
+#include "apps.h"
+#include "usb_cdc.h"
+#include "fpga.h"
+#include "fpgaloader.h"

 
 static void RAMFUNC optimizedSnoop(void)
 {
 
 static void RAMFUNC optimizedSnoop(void)
 {


@@ -36,7 +49,7 @@ void HfSnoop(int samplesToSkip, int triggersToSkip)
        // Select correct configs
        FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
        // Set up the synchronous serial port
        // Select correct configs
        FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
        // Set up the synchronous serial port

-       FpgaSetupSsc();
+       FpgaSetupSsc(FPGA_MAJOR_MODE_HF_SNOOP);

        // connect Demodulated Signal to ADC:
        SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SNOOP);
        // connect Demodulated Signal to ADC:
        SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SNOOP);


@@ -73,3 +86,33 @@ void HfSnoop(int samplesToSkip, int triggersToSkip)
        LED_D_OFF();
 }
 
        LED_D_OFF();
 }
 

+void HfPlot(void)
+{
+       uint8_t *buf = ToSend;
+       uint8_t *this_buf = buf;
+       
+       FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+       FpgaSetupSsc(FPGA_MAJOR_MODE_HF_GET_TRACE);
+       AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;   // Disable DMA Transfer
+       AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) this_buf; // start transfer to this memory address
+       AT91C_BASE_PDC_SSC->PDC_RCR = USB_CMD_DATA_SIZE;   // transfer this many samples
+       buf[0] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;         // clear receive register
+       AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN;    // Start DMA transfer
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_GET_TRACE);   // let FPGA transfer its internal Block-RAM
+
+       LED_B_ON();
+       for(size_t i = 0; i < FPGA_TRACE_SIZE; i += USB_CMD_DATA_SIZE) {
+               // prepare next DMA transfer:
+               uint8_t *next_buf = buf + ((i + USB_CMD_DATA_SIZE) % (2 * USB_CMD_DATA_SIZE));
+               AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t)next_buf;
+               AT91C_BASE_PDC_SSC->PDC_RNCR = USB_CMD_DATA_SIZE;
+               size_t len = MIN(FPGA_TRACE_SIZE - i, USB_CMD_DATA_SIZE);
+               while (!(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_ENDRX))) ; // wait for DMA transfer to complete
+               cmd_send(CMD_DOWNLOADED_RAW_ADC_SAMPLES_125K, i, len, FPGA_TRACE_SIZE, this_buf, len);
+               this_buf = next_buf;
+       }
+       // Trigger a finish downloading signal with an ACK frame
+       cmd_send(CMD_ACK, 1, 0, FPGA_TRACE_SIZE, 0, 0);
+       LED_B_OFF();
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+}