#ifndef __APPS_H\r
#define __APPS_H\r
\r
+#include "stdint.h"\r
+#include "stddef.h"\r
+typedef unsigned char byte_t;\r
+\r
// The large multi-purpose buffer, typically used to hold A/D samples,\r
// maybe processed in some way.\r
DWORD BigBuf[12000];\r
\r
/// appmain.h\r
void ReadMem(int addr);\r
-void AppMain(void);\r
+void __attribute__((noreturn)) AppMain(void);\r
void SamyRun(void);\r
void DbpIntegers(int a, int b, int c);\r
void DbpString(char *str);\r
+void Dbprintf(const char *fmt, ...);\r
+\r
void ToSendStuffBit(int b);\r
void ToSendReset(void);\r
void ListenReaderField(int limit);\r
void AcquireRawAdcSamples125k(BOOL at134khz);\r
-void DoAcquisition125k(BOOL at134khz);\r
+void DoAcquisition125k(void);\r
extern int ToSendMax;\r
extern BYTE ToSend[];\r
extern DWORD BigBuf[];\r
void FpgaSetupSsc(void);\r
void SetupSpi(int mode);\r
void FpgaSetupSscDma(BYTE *buf, int len);\r
-void SetAdcMuxFor(int whichGpio);\r
+void SetAdcMuxFor(DWORD whichGpio);\r
\r
// Definitions for the FPGA commands.\r
-#define FPGA_CMD_SET_CONFREG (1<<12)\r
-#define FPGA_CMD_SET_DIVISOR (2<<12)\r
+#define FPGA_CMD_SET_CONFREG (1<<12)\r
+#define FPGA_CMD_SET_DIVISOR (2<<12)\r
// Definitions for the FPGA configuration word.\r
-#define FPGA_MAJOR_MODE_LF_READER (0<<5)\r
+#define FPGA_MAJOR_MODE_LF_READER (0<<5)\r
#define FPGA_MAJOR_MODE_LF_SIMULATOR (1<<5)\r
#define FPGA_MAJOR_MODE_HF_READER_TX (2<<5)\r
-#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (3<<5)\r
+#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR (3<<5)\r
#define FPGA_MAJOR_MODE_HF_SIMULATOR (4<<5)\r
#define FPGA_MAJOR_MODE_HF_ISO14443A (5<<5)\r
#define FPGA_MAJOR_MODE_LF_PASSTHRU (6<<5)\r
-#define FPGA_MAJOR_MODE_OFF (7<<5)\r
+#define FPGA_MAJOR_MODE_OFF (7<<5)\r
// Options for the HF reader, tx to tag\r
#define FPGA_HF_READER_TX_SHALLOW_MOD (1<<0)\r
// Options for the HF reader, correlating against rx from tag\r
-#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0)\r
+#define FPGA_HF_READER_RX_XCORR_848_KHZ (1<<0)\r
#define FPGA_HF_READER_RX_XCORR_SNOOP (1<<1)\r
+#define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ (1<<2)\r
// Options for the HF simulated tag, how to modulate\r
-#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0)\r
-#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0)\r
+#define FPGA_HF_SIMULATOR_NO_MODULATION (0<<0)\r
+#define FPGA_HF_SIMULATOR_MODULATE_BPSK (1<<0)\r
+#define FPGA_HF_SIMULATOR_MODULATE_212K (2<<0)\r
// Options for ISO14443A\r
-#define FPGA_HF_ISO14443A_SNIFFER (0<<0)\r
-#define FPGA_HF_ISO14443A_TAGSIM_LISTEN (1<<0)\r
+#define FPGA_HF_ISO14443A_SNIFFER (0<<0)\r
+#define FPGA_HF_ISO14443A_TAGSIM_LISTEN (1<<0)\r
#define FPGA_HF_ISO14443A_TAGSIM_MOD (2<<0)\r
-#define FPGA_HF_ISO14443A_READER_LISTEN (3<<0)\r
+#define FPGA_HF_ISO14443A_READER_LISTEN (3<<0)\r
#define FPGA_HF_ISO14443A_READER_MOD (4<<0)\r
\r
/// lfops.h\r
void AcquireRawAdcSamples125k(BOOL at134khz);\r
-void DoAcquisition125k(BOOL at134khz);\r
void ModThenAcquireRawAdcSamples125k(int delay_off,int period_0,int period_1,BYTE *command);\r
-void ReadTItag();\r
+void ReadTItag(void);\r
void WriteTItag(DWORD idhi, DWORD idlo, WORD crc);\r
void AcquireTiType(void);\r
void AcquireRawBitsTI(void);\r
void SimulateIso14443Tag(void);\r
void AcquireRawAdcSamplesIso14443(DWORD parameter);\r
void ReadSRI512Iso14443(DWORD parameter);\r
+void ReadSRIX4KIso14443(DWORD parameter);\r
+void ReadSTMemoryIso14443(DWORD parameter,DWORD dwLast);\r
void SnoopIso14443(void);\r
\r
/// iso14443a.h\r
void SnoopIso14443a(void);\r
void SimulateIso14443aTag(int tagType, int TagUid); // ## simulate iso14443a tag\r
void ReaderIso14443a(DWORD parameter);\r
+void ReaderMifare(DWORD parameter);\r
\r
/// iso15693.h\r
void AcquireRawAdcSamplesIso15693(void);\r
void *memset(void *dest, int c, int len);\r
int memcmp(const void *av, const void *bv, int len);\r
char *strncat(char *dest, const char *src, unsigned int n);\r
+void num_to_bytes(uint64_t n, size_t len, byte_t* dest);\r
+uint64_t bytes_to_num(byte_t* src, size_t len);\r
+\r
void SpinDelay(int ms);\r
void SpinDelayUs(int us);\r
void LED(int led, int ms);\r