// now do the read
DoAcquisition_config(false);
+
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
}
/* blank r/w tag data stream
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
LED_D_OFF();
}
+
+void Cotag() {
+
+//#define WAIT2200 { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2035); }
+#define WAIT2200 { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2200); }
+ LED_A_ON();
+
+ //clear buffer now so it does not interfere with timing later
+ BigBuf_Clear_ext(false);
+
+ // Set up FPGA, 132kHz to power up the tag
+ FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 89);
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+
+ // Connect the A/D to the peak-detected low-frequency path.
+ SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+
+ // Now set up the SSC to get the ADC samples that are now streaming at us.
+ FpgaSetupSsc();
+
+ // start a 1.5ticks is 1us
+ StartTicks();
+
+ //send start pulse
+ TurnReadLFOn(800); WAIT2200
+ TurnReadLFOn(3600); WAIT2200
+ TurnReadLFOn(800); WAIT2200
+ TurnReadLFOn(3600);
+
+/*
+ TurnReadLFOn(740); WAIT2200
+ TurnReadLFOn(3330); WAIT2200
+ TurnReadLFOn(740); WAIT2200
+ TurnReadLFOn(3330);
+
+
+burst 800 us, gap 2.2 msecs
+burst 3.6 msecs gap 2.2 msecs
+burst 800 us gap 2.2 msecs
+pulse 3.6 msecs
+*/
+
+ // Acquisition
+ DoAcquisition_default(-1, true);
+
+ // Turn the field off
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+ cmd_send(CMD_ACK,0,0,0,0,0);
+ LED_A_OFF();
+}