assign pwr_oe3 = 1'b0;
assign pwr_oe4 = 1'b0;
-wire adc_clk = ck_1356megb;
-
-reg fc_div_2;
+// Clock divider
+reg [0:0] fc_divider;
always @(negedge ck_1356megb)
- fc_div_2 <= fc_div_2 + 1;
+ fc_divider <= fc_divider + 1;
+wire fc_div2 = fc_divider[0];
+
+reg adc_clk;
+always @(ck_1356megb)
+ if (xcorr_is_848)
+ adc_clk <= ck_1356megb;
+ else
+ adc_clk <= fc_div2;
// When we're a reader, we just need to do the BPSK demod; but when we're an
// eavesdropper, we also need to pick out the commands sent by the reader,
always @(negedge adc_clk)
begin
- if (xcorr_is_848 | fc_div_2)
corr_i_cnt <= corr_i_cnt + 1;
end
// These are the correlators: we correlate against in-phase and quadrature
// versions of our reference signal, and keep the (signed) result to
// send out later over the SSP.
- if(corr_i_cnt == 7'd0)
+ if(corr_i_cnt == 6'd0)
begin
if(snoop)
begin
// The logic in hi_simulate.v reports 4 samples per bit. We report two
// (I, Q) pairs per bit, so we should do 2 samples per pair.
- if(corr_i_cnt == 6'd31)
+ if(corr_i_cnt == 6'd32)
after_hysteresis_prev <= after_hysteresis;
// Then the result from last time is serialized and send out to the ARM.
begin
ssp_clk <= 1'b1;
// Don't shift if we just loaded new data, obviously.
- if(corr_i_cnt != 7'd0)
+ if(corr_i_cnt != 6'd0)
begin
corr_i_out[7:0] <= {corr_i_out[6:0], corr_q_out[7]};
corr_q_out[7:1] <= corr_q_out[6:0];