Merge branch 'master' into master

[proxmark3-svn] / common / protocols.h

diff --git a/common/protocols.h b/common/protocols.h
index b57c414fb911bae00c8e8071c0b5dbc7a095a2fe..9ba69d5c6e99f809c382bbca0335ddeecdb123ac 100644 (file)
--- a/common/protocols.h
+++ b/common/protocols.h
@@ -200,10 +200,12 @@ NXP/Philips CUSTOM COMMANDS
 #define TOPAZ_WRITE_NE8                                        0x1B    // Write-no-erase (eight bytes)
 
 
 #define TOPAZ_WRITE_NE8                                        0x1B    // Write-no-erase (eight bytes)
 
 

-#define ISO_14443A     0
-#define ICLASS         1
-#define ISO_14443B     2
-#define TOPAZ          3
+#define ISO_14443A    0
+#define ICLASS        1
+#define ISO_14443B    2
+#define TOPAZ         3
+#define PROTO_MIFARE  4
+#define ISO_7816_4    5

 
 //-- Picopass fuses
 #define FUSE_FPERS   0x80
 
 //-- Picopass fuses
 #define FUSE_FPERS   0x80


@@ -215,6 +217,29 @@ NXP/Philips CUSTOM COMMANDS
 #define FUSE_FPROD0  0x02
 #define FUSE_RA      0x01
 
 #define FUSE_FPROD0  0x02
 #define FUSE_RA      0x01
 

+// ISO 7816-4 Basic interindustry commands. For command APDU's.
+#define ISO7816_READ_BINARY              0xB0
+#define ISO7816_WRITE_BINARY             0xD0
+#define ISO7816_UPDATE_BINARY            0xD6
+#define ISO7816_ERASE_BINARY             0x0E
+#define ISO7816_READ_RECORDS             0xB2
+#define ISO7816_WRITE_RECORDS            0xD2
+#define ISO7816_APPEND_RECORD            0xE2
+#define ISO7816_UPDATE_RECORD            0xDC
+#define ISO7816_GET_DATA                 0xCA
+#define ISO7816_PUT_DATA                 0xDA
+#define ISO7816_SELECT_FILE              0xA4
+#define ISO7816_VERIFY                   0x20
+#define ISO7816_INTERNAL_AUTHENTICATION  0x88
+#define ISO7816_EXTERNAL_AUTHENTICATION  0x82
+#define ISO7816_GET_CHALLENGE            0xB4
+#define ISO7816_MANAGE_CHANNEL           0x70
+// ISO7816-4   For response APDU's
+#define ISO7816_OK                       0x9000
+//     6x xx = ERROR
+
+
+

 void printIclassDumpInfo(uint8_t* iclass_dump);
 void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *app_areas, uint8_t *kb);
 
 void printIclassDumpInfo(uint8_t* iclass_dump);
 void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *app_areas, uint8_t *kb);
 


@@ -238,6 +263,7 @@ void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *
 #define T55x7_MODULATION_MANCHESTER 0x00008000
 #define T55x7_MODULATION_BIPHASE    0x00010000
 #define T55x7_MODULATION_DIPHASE    0x00018000
 #define T55x7_MODULATION_MANCHESTER 0x00008000
 #define T55x7_MODULATION_BIPHASE    0x00010000
 #define T55x7_MODULATION_DIPHASE    0x00018000

+#define T55x7_X_MODE                0x00020000

 #define T55x7_BITRATE_RF_8          0
 #define T55x7_BITRATE_RF_16         0x00040000
 #define T55x7_BITRATE_RF_32         0x00080000
 #define T55x7_BITRATE_RF_8          0
 #define T55x7_BITRATE_RF_16         0x00040000
 #define T55x7_BITRATE_RF_32         0x00080000


@@ -264,11 +290,42 @@ void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *
 #define T5555_PSK_RF_8              0x00000200
 #define T5555_USE_PWD               0x00000400
 #define T5555_USE_AOR               0x00000800
 #define T5555_PSK_RF_8              0x00000200
 #define T5555_USE_PWD               0x00000400
 #define T5555_USE_AOR               0x00000800

+#define T5555_SET_BITRATE(x)        (((x-2)/2)<<12)
+#define T5555_GET_BITRATE(x)        ((((x >> 12) & 0x3F)*2)+2)

 #define T5555_BITRATE_SHIFT         12 //(RF=2n+2)   ie 64=2*0x1F+2   or n = (RF-2)/2
 #define T5555_FAST_WRITE            0x00004000
 #define T5555_PAGE_SELECT           0x00008000
 
 #define T5555_BITRATE_SHIFT         12 //(RF=2n+2)   ie 64=2*0x1F+2   or n = (RF-2)/2
 #define T5555_FAST_WRITE            0x00004000
 #define T5555_PAGE_SELECT           0x00008000
 

+#define T55XX_WRITE_TIMEOUT 1500
+

 uint32_t GetT55xxClockBit(uint32_t clock);
 
 uint32_t GetT55xxClockBit(uint32_t clock);
 

+// em4x05 & em4x69 chip configuration register definitions
+#define EM4x05_GET_BITRATE(x)         (((x & 0x3F)*2)+2)
+#define EM4x05_SET_BITRATE(x)         ((x-2)/2)
+#define EM4x05_MODULATION_NRZ         0x00000000
+#define EM4x05_MODULATION_MANCHESTER  0x00000040
+#define EM4x05_MODULATION_BIPHASE     0x00000080
+#define EM4x05_MODULATION_MILLER      0x000000C0 //not supported by all 4x05/4x69 chips
+#define EM4x05_MODULATION_PSK1        0x00000100 //not supported by all 4x05/4x69 chips
+#define EM4x05_MODULATION_PSK2        0x00000140 //not supported by all 4x05/4x69 chips
+#define EM4x05_MODULATION_PSK3        0x00000180 //not supported by all 4x05/4x69 chips
+#define EM4x05_MODULATION_FSK1        0x00000200 //not supported by all 4x05/4x69 chips
+#define EM4x05_MODULATION_FSK2        0x00000240 //not supported by all 4x05/4x69 chips
+#define EM4x05_PSK_RF_2               0
+#define EM4x05_PSK_RF_4               0x00000400
+#define EM4x05_PSK_RF_8               0x00000800
+#define EM4x05_MAXBLOCK_SHIFT         14
+#define EM4x05_FIRST_USER_BLOCK       5
+#define EM4x05_SET_NUM_BLOCKS(x)      ((x+5-1)<<14) //# of blocks sent during default read mode
+#define EM4x05_GET_NUM_BLOCKS(x)      (((x>>14) & 0xF)-5+1)
+#define EM4x05_READ_LOGIN_REQ         1<<18
+#define EM4x05_READ_HK_LOGIN_REQ      1<<19
+#define EM4x05_WRITE_LOGIN_REQ        1<<20
+#define EM4x05_WRITE_HK_LOGIN_REQ     1<<21
+#define EM4x05_READ_AFTER_WRITE       1<<22
+#define EM4x05_DISABLE_ALLOWED        1<<23
+#define EM4x05_READER_TALK_FIRST      1<<24
+

 #endif 
 // PROTOCOLS_H
 #endif 
 // PROTOCOLS_H