]> cvs.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/lfops.c
added data psk* cmds for pskdemod
[proxmark3-svn] / armsrc / lfops.c
index 8d4e2dc9c84e903e23d9051cde65eaafd6f07cac..79d59bf9c877fedbaf94cd78af58e4f98d055cab 100644 (file)
 #include "hitag2.h"
 #include "crc16.h"
 #include "string.h"
+#include "lfdemod.h"
 
-void AcquireRawAdcSamples125k(int at134khz)
-{
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
-
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-
-       // Now call the acquisition routine
-       DoAcquisition125k();
-}
 
-// split into two routines so we can avoid timing issues after sending commands //
-void DoAcquisition125k(void)
+/**
+* Does the sample acquisition. If threshold is specified, the actual sampling 
+* is not commenced until the threshold has been reached. 
+* @param trigger_threshold - the threshold
+* @param silent - is true, now outputs are made. If false, dbprints the status
+*/
+void DoAcquisition125k_internal(int trigger_threshold,bool silent)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int n = sizeof(BigBuf);
@@ -53,38 +38,95 @@ void DoAcquisition125k(void)
                }
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       i++;
                        LED_D_OFF();
-                       if (i >= n) break;
+                       if (trigger_threshold != -1 && dest[i] < trigger_threshold)
+                               continue;
+                       else
+                               trigger_threshold = -1;
+                       if (++i >= n) break;
                }
        }
-       Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
-                       dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+       if(!silent)
+       {
+               Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
+                               dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+               
+       }
+}
+/**
+* Perform sample aquisition. 
+*/
+void DoAcquisition125k(int trigger_threshold)
+{
+       DoAcquisition125k_internal(trigger_threshold, false);
+}
+
+/**
+* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream 
+* if not already loaded, sets divisor and starts up the antenna. 
+* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
+*                                 0 or 95 ==> 125 KHz
+*                                 
+**/
+void LFSetupFPGAForADC(int divisor, bool lf_field)
+{
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+       else if (divisor == 0)
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       else
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
+
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // Give it a bit of time for the resonant antenna to settle.
+       SpinDelay(50);
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetupSsc();
+}
+/**
+* Initializes the FPGA, and acquires the samples. 
+**/
+void AcquireRawAdcSamples125k(int divisor)
+{
+       LFSetupFPGAForADC(divisor, true);
+       // Now call the acquisition routine
+       DoAcquisition125k_internal(-1,false);
+}
+/**
+* Initializes the FPGA for snoop-mode, and acquires the samples. 
+**/
+
+void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
+{
+       LFSetupFPGAForADC(divisor, false);
+       DoAcquisition125k(trigger_threshold);
 }
 
 void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
 {
-       int at134khz;
 
        /* Make sure the tag is reset */
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelay(2500);
 
+
+       int divisor_used = 95; // 125 KHz
        // see if 'h' was specified
-       if (command[strlen((char *) command) - 1] == 'h')
-               at134khz = TRUE;
-       else
-               at134khz = FALSE;
 
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       if (command[strlen((char *) command) - 1] == 'h')
+               divisor_used = 88; // 134.8 KHz
 
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
 
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        // Give it a bit of time for the resonant antenna to settle.
        SpinDelay(50);
+
        // And a little more time for the tag to fully power up
        SpinDelay(2000);
 
@@ -96,12 +138,9 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();
                SpinDelayUs(delay_off);
-               if (at134khz)
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-               else
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 
 
-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
                LED_D_ON();
                if(*(command++) == '0')
                        SpinDelayUs(period_0);
@@ -111,15 +150,12 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        SpinDelayUs(delay_off);
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 
 
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read
-       DoAcquisition125k();
+       DoAcquisition125k(-1);
 }
 
 /* blank r/w tag data stream
@@ -156,6 +192,7 @@ void ReadTItag(void)
        uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
 
        // TI tags charge at 134.2Khz
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
 
        // Place FPGA in passthrough mode, in this mode the CROSS_LO line
@@ -363,6 +400,7 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   
        if(crc == 0) {
                crc = update_crc16(crc, (idlo)&0xff);
                crc = update_crc16(crc, (idlo>>8)&0xff);
@@ -434,6 +472,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
        int i;
        uint8_t *tab = (uint8_t *)BigBuf;
     
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
     
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
@@ -592,217 +631,217 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
                LED_A_OFF();
 }
 
-
-// loop to capture raw HID waveform then FSK demodulate the TAG ID from it
+// loop to get raw HID waveform then FSK demodulate the TAG ID from it
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, n=0, i=0, idx=0, found=0, lastval=0;
-  uint32_t hi2=0, hi=0, lo=0;
 
-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       size_t size=0; //, found=0;
+       uint32_t hi2=0, hi=0, lo=0;
 
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
 
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
+       while(!BUTTON_PRESS()) {
 
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
 
-       for(;;) {
+               DoAcquisition125k_internal(-1,true);
+               size  = sizeof(BigBuf);
+    if (size < 2000) continue; 
+               // FSK demodulator
+
+               int bitLen = HIDdemodFSK(dest,size,&hi2,&hi,&lo);
+               
                WDT_HIT();
-               if (ledcontrol)
-                       LED_A_ON();
-               if(BUTTON_PRESS()) {
-                       DbpString("Stopped");
-                       if (ledcontrol)
-                               LED_A_OFF();
-                       return;
-               }
 
-               i = 0;
-               m = sizeof(BigBuf);
-               memset(dest,128,m);
-               for(;;) {
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-                               AT91C_BASE_SSC->SSC_THR = 0x43;
-                               if (ledcontrol)
-                                       LED_D_ON();
-                       }
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-                               dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                               // we don't care about actual value, only if it's more or less than a
-                               // threshold essentially we capture zero crossings for later analysis
-                               if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
-                               i++;
-                               if (ledcontrol)
-                                       LED_D_OFF();
-                               if(i >= m) {
-                                       break;
+               if (bitLen>0 && lo>0){
+               // final loop, go over previously decoded manchester data and decode into usable tag ID
+               // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
+                       if (hi2 != 0){ //extra large HID tags
+                               Dbprintf("TAG ID: %x%08x%08x (%d)",
+                                        (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+                       }else {  //standard HID tags <38 bits
+                               //Dbprintf("TAG ID: %x%08x (%d)",(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF); //old print cmd
+                               uint8_t bitlen = 0;
+                               uint32_t fc = 0;
+                               uint32_t cardnum = 0;
+                               if (((hi>>5)&1)==1){//if bit 38 is set then < 37 bit format is used
+                                       uint32_t lo2=0;
+                                       lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
+                                       uint8_t idx3 = 1;
+                                       while(lo2>1){ //find last bit set to 1 (format len bit)
+                                               lo2=lo2>>1;
+                                               idx3++;
+                                       }
+                                       bitlen =idx3+19;  
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen==26){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc = (lo>>17)&0xFF;
+                                       }
+                                       if(bitlen==37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);
+                                       }
+                                       if(bitlen==34){
+                                               cardnum = (lo>>1)&0xFFFF;
+                                               fc= ((hi&1)<<15)|(lo>>17);
+                                       }
+                                       if(bitlen==35){
+                                               cardnum = (lo>>1)&0xFFFFF;
+                                               fc = ((hi&1)<<11)|(lo>>21);
+                                       }
+                               }
+                               else { //if bit 38 is not set then 37 bit format is used
+                                       bitlen= 37;
+                                       fc =0;
+                                       cardnum=0;
+                                       if(bitlen==37){
+                                               cardnum = (lo>>1)&0x7FFFF;
+                                               fc = ((hi&0xF)<<12)|(lo>>20);
+                                       }
                                }
+                                               //Dbprintf("TAG ID: %x%08x (%d)",
+                               // (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);                              
+                               Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
+                                       (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF,
+                                       (unsigned int) bitlen, (unsigned int) fc, (unsigned int) cardnum);
+                       }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               return;
                        }
+                       // reset
+                       hi2 = hi = lo = 0;
                }
+               WDT_HIT();
+               //SpinDelay(50);
+       }       
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}
 
-               // FSK demodulator
+void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
 
-               // sync to first lo-hi transition
-               for( idx=1; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx])
-                               lastval=idx;
-                               break;
-               }
-               WDT_HIT();
+       size_t size=0; //, found=0;
+       int bitLen=0;
+       int clk=0, invert=0, errCnt=0;
+       uint64_t lo=0;
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
 
-               // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
-               // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
-               // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
-               for( i=0; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx]) {
-                               dest[i]=idx-lastval;
-                               if (dest[i] <= 8) {
-                                               dest[i]=1;
-                               } else {
-                                               dest[i]=0;
-                               }
+       while(!BUTTON_PRESS()) {
 
-                               lastval=idx;
-                               i++;
-                       }
-               }
-               m=i;
                WDT_HIT();
+               if (ledcontrol) LED_A_ON();
 
-               // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
-               lastval=dest[0];
-               idx=0;
-               i=0;
-               n=0;
-               for( idx=0; idx<m; idx++) {
-                       if (dest[idx]==lastval) {
-                               n++;
-                       } else {
-                               // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,
-                               // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets
-                               // swallowed up by rounding
-                               // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding
-                               // special start of frame markers use invalid manchester states (no transitions) by using sequences
-                               // like 111000
-                               if (dest[idx-1]) {
-                                       n=(n+1)/6;                      // fc/8 in sets of 6
-                               } else {
-                                       n=(n+1)/5;                      // fc/10 in sets of 5
-                               }
-                               switch (n) {                    // stuff appropriate bits in buffer
-                                       case 0:
-                                       case 1: // one bit
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 2: // two bits
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 3: // 3 bit start of frame markers
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       // When a logic 0 is immediately followed by the start of the next transmisson
-                                       // (special pattern) a pattern of 4 bit duration lengths is created.
-                                       case 4:
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       default:        // this shouldn't happen, don't stuff any bits
-                                               break;
-                               }
-                               n=0;
-                               lastval=dest[idx];
+               DoAcquisition125k_internal(-1,true);
+               size  = sizeof(BigBuf);
+    if (size < 2000) continue; 
+               // FSK demodulator
+     //int askmandemod(uint8_t *BinStream,uint32_t *BitLen,int *clk, int *invert);
+    bitLen=size;
+    //Dbprintf("DEBUG: Buffer got");
+    errCnt = askmandemod(dest,&bitLen,&clk,&invert); //HIDdemodFSK(dest,size,&hi2,&hi,&lo);
+               //Dbprintf("DEBUG: ASK Got");
+               WDT_HIT();
+
+               if (errCnt>=0){
+                       lo = Em410xDecode(dest,bitLen);
+                       //Dbprintf("DEBUG: EM GOT");
+               //printEM410x(lo);
+               if (lo>0){
+               Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",(uint32_t)(lo>>32),(uint32_t)lo,(uint32_t)(lo&0xFFFF),(uint32_t)((lo>>16LL) & 0xFF),(uint32_t)(lo & 0xFFFFFF));
+       }
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               return;
                        }
+               } else{
+                       //Dbprintf("DEBUG: No Tag");
                }
-               m=i;
                WDT_HIT();
+               lo = 0;
+               clk=0;
+    invert=0;
+               errCnt=0;
+               size=0;
+               //SpinDelay(50);
+       }       
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}
 
-               // final loop, go over previously decoded manchester data and decode into usable tag ID
-               // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
-               for( idx=0; idx<m-6; idx++) {
-                       // search for a start of frame marker
-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-        if (found && (hi2|hi|lo)) {
-          if (hi2 != 0){
-            Dbprintf("TAG ID: %x%08x%08x (%d)",
-                     (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-          }
-          else {
-            Dbprintf("TAG ID: %x%08x (%d)",
-                     (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-          }
-                                       /* if we're only looking for one tag */
-                                       if (findone)
-                                       {
-                                               *high = hi;
-                                               *low = lo;
-                                               return;
-                                       }
-          hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
-                               }
-                       }
-                       if (found) {
-                               if (dest[idx] && (!dest[idx+1]) ) {
-          hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|0;
-                               } else if ( (!dest[idx]) && dest[idx+1]) {
-          hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|1;
-                               } else {
-                                       found=0;
-          hi2=0;
-                                       hi=0;
-                                       lo=0;
-                               }
-                               idx++;
+void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
+       size_t size=0;
+       int idx=0;
+       uint32_t code=0, code2=0;
+  uint8_t version=0;
+  uint8_t facilitycode=0;
+  uint16_t number=0;
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+       
+       while(!BUTTON_PRESS()) {
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+               DoAcquisition125k_internal(-1,true);
+               size  = sizeof(BigBuf);
+               //make sure buffer has data
+               if (size < 2000) continue;
+               //fskdemod and get start index
+               WDT_HIT();
+               idx = IOdemodFSK(dest,size);
+               if (idx>0){
+                       //valid tag found
+
+                       //Index map
+                       //0           10          20          30          40          50          60
+                       //|           |           |           |           |           |           |
+                       //01234567 8 90123456 7 89012345 6 78901234 5 67890123 4 56789012 3 45678901 23
+                       //-----------------------------------------------------------------------------
+                       //00000000 0 11110000 1 facility 1 version* 1 code*one 1 code*two 1 ???????? 11
+                       //
+                       //XSF(version)facility:codeone+codetwo
+                       //Handle the data
+      if(findone){ //only print binary if we are doing one
+               Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7],dest[idx+8]);
+                   Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15],dest[idx+16],dest[idx+17]);                         
+                   Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23],dest[idx+24],dest[idx+25],dest[idx+26]);
+                   Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31],dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35]);
+                   Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39],dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44]);
+                   Dbprintf("%d%d%d%d%d%d%d%d %d",dest[idx+45],dest[idx+46],dest[idx+47],dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53]);
+                   Dbprintf("%d%d%d%d%d%d%d%d %d%d",dest[idx+54],dest[idx+55],dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
                        }
-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-                               if (found && (hi|lo)) {
-          if (hi2 != 0){
-            Dbprintf("TAG ID: %x%08x%08x (%d)",
-                     (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-          }
-          else {
-            Dbprintf("TAG ID: %x%08x (%d)",
-                     (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-          }
-                                       /* if we're only looking for one tag */
-                                       if (findone)
-                                       {
-                                               *high = hi;
-                                               *low = lo;
-                                               return;
-                                       }
-          hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
-                               }
+                       code = bytebits_to_byte(dest+idx,32);
+           code2 = bytebits_to_byte(dest+idx+32,32); 
+           version = bytebits_to_byte(dest+idx+27,8); //14,4
+           facilitycode = bytebits_to_byte(dest+idx+18,8) ;
+           number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
+           
+           Dbprintf("XSF(%02d)%02x:%05d (%08x%08x)",version,facilitycode,number,code,code2);                   
+                       // if we're only looking for one tag 
+                       if (findone){
+                               if (ledcontrol) LED_A_OFF();
+                               //LED_A_OFF();
+                               return;
                        }
-               }
+                       code=code2=0;
+                       version=facilitycode=0;
+                       number=0;
+                       idx=0;
+               }       
                WDT_HIT();
        }
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
 }
 
 /*------------------------------
@@ -872,8 +911,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 // Write one bit to card
 void T55xxWriteBit(int bit)
 {
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        if (bit == 0)
                SpinDelayUs(WRITE_0);
        else
@@ -885,10 +925,12 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
-       unsigned int i;
+       //unsigned int i;  //enio adjustment 12/10/14
+       uint32_t i;
 
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -920,7 +962,7 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
        // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
        SpinDelay(20);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
@@ -929,8 +971,9 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, i=0;
-  
+       //int m=0, i=0; //enio adjustment 12/10/14
+       uint32_t m=0, i=0;
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);
@@ -941,7 +984,7 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
   
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
   
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -967,7 +1010,7 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
   
        // Now do the acquisition
        i = 0;
@@ -995,6 +1038,7 @@ void T55xxReadTrace(void){
        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;
   
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);
@@ -1005,7 +1049,7 @@ void T55xxReadTrace(void){
   
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
   
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
@@ -1021,7 +1065,7 @@ void T55xxReadTrace(void){
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
   
        // Now do the acquisition
        i = 0;
@@ -1164,6 +1208,26 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
        DbpString("DONE!");
 }
 
+void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
+{
+   int data1=0, data2=0; //up to six blocks for long format
+       
+    data1 = hi;  // load preamble
+    data2 = lo;
+    
+    LED_D_ON();
+    // Program the data blocks for supplied ID
+    // and the block 0 for HID format
+    T55xxWriteBlock(data1,1,0,0);
+    T55xxWriteBlock(data2,2,0,0);
+       
+    //Config Block
+    T55xxWriteBlock(0x00147040,0,0,0);
+    LED_D_OFF();
+       
+    DbpString("DONE!");
+}
+
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER          0x1FF
 #define EM410X_ID_LENGTH       40
@@ -1175,6 +1239,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        uint64_t rev_id = 0;    // reversed ID
        int c_parity[4];        // column parity
        int r_parity = 0;       // row parity
+       uint32_t clock = 0;
 
        // Reverse ID bits given as parameter (for simpler operations)
        for (i = 0; i < EM410X_ID_LENGTH; ++i) {
@@ -1232,12 +1297,35 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        T55xxWriteBlock((uint32_t)id, 2, 0, 0);
 
        // Config for EM410x (RF/64, Manchester, Maxblock=2)
-       if (card)
+       if (card) {
+               // Clock rate is stored in bits 8-15 of the card value
+               clock = (card & 0xFF00) >> 8;
+               Dbprintf("Clock rate: %d", clock);
+               switch (clock)
+               {
+                       case 32:
+                               clock = T55x7_BITRATE_RF_32;
+                               break;
+                       case 16:
+                               clock = T55x7_BITRATE_RF_16;
+                               break;
+                       case 0:
+                               // A value of 0 is assumed to be 64 for backwards-compatibility
+                               // Fall through...
+                       case 64:
+                               clock = T55x7_BITRATE_RF_64;
+                               break;      
+                       default:
+                               Dbprintf("Invalid clock rate: %d", clock);
+                               return;
+               }
+
                // Writing configuration for T55x7 tag
-               T55xxWriteBlock(T55x7_BITRATE_RF_64         |
+               T55xxWriteBlock(clock       |
                                T55x7_MODULATION_MANCHESTER |
                                2 << T55x7_MAXBLOCK_SHIFT,
                                0, 0, 0);
+  }
        else
                // Writing configuration for T5555(Q5) tag
                T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
@@ -1344,78 +1432,81 @@ int DemodPCF7931(uint8_t **outBlocks) {
        
        for (bitidx = 0; i < GraphTraceLen; i++)
        {
-    if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
-    {
-      lc = i - lastval;
-      lastval = i;
-      
-      // Switch depending on lc length:
-      // Tolerance is 1/8 of clock rate (arbitrary)
-      if (abs(lc-clock/4) < tolerance) {
-        // 16T0
-        if((i - pmc) == lc) { /* 16T0 was previous one */
-          /* It's a PMC ! */
-          i += (128+127+16+32+33+16)-1;
-          lastval = i;
-          pmc = 0;
-          block_done = 1;
-        }
-        else {
-          pmc = i;
-        }
-      } else if (abs(lc-clock/2) < tolerance) {
-        // 32TO
-        if((i - pmc) == lc) { /* 16T0 was previous one */
-          /* It's a PMC ! */
-          i += (128+127+16+32+33)-1;
-          lastval = i;
-          pmc = 0;
-          block_done = 1;
-        }
-        else if(half_switch == 1) {
-          BitStream[bitidx++] = 0;
-          half_switch = 0;
-        }
-        else
-          half_switch++;
-      } else if (abs(lc-clock) < tolerance) {
-        // 64TO
-        BitStream[bitidx++] = 1;
-      } else {
-        // Error
-        warnings++;
-        if (warnings > 10)
-        {
-          Dbprintf("Error: too many detection errors, aborting.");
-          return 0;
-        }
-      }
-      
-      if(block_done == 1) {
-        if(bitidx == 128) {
-          for(j=0; j<16; j++) {
-            Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
-            64*BitStream[j*8+6]+
-            32*BitStream[j*8+5]+
-            16*BitStream[j*8+4]+
-            8*BitStream[j*8+3]+
-            4*BitStream[j*8+2]+
-            2*BitStream[j*8+1]+
-            BitStream[j*8];
-          }
-          num_blocks++;
-        }
-        bitidx = 0;
-        block_done = 0;
-        half_switch = 0;
-      }
-      if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
-      else dir = 1;
-    }
-    if(bitidx==255)
-      bitidx=0;
-    warnings = 0;
-    if(num_blocks == 4) break;
+           if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+           {
+             lc = i - lastval;
+             lastval = i;
+             
+             // Switch depending on lc length:
+             // Tolerance is 1/8 of clock rate (arbitrary)
+             if (abs(lc-clock/4) < tolerance) {
+               // 16T0
+               if((i - pmc) == lc) { /* 16T0 was previous one */
+                 /* It's a PMC ! */
+                 i += (128+127+16+32+33+16)-1;
+                 lastval = i;
+                 pmc = 0;
+                 block_done = 1;
+               }
+               else {
+                 pmc = i;
+               }
+             } else if (abs(lc-clock/2) < tolerance) {
+               // 32TO
+               if((i - pmc) == lc) { /* 16T0 was previous one */
+                 /* It's a PMC ! */
+                 i += (128+127+16+32+33)-1;
+                 lastval = i;
+                 pmc = 0;
+                 block_done = 1;
+               }
+               else if(half_switch == 1) {
+                 BitStream[bitidx++] = 0;
+                 half_switch = 0;
+               }
+               else
+                 half_switch++;
+             } else if (abs(lc-clock) < tolerance) {
+               // 64TO
+               BitStream[bitidx++] = 1;
+             } else {
+               // Error
+               warnings++;
+               if (warnings > 10)
+               {
+                 Dbprintf("Error: too many detection errors, aborting.");
+                 return 0;
+               }
+             }
+             
+             if(block_done == 1) {
+               if(bitidx == 128) {
+                 for(j=0; j<16; j++) {
+                   Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
+                   64*BitStream[j*8+6]+
+                   32*BitStream[j*8+5]+
+                   16*BitStream[j*8+4]+
+                   8*BitStream[j*8+3]+
+                   4*BitStream[j*8+2]+
+                   2*BitStream[j*8+1]+
+                   BitStream[j*8];
+                 }
+                 num_blocks++;
+               }
+               bitidx = 0;
+               block_done = 0;
+               half_switch = 0;
+             }
+             if(i < GraphTraceLen)
+             {
+                     if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+                     else dir = 1;             
+             }
+           }
+           if(bitidx==255)
+             bitidx=0;
+           warnings = 0;
+           if(num_blocks == 4) break;
        }
        memcpy(outBlocks, Blocks, 16*num_blocks);
        return num_blocks;
@@ -1666,8 +1757,9 @@ void SendForward(uint8_t fwd_bit_count) {
   LED_D_ON();
   
   //Field on
+  FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
   FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
   
   // Give it a bit of time for the resonant antenna to settle.
   // And for the tag to fully power up
@@ -1679,7 +1771,7 @@ void SendForward(uint8_t fwd_bit_count) {
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
   SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
   FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);//field on
+  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
   SpinDelayUs(16*8); //16 cycles on (8us each)
   
   // now start writting
@@ -1691,7 +1783,7 @@ void SendForward(uint8_t fwd_bit_count) {
       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
       SpinDelayUs(23*8); //16-4 cycles off (8us each)
       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-      FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);//field on
+      FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
       SpinDelayUs(9*8); //16 cycles on (8us each)
     }
   }
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