/* Device descriptor */\r
0x12, // bLength\r
0x01, // bDescriptorType\r
- 0x10,0x01, // Complies with USB Spec. Release (0110h = release 1.10)\r
+ //0x10,0x01, // Complies with USB Spec. Release (0110h = release 1.10)\r
+ 0x00,0x02, // Complies with USB Spec. Release (0110h = release 2.00)\r
0x02, // bDeviceClass: CDC class code\r
0x00, // bDeviceSubclass: CDC class sub code\r
0x00, // bDeviceProtocol: CDC Device protocol\r
0x01,0x00, // Device release number (0001)\r
0x01, // iManufacturer // 0x01\r
0x00, // iProduct\r
- 0x00, // SerialNumber\r
+ 0xFD, // SerialNumber\r
0x01 // bNumConfigs\r
};\r
\r
0x01, // CbConfigurationValue\r
0x00, // CiConfiguration\r
0xC0, // CbmAttributes 0xA0\r
- 0x00, // CMaxPower\r
+ 0xFA, // CMaxPower\r
\r
/* Communication Class Interface Descriptor Requirement */\r
0x09, // bLength\r
0x01, // bNumEndpoints\r
0x02, // bInterfaceClass\r
0x02, // bInterfaceSubclass\r
- 0x00, // bInterfaceProtocol\r
+ 0x01, // bInterfaceProtocol\r
0x00, // iInterface\r
\r
/* Header Functional Descriptor */\r
0x04, // bFunctionLength\r
0x24, // bDescriptor Type: CS_INTERFACE\r
0x02, // bDescriptor Subtype: ACM Func Desc\r
- 0x00, // bmCapabilities\r
+ 0x02, // bmCapabilities\r
\r
/* Union Functional Descriptor */\r
0x05, // bFunctionLength\r
};\r
\r
const char strDescriptor[] = {\r
- 26, // Length\r
+ 26, // Length\r
0x03, // Type is string\r
'p', 0x00,\r
'r', 0x00,\r
'g', 0x00,\r
};\r
\r
-\r
+// Bitmap for all status bits in CSR.\r
+#define REG_NO_EFFECT_1_ALL AT91C_UDP_RX_DATA_BK0 | AT91C_UDP_RX_DATA_BK1 \\r
+ |AT91C_UDP_STALLSENT | AT91C_UDP_RXSETUP \\r
+ |AT91C_UDP_TXCOMP\r
+\r
+// Clear flags in the UDP_CSR register and waits for synchronization\r
+#define UDP_CLEAR_EP_FLAGS(endpoint, flags) { \\r
+ volatile unsigned int reg; \\r
+ reg = pUdp->UDP_CSR[(endpoint)]; \\r
+ reg |= REG_NO_EFFECT_1_ALL; \\r
+ reg &= ~(flags); \\r
+ pUdp->UDP_CSR[(endpoint)] = reg; \\r
+ while ( (pUdp->UDP_CSR[(endpoint)] & (flags)) == (flags)); \\r
+} \\r
+\r
+// reset flags in the UDP_CSR register and waits for synchronization\r
+#define UDP_SET_EP_FLAGS(endpoint, flags) { \\r
+ volatile unsigned int reg; \\r
+ reg = pUdp->UDP_CSR[(endpoint)]; \\r
+ reg |= REG_NO_EFFECT_1_ALL; \\r
+ reg |= (flags); \\r
+ pUdp->UDP_CSR[(endpoint)] = reg; \\r
+ while ( ( pUdp->UDP_CSR[(endpoint)] & (flags)) != (flags)); \\r
+} \\r
+\r
+ \r
/* USB standard request code */\r
#define STD_GET_STATUS_ZERO 0x0080\r
#define STD_GET_STATUS_INTERFACE 0x0081\r
//* \brief This function deactivates the USB device\r
//*----------------------------------------------------------------------------\r
void usb_disable() {\r
- // Disconnect the USB device\r
- AT91C_BASE_PIOA->PIO_ODR = GPIO_USB_PU;\r
- \r
- // Clear all lingering interrupts\r
- if(pUdp->UDP_ISR & AT91C_UDP_ENDBUSRES) {\r
- pUdp->UDP_ICR = AT91C_UDP_ENDBUSRES;\r
- }\r
+ // Disconnect the USB device\r
+ AT91C_BASE_PIOA->PIO_ODR = GPIO_USB_PU;\r
+\r
+ // Clear all lingering interrupts\r
+ if(pUdp->UDP_ISR & AT91C_UDP_ENDBUSRES) {\r
+ pUdp->UDP_ICR = AT91C_UDP_ENDBUSRES;\r
+ }\r
}\r
\r
//*----------------------------------------------------------------------------\r
//* \brief This function Activates the USB device\r
//*----------------------------------------------------------------------------\r
void usb_enable() {\r
- // Set the PLL USB Divider\r
- AT91C_BASE_CKGR->CKGR_PLLR |= AT91C_CKGR_USBDIV_1 ;\r
- \r
- // Specific Chip USB Initialisation\r
- // Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock\r
- AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;\r
- AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);\r
- \r
- // Enable UDP PullUp (USB_DP_PUP) : enable & Clear of the corresponding PIO\r
- // Set in PIO mode and Configure in Output\r
- AT91C_BASE_PIOA->PIO_PER = GPIO_USB_PU; // Set in PIO mode\r
+ // Set the PLL USB Divider\r
+ AT91C_BASE_CKGR->CKGR_PLLR |= AT91C_CKGR_USBDIV_1 ;\r
+\r
+ // Specific Chip USB Initialisation\r
+ // Enables the 48MHz USB clock UDPCK and System Peripheral USB Clock\r
+ AT91C_BASE_PMC->PMC_SCER = AT91C_PMC_UDP;\r
+ AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_UDP);\r
+\r
+ // Enable UDP PullUp (USB_DP_PUP) : enable & Clear of the corresponding PIO\r
+ // Set in PIO mode and Configure in Output\r
+ AT91C_BASE_PIOA->PIO_PER = GPIO_USB_PU; // Set in PIO mode\r
AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU; // Configure as Output\r
- \r
- // Clear for set the Pullup resistor\r
+\r
+ // Clear for set the Pullup resistor\r
AT91C_BASE_PIOA->PIO_CODR = GPIO_USB_PU;\r
- \r
- // Disconnect and reconnect USB controller for 100ms\r
- usb_disable();\r
- \r
- // Wait for a short while\r
- for (volatile size_t i=0; i<0x100000; i++);\r
\r
- // Reconnect USB reconnect\r
- AT91C_BASE_PIOA->PIO_SODR = GPIO_USB_PU;\r
- AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU;\r
+ // Disconnect and reconnect USB controller for 100ms\r
+ usb_disable();\r
+\r
+ // Wait for a short while\r
+ for (volatile size_t i=0; i<0x100000; i++);\r
+ //sleep(1);\r
+ \r
+ // Reconnect USB reconnect\r
+ AT91C_BASE_PIOA->PIO_SODR = GPIO_USB_PU;\r
+ AT91C_BASE_PIOA->PIO_OER = GPIO_USB_PU;\r
}\r
\r
//*----------------------------------------------------------------------------\r
\r
bool usb_poll()\r
{\r
- if (!usb_check()) return false;\r
- return (pUdp->UDP_CSR[AT91C_EP_OUT] & btReceiveBank);\r
+ if (!usb_check()) return false;\r
+ return (pUdp->UDP_CSR[AT91C_EP_OUT] & btReceiveBank);\r
+}\r
+\r
+/**\r
+ In github PR #129, some users appears to get a false positive from\r
+ usb_poll, which returns true, but the usb_read operation\r
+ still returns 0.\r
+ This check is basically the same as above, but also checks\r
+ that the length available to read is non-zero, thus hopefully fixes the\r
+ bug.\r
+**/\r
+bool usb_poll_validate_length()\r
+{\r
+ if (!usb_check()) return false;\r
+ if (!(pUdp->UDP_CSR[AT91C_EP_OUT] & btReceiveBank)) return false;\r
+ return (pUdp->UDP_CSR[AT91C_EP_OUT] >> 16) > 0;\r
}\r
\r
//*----------------------------------------------------------------------------\r
//* \brief Read available data from Endpoint OUT\r
//*----------------------------------------------------------------------------\r
uint32_t usb_read(byte_t* data, size_t len) {\r
- byte_t bank = btReceiveBank;\r
+ byte_t bank = btReceiveBank;\r
uint32_t packetSize, nbBytesRcv = 0;\r
- uint32_t time_out = 0;\r
+ uint32_t time_out = 0;\r
\r
while (len) {\r
if (!usb_check()) break;\r
\r
if ( pUdp->UDP_CSR[AT91C_EP_OUT] & bank ) {\r
packetSize = MIN(pUdp->UDP_CSR[AT91C_EP_OUT] >> 16, len);\r
- len -= packetSize;\r
+ len -= packetSize;\r
while(packetSize--)\r
data[nbBytesRcv++] = pUdp->UDP_FDR[AT91C_EP_OUT];\r
- pUdp->UDP_CSR[AT91C_EP_OUT] &= ~(bank);\r
- if (bank == AT91C_UDP_RX_DATA_BK0) {\r
+\r
+ \r
+ UDP_CLEAR_EP_FLAGS(AT91C_EP_OUT, bank) \r
+ //pUdp->UDP_CSR[AT91C_EP_OUT] &= ~(bank);\r
+\r
+ if (bank == AT91C_UDP_RX_DATA_BK0)\r
bank = AT91C_UDP_RX_DATA_BK1;\r
- } else {\r
- bank = AT91C_UDP_RX_DATA_BK0;\r
- }\r
+ else\r
+ bank = AT91C_UDP_RX_DATA_BK0; \r
}\r
- if (time_out++ == 0x1fff) break;\r
+ if (time_out++ == 0x1fff) break;\r
}\r
\r
btReceiveBank = bank;\r
//* \brief Send through endpoint 2\r
//*----------------------------------------------------------------------------\r
uint32_t usb_write(const byte_t* data, const size_t len) {\r
- size_t length = len;\r
+ size_t length = len;\r
uint32_t cpt = 0;\r
\r
- if (!length) return 0;\r
- if (!usb_check()) return 0;\r
+ if (!length) return 0;\r
+ if (!usb_check()) return 0;\r
\r
// Send the first packet\r
cpt = MIN(length, AT91C_EP_IN_SIZE-1);\r
length -= cpt;\r
while (cpt--) pUdp->UDP_FDR[AT91C_EP_IN] = *data++;\r
- pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;\r
+\r
+ UDP_SET_EP_FLAGS(AT91C_EP_IN, AT91C_UDP_TXPKTRDY)\r
+ //pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;\r
\r
while (length) {\r
// Fill the second bank\r
cpt = MIN(length, AT91C_EP_IN_SIZE-1);\r
length -= cpt;\r
while (cpt--) pUdp->UDP_FDR[AT91C_EP_IN] = *data++;\r
- // Wait for the the first bank to be sent\r
+ // Wait for the first bank to be sent\r
while (!(pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP)) {\r
if (!usb_check()) return length;\r
- }\r
- pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);\r
- while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);\r
- pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;\r
+ }\r
+ \r
+ UDP_CLEAR_EP_FLAGS(AT91C_EP_IN, AT91C_UDP_TXCOMP)\r
+ //pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP); \r
+ //while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);\r
+ \r
+ UDP_SET_EP_FLAGS(AT91C_EP_IN, AT91C_UDP_TXPKTRDY)\r
+ //pUdp->UDP_CSR[AT91C_EP_IN] |= AT91C_UDP_TXPKTRDY;\r
}\r
\r
// Wait for the end of transfer\r
while (!(pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP)) {\r
if (!usb_check()) return length;\r
- }\r
- \r
- pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);\r
- while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);\r
+ }\r
+\r
+ UDP_CLEAR_EP_FLAGS(AT91C_EP_IN, AT91C_UDP_TXCOMP)\r
+ //pUdp->UDP_CSR[AT91C_EP_IN] &= ~(AT91C_UDP_TXCOMP);\r
+ //while (pUdp->UDP_CSR[AT91C_EP_IN] & AT91C_UDP_TXCOMP);\r
\r
return length;\r
}\r
pUdp->UDP_FDR[0] = *pData++;\r
\r
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {\r
- pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
- while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
+ \r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_TXCOMP)\r
+ //pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
+ //while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
}\r
\r
- pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;\r
+ UDP_SET_EP_FLAGS(0, AT91C_UDP_TXPKTRDY)\r
+ // pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;\r
do {\r
csr = pUdp->UDP_CSR[0];\r
\r
// Data IN stage has been stopped by a status OUT\r
if (csr & AT91C_UDP_RX_DATA_BK0) {\r
- pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);\r
+ \r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_RX_DATA_BK0)\r
+ //pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);\r
return;\r
}\r
} while ( !(csr & AT91C_UDP_TXCOMP) );\r
} while (length);\r
\r
if (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) {\r
- pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
- while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
+ \r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_TXCOMP)\r
+ //pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
+ //while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
}\r
}\r
\r
//* \brief Send zero length packet through the control endpoint\r
//*----------------------------------------------------------------------------\r
void AT91F_USB_SendZlp(AT91PS_UDP pUdp) {\r
- pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;\r
+\r
+ UDP_SET_EP_FLAGS(0, AT91C_UDP_TXPKTRDY)\r
+ //pUdp->UDP_CSR[0] |= AT91C_UDP_TXPKTRDY;\r
+ \r
while ( !(pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP) );\r
- pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
- while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
+ \r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_TXCOMP)\r
+ //pUdp->UDP_CSR[0] &= ~(AT91C_UDP_TXCOMP);\r
+ //while (pUdp->UDP_CSR[0] & AT91C_UDP_TXCOMP);\r
}\r
\r
//*----------------------------------------------------------------------------\r
void AT91F_USB_SendStall(AT91PS_UDP pUdp) {\r
pUdp->UDP_CSR[0] |= AT91C_UDP_FORCESTALL;\r
while ( !(pUdp->UDP_CSR[0] & AT91C_UDP_ISOERROR) );\r
+ \r
pUdp->UDP_CSR[0] &= ~(AT91C_UDP_FORCESTALL | AT91C_UDP_ISOERROR);\r
while (pUdp->UDP_CSR[0] & (AT91C_UDP_FORCESTALL | AT91C_UDP_ISOERROR));\r
}\r
wLength |= (pUdp->UDP_FDR[0] << 8);\r
\r
if (bmRequestType & 0x80) {\r
- pUdp->UDP_CSR[0] |= AT91C_UDP_DIR;\r
- while ( !(pUdp->UDP_CSR[0] & AT91C_UDP_DIR) );\r
+\r
+ UDP_SET_EP_FLAGS(0, AT91C_UDP_DIR)\r
+ //pUdp->UDP_CSR[0] |= AT91C_UDP_DIR;\r
+ //while ( !(pUdp->UDP_CSR[0] & AT91C_UDP_DIR) );\r
}\r
- pUdp->UDP_CSR[0] &= ~AT91C_UDP_RXSETUP;\r
- while ( (pUdp->UDP_CSR[0] & AT91C_UDP_RXSETUP) );\r
+ \r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_RXSETUP)\r
+ //pUdp->UDP_CSR[0] &= ~AT91C_UDP_RXSETUP;\r
+ //while ( (pUdp->UDP_CSR[0] & AT91C_UDP_RXSETUP) );\r
\r
// Handle supported standard device request Cf Table 9-3 in USB specification Rev 1.1\r
switch ((bRequest << 8) | bmRequestType) {\r
// handle CDC class requests\r
case SET_LINE_CODING:\r
while ( !(pUdp->UDP_CSR[0] & AT91C_UDP_RX_DATA_BK0) );\r
- pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);\r
+ UDP_CLEAR_EP_FLAGS(0, AT91C_UDP_RX_DATA_BK0)\r
+ //pUdp->UDP_CSR[0] &= ~(AT91C_UDP_RX_DATA_BK0);\r
AT91F_USB_SendZlp(pUdp);\r
break;\r
case GET_LINE_CODING:\r
projects / proxmark3-svn / blobdiff