( 1 << 24) | // Delay between Consecutive Transfers (32 MCK periods)\r
( 1 << 16) | // Delay Before SPCK (1 MCK period)\r
( 6 << 8) | // Serial Clock Baud Rate (baudrate = MCK/6 = 24Mhz/6 = 4M baud\r
- ( 0 << 4) | // Bits per Transfer (8 bits)\r
+ ( 8 << 4) | // Bits per Transfer (16 bits)\r
( 0 << 3) | // Chip Select inactive after transfer\r
( 1 << 1) | // Clock Phase data captured on leading edge, changes on following edge\r
( 0 << 0); // Clock Polarity inactive state is logic 0\r
LED_D_OFF();\r
}\r
\r
+//-----------------------------------------------------------------------------\r
+// Send a 16 bit command/data pair to the FPGA.\r
+// The bit format is: C3 C2 C1 C0 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0\r
+// where C is the 4 bit command and D is the 12 bit data\r
+//-----------------------------------------------------------------------------\r
+void FpgaSendCommand(WORD cmd, WORD v)\r
+{\r
+ SetupSpi(SPI_FPGA_MODE);\r
+ while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete\r
+ SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | cmd | v; // send the data\r
+}\r
//-----------------------------------------------------------------------------\r
// Write the FPGA setup word (that determines what mode the logic is in, read\r
-// vs. clone vs. etc.).\r
+// vs. clone vs. etc.). This is now a special case of FpgaSendCommand() to\r
+// avoid changing this function's occurence everywhere in the source code.\r
//-----------------------------------------------------------------------------\r
void FpgaWriteConfWord(BYTE v)\r
{\r
- SetupSpi(SPI_FPGA_MODE);\r
- while ((SPI_STATUS & SPI_STATUS_TX_EMPTY) == 0); // wait for the transfer to complete\r
- SPI_TX_DATA = SPI_CONTROL_LAST_TRANSFER | v; // send the data\r
+ FpgaSendCommand(FPGA_CMD_SET_CONFREG, v);\r
}\r
\r
//-----------------------------------------------------------------------------\r