replace msleep() by thread signalling in comms.c

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 112a11739f5d165053f7b70f9f5a4bef359f6fb5..995a8810ad6f856772e87a56111c475de9c29473 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,7 +17,7 @@
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"

-#include "usb_cdc.h" // for usb_poll_validate_length
+#include "usb_cdc.h"

 #include "fpgaloader.h"
 
 /**
 #include "fpgaloader.h"
 
 /**


@@ -1198,13 +1198,78 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * and enlarge the gap ones.
  * Q5 tags seems to have issues when these values changes. 
  */
  * and enlarge the gap ones.
  * Q5 tags seems to have issues when these values changes. 
  */

+
+ /*
+ // Original Timings for reference
+//note startgap must be sent after tag has been powered up for more than 3ms (per T5557 ds)
+ 

 #define START_GAP 31*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 #define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
 #define READ_GAP  15*8 
 #define START_GAP 31*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 #define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
 #define READ_GAP  15*8 

-// Long Leading Reference
-#define Reference_llr (136+18)*8  // Needs to be WRITR_0 + 136 clocks.
+
+*/
+/* Q5 timing datasheet:
+ * Type                  |  MIN   | Typical |  Max   |
+ * Start_Gap             |  10*8  |    ?    |  50*8  |
+ * Write_Gap Normal mode |   8*8  |   14*8  |  20*8  | 
+ * Write_Gap Fast Mode   |   8*8  |    ?    |  20*8  |
+ * Write_0   Normal mode |  16*8  |   24*8  |  32*8  |
+ * Write_1   Normal mode |  48*8  |   56*8  |  64*8  |
+ * Write_0   Fast Mode   |   8*8  |   12*8  |  16*8  |
+ * Write_1   Fast Mode   |  24*8  |   28*8  |  32*8  |
+*/
+
+/* T5557 timing datasheet:
+ * Type                  |  MIN   | Typical |  Max   |
+ * Start_Gap             |  10*8  |    ?    |  50*8  |
+ * Write_Gap Normal mode |   8*8  |50-150us |  30*8  | 
+ * Write_Gap Fast Mode   |   8*8  |    ?    |  20*8  |
+ * Write_0   Normal mode |  16*8  |   24*8  |  31*8  | 
+ * Write_1   Normal mode |  48*8  |   54*8  |  63*8  | 
+ * Write_0   Fast Mode   |   8*8  |   12*8  |  15*8  |
+ * Write_1   Fast Mode   |  24*8  |   28*8  |  31*8  |
+*/
+
+/* T5577C timing datasheet for Fixed-Bit-Length protocol (defualt):
+ * Type                  |  MIN   | Typical |  Max   |
+ * Start_Gap             |   8*8  |   15*8  |  50*8  |
+ * Write_Gap Normal mode |   8*8  |   10*8  |  20*8  | 
+ * Write_Gap Fast Mode   |   8*8  |   10*8  |  20*8  |
+ * Write_0   Normal mode |  16*8  |   24*8  |  32*8  | 
+ * Write_1   Normal mode |  48*8  |   56*8  |  64*8  | 
+ * Write_0   Fast Mode   |   8*8  |   12*8  |  16*8  |
+ * Write_1   Fast Mode   |  24*8  |   28*8  |  32*8  |
+*/
+
+// Structure to hold Timing values.  In future will be simplier to add user changable timings.
+typedef struct  {
+       uint16_t  START_GAP;
+       uint16_t  WRITE_GAP;
+       uint16_t  WRITE_0;
+       uint16_t  WRITE_1;
+       uint16_t  WRITE_2;
+       uint16_t  WRITE_3;
+       uint16_t  READ_GAP;
+} T55xx_Timing;
+
+// Set Initial/Default Values.  Note: *8 can occure when used.  This should keep things simplier here.
+T55xx_Timing T55xx_Timing_FixedBit = { 31 * 8   , 20 * 8   , 18 * 8 , 50 * 8 , 0      , 0      , 15 * 8   };
+T55xx_Timing T55xx_Timing_LLR      = { 31 * 8   , 20 * 8   , 18 * 8 , 50 * 8 , 0      , 0      , 15 * 8   };
+T55xx_Timing T55xx_Timing_Leading0 = { 31 * 8   , 20 * 8   , 18 * 8 , 40 * 8 , 0      , 0      , 15 * 8   };
+T55xx_Timing T55xx_Timing_1of4     = { 31 * 8   , 20 * 8   , 18 * 8 , 34 * 8 , 50 * 8 , 66 * 8 , 15 * 8   };
+
+// Some defines for readability
+#define T55xx_DLMode_Fixed         0 // Default Mode
+#define T55xx_DLMode_LLR           1 // Long Leading Reference
+#define T55xx_DLMode_Leading0      2 // Leading Zero
+#define T55xx_DLMode_1of4          3 // 1 of 4
+#define T55xx_LongLeadingReference 4 // Value to tell Write Bit to send long reference
+// Macro for code readability
+#define BitStream_Byte(X) ((X) >> 3)
+#define BitStream_Bit(X)  ((X) &  7)  
+

 
 void TurnReadLFOn(int delay) {
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
 void TurnReadLFOn(int delay) {
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);


@@ -1213,173 +1278,135 @@ void TurnReadLFOn(int delay) {
 }
 
 // Write one bit to card
 }
 
 // Write one bit to card

-void T55xxWriteBit(int bit) {
-       if (!bit)
-               TurnReadLFOn(WRITE_0);
-       else
-               TurnReadLFOn(WRITE_1);
+void T55xxWriteBit(int bit, T55xx_Timing *Timings) {
+
+       // If bit = 4 Send Long Leading Reference which is 138 + WRITE_0        
+       // Dbprintf ("Bits : %d",bit);
+       switch (bit){
+               case 0 : TurnReadLFOn(Timings->WRITE_0);             break; // Send bit  0/00
+               case 1 : TurnReadLFOn(Timings->WRITE_1);             break; // Send bit  1/01
+               case 2 : TurnReadLFOn(Timings->WRITE_2);             break; // Send bits   10
+               case 3 : TurnReadLFOn(Timings->WRITE_3);             break; // Send bits   11
+               case 4 : TurnReadLFOn(Timings->WRITE_0 + (136 * 8)); break; // Send Long Leading Reference
+       }

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       WaitUS(WRITE_GAP);
+       WaitUS(Timings->WRITE_GAP);

 }
 
 }
 

-void T55xxWrite_LLR (void)
+// Function to abstract an Arbitrary length byte array to store bit pattern.
+// bit_array    - Array to hold data/bit pattern
+// start_offset - bit location to start storing new bits.
+// data         - upto 32 bits of data to store
+// num_bits     - how many bits (low x bits of data)  Max 32 bits at a time
+// max_len         - how many bytes can the bit_array hold (ensure no buffer overflow)
+// returns "Next" bit offset / bits stored (for next store)
+//int T55xx_SetBits (uint8_t *bit_array, int start_offset, uint32_t data      , int num_bits, int max_len)
+int T55xx_SetBits (uint8_t *BitStream, uint8_t start_offset, uint32_t data , uint8_t num_bits, uint8_t max_len)

 {
 {

-       TurnReadLFOn (Reference_llr);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(WRITE_GAP);      
-}
+       int8_t offset;
+       int8_t NextOffset = start_offset;

 
 

-#define START_GAPlz 31*8 
-#define WRITE_GAPlz 20*8 
-#define WRITElz_0   18*8 
-#define WRITElz_1   40*8 
-#define READ_GAP  15*8 
+       // Check if data will fit.
+       if ((start_offset + num_bits) <= (max_len*8)) {
+               // Loop through the data and store
+               for (offset = (num_bits-1); offset >= 0; offset--) {

 
 

-void T55xxWriteBit_Leading0(int bit) {
-       if (!bit)
-               TurnReadLFOn(WRITElz_0);
-       else
-               TurnReadLFOn(WRITElz_1);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(WRITE_GAPlz);
-//     WaitUS(160);
+                       if ((data >> offset) & 1)  BitStream[BitStream_Byte(NextOffset)] |= (1         << BitStream_Bit(NextOffset));     // Set the bit to 1
+                       else                       BitStream[BitStream_Byte(NextOffset)] &= (0xff ^ (1 << BitStream_Bit(NextOffset)));    // Set the bit to 0
+
+                       NextOffset++;
+               }
+       }
+       else {
+               // Note: This should never happen unless some code changes cause it.  
+               // So short message for coders when testing.
+               Dbprintf ("T55 too many bits"); 
+       }
+       return NextOffset;

 }
 
 }
 

-#define START_GAP1of4 31*8 // SPEC:  1*8 to 50*8 - typ 10*8 (or 15fc)
-#define WRITE_GAP1of4 20*8 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
-//  00 = reference                     // 8 * 8 -  - 68 * 8
-#define WRITE1of4_00  18*8 // SPEC:  8*8 to 68*8 - typ 24*8 (or 24fc)
-#define WRITE1of4_01  34*8 // SPEC: dref+9  - dref+16 - dref+24 
-#define WRITE1of4_10  50*8 // SPEC: dref+25 - dref+32 - dref+40
-#define WRITE1of4_11  66*8 // SPEC: dref+41 - dref+48 - dref+56
-#define READ1of4_GAP  15*8 
+// Send one downlink command to the card 
+void T55xx_SendCMD (uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) { 

 
 

-void T55xxWriteBit_1of4(int bits) {
-       
-       switch (bits)
+       /*
+               arg bits
+               xxxxxxx1 0x01 PwdMode
+               xxxxxx1x 0x02 Page
+               xxxxx1xx 0x04 testMode
+               xxx11xxx 0x18 downlink mode
+               xx1xxxxx 0x20 !reg_readmode
+               x1xxxxxx 0x40 called for a read, so no data packet
+               1xxxxxxx 0x80 reset
+
+       */
+       bool PwdMode      = ((arg & 0x01) == 0x01);
+       bool Page         =  (arg & 0x02);
+       bool testMode     = ((arg & 0x04) == 0x04);
+       uint8_t downlink_mode = (arg >> 3) & 0x03;
+       bool reg_readmode = ((arg & 0x20) == 0x20);
+       bool read_cmd     = ((arg & 0x40) == 0x40);
+       bool reset        =  (arg & 0x80);
+
+       uint8_t i = 0;
+       uint8_t BitStream[10];  // Max Downlink Command size ~74 bits, so 10 bytes (80 bits)
+       uint8_t BitStreamLen;
+       T55xx_Timing *Timing;
+       uint8_t SendBits;
+
+       // Assigning Downlink Timeing for write
+       switch (downlink_mode)

        {
        {

-               case 0 :  TurnReadLFOn(WRITE1of4_00); break;
-               case 1 :  TurnReadLFOn(WRITE1of4_01); break;
-               case 2 :  TurnReadLFOn(WRITE1of4_10); break;
-               case 3 :  TurnReadLFOn(WRITE1of4_11); break;
+               case T55xx_DLMode_Fixed    : Timing = &T55xx_Timing_FixedBit;  break; 
+               case T55xx_DLMode_LLR      : Timing = &T55xx_Timing_LLR;       break;
+               case T55xx_DLMode_Leading0 : Timing = &T55xx_Timing_Leading0;  break;
+               case T55xx_DLMode_1of4     : Timing = &T55xx_Timing_1of4;      break;

                default:
                default:

-                       TurnReadLFOn(WRITE1of4_00);
-       }               
-
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(WRITE_GAP1of4);
-//     WaitUS(160);
-}
-
-void T55xxWriteBlockExt_Leading0 (uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
-
-       LED_A_ON();
-       bool PwdMode = arg & 0x1;
-       uint8_t Page = (arg & 0x2)>>1;
-       bool testMode = arg & 0x4;
-       uint32_t i = 0;
-       
-       // Set up FPGA, 125kHz
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       // Trigger T55x7 in mode.
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+                               Timing = &T55xx_Timing_FixedBit;
+       }

 
 

-       WaitUS(START_GAPlz);
+       // Build Bit Stream to send.
+       memset (BitStream,0x00,sizeof(BitStream));

        
        

+       BitStreamLen = 0; // Ensure 0 bit index to start.

        
        

-       /* 
-          0    : Leading Zero
-          11   : Opcode
-          00   : Fixed 00 if protected write (i.e. have password)
-          <32 bit Password>
-          0    : Lock Bit
-          <32 bit data> 
-          <3 bit addr>
-
-               Standard Write : 0 1p L <32 data bits> <3 bit addr>
-                                0 10 0 00000000000000000000000000000000 001
-               Protected Write: 0 1p 00 <32 pwd bits> L <32 data bits> <3 bit addr>
-                                            0 10 00 00000000000000000000000000000000 0 00000000000000000000000000000000 001
-               Wake Up                  0 10 00 <32 pwd bits>
-               Protected Read   0 1p 00 <32 pwd bits> 0 <3 bit addr>
-               Standard Read    0 1p 0 <3 bit addr>
-               Page 0/1 read    0 1p
-               Reset            0 00
-               
-       */
-               T55xxWriteBit_Leading0 (0); //T55xxWriteBit(0);
-                               
-       
+       // Add Leading 0 and 1 of 4 reference bit
+       if ((downlink_mode == T55xx_DLMode_Leading0) || (downlink_mode == T55xx_DLMode_1of4))
+               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, 0, 1,sizeof(BitStream)); 
+
+       // Add extra reference 0 for 1 of 4
+       if (downlink_mode == T55xx_DLMode_1of4)
+               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, 0, 1,sizeof(BitStream)); 
+
+       // Add Opcode 
+       if (reset) {
+               //  Reset : r*) 00
+               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, 0, 2,sizeof(BitStream)); 
+       }
+       else
+       {

                if (testMode) Dbprintf("TestMODE");
                if (testMode) Dbprintf("TestMODE");

-                       // Std Opcode 10
-                       T55xxWriteBit_Leading0 (testMode ? 0 : 1);
-                       T55xxWriteBit_Leading0 (testMode ? 1 : Page); //Page 0
-               
-       
+               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen,testMode ? 0 : 1    , 1,sizeof(BitStream));
+               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen,testMode ? 1 : Page , 1,sizeof(BitStream));
+

                if (PwdMode) {
                if (PwdMode) {

-                       // Leading zero - insert two fixed 00 between opcode and password
-                       T55xxWriteBit_Leading0 (0);
-                       T55xxWriteBit_Leading0 (0);
-                       // Send Pwd
-                       for (i = 0x80000000; i != 0; i >>= 1)
-                               T55xxWriteBit_Leading0 (Pwd & i);
+                       // Leading 0 and 1 of 4 00 fixed bits if passsword used         
+                       if ((downlink_mode == T55xx_DLMode_Leading0) || (downlink_mode == T55xx_DLMode_1of4)) {
+                               BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, 0, 2,sizeof(BitStream));
+                       }
+                       BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, Pwd, 32,sizeof(BitStream));

                }
                }

-       
-               // Send Lock bit
-               T55xxWriteBit_Leading0 (0);

 
 

-               // Send Data
-               for (i = 0x80000000; i != 0; i >>= 1)
-                       T55xxWriteBit_Leading0(Data & i);
-
-               // Send Block number
-               for (i = 0x04; i != 0; i >>= 1)
-                       T55xxWriteBit_Leading0 (Block & i);
-                       
-               // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
-               // so wait a little more)
-               // "there is a clock delay before programming" 
-               //  - programming takes ~5.6ms for t5577 ~18ms for E5550 or t5567
-               //  so we should wait 1 clock + 5.6ms then read response? 
-               //  but we need to know we are dealing with t5577 vs t5567 vs e5550 (or q5) marshmellow...
-               if (testMode) {
-                       //TESTMODE TIMING TESTS: 
-                       // <566us does nothing 
-                       // 566-568 switches between wiping to 0s and doing nothing
-                       // 5184 wipes and allows 1 block to be programmed.
-                       // indefinite power on wipes and then programs all blocks with bitshifted data sent.
-                       TurnReadLFOn(5184); 
+               // Add Lock bit 0
+               if (!reg_readmode) BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, 0, 1,sizeof(BitStream));

 
 

-               } else {
-                       TurnReadLFOn(20 * 1000);
-                       //could attempt to do a read to confirm write took
-                       // as the tag should repeat back the new block 
-                       // until it is reset, but to confirm it we would 
-                       // need to know the current block 0 config mode for
-                       // modulation clock an other details to demod the response...
-                       // response should be (for t55x7) a 0 bit then (ST if on) 
-                       // block data written in on repeat until reset. 
-
-                       //DoPartialAcquisition(20, true, 12000);
-               }
+               // Add Data if a write command
+               if (!read_cmd)  BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, Data, 32,sizeof(BitStream));

 
 

-               // turn field off
-               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-               LED_A_OFF();
-       
-}
-void T55xxWriteBlockExt_1of4 (uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
+               // Add Address
+               if (!reg_readmode) BitStreamLen = T55xx_SetBits (BitStream, BitStreamLen, Block, 3,sizeof(BitStream));
+       }

 
 

-       LED_A_ON();
-    bool PwdMode = arg & 0x1;
-       uint8_t Page = (arg & 0x2)>>1;
-       bool testMode = arg & 0x4;
-       int bitpos;
-       uint8_t bits;
-       
+       // Send Bits to T55xx

        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
        StartTicks();
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
        StartTicks();


@@ -1387,121 +1414,43 @@ void T55xxWriteBlockExt_1of4 (uint32_t Data, uint32_t Block, uint32_t Pwd, uint8
        WaitMS(5);
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        WaitMS(5);
        // Trigger T55x7 in mode.
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

+       WaitUS(Timing->START_GAP);

 
 

-       
-       WaitUS(START_GAP1of4);
-       
-       
-       /* 
-          00   : 1 if 4
-          11   : Opcode
-          00   : Fixed 00 if protected write (i.e. have password)
-          <32 bit Password>
-          0    : Lock Bit
-          <32 bit data> 
-          <3 bit addr>
-
-               Standard Write : 00 1p L <32 data bits> <3 bit addr>
-                                00 10 0 00000000000000000000000000000000 001
-               Protected Write: 00 1p 00 <32 pwd bits> L <32 data bits> <3 bit addr>
-                                            00 10 00 00000000000000000000000000000000 0 00000000000000000000000000000000 001
-               Wake Up                  00 10 00 <32 pwd bits>
-               Protected Read   00 1p 00 <32 pwd bits> 0 <3 bit addr>
-               Standard Read    00 1p 0 <3 bit addr>
-               Page 0/1 read    00 1p
-               Reset            00 00
-               
-       */
-               T55xxWriteBit_1of4 (0); //Send Reference 00
-       
-               if (testMode) Dbprintf("TestMODE");
-               // Std Opcode 10
-               if (testMode) bits  = 0; else bits   = 2;                       // 0x or 1x
-               if (testMode) bits |= 1; else bits  += (Page);  //  x0 or x1
-               T55xxWriteBit_1of4 (bits);
-               
-               if (PwdMode) {
-                       // 1 of 4 00 - insert two fixed 00 between opcode and password
-                       T55xxWriteBit_1of4 (0); // 00
-                       
-                       // Send Pwd
-                       for (bitpos = 31; bitpos >= 1; bitpos -= 2) { // 2 bits at a time
-                               bits = (((Pwd >> bitpos) & 1) << 1) + ((Pwd >> (bitpos-1)) & 1);        
-                               T55xxWriteBit_1of4 (bits);
-                       }
-               }
-               
-               // Send Lock bit
-               bits = 0; // Add lock bit (Not Set) to the next 2 bits
-       
-               // Send Data - offset by 1 bit due to lock bit
-               // 2 bits at a time - Initilised with lock bit above
-               for (bitpos = 31; bitpos >= 1; bitpos -= 2) { 
-                               bits  |= ((Data >> bitpos) & 1);  // Add Low bit
-                               T55xxWriteBit_1of4 (bits);
-                               bits = ((Data >> (bitpos-1)) & 1) << 1; // Set next high bit    
-               }
-
-               // Send Block number
-               bits  |= ((Block >> 2) & 1); 
-               T55xxWriteBit_1of4 (bits);
-               bits = (Block & 3);// 1) & 2) + (Block & 1);
-               T55xxWriteBit_1of4 (bits);                      
-                       
-               // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
-               // so wait a little more)
-               // "there is a clock delay before programming" 
-               //  - programming takes ~5.6ms for t5577 ~18ms for E5550 or t5567
-               //  so we should wait 1 clock + 5.6ms then read response? 
-               //  but we need to know we are dealing with t5577 vs t5567 vs e5550 (or q5) marshmellow...
-               if (testMode) {
-                       //TESTMODE TIMING TESTS: 
-                       // <566us does nothing 
-                       // 566-568 switches between wiping to 0s and doing nothing
-                       // 5184 wipes and allows 1 block to be programmed.
-                       // indefinite power on wipes and then programs all blocks with bitshifted data sent.
-                       TurnReadLFOn(5184); 
+       // If long leading 0 send long reference pulse
+       if (downlink_mode ==  T55xx_DLMode_LLR) 
+               T55xxWriteBit (T55xx_LongLeadingReference,Timing); // Send Long Leading Start Reference

 
 

-               } else {
-                       TurnReadLFOn(20 * 1000);
-                       //could attempt to do a read to confirm write took
-                       // as the tag should repeat back the new block 
-                       // until it is reset, but to confirm it we would 
-                       // need to know the current block 0 config mode for
-                       // modulation clock an other details to demod the response...
-                       // response should be (for t55x7) a 0 bit then (ST if on) 
-                       // block data written in on repeat until reset. 
-
-                       //DoPartialAcquisition(20, true, 12000);
+       if ((downlink_mode ==  T55xx_DLMode_1of4) && (BitStreamLen > 0)) { // 1 of 4 need to send 2 bits at a time
+               for ( i = 0; i < BitStreamLen-1; i+=2 ) {
+                       SendBits  = (BitStream[BitStream_Byte(i  )] >> (BitStream_Bit(i  )) & 1) << 1;   // Bit i
+                       SendBits += (BitStream[BitStream_Byte(i+1)] >> (BitStream_Bit(i+1)) & 1);        // Bit i+1;
+                       T55xxWriteBit (SendBits & 3,Timing);

                }
                }

-
-               // turn field off
-               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-               LED_A_OFF();
-       
+       }
+       else {
+               for (i = 0; i < BitStreamLen; i++) {
+                       SendBits = (BitStream[BitStream_Byte(i)] >> BitStream_Bit(i));
+                       T55xxWriteBit (SendBits & 1,Timing);
+               }
+       }

 }
 
 // Send T5577 reset command then read stream (see if we can identify the start of the stream)
 void T55xxResetRead(void) {
        LED_A_ON();
 }
 
 // Send T5577 reset command then read stream (see if we can identify the start of the stream)
 void T55xxResetRead(void) {
        LED_A_ON();

+
+       //  send  r* 00 
+       uint8_t arg = 0x80;  // SendCMD will add correct reference mode based on flags (when added).
+
+       // Add in downlink_mode when ready
+       //    arg |= 0x00;  // dlmode << 3  (00 default - 08 leading 0 - 10 Fixed - 18 1 of 4 )
+

        //clear buffer now so it does not interfere with timing later
        BigBuf_Clear_keep_EM();
 
        //clear buffer now so it does not interfere with timing later
        BigBuf_Clear_keep_EM();
 

-       // Set up FPGA, 125kHz
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       
-       // Trigger T55x7 in mode.
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAP);
-
-       // reset tag - op code 00
-       T55xxWriteBit(0);
-       T55xxWriteBit(0);
+       T55xx_SendCMD (0, 0, 0, arg); //, true);

 
 

-       TurnReadLFOn(READ_GAP);
+       TurnReadLFOn(T55xx_Timing_FixedBit.READ_GAP);

 
        // Acquisition
        DoPartialAcquisition(0, true, BigBuf_max_traceLen(), 0);
 
        // Acquisition
        DoPartialAcquisition(0, true, BigBuf_max_traceLen(), 0);


@@ -1513,49 +1462,23 @@ void T55xxResetRead(void) {
 }
 
 // Write one card block in page 0, no lock
 }
 
 // Write one card block in page 0, no lock

-void T55xxWriteBlockExt(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
-       LED_A_ON();
-       bool PwdMode = arg & 0x1;
-       uint8_t Page = (arg & 0x2)>>1;
-       bool testMode = arg & 0x4;
-       uint32_t i = 0;
-       uint8_t downlink_mode;
+void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
+       /*
+               arg bits
+               xxxxxxx1 0x01 PwdMode
+               xxxxxx1x 0x02 Page
+               xxxxx1xx 0x04 testMode
+               xxx11xxx 0x18 downlink mode
+               xx1xxxxx 0x20 !reg_readmode
+               x1xxxxxx 0x40 called for a read, so no data packet
+               1xxxxxxx 0x80 reset
+       */

        
        

-       downlink_mode = (arg >> 3) & 0x03;
+       bool testMode = ((arg & 0x04) == 0x04);
+       arg &= (0xff ^ 0x40); // Called for a write, so ensure it is clear/0

        
        

-
-       // Set up FPGA, 125kHz
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       // Trigger T55x7 in mode.
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAP);
-
-       // Long Leading Reference, same as fixed/default just with leading reference
-       if (downlink_mode == 1)  T55xxWrite_LLR (); 
-
-       if (testMode) Dbprintf("TestMODE");
-       // Std Opcode 10
-       T55xxWriteBit(testMode ? 0 : 1);
-       T55xxWriteBit(testMode ? 1 : Page); //Page 0
-
-       if (PwdMode) {
-               // Send Pwd
-               for (i = 0x80000000; i != 0; i >>= 1)
-                       T55xxWriteBit(Pwd & i);
-       }
-       // Send Lock bit
-       T55xxWriteBit(0);
-
-       // Send Data
-       for (i = 0x80000000; i != 0; i >>= 1)
-               T55xxWriteBit(Data & i);
-
-       // Send Block number
-       for (i = 0x04; i != 0; i >>= 1)
-               T55xxWriteBit(Block & i);
+       LED_A_ON ();
+       T55xx_SendCMD (Data, Block, Pwd, arg) ;//, false); 

 
        // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
 
        // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)


@@ -1584,144 +1507,43 @@ void T55xxWriteBlockExt(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg
 
                //DoPartialAcquisition(20, true, 12000);
        }
 
                //DoPartialAcquisition(20, true, 12000);
        }

-

        // turn field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        // turn field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);

-       LED_A_OFF();
-}
-
-// Write one card block in page 0, no lock
-void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg) {
-//     arg 8 bit 00000000 
-//            0000000x Password
-//            000000x0  Page
-//            00000x00  Test Mode
-//            000xx000  (0x18) where xx : 00 - Normal Write, 01 - Long Leading Reference
-//                                                                               10 - Leading 0,    11 - 1 of 4
-       uint8_t downlink_mode;
-       
-       downlink_mode = (arg >> 3) & 0x03;
-       
-       switch (downlink_mode)
-       {
-               case 0 ://      T55xxWriteBlockExt          (Data, Block, Pwd, arg);    break;
-               case 1 :  //  T55xxWrite_LLR ();
-                                       T55xxWriteBlockExt          (Data, Block, Pwd, arg);
-                                       break;
-               case 2 :        T55xxWriteBlockExt_Leading0 (Data, Block, Pwd, arg);    break;
-               case 3 :        T55xxWriteBlockExt_1of4     (Data, Block, Pwd, arg);    break;
-               
-               default:
-                               T55xxWriteBlockExt    (Data, Block, Pwd, arg);
-       }                                       

 
        cmd_send(CMD_ACK,0,0,0,0,0);
 
        cmd_send(CMD_ACK,0,0,0,0,0);

+
+       LED_A_OFF ();

 }
 
 // Read one card block in page [page]
 }
 
 // Read one card block in page [page]

-void T55xxReadBlockExt (uint16_t arg0, uint8_t Block, uint32_t Pwd) {
-       LED_A_ON();
-       bool PwdMode = arg0 & 0x1;
-       uint8_t Page = (arg0 & 0x2) >> 1;
-       uint32_t i = 0;
-       bool RegReadMode = (Block == 0xFF);//regular read mode
-       uint8_t downlink_mode;
-       
-       downlink_mode = (arg0 >> 3) & 0x03;
-       
-       //clear buffer now so it does not interfere with timing later
-       BigBuf_Clear_ext(false);
-
-       //make sure block is at max 7
-       Block &= 0x7;
-
-       // Set up FPGA, 125kHz to power up the tag
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       // Trigger T55x7 Direct Access Mode with start gap
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAP);
-
-       // Long Leading Reference, same as fixed/default just with leading reference
-       if (downlink_mode == 1)  T55xxWrite_LLR (); 
-               
-       // Opcode 1[page]
-       T55xxWriteBit(1);
-       T55xxWriteBit(Page); //Page 0
-
-       if (PwdMode){
-               // Send Pwd
-               for (i = 0x80000000; i != 0; i >>= 1)
-                       T55xxWriteBit(Pwd & i);
-       }
-       // Send a zero bit separation
-       T55xxWriteBit(0);
+void T55xxReadBlock (uint16_t arg0, uint8_t Block, uint32_t Pwd) {//, struct T55xx_Timing *Timing) {

 
 

-       // Send Block number (if direct access mode)
-       if (!RegReadMode)
-               for (i = 0x04; i != 0; i >>= 1)
-                       T55xxWriteBit(Block & i);               
-
-       // Turn field on to read the response
-       // 137*8 seems to get to the start of data pretty well... 
-       //  but we want to go past the start and let the repeating data settle in...
-       TurnReadLFOn(210*8); 
-
-       // Acquisition
-       // Now do the acquisition
-       DoPartialAcquisition(0, true, 12000, 0);
+       LED_A_ON();

 
 

-       // Turn the field off
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-//     cmd_send(CMD_ACK,0,0,0,0,0);    
-       LED_A_OFF();
-}
+       /*
+               arg bits
+               xxxxxxx1 0x01 PwdMode
+               xxxxxx1x 0x02 Page
+               xxxxx1xx 0x04 testMode
+               xxx11xxx 0x18 downlink mode
+               xx1xxxxx 0x20 !reg_readmode
+               x1xxxxxx 0x40 called for a read, so no data packet
+               1xxxxxxx 0x80 reset
+       */

 
 

-void T55xxReadBlockExt_Leading0 (uint16_t arg0, uint8_t Block, uint32_t Pwd) {
-       LED_A_ON();
-       bool     PwdMode = arg0 & 0x1;
-       uint8_t  Page    = (arg0 & 0x2) >> 1;
-       uint32_t i       = 0;
-       bool RegReadMode = (Block == 0xFF);//regular read mode
-        
-       //clear buffer now so it does not interfere with timing later
-       BigBuf_Clear_ext(false);
+       // Set Read Flag to ensure SendCMD does not add "data" to the packet
+       arg0 |= 0x40;

 
 

+       // RegRead Mode true of block 0xff
+       if (Block == 0xff) arg0 |= 0x20;
+       

        //make sure block is at max 7
        Block &= 0x7;
 
        //make sure block is at max 7
        Block &= 0x7;
 

-       // Set up FPGA, 125kHz to power up the tag
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       // Trigger T55x7 Direct Access Mode with start gap
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAPlz);
-
-       T55xxWriteBit_Leading0 (0); 
-
-       // Opcode 1[page]
-       T55xxWriteBit_Leading0 (1);
-       T55xxWriteBit_Leading0 (Page); //Page 0
-
-       if (PwdMode){
-               // Send Pwd
-               T55xxWriteBit_Leading0 (0);
-               T55xxWriteBit_Leading0 (0);             
-               
-               for (i = 0x80000000; i != 0; i >>= 1)
-                       T55xxWriteBit_Leading0 (Pwd & i);
-       }
-       // Send a zero bit separation
-       T55xxWriteBit_Leading0(0);
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);

 
 

-       // Send Block number (if direct access mode)
-       if (!RegReadMode)
-               for (i = 0x04; i != 0; i >>= 1)
-                       T55xxWriteBit_Leading0(Block & i);              
+       T55xx_SendCMD (0, Block, Pwd, arg0); //, true);

 
        // Turn field on to read the response
        // 137*8 seems to get to the start of data pretty well... 
 
        // Turn field on to read the response
        // 137*8 seems to get to the start of data pretty well... 


@@ -1734,125 +1556,32 @@ void T55xxReadBlockExt_Leading0 (uint16_t arg0, uint8_t Block, uint32_t Pwd) {
 
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

-//     cmd_send(CMD_ACK,0,0,0,0,0);    
-       LED_A_OFF();
-}
-
-void T55xxReadBlockExt_1of4 (uint16_t arg0, uint8_t Block, uint32_t Pwd) {
-       LED_A_ON();
-       bool     PwdMode = arg0 & 0x1;
-       uint8_t  Page    = (arg0 & 0x2) >> 1;
-       //uint32_t i       = 0;
-       bool RegReadMode = (Block == 0xFF);//regular read mode
-       uint8_t bits;
-       int bitpos;
-        
-       //clear buffer now so it does not interfere with timing later
-       BigBuf_Clear_ext(false);
-
-       //make sure block is at max 7
-       Block &= 0x7;
-
-       // Set up FPGA, 125kHz to power up the tag
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       // Trigger T55x7 Direct Access Mode with start gap
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAP1of4);
-
-       T55xxWriteBit_1of4 (0); // 2 Bit 00 leading reference 
-
-       // Opcode 1[page]
-       bits = 2 + Page;
-       T55xxWriteBit_1of4 (bits);
-       
-       if (PwdMode) {
-               // 1 of 4 00 - insert two fixed 00 between opcode and password
-               T55xxWriteBit_1of4 (0); // 00
-               
-               // Send Pwd
-               for (bitpos = 31; bitpos >= 1; bitpos -= 2) { // 2 bits at a time
-                       bits = (((Pwd >> bitpos) & 1) << 1) + ((Pwd >> (bitpos-1)) & 1);        
-                       T55xxWriteBit_1of4 (bits);
-               }
-       }
-       
-       // Send Lock bit
-       bits = 0; // Add lock bit (Not Set) to the next 2 bits
-
-       // Send Block number (if direct access mode)
-       if (!RegReadMode){
-               // Send Block number
-               bits  += ((Block >> 2) & 1); 
-               T55xxWriteBit_1of4 (bits);
-               bits = (Block & 3); //  + (Block & 1);
-               T55xxWriteBit_1of4 (bits);                              
-       }       
-
-       // Turn field on to read the response
-       // 137*8 seems to get to the start of data pretty well... 
-       //  but we want to go past the start and let the repeating data settle in...
-       TurnReadLFOn(210*8); 
+       cmd_send(CMD_ACK,0,0,0,0,0);    

 
 

-       // Acquisition
-       // Now do the acquisition
-       DoPartialAcquisition(0, true, 12000, 0);
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-//     cmd_send(CMD_ACK,0,0,0,0,0);    

        LED_A_OFF();
 }
 
        LED_A_OFF();
 }
 

-void T55xxReadBlock (uint16_t arg0, uint8_t Block, uint32_t Pwd) {
-//     arg0 16 bit 00000000 
-//              0000000x  Password
-//              000000x0  Page
-//              00000x00  
-//              000xx000  (0x18) where xx : 00 - Normal Write, 01 - Long Leading Reference
-//                                                                                 10 - Leading 0,    11 - 1 of 4
-       uint8_t downlink_mode;
-       
-       downlink_mode = (arg0 >> 3) & 0x03;
-
-       //  downlink mode id set to match the 2 bit as per Tech Sheet
-       switch (downlink_mode)
-       {
-               case 0 ://      T55xxReadBlockExt                       (arg0, Block, Pwd);     break;
-               case 1 : //     T55xxWrite_LLR ();
-                                       T55xxReadBlockExt                       (arg0, Block, Pwd);
-                                   break;
-               case 2 :        T55xxReadBlockExt_Leading0      (arg0, Block, Pwd);     break;
-               case 3 :        T55xxReadBlockExt_1of4          (arg0, Block, Pwd);             break;
-               default:
-                                       T55xxReadBlockExt           (arg0, Block, Pwd) ;
-       }                                       
-
-//     T55xxReadBlockExt           (arg0, Block, Pwd) ;
-       cmd_send(CMD_ACK,0,0,0,0,0);
-}
-

 void T55xxWakeUp(uint32_t Pwd){
        LED_B_ON();
 void T55xxWakeUp(uint32_t Pwd){
        LED_B_ON();

-       uint32_t i = 0;
-       
-       // Set up FPGA, 125kHz
-       LFSetupFPGAForADC(95, true);
-       StartTicks();
-       // make sure tag is fully powered up...
-       WaitMS(5);
-       
-       // Trigger T55x7 Direct Access Mode
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       WaitUS(START_GAP);
-       
-       // Opcode 10
-       T55xxWriteBit(1);
-       T55xxWriteBit(0); //Page 0
+       /*
+               arg bits
+               xxxxxxx1 0x01 PwdMode
+               xxxxxx1x 0x02 Page
+               xxxxx1xx 0x04 testMode
+               xxx11xxx 0x18 downlink mode
+               xx1xxxxx 0x20 !reg_readmode 
+               x1xxxxxx 0x40 called for a read, so no data packet
+               1xxxxxxx 0x80 reset
+       */
+
+       // r* 10 (00) <pwd>   r* for llr , L0 and 1/4 - (00) for L0 and 1/4 - All handled in SendCMD
+       // So, default Opcode 10 and pwd.
+       uint8_t arg = 0x01 | 0x40 | 0x20; //Password Read Call no data | reg_read no block

 
 

-       // Send Pwd
-       for (i = 0x80000000; i != 0; i >>= 1)
-               T55xxWriteBit(Pwd & i);
+       // Add in downlink_mode when ready
+       //    arg |= 0x00;  // dlmode << 3  (00 default - 08 leading 0 - 10 Fixed - 18 1 of 4 )
+
+       T55xx_SendCMD (0, 0, Pwd, arg); //, true);

 
        // Turn and leave field on to let the begin repeating transmission
        TurnReadLFOn(20*1000);
 
        // Turn and leave field on to let the begin repeating transmission
        TurnReadLFOn(20*1000);


@@ -1863,7 +1592,8 @@ void T55xxWakeUp(uint32_t Pwd){
 void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
        // write last block first and config block last (if included)
        for (uint8_t i = numblocks+startblock; i > startblock; i--) {
 void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
        // write last block first and config block last (if included)
        for (uint8_t i = numblocks+startblock; i > startblock; i--) {

-               T55xxWriteBlockExt(blockdata[i-1],i-1,0,0);
+               T55xxWriteBlock(blockdata[i-1],i-1,0,0);//,false); //,&T55xx_Timing_FixedBit);
+               //T55xx_SendCMD (blockdata[i-1],i-1,0,0);//,false); //,&T55xx_Timing_FixedBit);

        }
 }
 
        }
 }
 


@@ -2063,6 +1793,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
 #define FWD_CMD_WRITE 0xA
 #define FWD_CMD_READ 0x9
 #define FWD_CMD_DISABLE 0x5
 #define FWD_CMD_WRITE 0xA
 #define FWD_CMD_READ 0x9
 #define FWD_CMD_DISABLE 0x5

+#define FWD_CMD_PROTECT 0x3

 
 uint8_t forwardLink_data[64]; //array of forwarded bits
 uint8_t * forward_ptr; //ptr for forward message preparation
 
 uint8_t forwardLink_data[64]; //array of forwarded bits
 uint8_t * forward_ptr; //ptr for forward message preparation


@@ -2176,7 +1907,7 @@ void SendForward(uint8_t fwd_bit_count) {
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
        WaitUS(18*8); //18 cycles on (8us each)
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
        WaitUS(18*8); //18 cycles on (8us each)
 

-       // now start writting
+       // now start writting - each bit should be 32*8 total length

        while(fwd_bit_sz-- > 0) { //prepare next bit modulation
                if(((*fwd_write_ptr++) & 1) == 1)
                        WaitUS(32*8); //32 cycles at 125Khz (8us each)
        while(fwd_bit_sz-- > 0) { //prepare next bit modulation
                if(((*fwd_write_ptr++) & 1) == 1)
                        WaitUS(32*8); //32 cycles at 125Khz (8us each)


@@ -2185,7 +1916,7 @@ void SendForward(uint8_t fwd_bit_count) {
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
                        WaitUS(23*8); //23 cycles off (8us each)
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
                        WaitUS(23*8); //23 cycles off (8us each)
                        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on

-                       WaitUS(18*8); //18 cycles on (8us each)
+                       WaitUS((32-23)*8); //remaining cycles on (8us each)

                }
        }
 }
                }
        }
 }


@@ -2232,7 +1963,7 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
 void EM4xWriteWord(uint32_t flag, uint32_t Data, uint32_t Pwd) {
        
 
 void EM4xWriteWord(uint32_t flag, uint32_t Data, uint32_t Pwd) {
        

-       bool PwdMode = (flag & 0xF);
+       bool PwdMode = (flag & 0x1);

        uint8_t Address = (flag >> 8) & 0xFF;
        uint8_t fwd_bit_count;
 
        uint8_t Address = (flag >> 8) & 0xFF;
        uint8_t fwd_bit_count;
 


@@ -2262,6 +1993,39 @@ void EM4xWriteWord(uint32_t flag, uint32_t Data, uint32_t Pwd) {
        LED_A_OFF();
        cmd_send(CMD_ACK,0,0,0,0,0);
 }
        LED_A_OFF();
        cmd_send(CMD_ACK,0,0,0,0,0);
 }

+
+void EM4xProtect(uint32_t flag, uint32_t Data, uint32_t Pwd) {
+       
+       bool PwdMode = (flag & 0x1);
+       uint8_t fwd_bit_count;
+
+       //clear buffer now so it does not interfere with timing later
+       BigBuf_Clear_ext(false);
+
+       LED_A_ON();
+       StartTicks();
+       //If password mode do login
+       if (PwdMode) EM4xLogin(Pwd);
+
+       forward_ptr = forwardLink_data;
+       fwd_bit_count = Prepare_Cmd( FWD_CMD_PROTECT );
+
+       //unsure if this needs the full packet config...
+       fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
+
+       SendForward(fwd_bit_count);
+
+       //Wait for write to complete
+       //SpinDelay(10);
+
+       WaitUS(6500);
+       //Capture response if one exists
+       DoPartialAcquisition(20, true, 6000, 1000);
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+       LED_A_OFF();
+       cmd_send(CMD_ACK,0,0,0,0,0);
+}

 /*
 Reading a COTAG.
 
 /*
 Reading a COTAG.