#include "apps.h"
#include "util.h"
#include "string.h"
-
#include "iso14443crc.h"
-
-#define RECEIVE_SAMPLES_TIMEOUT 2000
+#include "common.h"
+#define RECEIVE_SAMPLES_TIMEOUT 20000
#define ISO14443B_DMA_BUFFER_SIZE 256
+// PCB Block number for APDUs
+static uint8_t pcb_blocknum = 0;
+
//=============================================================================
// An ISO 14443 Type B tag. We listen for commands from the reader, using
// a UART kind of thing that's implemented in software. When we get a
// a response.
//=============================================================================
+
+//-----------------------------------------------------------------------------
+// The software UART that receives commands from the reader, and its state
+// variables.
+//-----------------------------------------------------------------------------
+static struct {
+ enum {
+ STATE_UNSYNCD,
+ STATE_GOT_FALLING_EDGE_OF_SOF,
+ STATE_AWAITING_START_BIT,
+ STATE_RECEIVING_DATA
+ } state;
+ uint16_t shiftReg;
+ int bitCnt;
+ int byteCnt;
+ int byteCntMax;
+ int posCnt;
+ uint8_t *output;
+} Uart;
+
+static void UartReset()
+{
+ Uart.byteCntMax = MAX_FRAME_SIZE;
+ Uart.state = STATE_UNSYNCD;
+ Uart.byteCnt = 0;
+ Uart.bitCnt = 0;
+ Uart.posCnt = 0;
+ memset(Uart.output, 0x00, MAX_FRAME_SIZE);
+}
+
+static void UartInit(uint8_t *data)
+{
+ Uart.output = data;
+ UartReset();
+}
+
+
+static struct {
+ enum {
+ DEMOD_UNSYNCD,
+ DEMOD_PHASE_REF_TRAINING,
+ DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
+ DEMOD_GOT_FALLING_EDGE_OF_SOF,
+ DEMOD_AWAITING_START_BIT,
+ DEMOD_RECEIVING_DATA
+ } state;
+ int bitCount;
+ int posCount;
+ int thisBit;
+/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
+ int metric;
+ int metricN;
+*/
+ uint16_t shiftReg;
+ uint8_t *output;
+ int len;
+ int sumI;
+ int sumQ;
+} Demod;
+
+static void DemodReset()
+{
+ // Clear out the state of the "UART" that receives from the tag.
+ Demod.len = 0;
+ Demod.state = DEMOD_UNSYNCD;
+ Demod.posCount = 0;
+ Demod.sumI = 0;
+ Demod.sumQ = 0;
+ Demod.bitCount = 0;
+ Demod.thisBit = 0;
+ Demod.shiftReg = 0;
+ memset(Demod.output, 0x00, MAX_FRAME_SIZE);
+}
+
+
+static void DemodInit(uint8_t *data)
+{
+ Demod.output = data;
+ DemodReset();
+}
+
+
//-----------------------------------------------------------------------------
// Code up a string of octets at layer 2 (including CRC, we don't generate
// that here) so that they can be transmitted to the reader. Doesn't transmit
ToSendMax++;
}
-//-----------------------------------------------------------------------------
-// The software UART that receives commands from the reader, and its state
-// variables.
-//-----------------------------------------------------------------------------
-static struct {
- enum {
- STATE_UNSYNCD,
- STATE_GOT_FALLING_EDGE_OF_SOF,
- STATE_AWAITING_START_BIT,
- STATE_RECEIVING_DATA
- } state;
- uint16_t shiftReg;
- int bitCnt;
- int byteCnt;
- int byteCntMax;
- int posCnt;
- uint8_t *output;
-} Uart;
+
/* Receive & handle a bit coming from the reader.
*
LED_A_OFF(); // Finished receiving
Uart.state = STATE_UNSYNCD;
if (Uart.byteCnt != 0) {
- return TRUE;
+ return TRUE;
}
} else {
// this is an error
return FALSE;
}
-
-static void UartReset()
-{
- Uart.byteCntMax = MAX_FRAME_SIZE;
- Uart.state = STATE_UNSYNCD;
- Uart.byteCnt = 0;
- Uart.bitCnt = 0;
-}
-
-
-static void UartInit(uint8_t *data)
-{
- Uart.output = data;
- UartReset();
-}
-
-
//-----------------------------------------------------------------------------
// Receive a command (from the reader to us, where we are the simulated tag),
// and store it in the given buffer, up to the given maximum length. Keeps
//-----------------------------------------------------------------------------
void SimulateIso14443bTag(void)
{
- // the only commands we understand is REQB, AFI=0, Select All, N=0:
- static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
- // ... and REQB, AFI=0, Normal Request, N=0:
- static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF };
+ // the only commands we understand is WUPB, AFI=0, Select All, N=1:
+ static const uint8_t cmd1[] = { 0x05, 0x00, 0x08, 0x39, 0x73 }; // WUPB
+ // ... and REQB, AFI=0, Normal Request, N=1:
+ static const uint8_t cmd2[] = { 0x05, 0x00, 0x00, 0x71, 0xFF }; // REQB
+ // ... and HLTB
+ static const uint8_t cmd3[] = { 0x50, 0xff, 0xff, 0xff, 0xff }; // HLTB
+ // ... and ATTRIB
+ static const uint8_t cmd4[] = { 0x1D, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff}; // ATTRIB
// ... and we always respond with ATQB, PUPI = 820de174, Application Data = 0x20381922,
// supports only 106kBit/s in both directions, max frame size = 32Bytes,
0x50, 0x82, 0x0d, 0xe1, 0x74, 0x20, 0x38, 0x19, 0x22,
0x00, 0x21, 0x85, 0x5e, 0xd7
};
+ // response to HLTB and ATTRIB
+ static const uint8_t response2[] = {0x00, 0x78, 0xF0};
+
+ //uint8_t parity[MAX_PARITY_SIZE] = {0x00};
+
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
clear_trace();
set_tracing(TRUE);
uint16_t respLen, respCodeLen;
// allocate command receive buffer
- BigBuf_free();
+ BigBuf_free(); BigBuf_Clear_ext(false);
+
uint8_t *receivedCmd = BigBuf_malloc(MAX_FRAME_SIZE);
uint16_t len;
uint16_t cmdsRecvd = 0;
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
-
// prepare the (only one) tag answer:
CodeIso14443bAsTag(response1, sizeof(response1));
uint8_t *resp1Code = BigBuf_malloc(ToSendMax);
memcpy(resp1Code, ToSend, ToSendMax);
uint16_t resp1CodeLen = ToSendMax;
+ // prepare the (other) tag answer:
+ CodeIso14443bAsTag(response2, sizeof(response2));
+ uint8_t *resp2Code = BigBuf_malloc(ToSendMax);
+ memcpy(resp2Code, ToSend, ToSendMax);
+ uint16_t resp2CodeLen = ToSendMax;
+
// We need to listen to the high-frequency, peak-detected path.
SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
FpgaSetupSsc();
for(;;) {
- if(!GetIso14443bCommandFromReader(receivedCmd, &len)) {
+ if (!GetIso14443bCommandFromReader(receivedCmd, &len)) {
Dbprintf("button pressed, received %d commands", cmdsRecvd);
break;
}
- if (tracing) {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
- }
+ if (tracing)
+ //LogTrace(receivedCmd, len, 0, 0, parity, TRUE);
+ LogTrace(receivedCmd, len, 0, 0, NULL, TRUE);
+
// Good, look at the command now.
if ( (len == sizeof(cmd1) && memcmp(receivedCmd, cmd1, len) == 0)
respLen = sizeof(response1);
respCode = resp1Code;
respCodeLen = resp1CodeLen;
+ } else if ( (len == sizeof(cmd3) && receivedCmd[0] == cmd3[0])
+ || (len == sizeof(cmd4) && receivedCmd[0] == cmd4[0]) ) {
+ resp = response2;
+ respLen = sizeof(response2);
+ respCode = resp2Code;
+ respCodeLen = resp2CodeLen;
} else {
Dbprintf("new cmd from reader: len=%d, cmdsRecvd=%d", len, cmdsRecvd);
// And print whether the CRC fails, just for good measure
uint8_t b1, b2;
- ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
- if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
- // Not so good, try again.
- DbpString("+++CRC fail");
- } else {
- DbpString("CRC passes");
+ if (len >= 3){ // if crc exists
+ ComputeCrc14443(CRC_14443_B, receivedCmd, len-2, &b1, &b2);
+ if(b1 != receivedCmd[len-2] || b2 != receivedCmd[len-1]) {
+ // Not so good, try again.
+ DbpString("+++CRC fail");
+
+ } else {
+ DbpString("CRC passes");
+ }
}
- break;
+ //get rid of compiler warning
+ respCodeLen = 0;
+ resp = response1;
+ respLen = 0;
+ respCode = resp1Code;
+ //don't crash at new command just wait and see if reader will send other new cmds.
+ //break;
}
cmdsRecvd++;
}
// trace the response:
- if (tracing) {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(resp, respLen, 0, 0, parity, FALSE);
- }
-
+ if (tracing)
+ //LogTrace(resp, respLen, 0, 0, parity, FALSE);
+ LogTrace(resp, respLen, 0, 0, NULL, FALSE);
}
}
// PC side.
//=============================================================================
-static struct {
- enum {
- DEMOD_UNSYNCD,
- DEMOD_PHASE_REF_TRAINING,
- DEMOD_AWAITING_FALLING_EDGE_OF_SOF,
- DEMOD_GOT_FALLING_EDGE_OF_SOF,
- DEMOD_AWAITING_START_BIT,
- DEMOD_RECEIVING_DATA
- } state;
- int bitCount;
- int posCount;
- int thisBit;
-/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
- int metric;
- int metricN;
-*/
- uint16_t shiftReg;
- uint8_t *output;
- int len;
- int sumI;
- int sumQ;
-} Demod;
-
/*
* Handles reception of a bit from the tag
*
* false if we are still waiting for some more
*
*/
+#ifndef SUBCARRIER_DETECT_THRESHOLD
+# define SUBCARRIER_DETECT_THRESHOLD 6
+#endif
+
static RAMFUNC int Handle14443bSamplesDemod(int ci, int cq)
{
- int v;
-
+ int v = 0;
// The soft decision on the bit uses an estimate of just the
// quadrant of the reference angle, not the exact angle.
#define MAKE_SOFT_DECISION() { \
} \
}
-#define SUBCARRIER_DETECT_THRESHOLD 8
-
// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by abs(ci) + abs(cq)
/* #define CHECK_FOR_SUBCARRIER() { \
v = ci; \
} else { \
v -= cq; \
} \
- }
+ }
*/
// Subcarrier amplitude v = sqrt(ci^2 + cq^2), approximated here by max(abs(ci),abs(cq)) + 1/2*min(abs(ci),abs(cq)))
#define CHECK_FOR_SUBCARRIER() { \
} \
} \
}
-
+
+
switch(Demod.state) {
case DEMOD_UNSYNCD:
+
CHECK_FOR_SUBCARRIER();
- if(v > SUBCARRIER_DETECT_THRESHOLD) { // subcarrier detected
+
+ // subcarrier detected
+ if(v > SUBCARRIER_DETECT_THRESHOLD) {
Demod.state = DEMOD_PHASE_REF_TRAINING;
Demod.sumI = ci;
Demod.sumQ = cq;
Demod.posCount = 1;
- }
+ }
break;
case DEMOD_PHASE_REF_TRAINING:
if(Demod.posCount < 8) {
+
CHECK_FOR_SUBCARRIER();
+
if (v > SUBCARRIER_DETECT_THRESHOLD) {
// set the reference phase (will code a logic '1') by averaging over 32 1/fs.
// note: synchronization time > 80 1/fs
Demod.sumI += ci;
Demod.sumQ += cq;
- Demod.posCount++;
- } else { // subcarrier lost
+ ++Demod.posCount;
+ } else {
+ // subcarrier lost
Demod.state = DEMOD_UNSYNCD;
}
} else {
break;
case DEMOD_AWAITING_FALLING_EDGE_OF_SOF:
+
MAKE_SOFT_DECISION();
+
+ //Dbprintf("ICE: %d %d %d %d %d", v, Demod.sumI, Demod.sumQ, ci, cq );
if(v < 0) { // logic '0' detected
Demod.state = DEMOD_GOT_FALLING_EDGE_OF_SOF;
Demod.posCount = 0; // start of SOF sequence
} else {
- if(Demod.posCount > 200/4) { // maximum length of TR1 = 200 1/fs
- Demod.state = DEMOD_UNSYNCD;
- }
+ // maximum length of TR1 = 200 1/fs
+ if(Demod.posCount > 25*2) Demod.state = DEMOD_UNSYNCD;
}
- Demod.posCount++;
+ ++Demod.posCount;
break;
case DEMOD_GOT_FALLING_EDGE_OF_SOF:
- Demod.posCount++;
+ ++Demod.posCount;
+
MAKE_SOFT_DECISION();
+
if(v > 0) {
- if(Demod.posCount < 9*2) { // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
+ // low phase of SOF too short (< 9 etu). Note: spec is >= 10, but FPGA tends to "smear" edges
+ if(Demod.posCount < 9*2) {
Demod.state = DEMOD_UNSYNCD;
} else {
LED_C_ON(); // Got SOF
Demod.state = DEMOD_AWAITING_START_BIT;
Demod.posCount = 0;
Demod.len = 0;
-/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
- Demod.metricN = 0;
- Demod.metric = 0;
-*/
}
} else {
- if(Demod.posCount > 12*2) { // low phase of SOF too long (> 12 etu)
+ // low phase of SOF too long (> 12 etu)
+ if (Demod.posCount > 12*2) {
Demod.state = DEMOD_UNSYNCD;
LED_C_OFF();
}
break;
case DEMOD_AWAITING_START_BIT:
- Demod.posCount++;
+ ++Demod.posCount;
+
MAKE_SOFT_DECISION();
- if(v > 0) {
+
+ if (v > 0) {
if(Demod.posCount > 3*2) { // max 19us between characters = 16 1/fs, max 3 etu after low phase of SOF = 24 1/fs
Demod.state = DEMOD_UNSYNCD;
LED_C_OFF();
break;
case DEMOD_RECEIVING_DATA:
+
MAKE_SOFT_DECISION();
- if(Demod.posCount == 0) { // first half of bit
+
+ if (Demod.posCount == 0) {
+ // first half of bit
Demod.thisBit = v;
Demod.posCount = 1;
- } else { // second half of bit
+ } else {
+ // second half of bit
Demod.thisBit += v;
-
-/* this had been used to add RSSI (Received Signal Strength Indication) to traces. Currently not implemented.
- if(Demod.thisBit > 0) {
- Demod.metric += Demod.thisBit;
- } else {
- Demod.metric -= Demod.thisBit;
- }
- (Demod.metricN)++;
-*/
-
Demod.shiftReg >>= 1;
- if(Demod.thisBit > 0) { // logic '1'
- Demod.shiftReg |= 0x200;
- }
- Demod.bitCount++;
+ // logic '1'
+ if(Demod.thisBit > 0) Demod.shiftReg |= 0x200;
+
+ ++Demod.bitCount;
+
if(Demod.bitCount == 10) {
+
uint16_t s = Demod.shiftReg;
- if((s & 0x200) && !(s & 0x001)) { // stop bit == '1', start bit == '0'
+
+ // stop bit == '1', start bit == '0'
+ if((s & 0x200) && !(s & 0x001)) {
uint8_t b = (s >> 1);
Demod.output[Demod.len] = b;
- Demod.len++;
+ ++Demod.len;
Demod.state = DEMOD_AWAITING_START_BIT;
} else {
Demod.state = DEMOD_UNSYNCD;
LED_C_OFF();
- if(s == 0x000) {
- // This is EOF (start, stop and all data bits == '0'
- return TRUE;
- }
+
+ // This is EOF (start, stop and all data bits == '0'
+ if(s == 0) return TRUE;
}
}
Demod.posCount = 0;
LED_C_OFF();
break;
}
-
return FALSE;
}
-static void DemodReset()
-{
- // Clear out the state of the "UART" that receives from the tag.
- Demod.len = 0;
- Demod.state = DEMOD_UNSYNCD;
- Demod.posCount = 0;
- memset(Demod.output, 0x00, MAX_FRAME_SIZE);
-}
-
-
-static void DemodInit(uint8_t *data)
-{
- Demod.output = data;
- DemodReset();
-}
-
-
/*
* Demodulate the samples we received from the tag, also log to tracebuffer
* quiet: set to 'TRUE' to disable debug output
// Allocate memory from BigBuf for some buffers
// free all previous allocations first
BigBuf_free();
-
+
// The response (tag -> reader) that we're receiving.
- uint8_t *receivedResponse = BigBuf_malloc(MAX_FRAME_SIZE);
+ // Set up the demodulator for tag -> reader responses.
+ DemodInit(BigBuf_malloc(MAX_FRAME_SIZE));
// The DMA buffer, used to stream samples from the FPGA
int8_t *dmaBuf = (int8_t*) BigBuf_malloc(ISO14443B_DMA_BUFFER_SIZE);
- // Set up the demodulator for tag -> reader responses.
- DemodInit(receivedResponse);
-
+ // And put the FPGA in the appropriate mode
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
+
// Setup and start DMA.
FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
-
+
int8_t *upTo = dmaBuf;
lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
// Signal field is ON with the appropriate LED:
LED_D_ON();
- // And put the FPGA in the appropriate mode
- FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_RX_XCORR | FPGA_HF_READER_RX_XCORR_848_KHZ);
-
for(;;) {
int behindBy = lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR;
if(behindBy > max) max = behindBy;
AT91C_BASE_PDC_SSC->PDC_RNCR = ISO14443B_DMA_BUFFER_SIZE;
}
lastRxCounter -= 2;
- if(lastRxCounter <= 0) {
+
+ if(lastRxCounter <= 0)
lastRxCounter += ISO14443B_DMA_BUFFER_SIZE;
- }
samples += 2;
- if(Handle14443bSamplesDemod(ci, cq)) {
- gotFrame = TRUE;
+ //
+ gotFrame = Handle14443bSamplesDemod(ci , cq );
+ if ( gotFrame )
break;
- }
}
if(samples > n || gotFrame) {
}
}
+ //disable
AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
- if (!quiet) Dbprintf("max behindby = %d, samples = %d, gotFrame = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d", max, samples, gotFrame, Demod.len, Demod.sumI, Demod.sumQ);
- //Tracing
- if (tracing && Demod.len > 0) {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(Demod.output, Demod.len, 0, 0, parity, FALSE);
+ if (!quiet) {
+ Dbprintf("max behindby = %d, samples = %d, gotFrame = %s, Demod.state = %d, Demod.len = %d, Demod.sumI = %d, Demod.sumQ = %d",
+ max,
+ samples,
+ (gotFrame) ? "true" : "false",
+ Demod.state,
+ Demod.len,
+ Demod.sumI,
+ Demod.sumQ
+ );
}
+
+ //Tracing
+ if (Demod.len > 0)
+ LogTrace(Demod.output, Demod.len, 0, 0, NULL, FALSE);
}
static void TransmitFor14443b(void)
{
int c;
-
+ volatile uint32_t r;
FpgaSetupSsc();
-
- while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+
+ while(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY))
AT91C_BASE_SSC->SSC_THR = 0xff;
- }
// Signal field is ON with the appropriate Red LED
LED_D_ON();
// Signal we are transmitting with the Green LED
LED_B_ON();
FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
-
+
for(c = 0; c < 10;) {
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
AT91C_BASE_SSC->SSC_THR = 0xff;
- c++;
+ ++c;
}
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
+ r = AT91C_BASE_SSC->SSC_RHR;
(void)r;
}
WDT_HIT();
for(;;) {
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
AT91C_BASE_SSC->SSC_THR = ToSend[c];
- c++;
- if(c >= ToSendMax) {
+ ++c;
+ if(c >= ToSendMax)
break;
- }
}
if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
- volatile uint32_t r = AT91C_BASE_SSC->SSC_RHR;
+ r = AT91C_BASE_SSC->SSC_RHR;
(void)r;
}
WDT_HIT();
ToSendReset();
// Establish initial reference level
- for(i = 0; i < 40; i++) {
+ for(i = 0; i < 40; i++)
ToSendStuffBit(1);
- }
+
// Send SOF
- for(i = 0; i < 10; i++) {
+ for(i = 0; i < 10; i++)
ToSendStuffBit(0);
- }
for(i = 0; i < len; i++) {
// Stop bits/EGT
// Data bits
b = cmd[i];
for(j = 0; j < 8; j++) {
- if(b & 1) {
+ if(b & 1)
ToSendStuffBit(1);
- } else {
+ else
ToSendStuffBit(0);
- }
+
b >>= 1;
}
}
// Send EOF
ToSendStuffBit(1);
- for(i = 0; i < 10; i++) {
+ for(i = 0; i < 10; i++)
ToSendStuffBit(0);
- }
- for(i = 0; i < 8; i++) {
+
+ for(i = 0; i < 8; i++)
ToSendStuffBit(1);
- }
+
// And then a little more, to make sure that the last character makes
// it out before we switch to rx mode.
- for(i = 0; i < 24; i++) {
+ for(i = 0; i < 24; i++)
ToSendStuffBit(1);
- }
// Convert from last character reference to length
- ToSendMax++;
+ ++ToSendMax;
}
CodeIso14443bAsReader(cmd, len);
TransmitFor14443b();
if (tracing) {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(cmd,len, 0, 0, parity, TRUE);
+ //uint8_t parity[MAX_PARITY_SIZE];
+ //LogTrace(cmd,len, 0, 0, parity, TRUE);
+ LogTrace(cmd,len, 0, 0, NULL, TRUE);
}
}
+/* Sends an APDU to the tag
+ * TODO: check CRC and preamble
+ */
+int iso14443b_apdu(uint8_t const *message, size_t message_length, uint8_t *response)
+{
+ uint8_t message_frame[message_length + 4];
+ // PCB
+ message_frame[0] = 0x0A | pcb_blocknum;
+ pcb_blocknum ^= 1;
+ // CID
+ message_frame[1] = 0;
+ // INF
+ memcpy(message_frame + 2, message, message_length);
+ // EDC (CRC)
+ ComputeCrc14443(CRC_14443_B, message_frame, message_length + 2, &message_frame[message_length + 2], &message_frame[message_length + 3]);
+ // send
+ CodeAndTransmit14443bAsReader(message_frame, message_length + 4);
+ // get response
+ GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+ if(Demod.len < 3)
+ return 0;
+
+ // TODO: Check CRC
+ // copy response contents
+ if(response != NULL)
+ memcpy(response, Demod.output, Demod.len);
+
+ return Demod.len;
+}
+
+/* Perform the ISO 14443 B Card Selection procedure
+ * Currently does NOT do any collision handling.
+ * It expects 0-1 cards in the device's range.
+ * TODO: Support multiple cards (perform anticollision)
+ * TODO: Verify CRC checksums
+ */
+int iso14443b_select_card()
+{
+ // WUPB command (including CRC)
+ // Note: WUPB wakes up all tags, REQB doesn't wake up tags in HALT state
+ static const uint8_t wupb[] = { 0x05, 0x00, 0x08, 0x39, 0x73 };
+ // ATTRIB command (with space for CRC)
+ uint8_t attrib[] = { 0x1D, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x00, 0x00, 0x00};
+
+ // first, wake up the tag
+ CodeAndTransmit14443bAsReader(wupb, sizeof(wupb));
+ GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+ // ATQB too short?
+ if (Demod.len < 14)
+ return 2;
+
+ // select the tag
+ // copy the PUPI to ATTRIB
+ memcpy(attrib + 1, Demod.output + 1, 4);
+ /* copy the protocol info from ATQB (Protocol Info -> Protocol_Type) into
+ ATTRIB (Param 3) */
+ attrib[7] = Demod.output[10] & 0x0F;
+ ComputeCrc14443(CRC_14443_B, attrib, 9, attrib + 9, attrib + 10);
+ CodeAndTransmit14443bAsReader(attrib, sizeof(attrib));
+ GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
+ // Answer to ATTRIB too short?
+ if(Demod.len < 3)
+ return 2;
+
+ // reset PCB block number
+ pcb_blocknum = 0;
+ return 1;
+}
+
+// Set up ISO 14443 Type B communication (similar to iso14443a_setup)
+void iso14443b_setup() {
+
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+
+ BigBuf_free(); BigBuf_Clear_ext(false);
+ DemodReset();
+ UartReset();
+
+ // Set up the synchronous serial port
+ FpgaSetupSsc();
+
+ // connect Demodulated Signal to ADC:
+ SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
+
+ // Signal field is on with the appropriate LED
+ LED_D_ON();
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX | FPGA_HF_READER_TX_SHALLOW_MOD);
+ SpinDelay(200);
+
+ // Start the timer
+ StartCountSspClk();
+}
//-----------------------------------------------------------------------------
// Read a SRI512 ISO 14443B tag.
//-----------------------------------------------------------------------------
void ReadSTMemoryIso14443b(uint32_t dwLast)
{
+ FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
clear_trace();
set_tracing(TRUE);
uint8_t i = 0x00;
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
// Make sure that we start from off, since the tags are stateful;
// confusing things will happen if we don't reset them between reads.
LED_D_OFF();
if (Demod.len == 0) {
DbpString("No response from tag");
+ set_tracing(FALSE);
return;
} else {
Dbprintf("Randomly generated Chip ID (+ 2 byte CRC): %02x %02x %02x",
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
if (Demod.len != 3) {
Dbprintf("Expected 3 bytes from tag, got %d", Demod.len);
+ set_tracing(FALSE);
return;
}
// Check the CRC of the answer:
ComputeCrc14443(CRC_14443_B, Demod.output, 1 , &cmd1[2], &cmd1[3]);
if(cmd1[2] != Demod.output[1] || cmd1[3] != Demod.output[2]) {
DbpString("CRC Error reading select response.");
+ set_tracing(FALSE);
return;
}
// Check response from the tag: should be the same UID as the command we just sent:
if (cmd1[1] != Demod.output[0]) {
Dbprintf("Bad response to SELECT from Tag, aborting: %02x %02x", cmd1[1], Demod.output[0]);
+ set_tracing(FALSE);
return;
}
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
if (Demod.len != 10) {
Dbprintf("Expected 10 bytes from tag, got %d", Demod.len);
+ set_tracing(FALSE);
return;
}
// The check the CRC of the answer (use cmd1 as temporary variable):
if(cmd1[2] != Demod.output[8] || cmd1[3] != Demod.output[9]) {
Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
(cmd1[2]<<8)+cmd1[3], (Demod.output[8]<<8)+Demod.output[9]);
- // Do not return;, let's go on... (we should retry, maybe ?)
+ // Do not return;, let's go on... (we should retry, maybe ?)
}
Dbprintf("Tag UID (64 bits): %08x %08x",
(Demod.output[7]<<24) + (Demod.output[6]<<16) + (Demod.output[5]<<8) + Demod.output[4],
i = 0x00;
dwLast++;
for (;;) {
- if (i == dwLast) {
+ if (i == dwLast) {
DbpString("System area block (0xff):");
i = 0xff;
}
CodeAndTransmit14443bAsReader(cmd1, sizeof(cmd1));
GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
if (Demod.len != 6) { // Check if we got an answer from the tag
- DbpString("Expected 6 bytes from tag, got less...");
- return;
+ DbpString("Expected 6 bytes from tag, got less...");
+ return;
}
// The check the CRC of the answer (use cmd1 as temporary variable):
ComputeCrc14443(CRC_14443_B, Demod.output, 4, &cmd1[2], &cmd1[3]);
- if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
+ if(cmd1[2] != Demod.output[4] || cmd1[3] != Demod.output[5]) {
Dbprintf("CRC Error reading block! Expected: %04x got: %04x",
(cmd1[2]<<8)+cmd1[3], (Demod.output[4]<<8)+Demod.output[5]);
- // Do not return;, let's go on... (we should retry, maybe ?)
+ // Do not return;, let's go on... (we should retry, maybe ?)
}
// Now print out the memory location:
Dbprintf("Address=%02x, Contents=%08x, CRC=%04x", i,
}
i++;
}
+
+ set_tracing(FALSE);
}
int triggered = TRUE; // TODO: set and evaluate trigger condition
FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- BigBuf_free();
+ BigBuf_free(); BigBuf_Clear_ext(false);
clear_trace();
set_tracing(TRUE);
upTo = dmaBuf;
lastRxCounter = ISO14443B_DMA_BUFFER_SIZE;
FpgaSetupSscDma((uint8_t*) dmaBuf, ISO14443B_DMA_BUFFER_SIZE);
- uint8_t parity[MAX_PARITY_SIZE];
+ //uint8_t parity[MAX_PARITY_SIZE] = {0x00};
bool TagIsActive = FALSE;
bool ReaderIsActive = FALSE;
-
+
// And now we loop, receiving samples.
for(;;) {
int behindBy = (lastRxCounter - AT91C_BASE_PDC_SSC->PDC_RCR) &
Dbprintf("blew circular buffer! behindBy=%d", behindBy);
break;
}
+
if(!tracing) {
- DbpString("Reached trace limit");
+ DbpString("Trace full");
break;
}
+
if(BUTTON_PRESS()) {
DbpString("cancelled");
break;
samples += 2;
if (!TagIsActive) { // no need to try decoding reader data if the tag is sending
- if(Handle14443bUartBit(ci & 0x01)) {
+ if (Handle14443bUartBit(ci & 0x01)) {
if(triggered && tracing) {
- LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
+ //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
+ LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE);
}
/* And ready to receive another command. */
UartReset();
/* false-triggered by the commands from the reader. */
DemodReset();
}
- if(Handle14443bUartBit(cq & 0x01)) {
+ if (Handle14443bUartBit(cq & 0x01)) {
if(triggered && tracing) {
- LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
+ //LogTrace(Uart.output, Uart.byteCnt, samples, samples, parity, TRUE);
+ LogTrace(Uart.output, Uart.byteCnt, samples, samples, NULL, TRUE);
+ }
+ /* And ready to receive another command. */
+ UartReset();
+ /* And also reset the demod code, which might have been */
+ /* false-triggered by the commands from the reader. */
+ DemodReset();
}
- /* And ready to receive another command. */
- UartReset();
- /* And also reset the demod code, which might have been */
- /* false-triggered by the commands from the reader. */
- DemodReset();
- }
ReaderIsActive = (Uart.state > STATE_GOT_FALLING_EDGE_OF_SOF);
}
if(!ReaderIsActive) { // no need to try decoding tag data if the reader is sending - and we cannot afford the time
+ // is this | 0x01 the error? & 0xfe in https://github.com/Proxmark/proxmark3/issues/103
if(Handle14443bSamplesDemod(ci | 0x01, cq | 0x01)) {
//Use samples as a time measurement
if(tracing)
- {
- uint8_t parity[MAX_PARITY_SIZE];
- LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
- }
+ //LogTrace(Demod.output, Demod.len, samples, samples, parity, FALSE);
+ LogTrace(Demod.output, Demod.len, samples, samples, NULL, FALSE);
+
triggered = TRUE;
// And ready to receive another response.
}
TagIsActive = (Demod.state > DEMOD_GOT_FALLING_EDGE_OF_SOF);
}
-
}
FpgaDisableSscDma();
LEDsoff();
+
AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS;
DbpString("Snoop statistics:");
Dbprintf(" Max behind by: %i", maxBehindBy);
Dbprintf(" Uart ByteCnt: %i", Uart.byteCnt);
Dbprintf(" Uart ByteCntMax: %i", Uart.byteCntMax);
Dbprintf(" Trace length: %i", BigBuf_get_traceLen());
+ set_tracing(FALSE);
}
*/
void SendRawCommand14443B(uint32_t datalen, uint32_t recv, uint8_t powerfield, uint8_t data[])
{
- FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
- SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
- FpgaSetupSsc();
-
- set_tracing(TRUE);
+ // param ISO_
+ // param ISO_CONNECT
+ // param ISO14A_NO_DISCONNECT
+ //if (param & ISO14A_NO_DISCONNECT)
+ // return;
+ iso14443b_setup();
- CodeAndTransmit14443bAsReader(data, datalen);
+ if ( datalen == 0 && recv == 0 && powerfield == 0){
+
+ } else {
+ clear_trace();
+ set_tracing(TRUE);
+ CodeAndTransmit14443bAsReader(data, datalen);
+ }
- if(recv) {
- GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, TRUE);
- uint16_t iLen = MIN(Demod.len, USB_CMD_DATA_SIZE);
- cmd_send(CMD_ACK, iLen, 0, 0, Demod.output, iLen);
+ if (recv) {
+ GetSamplesFor14443bDemod(RECEIVE_SAMPLES_TIMEOUT, FALSE);
+ uint16_t len = MIN(Demod.len, USB_CMD_DATA_SIZE);
+ cmd_send(CMD_ACK, len, 0, 0, Demod.output, len);
}
- if(!powerfield) {
+ if (!powerfield) {
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ FpgaDisableSscDma();
+ set_tracing(FALSE);
LED_D_OFF();
}
}
projects / proxmark3-svn / blobdiff