flag needed for some compile environments

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 5cdfe834a1fb3771d128fa7d4a31b7e54e88cd25..d607b0fdd5b1e085f92a985c114213ac3311cf44 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -17,7 +17,7 @@
 #include "lfdemod.h"
 #include "lfsampling.h"
 #include "protocols.h"
-#include "usb_cdc.h" //test
+#include "usb_cdc.h" // for usb_poll_validate_length
 
 /**
  * Function to do a modulation and then get samples.
@@ -37,6 +37,8 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
 
        sample_config sc = { 0,0,1, divisor_used, 0};
        setSamplingConfig(&sc);
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
 
        /* Make sure the tag is reset */
        FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
@@ -377,7 +379,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
        AcquireTiType();
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-       DbpString("Now use tiread to check");
+       DbpString("Now use `lf ti read` to check");
 }
 
 void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
@@ -401,6 +403,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                //wait until SSC_CLK goes HIGH
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
                        if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
+                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                                DbpString("Stopped");
                                return;
                        }
@@ -418,8 +421,9 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                        LED_D_OFF();
                //wait until SSC_CLK goes LOW
                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
-                       if(BUTTON_PRESS()) {
+                       if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
                                DbpString("Stopped");
+                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                                return;
                        }
                        WDT_HIT();
@@ -434,6 +438,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
                                SpinDelayUs(gap);
                        }
                }
+
        }
 }
 
@@ -640,6 +645,19 @@ static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
                memset(dest+(*n), c ^ *phase, clock);
                *phase ^= 1;
        }
+       *n += clock;
+}
+
+static void stAskSimBit(int *n, uint8_t clock) {
+       uint8_t *dest = BigBuf_get_addr();
+       uint8_t halfClk = clock/2;
+       //ST = .5 high .5 low 1.5 high .5 low 1 high    
+       memset(dest+(*n), 1, halfClk);
+       memset(dest+(*n) + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock, 1, clock + halfClk);
+       memset(dest+(*n) + clock*2 + halfClk, 0, halfClk);
+       memset(dest+(*n) + clock*3, 1, clock);
+       *n += clock*4;
 }
 
 // args clock, ask/man or askraw, invert, transmission separator
@@ -657,7 +675,7 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
                for (i=0; i<size; i++){
                        biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                }
-               if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
+               if (phase==1) { //run a second set inverted to keep phase in check
                        for (i=0; i<size; i++){
                                biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
                        }
@@ -672,8 +690,10 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
                        }
                }
        }
-       
-       if (separator==1) Dbprintf("sorry but separator option not yet available"); 
+       if (separator==1 && encoding == 1)
+               stAskSimBit(&n, clk);
+       else if (separator==1)
+               Dbprintf("sorry but separator option not yet available");
 
        Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
        //DEBUG
@@ -683,7 +703,7 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
        //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
        //i+=16;
        //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-
+       
        if (ledcontrol) LED_A_ON();
        SimulateTagLowFrequency(n, 0, ledcontrol);
        if (ledcontrol) LED_A_OFF();
@@ -752,6 +772,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
+
        while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
                WDT_HIT();
@@ -820,13 +843,15 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                                if (ledcontrol) LED_A_OFF();
                                *high = hi;
                                *low = lo;
-                               return;
+                               break;
                        }
                        // reset
                }
                hi2 = hi = lo = idx = 0;
                WDT_HIT();
        }
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
@@ -837,6 +862,8 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
        int idx=0;
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
@@ -909,12 +936,13 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                }
                if (findone){
                        if (ledcontrol) LED_A_OFF();
-                       return;
+                       break;
                }
                // reset
                idx = 0;
                WDT_HIT();
        }
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
@@ -927,6 +955,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
        int clk=0, invert=0, errCnt=0, maxErr=20;
        uint32_t hi=0;
        uint64_t lo=0;
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
@@ -967,13 +997,14 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
                                if (ledcontrol) LED_A_OFF();
                                *high=lo>>32;
                                *low=lo & 0xFFFFFFFF;
-                               return;
+                               break;
                        }
                }
                WDT_HIT();
                hi = lo = size = idx = 0;
                clk = invert = errCnt = 0;
        }
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
@@ -986,6 +1017,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t version=0;
        uint8_t facilitycode=0;
        uint16_t number=0;
+       //clear read buffer
+       BigBuf_Clear_keep_EM();
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
@@ -1030,7 +1063,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
                        //LED_A_OFF();
                        *high=code;
                        *low=code2;
-                       return;
+                       break;
                }
                code=code2=0;
                version=facilitycode=0;
@@ -1039,6 +1072,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
                WDT_HIT();
        }
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        DbpString("Stopped");
        if (ledcontrol) LED_A_OFF();
 }
@@ -1079,7 +1113,7 @@ void T55xxWriteBit(int bit) {
 void T55xxResetRead(void) {
        LED_A_ON();
        //clear buffer now so it does not interfere with timing later
-       BigBuf_Clear_ext(false);
+       BigBuf_Clear_keep_EM();
 
        // Set up FPGA, 125kHz
        LFSetupFPGAForADC(95, true);
@@ -1404,7 +1438,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
        LED_D_ON();
 
        // Write EM410x ID
-       uint32_t data[] = {0, id>>32, id & 0xFFFFFFFF};
+       uint32_t data[] = {0, (uint32_t)(id>>32), (uint32_t)(id & 0xFFFFFFFF)};
 
        clock = (card & 0xFF00) >> 8;
        clock = (clock == 0) ? 64 : clock;