+
+ WaitUS(START_GAP1of4);
+
+
+ /*
+ 00 : 1 if 4
+ 11 : Opcode
+ 00 : Fixed 00 if protected write (i.e. have password)
+ <32 bit Password>
+ 0 : Lock Bit
+ <32 bit data>
+ <3 bit addr>
+
+ Standard Write : 00 1p L <32 data bits> <3 bit addr>
+ 00 10 0 00000000000000000000000000000000 001
+ Protected Write: 00 1p 00 <32 pwd bits> L <32 data bits> <3 bit addr>
+ 00 10 00 00000000000000000000000000000000 0 00000000000000000000000000000000 001
+ Wake Up 00 10 00 <32 pwd bits>
+ Protected Read 00 1p 00 <32 pwd bits> 0 <3 bit addr>
+ Standard Read 00 1p 0 <3 bit addr>
+ Page 0/1 read 00 1p
+ Reset 00 00
+
+ */
+ T55xxWriteBit_1of4 (0); //Send Reference 00
+
+ if (testMode) Dbprintf("TestMODE");
+ // Std Opcode 10
+ if (testMode) bits = 0; else bits = 2; // 0x or 1x
+ if (testMode) bits |= 1; else bits += (Page); // x0 or x1
+ T55xxWriteBit_1of4 (bits);
+
+ if (PwdMode) {
+ // 1 of 4 00 - insert two fixed 00 between opcode and password
+ T55xxWriteBit_1of4 (0); // 00
+
+ // Send Pwd
+ for (bitpos = 31; bitpos >= 1; bitpos -= 2) { // 2 bits at a time
+ bits = (((Pwd >> bitpos) & 1) << 1) + ((Pwd >> (bitpos-1)) & 1);
+ T55xxWriteBit_1of4 (bits);
+ }
+ }
+
+ // Send Lock bit
+ bits = 0; // Add lock bit (Not Set) to the next 2 bits
+
+ // Send Data - offset by 1 bit due to lock bit
+ // 2 bits at a time - Initilised with lock bit above
+ for (bitpos = 31; bitpos >= 1; bitpos -= 2) {
+ bits |= ((Data >> bitpos) & 1); // Add Low bit
+ T55xxWriteBit_1of4 (bits);
+ bits = ((Data >> (bitpos-1)) & 1) << 1; // Set next high bit
+ }
+
+ // Send Block number
+ bits |= ((Block >> 2) & 1);
+ T55xxWriteBit_1of4 (bits);
+ bits = (Block & 3);// 1) & 2) + (Block & 1);
+ T55xxWriteBit_1of4 (bits);
+
+ // Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
+ // so wait a little more)
+ // "there is a clock delay before programming"
+ // - programming takes ~5.6ms for t5577 ~18ms for E5550 or t5567
+ // so we should wait 1 clock + 5.6ms then read response?
+ // but we need to know we are dealing with t5577 vs t5567 vs e5550 (or q5) marshmellow...
+ if (testMode) {
+ //TESTMODE TIMING TESTS:
+ // <566us does nothing
+ // 566-568 switches between wiping to 0s and doing nothing
+ // 5184 wipes and allows 1 block to be programmed.
+ // indefinite power on wipes and then programs all blocks with bitshifted data sent.
+ TurnReadLFOn(5184);
+
+ } else {
+ TurnReadLFOn(20 * 1000);
+ //could attempt to do a read to confirm write took
+ // as the tag should repeat back the new block
+ // until it is reset, but to confirm it we would
+ // need to know the current block 0 config mode for
+ // modulation clock an other details to demod the response...
+ // response should be (for t55x7) a 0 bit then (ST if on)
+ // block data written in on repeat until reset.
+
+ //DoPartialAcquisition(20, true, 12000);
+ }
+
+ // turn field off
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+ LED_A_OFF();
+
+}
+
+// Send T5577 reset command then read stream (see if we can identify the start of the stream)
+void T55xxResetRead(void) {
+ LED_A_ON();
+ //clear buffer now so it does not interfere with timing later
+ BigBuf_Clear_keep_EM();
+
+ // Set up FPGA, 125kHz
+ LFSetupFPGAForADC(95, true);
+ StartTicks();
+ // make sure tag is fully powered up...
+ WaitMS(5);
+