]> cvs.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/apps.h
change usb_cmd struct to be more sane
[proxmark3-svn] / armsrc / apps.h
index 6f146f786a80aed72513da7445d4e73db9f116d6..d90d595a880cc34b84e1cf9cf217279459096c63 100644 (file)
@@ -13,7 +13,7 @@ DWORD BigBuf[12000];
 \r
 /// appmain.h\r
 void ReadMem(int addr);\r
 \r
 /// appmain.h\r
 void ReadMem(int addr);\r
-void AppMain(void);\r
+void __attribute__((noreturn)) AppMain(void);\r
 void SamyRun(void);\r
 void DbpIntegers(int a, int b, int c);\r
 void DbpString(char *str);\r
 void SamyRun(void);\r
 void DbpIntegers(int a, int b, int c);\r
 void DbpString(char *str);\r
@@ -34,33 +34,35 @@ void FpgaGatherVersion(char *dst, int len);
 void FpgaSetupSsc(void);\r
 void SetupSpi(int mode);\r
 void FpgaSetupSscDma(BYTE *buf, int len);\r
 void FpgaSetupSsc(void);\r
 void SetupSpi(int mode);\r
 void FpgaSetupSscDma(BYTE *buf, int len);\r
-void SetAdcMuxFor(int whichGpio);\r
+void SetAdcMuxFor(DWORD whichGpio);\r
 \r
 // Definitions for the FPGA commands.\r
 \r
 // Definitions for the FPGA commands.\r
-#define FPGA_CMD_SET_CONFREG                                                           (1<<12)\r
-#define FPGA_CMD_SET_DIVISOR                                                           (2<<12)\r
+#define FPGA_CMD_SET_CONFREG                                           (1<<12)\r
+#define FPGA_CMD_SET_DIVISOR                                           (2<<12)\r
 // Definitions for the FPGA configuration word.\r
 // Definitions for the FPGA configuration word.\r
-#define FPGA_MAJOR_MODE_LF_READER                                              (0<<5)\r
+#define FPGA_MAJOR_MODE_LF_READER                                      (0<<5)\r
 #define FPGA_MAJOR_MODE_LF_SIMULATOR                           (1<<5)\r
 #define FPGA_MAJOR_MODE_HF_READER_TX                           (2<<5)\r
 #define FPGA_MAJOR_MODE_LF_SIMULATOR                           (1<<5)\r
 #define FPGA_MAJOR_MODE_HF_READER_TX                           (2<<5)\r
-#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR     (3<<5)\r
+#define FPGA_MAJOR_MODE_HF_READER_RX_XCORR                     (3<<5)\r
 #define FPGA_MAJOR_MODE_HF_SIMULATOR                           (4<<5)\r
 #define FPGA_MAJOR_MODE_HF_ISO14443A                           (5<<5)\r
 #define FPGA_MAJOR_MODE_LF_PASSTHRU                                    (6<<5)\r
 #define FPGA_MAJOR_MODE_HF_SIMULATOR                           (4<<5)\r
 #define FPGA_MAJOR_MODE_HF_ISO14443A                           (5<<5)\r
 #define FPGA_MAJOR_MODE_LF_PASSTHRU                                    (6<<5)\r
-#define FPGA_MAJOR_MODE_OFF                                                                    (7<<5)\r
+#define FPGA_MAJOR_MODE_OFF                                                    (7<<5)\r
 // Options for the HF reader, tx to tag\r
 #define FPGA_HF_READER_TX_SHALLOW_MOD                          (1<<0)\r
 // Options for the HF reader, correlating against rx from tag\r
 // Options for the HF reader, tx to tag\r
 #define FPGA_HF_READER_TX_SHALLOW_MOD                          (1<<0)\r
 // Options for the HF reader, correlating against rx from tag\r
-#define FPGA_HF_READER_RX_XCORR_848_KHZ                        (1<<0)\r
+#define FPGA_HF_READER_RX_XCORR_848_KHZ                                (1<<0)\r
 #define FPGA_HF_READER_RX_XCORR_SNOOP                          (1<<1)\r
 #define FPGA_HF_READER_RX_XCORR_SNOOP                          (1<<1)\r
+#define FPGA_HF_READER_RX_XCORR_QUARTER_FREQ                   (1<<2)\r
 // Options for the HF simulated tag, how to modulate\r
 // Options for the HF simulated tag, how to modulate\r
-#define FPGA_HF_SIMULATOR_NO_MODULATION                        (0<<0)\r
-#define FPGA_HF_SIMULATOR_MODULATE_BPSK                        (1<<0)\r
+#define FPGA_HF_SIMULATOR_NO_MODULATION                                (0<<0)\r
+#define FPGA_HF_SIMULATOR_MODULATE_BPSK                                (1<<0)\r
+#define FPGA_HF_SIMULATOR_MODULATE_212K                                (2<<0)\r
 // Options for ISO14443A\r
 // Options for ISO14443A\r
-#define FPGA_HF_ISO14443A_SNIFFER                                              (0<<0)\r
-#define FPGA_HF_ISO14443A_TAGSIM_LISTEN                        (1<<0)\r
+#define FPGA_HF_ISO14443A_SNIFFER                                      (0<<0)\r
+#define FPGA_HF_ISO14443A_TAGSIM_LISTEN                                (1<<0)\r
 #define FPGA_HF_ISO14443A_TAGSIM_MOD                           (2<<0)\r
 #define FPGA_HF_ISO14443A_TAGSIM_MOD                           (2<<0)\r
-#define FPGA_HF_ISO14443A_READER_LISTEN                        (3<<0)\r
+#define FPGA_HF_ISO14443A_READER_LISTEN                                (3<<0)\r
 #define FPGA_HF_ISO14443A_READER_MOD                           (4<<0)\r
 \r
 /// lfops.h\r
 #define FPGA_HF_ISO14443A_READER_MOD                           (4<<0)\r
 \r
 /// lfops.h\r
@@ -74,11 +76,14 @@ void AcquireRawBitsTI(void);
 void SimulateTagLowFrequency(int period, int ledcontrol);\r
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol);\r
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol);\r
 void SimulateTagLowFrequency(int period, int ledcontrol);\r
 void CmdHIDsimTAG(int hi, int lo, int ledcontrol);\r
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol);\r
+void SimulateTagLowFrequencyBidir(int divisor, int max_bitlen);\r
 \r
 /// iso14443.h\r
 void SimulateIso14443Tag(void);\r
 void AcquireRawAdcSamplesIso14443(DWORD parameter);\r
 void ReadSRI512Iso14443(DWORD parameter);\r
 \r
 /// iso14443.h\r
 void SimulateIso14443Tag(void);\r
 void AcquireRawAdcSamplesIso14443(DWORD parameter);\r
 void ReadSRI512Iso14443(DWORD parameter);\r
+void ReadSRIX4KIso14443(DWORD parameter);
+void ReadSTMemoryIso14443(DWORD parameter,DWORD dwLast);
 void SnoopIso14443(void);\r
 \r
 /// iso14443a.h\r
 void SnoopIso14443(void);\r
 \r
 /// iso14443a.h\r
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