implement marking the second STT when detected

[proxmark3-svn] / armsrc / util.c

diff --git a/armsrc/util.c b/armsrc/util.c
index 674f1b91f5ef76d129fa3b200eeb0605ef49b364..a0fa50d3a3bc23c68ba7d41d44db749297adf63e 100644 (file)
--- a/armsrc/util.c
+++ b/armsrc/util.c
@@ -12,6 +12,7 @@
 #include "util.h"
 #include "string.h"
 #include "apps.h"
 #include "util.h"
 #include "string.h"
 #include "apps.h"

+#include "BigBuf.h"

 
 
 
 
 
 


@@ -34,7 +35,7 @@ void print_result(char *name, uint8_t *buf, size_t len) {
 }
 
 size_t nbytes(size_t nbits) {
 }
 
 size_t nbytes(size_t nbits) {

-       return (nbits/8)+((nbits%8)>0);
+       return (nbits >> 3)+((nbits % 8) > 0);

 }
 
 uint32_t SwapBits(uint32_t value, int nrbits) {
 }
 
 uint32_t SwapBits(uint32_t value, int nrbits) {


@@ -267,15 +268,15 @@ void FormatVersionInformation(char *dst, int len, const char *prefix, void *vers
        dst[0] = 0;
        strncat(dst, prefix, len-1);
        if(v->magic != VERSION_INFORMATION_MAGIC) {
        dst[0] = 0;
        strncat(dst, prefix, len-1);
        if(v->magic != VERSION_INFORMATION_MAGIC) {

-               strncat(dst, "Missing/Invalid version information", len - strlen(dst) - 1);
+               strncat(dst, "Missing/Invalid version information\n", len - strlen(dst) - 1);

                return;
        }
        if(v->versionversion != 1) {
                return;
        }
        if(v->versionversion != 1) {

-               strncat(dst, "Version information not understood", len - strlen(dst) - 1);
+               strncat(dst, "Version information not understood\n", len - strlen(dst) - 1);

                return;
        }
        if(!v->present) {
                return;
        }
        if(!v->present) {

-               strncat(dst, "Version information not available", len - strlen(dst) - 1);
+               strncat(dst, "Version information not available\n", len - strlen(dst) - 1);

                return;
        }
 
                return;
        }
 


@@ -288,6 +289,7 @@ void FormatVersionInformation(char *dst, int len, const char *prefix, void *vers
 
        strncat(dst, " ", len - strlen(dst) - 1);
        strncat(dst, v->buildtime, len - strlen(dst) - 1);
 
        strncat(dst, " ", len - strlen(dst) - 1);
        strncat(dst, v->buildtime, len - strlen(dst) - 1);

+       strncat(dst, "\n", len - strlen(dst) - 1);

 }
 
 //  -------------------------------------------------------------------------
 }
 
 //  -------------------------------------------------------------------------


@@ -302,11 +304,12 @@ void FormatVersionInformation(char *dst, int len, const char *prefix, void *vers
 
 void StartTickCount()
 {
 
 void StartTickCount()
 {

-//  must be 0x40, but on my cpu - included divider is optimal
-//  0x20 - 1 ms / bit 
-//  0x40 - 2 ms / bit
-
-       AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST + 0x001D; // was 0x003B
+       // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
+       // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
+    uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff;                // = 16 * main clock frequency (16MHz) / slow clock frequency
+       // set RealTimeCounter divider to count at 1kHz:
+       AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST | ((256000 + (mainf/2)) / mainf);
+       // note: worst case precision is approx 2.5%

 }
 
 /*
 }
 
 /*


@@ -342,7 +345,7 @@ void StartCountUS()
        }
 
 uint32_t RAMFUNC GetCountUS(){
        }
 
 uint32_t RAMFUNC GetCountUS(){

-       return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
+       return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3); //was  /15) * 10);

 }
 
 static uint32_t GlobalUsCounter = 0;
 }
 
 static uint32_t GlobalUsCounter = 0;


@@ -415,8 +418,13 @@ void StartCountSspClk()
        // we can use the counter.
        while (AT91C_BASE_TC0->TC_CV < 0xFFF0);
 }
        // we can use the counter.
        while (AT91C_BASE_TC0->TC_CV < 0xFFF0);
 }

-
-
+void ResetSspClk(void) {
+       //enable clock of timer and software trigger
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       while (AT91C_BASE_TC2->TC_CV > 0);
+}

 uint32_t RAMFUNC GetCountSspClk(){
        uint32_t tmp_count;
        tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
 uint32_t RAMFUNC GetCountSspClk(){
        uint32_t tmp_count;
        tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;


@@ -428,4 +436,80 @@ uint32_t RAMFUNC GetCountSspClk(){
        }
 }
 
        }
 }
 

+//  -------------------------------------------------------------------------
+//  Timer for bitbanging,  or LF stuff when you need a very precis timer
+//  1us = 1.5ticks
+//  -------------------------------------------------------------------------
+void StartTicks(void){
+       //initialization of the timer
+       // tc1 is higher 0xFFFF0000
+       // tc0 is lower 0x0000FFFF
+       AT91C_BASE_PMC->PMC_PCER |= (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1);
+       AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
+       AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz) / 32 
+                                                               AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
+                                                               AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
+       AT91C_BASE_TC0->TC_RA = 1;
+       AT91C_BASE_TC0->TC_RC = 0; 
+
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;       // timer disable  
+       AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_XC1; // from TC0
+       
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TCB->TCB_BCR = 1;
+       
+       // wait until timer becomes zero.
+       while (AT91C_BASE_TC1->TC_CV > 0);
+}
+
+// Wait - Spindelay in ticks.
+// if called with a high number, this will trigger the WDT...
+void WaitTicks(uint32_t ticks){
+       if ( ticks == 0 ) return;
+       ticks += GET_TICKS;     
+       while (GET_TICKS < ticks);
+}
+// Wait / Spindelay in us (microseconds) 
+// 1us = 1.5ticks.
+void WaitUS(uint16_t us){
+       if ( us == 0 ) return;
+       WaitTicks(  (uint32_t)(us * 1.5) );
+}
+void WaitMS(uint16_t ms){
+       if (ms == 0) return;
+       WaitTicks( (uint32_t)(ms * 1500) );
+}
+// Starts Clock and waits until its reset
+void ResetTicks(void){
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       while (AT91C_BASE_TC1->TC_CV > 0);
+}
+void ResetTimer(AT91PS_TC timer){
+       timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       while(timer->TC_CV > 0) ;
+}
+// stop clock
+void StopTicks(void){
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;       
+}
+
+static uint64_t next_random = 1;
+
+/* Generates a (non-cryptographically secure) 32-bit random number.
+ *
+ * We don't have an implementation of the "rand" function or a clock to seed it
+ * with, so we just call GetTickCount the first time to seed ourselves.
+ */
+uint32_t prand() {
+       if (next_random == 1) {
+               next_random = GetTickCount();
+       }
+
+       next_random = next_random * 6364136223846793005 + 1;
+       return (uint32_t)(next_random >> 32) % 0xffffffff;
+}