CHG: adjusted two arrays in scripting.c to mirror the added models in reveng 1.4.0

[proxmark3-svn] / armsrc / util.c

diff --git a/armsrc/util.c b/armsrc/util.c
index 8576ddce5fcb7c641236d214bb224ca3221769b1..4e74b88dd2eeaa20470c8e3b60c7150bdb188f5c 100644 (file)
--- a/armsrc/util.c
+++ b/armsrc/util.c
@@ -39,9 +39,8 @@ size_t nbytes(size_t nbits) {
 }
 
 uint32_t SwapBits(uint32_t value, int nrbits) {
-       int i;
        uint32_t newvalue = 0;
-       for(i = 0; i < nrbits; i++) {
+       for(int i = 0; i < nrbits; i++) {
                newvalue ^= ((value >> i) & 1) << (nrbits - 1 - i);
        }
        return newvalue;
@@ -74,6 +73,7 @@ void rol(uint8_t *data, const size_t len){
     }
     data[len-1] = first;
 }
+
 void lsl (uint8_t *data, size_t len) {
     for (size_t n = 0; n < len - 1; n++) {
         data[n] = (data[n] << 1) | (data[n+1] >> 7);
@@ -304,11 +304,12 @@ void FormatVersionInformation(char *dst, int len, const char *prefix, void *vers
 
 void StartTickCount()
 {
-//  must be 0x40, but on my cpu - included divider is optimal
-//  0x20 - 1 ms / bit 
-//  0x40 - 2 ms / bit
-
-       AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST + 0x001D; // was 0x003B
+       // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
+       // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
+    uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff;                // = 16 * main clock frequency (16MHz) / slow clock frequency
+       // set RealTimeCounter divider to count at 1kHz:
+       AT91C_BASE_RTTC->RTTC_RTMR = AT91C_RTTC_RTTRST | ((256000 + (mainf/2)) / mainf);
+       // note: worst case precision is approx 2.5%
 }
 
 /*
@@ -330,8 +331,8 @@ void StartCountUS()
        // fast clock
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS; // timer disable
        AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz)/32 -- tick=1.5mks
-                                                                                                               AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
-                                                                                                               AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
+                                                               AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
+                                                               AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
        AT91C_BASE_TC0->TC_RA = 1;
        AT91C_BASE_TC0->TC_RC = 0xBFFF + 1; // 0xC000
        
@@ -344,7 +345,9 @@ void StartCountUS()
        }
 
 uint32_t RAMFUNC GetCountUS(){
-       return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
+       //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
+       //  By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
+       return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3); 
 }
 
 static uint32_t GlobalUsCounter = 0;
@@ -418,15 +421,10 @@ void StartCountSspClk()
        while (AT91C_BASE_TC0->TC_CV < 0xFFF0);
 }
 
-
 uint32_t RAMFUNC GetCountSspClk(){
-       uint32_t tmp_count;
-       tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
-       if ((tmp_count & 0x0000ffff) == 0) { //small chance that we may have missed an increment in TC2
+       uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
+       if ((tmp_count & 0x0000ffff) == 0)  //small chance that we may have missed an increment in TC2
                return (AT91C_BASE_TC2->TC_CV << 16);
-       } 
-       else {
-               return tmp_count;
-       }
+       return tmp_count;
 }