CHG: "hf legic write" with these I managed to get one byte written. Its a start.

[proxmark3-svn] / armsrc / ticks.c

diff --git a/armsrc/ticks.c b/armsrc/ticks.c
index 4aaa9c98458c96d07acd97b661c838c326e4cfb9..44249879e31210f7aef81c0e85098ab213d6fe2b 100644 (file)
--- a/armsrc/ticks.c
+++ b/armsrc/ticks.c
@@ -8,7 +8,6 @@
 //-----------------------------------------------------------------------------
 // Timers, Clocks functions used in LF or Legic where you would need detailed time.
 //-----------------------------------------------------------------------------
 //-----------------------------------------------------------------------------
 // Timers, Clocks functions used in LF or Legic where you would need detailed time.
 //-----------------------------------------------------------------------------

-

 #include "ticks.h"
 
 // attempt at high resolution microsecond timer
 #include "ticks.h"
 
 // attempt at high resolution microsecond timer


@@ -48,7 +47,7 @@ void SpinDelay(int ms) {
 //     SpinDelay(1000);
 //     ti = GetTickCount() - ti;
 //     Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());
 //     SpinDelay(1000);
 //     ti = GetTickCount() - ti;
 //     Dbprintf("timer(1s): %d t=%d", ti, GetTickCount());

-void StartTickCount() {
+void StartTickCount(void) {

        // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
        // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
     uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff;                // = 16 * main clock frequency (16MHz) / slow clock frequency
        // This timer is based on the slow clock. The slow clock frequency is between 22kHz and 40kHz.
        // We can determine the actual slow clock frequency by looking at the Main Clock Frequency Register.
     uint16_t mainf = AT91C_BASE_PMC->PMC_MCFR & 0xffff;                // = 16 * main clock frequency (16MHz) / slow clock frequency


@@ -60,14 +59,14 @@ void StartTickCount() {
 /*
 * Get the current count.
 */
 /*
 * Get the current count.
 */

-uint32_t RAMFUNC GetTickCount(){
+uint32_t RAMFUNC GetTickCount(void){

        return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
 }
 
 //  -------------------------------------------------------------------------
 //  microseconds timer 
 //  -------------------------------------------------------------------------
        return AT91C_BASE_RTTC->RTTC_RTVR;// was * 2;
 }
 
 //  -------------------------------------------------------------------------
 //  microseconds timer 
 //  -------------------------------------------------------------------------

-void StartCountUS() {
+void StartCountUS(void) {

        AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
 
        AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
 


@@ -87,25 +86,20 @@ void StartCountUS() {
        AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TCB->TCB_BCR = 1;
        
        AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TCB->TCB_BCR = 1;
        

-       while (AT91C_BASE_TC1->TC_CV > 1);
+       while (AT91C_BASE_TC1->TC_CV >= 1);

 }
 
 }
 

-uint32_t RAMFUNC GetCountUS(){
+uint32_t RAMFUNC GetCountUS(void){

        //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
        //  By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
        return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3); 
 }
        //return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV / 15) * 10);
        //  By suggestion from PwPiwi, http://www.proxmark.org/forum/viewtopic.php?pid=17548#p17548
        return (AT91C_BASE_TC1->TC_CV * 0x8000) + ((AT91C_BASE_TC0->TC_CV * 2) / 3); 
 }

-void ResetUSClock(void) {      
-       //enable clock of timer and software trigger
-       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
-       while (AT91C_BASE_TC1->TC_CV > 1);
-}
+

 
 //  -------------------------------------------------------------------------
 //  Timer for iso14443 commands. Uses ssp_clk from FPGA 
 //  -------------------------------------------------------------------------
 
 //  -------------------------------------------------------------------------
 //  Timer for iso14443 commands. Uses ssp_clk from FPGA 
 //  -------------------------------------------------------------------------

-void StartCountSspClk() {
+void StartCountSspClk(void) {

        AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1) | (1 << AT91C_ID_TC2);  // Enable Clock to all timers
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1               // XC0 Clock = TIOA1
                                                        | AT91C_TCB_TC1XC1S_NONE                // XC1 Clock = none
        AT91C_BASE_PMC->PMC_PCER = (1 << AT91C_ID_TC0) | (1 << AT91C_ID_TC1) | (1 << AT91C_ID_TC2);  // Enable Clock to all timers
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_TIOA1               // XC0 Clock = TIOA1
                                                        | AT91C_TCB_TC1XC1S_NONE                // XC1 Clock = none


@@ -160,17 +154,17 @@ void StartCountSspClk() {
 
        // The high word of the counter (TC2) will not reset until the low word (TC0) overflows. 
        // Therefore need to wait quite some time before we can use the counter.
 
        // The high word of the counter (TC2) will not reset until the low word (TC0) overflows. 
        // Therefore need to wait quite some time before we can use the counter.

-       while (AT91C_BASE_TC2->TC_CV > 1);
+       while (AT91C_BASE_TC2->TC_CV >= 1);

 }
 void ResetSspClk(void) {       
        //enable clock of timer and software trigger
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
 }
 void ResetSspClk(void) {       
        //enable clock of timer and software trigger
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TC2->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;

+       while (AT91C_BASE_TC2->TC_CV >= 1);     

 }
 
 }
 

-uint32_t RAMFUNC GetCountSspClk(){
-
+uint32_t RAMFUNC GetCountSspClk(void) {

        uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
        if ((tmp_count & 0x0000ffff) == 0)  //small chance that we may have missed an increment in TC2
                return (AT91C_BASE_TC2->TC_CV << 16);
        uint32_t tmp_count = (AT91C_BASE_TC2->TC_CV << 16) | AT91C_BASE_TC0->TC_CV;
        if ((tmp_count & 0x0000ffff) == 0)  //small chance that we may have missed an increment in TC2
                return (AT91C_BASE_TC2->TC_CV << 16);


@@ -184,14 +178,26 @@ uint32_t RAMFUNC GetCountSspClk(){
 //  -------------------------------------------------------------------------
 void StartTicks(void){
        //initialization of the timer
 //  -------------------------------------------------------------------------
 void StartTicks(void){
        //initialization of the timer

+       // tc1 is higher 0xFFFF0000
+       // tc0 is lower 0x0000FFFF

        AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
        AT91C_BASE_PMC->PMC_PCER |= (1 << 12) | (1 << 13) | (1 << 14);
        AT91C_BASE_TCB->TCB_BMR = AT91C_TCB_TC0XC0S_NONE | AT91C_TCB_TC1XC1S_TIOA0 | AT91C_TCB_TC2XC2S_NONE;
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;

-       AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK;  //clock at 48/32 MHz
+       AT91C_BASE_TC0->TC_CMR = AT91C_TC_CLKS_TIMER_DIV3_CLOCK | // MCK(48MHz) / 32 
+                                                               AT91C_TC_WAVE | AT91C_TC_WAVESEL_UP_AUTO | AT91C_TC_ACPA_CLEAR |
+                                                               AT91C_TC_ACPC_SET | AT91C_TC_ASWTRG_SET;
+       AT91C_BASE_TC0->TC_RA = 1;
+       AT91C_BASE_TC0->TC_RC = 0; 
+
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;       // timer disable  
+       AT91C_BASE_TC1->TC_CMR = AT91C_TC_CLKS_XC1; // from TC0
+       

        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
        AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;

+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;

        AT91C_BASE_TCB->TCB_BCR = 1;
        AT91C_BASE_TCB->TCB_BCR = 1;

+       

        // wait until timer becomes zero.
        // wait until timer becomes zero.

-       while (AT91C_BASE_TC0->TC_CV > 1);
+       while (AT91C_BASE_TC1->TC_CV >= 1);

 }
 // Wait - Spindelay in ticks.
 // if called with a high number, this will trigger the WDT...
 }
 // Wait - Spindelay in ticks.
 // if called with a high number, this will trigger the WDT...


@@ -211,10 +217,17 @@ void WaitMS(uint16_t ms){
        WaitTicks( (uint32_t)(ms * 1500) );
 }
 // Starts Clock and waits until its reset
        WaitTicks( (uint32_t)(ms * 1500) );
 }
 // Starts Clock and waits until its reset

-void ResetTicks(){
-       ResetTimer(AT91C_BASE_TC0);
+void ResetTicks(void){
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
+       while (AT91C_BASE_TC1->TC_CV >= 1);

 }
 void ResetTimer(AT91PS_TC timer){
        timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;
 }
 void ResetTimer(AT91PS_TC timer){
        timer->TC_CCR = AT91C_TC_CLKEN | AT91C_TC_SWTRG;

-       while(timer->TC_CV > 1) ;
+       while(timer->TC_CV >= 1) ;
+}
+// stop clock
+void StopTicks(void){
+       AT91C_BASE_TC0->TC_CCR = AT91C_TC_CLKDIS;
+       AT91C_BASE_TC1->TC_CCR = AT91C_TC_CLKDIS;       

 }
 }