DoAcquisition125k(at134khz);\r
}\r
\r
+/* blank r/w tag data stream\r
+...0000000000000000 01111111\r
+1010101010101010101010101010101010101010101010101010101010101010\r
+0011010010100001\r
+01111111\r
+101010101010101[0]000...\r
+\r
+[5555fe852c5555555555555555fe0000]\r
+*/\r
+void ReadTItag()\r
+{\r
+ // some hardcoded initial params\r
+ // when we read a TI tag we sample the zerocross line at 2Mhz\r
+ // TI tags modulate a 1 as 16 cycles of 123.2Khz\r
+ // TI tags modulate a 0 as 16 cycles of 134.2Khz\r
+ #define FSAMPLE 2000000\r
+ #define FREQLO 123200\r
+ #define FREQHI 134200\r
+\r
+ signed char *dest = (signed char *)BigBuf;\r
+ int n = sizeof(BigBuf);\r
+// int *dest = GraphBuffer;\r
+// int n = GraphTraceLen;\r
+\r
+ // 128 bit shift register [shift3:shift2:shift1:shift0]\r
+ DWORD shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;\r
+\r
+ int i, cycles=0, samples=0;\r
+ // how many sample points fit in 16 cycles of each frequency\r
+ DWORD sampleslo = (FSAMPLE<<4)/FREQLO, sampleshi = (FSAMPLE<<4)/FREQHI;\r
+ // when to tell if we're close enough to one freq or another\r
+ DWORD threshold = (sampleslo - sampleshi + 1)>>1;\r
+\r
+ // TI tags charge at 134.2Khz\r
+ FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
+\r
+ // Place FPGA in passthrough mode, in this mode the CROSS_LO line\r
+ // connects to SSP_DIN and the SSP_DOUT logic level controls\r
+ // whether we're modulating the antenna (high)\r
+ // or listening to the antenna (low)\r
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);\r
+\r
+ // get TI tag data into the buffer\r
+ AcquireTiType();\r
+\r
+ FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
+\r
+ for (i=0; i<n-1; i++) {\r
+ // count cycles by looking for lo to hi zero crossings\r
+ if ( (dest[i]<0) && (dest[i+1]>0) ) {\r
+ cycles++;\r
+ // after 16 cycles, measure the frequency\r
+ if (cycles>15) {\r
+ cycles=0;\r
+ samples=i-samples; // number of samples in these 16 cycles\r
+\r
+ // TI bits are coming to us lsb first so shift them\r
+ // right through our 128 bit right shift register\r
+ shift0 = (shift0>>1) | (shift1 << 31);\r
+ shift1 = (shift1>>1) | (shift2 << 31);\r
+ shift2 = (shift2>>1) | (shift3 << 31);\r
+ shift3 >>= 1;\r
+\r
+ // check if the cycles fall close to the number\r
+ // expected for either the low or high frequency\r
+ if ( (samples>(sampleslo-threshold)) && (samples<(sampleslo+threshold)) ) {\r
+ // low frequency represents a 1\r
+ shift3 |= (1<<31);\r
+ } else if ( (samples>(sampleshi-threshold)) && (samples<(sampleshi+threshold)) ) {\r
+ // high frequency represents a 0\r
+ } else {\r
+ // probably detected a gay waveform or noise\r
+ // use this as gaydar or discard shift register and start again\r
+ shift3 = shift2 = shift1 = shift0 = 0;\r
+ }\r
+ samples = i;\r
+\r
+ // for each bit we receive, test if we've detected a valid tag\r
+\r
+ // if we see 17 zeroes followed by 6 ones, we might have a tag\r
+ // remember the bits are backwards\r
+ if ( ((shift0 & 0x7fffff) == 0x7e0000) ) {\r
+ // if start and end bytes match, we have a tag so break out of the loop\r
+ if ( ((shift0>>16)&0xff) == ((shift3>>8)&0xff) ) {\r
+ cycles = 0xF0B; //use this as a flag (ugly but whatever)\r
+ break;\r
+ }\r
+ }\r
+ }\r
+ }\r
+ }\r
+\r
+ // if flag is set we have a tag\r
+ if (cycles!=0xF0B) {\r
+ DbpString("Info: No valid tag detected.");\r
+ } else {\r
+ // put 64 bit data into shift1 and shift0\r
+ shift0 = (shift0>>24) | (shift1 << 8);\r
+ shift1 = (shift1>>24) | (shift2 << 8);\r
+\r
+ // align 16 bit crc into lower half of shift2\r
+ shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;\r
+\r
+ // if r/w tag, check ident match\r
+ if ( shift3&(1<<15) ) {\r
+ DbpString("Info: TI tag is rewriteable");\r
+ // only 15 bits compare, last bit of ident is not valid\r
+ if ( ((shift3>>16)^shift0)&0x7fff ) {\r
+ DbpString("Error: Ident mismatch!");\r
+ } else {\r
+ DbpString("Info: TI tag ident is valid");\r
+ }\r
+ } else {\r
+ DbpString("Info: TI tag is readonly");\r
+ }\r
+\r
+ // WARNING the order of the bytes in which we calc crc below needs checking\r
+ // i'm 99% sure the crc algorithm is correct, but it may need to eat the\r
+ // bytes in reverse or something\r
+ // calculate CRC\r
+ DWORD crc=0;\r
+\r
+ crc = update_crc16(crc, (shift0)&0xff);\r
+ crc = update_crc16(crc, (shift0>>8)&0xff);\r
+ crc = update_crc16(crc, (shift0>>16)&0xff);\r
+ crc = update_crc16(crc, (shift0>>24)&0xff);\r
+ crc = update_crc16(crc, (shift1)&0xff);\r
+ crc = update_crc16(crc, (shift1>>8)&0xff);\r
+ crc = update_crc16(crc, (shift1>>16)&0xff);\r
+ crc = update_crc16(crc, (shift1>>24)&0xff);\r
+\r
+ DbpString("Info: Tag data_hi, data_lo, crc = ");\r
+ DbpIntegers(shift1, shift0, shift2&0xffff);\r
+ if (crc != (shift2&0xffff)) {\r
+ DbpString("Error: CRC mismatch, expected");\r
+ DbpIntegers(0, 0, crc);\r
+ } else {\r
+ DbpString("Info: CRC is good");\r
+ }\r
+ }\r
+}\r
+\r
+void WriteTIbyte(BYTE b)\r
+{\r
+ int i = 0;\r
+\r
+ // modulate 8 bits out to the antenna\r
+ for (i=0; i<8; i++)\r
+ {\r
+ if (b&(1<<i)) {\r
+ // stop modulating antenna\r
+ PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);\r
+ SpinDelayUs(1000);\r
+ // modulate antenna\r
+ PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);\r
+ SpinDelayUs(1000);\r
+ } else {\r
+ // stop modulating antenna\r
+ PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);\r
+ SpinDelayUs(300);\r
+ // modulate antenna\r
+ PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);\r
+ SpinDelayUs(1700);\r
+ }\r
+ }\r
+}\r
+\r
void AcquireTiType(void)\r
{\r
- int i;\r
+ int i, j, n;\r
// tag transmission is <20ms, sampling at 2M gives us 40K samples max\r
// each sample is 1 bit stuffed into a DWORD so we need 1250 DWORDS\r
- int n = 1250;\r
+ #define TIBUFLEN 1250\r
\r
// clear buffer\r
memset(BigBuf,0,sizeof(BigBuf));\r
for(;;) {\r
if(SSC_STATUS & SSC_STATUS_RX_READY) {\r
BigBuf[i] = SSC_RECEIVE_HOLDING; // store 32 bit values in buffer\r
- i++; if(i >= n) return;\r
+ i++; if(i >= TIBUFLEN) break;\r
}\r
WDT_HIT();\r
}\r
// return stolen pin to SSP\r
PIO_DISABLE = (1<<GPIO_SSC_DOUT);\r
PIO_PERIPHERAL_A_SEL = (1<<GPIO_SSC_DIN) | (1<<GPIO_SSC_DOUT);\r
-}\r
-\r
-void ReadTItag()\r
-{\r
-}\r
-\r
-void WriteTIbyte(BYTE b)\r
-{\r
- int i = 0;\r
\r
- // modulate 8 bits out to the antenna\r
- for (i=0; i<8; i++)\r
- {\r
- if (b&(1<<i)) {\r
- // stop modulating antenna\r
- PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);\r
- SpinDelayUs(1000);\r
- // modulate antenna\r
- PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);\r
- SpinDelayUs(1000);\r
- } else {\r
- // stop modulating antenna\r
- PIO_OUTPUT_DATA_CLEAR = (1<<GPIO_SSC_DOUT);\r
- SpinDelayUs(300);\r
- // modulate antenna\r
- PIO_OUTPUT_DATA_SET = (1<<GPIO_SSC_DOUT);\r
- SpinDelayUs(1700);\r
+ char *dest = (char *)BigBuf;\r
+ n = TIBUFLEN*32;\r
+ // unpack buffer\r
+ for (i=TIBUFLEN-1; i>=0; i--) {\r
+// DbpIntegers(0, 0, BigBuf[i]);\r
+ for (j=0; j<32; j++) {\r
+ if(BigBuf[i] & (1 << j)) {\r
+ dest[--n] = 1;\r
+ } else {\r
+ dest[--n] = -1;\r
+ }\r
}\r
}\r
}\r
\r
-void AcquireRawBitsTI(void)\r
-{\r
- // TI tags charge at 134.2Khz\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
-\r
- // Place FPGA in passthrough mode, in this mode the CROSS_LO line\r
- // connects to SSP_DIN and the SSP_DOUT logic level controls\r
- // whether we're modulating the antenna (high)\r
- // or listening to the antenna (low)\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);\r
-\r
- // get TI tag data into the buffer\r
- AcquireTiType();\r
-\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
-}\r
-\r
-// this is a dummy function to get around\r
-// a possible flash bug in the bootloader\r
-// delete once you've added more code.\r
-void DummyDummyDummy(void)\r
-{\r
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);\r
- AcquireTiType();\r
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
-}\r
-\r
// arguments: 64bit data split into 32bit idhi:idlo and optional 16bit crc\r
// if crc provided, it will be written with the data verbatim (even if bogus)\r
// if not provided a valid crc will be computed from the data and written.\r
AcquireTiType();\r
\r
FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);\r
- DbpString("Now use tibits and tidemod");\r
+ DbpString("Now use tiread to check");\r
}\r
\r
void SimulateTagLowFrequency(int period, int ledcontrol)\r
projects / proxmark3-svn / blobdiff