break;\r
case DEMOD_PSK1:\r
// skip first 160 samples to allow antenna to settle in (psk gets inverted occasionally otherwise)\r
- save_restoreGB(1);\r
+ save_restoreGB(GRAPH_SAVE);\r
CmdLtrim("160");\r
snprintf(cmdStr, sizeof(buf),"%d %d 6", bitRate[config.bitrate], config.inverted );\r
ans = PSKDemod(cmdStr, false);\r
//undo trim samples\r
- save_restoreGB(0);\r
+ save_restoreGB(GRAPH_RESTORE);\r
break;\r
case DEMOD_PSK2: //inverted won't affect this\r
case DEMOD_PSK3: //not fully implemented\r
// skip first 160 samples to allow antenna to settle in (psk gets inverted occasionally otherwise)\r
- save_restoreGB(1);\r
+ save_restoreGB(GRAPH_SAVE);\r
CmdLtrim("160");\r
snprintf(cmdStr, sizeof(buf),"%d 0 6", bitRate[config.bitrate] );\r
ans = PSKDemod(cmdStr, false);\r
psk1TOpsk2(DemodBuffer, DemodBufferLen);\r
//undo trim samples\r
- save_restoreGB(0);\r
+ save_restoreGB(GRAPH_RESTORE);\r
break;\r
case DEMOD_NRZ:\r
snprintf(cmdStr, sizeof(buf),"%d %d 1", bitRate[config.bitrate], config.inverted );\r
t55xx_conf_block_t tests[15];\r
int bitRate=0;\r
uint8_t fc1 = 0, fc2 = 0, ans = 0;\r
- int clk=0;\r
- ans = fskClocks(&fc1, &fc2, (uint8_t *)&clk, false);\r
+ int clk = 0, firstClockEdge = 0;\r
+ ans = fskClocks(&fc1, &fc2, (uint8_t *)&clk, false, &firstClockEdge);\r
if (ans && ((fc1==10 && fc2==8) || (fc1==8 && fc2==5))) {\r
if ( FSKrawDemod("0 0", false) && test(DEMOD_FSK, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {\r
tests[hits].modulation = DEMOD_FSK;\r
clk = GetPskClock("", false, false);\r
if (clk>0) {\r
// allow undo\r
- save_restoreGB(1);\r
+ save_restoreGB(GRAPH_SAVE);\r
// skip first 160 samples to allow antenna to settle in (psk gets inverted occasionally otherwise)\r
CmdLtrim("160");\r
if ( PSKDemod("0 0 6", false) && test(DEMOD_PSK1, &tests[hits].offset, &bitRate, clk, &tests[hits].Q5)) {\r
}\r
} // inverse waves does not affect this demod\r
//undo trim samples\r
- save_restoreGB(0);\r
+ save_restoreGB(GRAPH_RESTORE);\r
}\r
} \r
if ( hits == 1) {\r
uint8_t preamble[] = {1,1,1,0,0,0,0,0,0,0,0,1,0,1,0,1};\r
size_t startIdx = 0;\r
uint8_t fc1 = 0, fc2 = 0, ans = 0;\r
- int clk = 0;\r
+ int clk = 0, firstClockEdge = 0;\r
bool st = true;\r
\r
if ( getData ) {\r
}\r
\r
// try fsk clock detect. if successful it cannot be any other type of modulation... (in theory...)\r
- ans = fskClocks(&fc1, &fc2, (uint8_t *)&clk, false);\r
+ ans = fskClocks(&fc1, &fc2, (uint8_t *)&clk, false, &firstClockEdge);\r
if (ans && ((fc1==10 && fc2==8) || (fc1==8 && fc2==5))) {\r
if ( FSKrawDemod("0 0", false) && \r
preambleSearchEx(DemodBuffer,preamble,sizeof(preamble),&DemodBufferLen,&startIdx,false) && \r