]> cvs.zerfleddert.de Git - proxmark3-svn/blobdiff - armsrc/lfops.c
fix fpga_comress sending no-error messages to stderr (#430)
[proxmark3-svn] / armsrc / lfops.c
index 9c6c9ed8d85b7339a3be90833368760d10da598e..641c02e876edf278f611138fd1ec7d3043729e89 100644 (file)
@@ -72,7 +72,7 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
        // now do the read
-       DoAcquisition_config(false);
+       DoAcquisition_config(false, 0);
 }
 
 /* blank r/w tag data stream
@@ -387,7 +387,8 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
        int i;
        uint8_t *tab = BigBuf_get_addr();
 
-       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       //note FpgaDownloadAndGo destroys the bigbuf so be sure this is called before now...
+       //FpgaDownloadAndGo(FPGA_BITSTREAM_LF);  
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
 
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
@@ -401,13 +402,19 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
        i = 0;
        for(;;) {
                //wait until SSC_CLK goes HIGH
+               int ii = 0;
                while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-                       if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
-                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-                               DbpString("Stopped");
-                               return;
+                       //only check every 1000th time (usb_poll_validate_length on some systems was too slow)
+                       if ( ii == 1000 ) {
+                               if (BUTTON_PRESS() || usb_poll_validate_length() ) {
+                                       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+                                       DbpString("Stopped");
+                                       return;
+                               }
+                               ii=0;
                        }
                        WDT_HIT();
+                       ii++;
                }
                if (ledcontrol)
                        LED_D_ON();
@@ -419,14 +426,20 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 
                if (ledcontrol)
                        LED_D_OFF();
+               ii=0;
                //wait until SSC_CLK goes LOW
                while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
-                       if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
-                               DbpString("Stopped");
-                               FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-                               return;
+                       //only check every 1000th time (usb_poll_validate_length on some systems was too slow)
+                       if ( ii == 1000 ) { 
+                               if (BUTTON_PRESS() || usb_poll_validate_length() ) {
+                                       FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+                                       DbpString("Stopped");
+                                       return;
+                               }
+                               ii=0;
                        }
                        WDT_HIT();
+                       ii++;
                }
 
                i++;
@@ -545,6 +558,9 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
                DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");
                return;
        }
+       // set LF so we don't kill the bigbuf we are setting with simulation data.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
        fc(0,&n);
        // special start of frame marker containing invalid bit sequences
        fc(8,  &n);     fc(8,  &n); // invalid
@@ -595,6 +611,9 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
        uint8_t clk = arg2 & 0xFF;
        uint8_t invert = (arg2 >> 8) & 1;
 
+       // set LF so we don't kill the bigbuf we are setting with simulation data.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
        for (i=0; i<size; i++){
                if (BitStream[i] == invert){
                        fcAll(fcLow, &n, clk, &modCnt);
@@ -670,6 +689,9 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
        uint8_t separator = arg2 & 1;
        uint8_t invert = (arg2 >> 8) & 1;
 
+       // set LF so we don't kill the bigbuf we are setting with simulation data.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
        if (encoding==2){  //biphase
                uint8_t phase=0;
                for (i=0; i<size; i++){
@@ -741,6 +763,9 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
        uint8_t carrier = arg1 & 0xFF;
        uint8_t invert = arg2 & 0xFF;
        uint8_t curPhase = 0;
+       // set LF so we don't kill the bigbuf we are setting with simulation data.
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+
        for (i=0; i<size; i++){
                if (BitStream[i] == curPhase){
                        pskSimBit(carrier, &n, clk, &curPhase, FALSE);
@@ -769,6 +794,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
        size_t size; 
        uint32_t hi2=0, hi=0, lo=0;
        int idx=0;
+       int dummyIdx = 0;
        // Configure to go in 125Khz listen mode
        LFSetupFPGAForADC(95, true);
 
@@ -784,7 +810,7 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                // FSK demodulator
                //size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
                size = 50*128*2; //big enough to catch 2 sequences of largest format
-               idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
+               idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo, &dummyIdx);
                
                if (idx>0 && lo>0 && (size==96 || size==192)){
                        // go over previously decoded manchester data and decode into usable tag ID
@@ -861,7 +887,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
        uint8_t *dest = BigBuf_get_addr();
        size_t size; 
-       int idx=0;
+       int idx=0, dummyIdx=0;
        //clear read buffer
        BigBuf_Clear_keep_EM();
        // Configure to go in 125Khz listen mode
@@ -875,7 +901,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
                DoAcquisition_default(-1,true);
                // FSK demodulator
                size = 50*128*2; //big enough to catch 2 sequences of largest format
-               idx = AWIDdemodFSK(dest, &size);
+               idx = AWIDdemodFSK(dest, &size, &dummyIdx);
                
                if (idx<=0 || size!=96) continue;
                // Index map
@@ -1017,6 +1043,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
        uint8_t version=0;
        uint8_t facilitycode=0;
        uint16_t number=0;
+       int dummyIdx=0;
        //clear read buffer
        BigBuf_Clear_keep_EM();
        // Configure to go in 125Khz listen mode
@@ -1028,7 +1055,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
                DoAcquisition_default(-1,true);
                //fskdemod and get start index
                WDT_HIT();
-               idx = IOdemodFSK(dest, BigBuf_max_traceLen());
+               idx = IOdemodFSK(dest, BigBuf_max_traceLen(), &dummyIdx);
                if (idx<0) continue;
                //valid tag found
 
@@ -1132,7 +1159,7 @@ void T55xxResetRead(void) {
        TurnReadLFOn(READ_GAP);
 
        // Acquisition
-       doT55x7Acquisition(BigBuf_max_traceLen());
+       DoPartialAcquisition(0, true, BigBuf_max_traceLen());
 
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
@@ -1161,7 +1188,8 @@ void T55xxWriteBlockExt(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg
        // Std Opcode 10
        T55xxWriteBit(testMode ? 0 : 1);
        T55xxWriteBit(testMode ? 1 : Page); //Page 0
-       if (PwdMode){
+
+       if (PwdMode) {
                // Send Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
@@ -1181,22 +1209,19 @@ void T55xxWriteBlockExt(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg
        // so wait a little more)
 
        // "there is a clock delay before programming" 
-       //  - programming takes ~5.6ms for t5577 ~18ms for E5550
+       //  - programming takes ~5.6ms for t5577 ~18ms for E5550 or t5567
        //  so we should wait 1 clock + 5.6ms then read response? 
-       //  but we need to know we are dealing with t55x7 vs e5550 (or q5) marshmellow...
+       //  but we need to know we are dealing with t5577 vs t5567 vs e5550 (or q5) marshmellow...
        if (testMode) {
-               // Turn field on to read the response
-               TurnReadLFOn(READ_GAP);
-
-               // Acquisition
-               // Now do the acquisition
-               // Now do the acquisition
-               DoPartialAcquisition(20, true, 12000);
+               //TESTMODE TIMING TESTS: 
+               // <566us does nothing 
+               // 566-568 switches between wiping to 0s and doing nothing
+               // 5184 wipes and allows 1 block to be programmed.
+               // indefinite power on wipes and then programs all blocks with bitshifted data sent.
+               TurnReadLFOn(5184); 
 
-               //doT55x7Acquisition(12000);
        } else {
                TurnReadLFOn(20 * 1000);
-       }
                //could attempt to do a read to confirm write took
                // as the tag should repeat back the new block 
                // until it is reset, but to confirm it we would 
@@ -1205,6 +1230,9 @@ void T55xxWriteBlockExt(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t arg
                // response should be (for t55x7) a 0 bit then (ST if on) 
                // block data written in on repeat until reset. 
 
+               //DoPartialAcquisition(20, true, 12000);
+       }
+
        // turn field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_A_OFF();
@@ -1265,8 +1293,6 @@ void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
        // Now do the acquisition
        DoPartialAcquisition(0, true, 12000);
 
-       //      doT55x7Acquisition(12000);
-
        // Turn the field off
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        cmd_send(CMD_ACK,0,0,0,0,0);    
@@ -1391,10 +1417,10 @@ void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t
        //Program the 7 data blocks for supplied 224bit UID
        uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
        // and the block 0 for Indala224 format 
-       //Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
-       data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
+       //Config for Indala (RF/32;PSK2 with RF/2;Maxblock=7)
+       data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK2 | (7 << T55x7_MAXBLOCK_SHIFT);
        //TODO add selection of chip for Q5 or T55x7
-       // data[0] = (((32-2)>>1)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 7 << T5555_MAXBLOCK_SHIFT;
+       // data[0] = (((32-2)>>1)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK2 | 7 << T5555_MAXBLOCK_SHIFT;
        WriteT55xx(data, 0, 8);
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
        //      T5567WriteBlock(0x603E10E2,0);
@@ -1754,7 +1780,7 @@ void Cotag(uint32_t arg0) {
        switch(rawsignal) {
                case 0: doCotagAcquisition(50000); break;
                case 1: doCotagAcquisitionManchester(); break;
-               case 2: DoAcquisition_config(TRUE); break;
+               case 2: DoAcquisition_config(true, 0); break;
        }
 
        // Turn the field off
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