Fix (iclass)

[proxmark3-svn] / armsrc / lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index cde4ae543f515f9a460c646f6a65d65bf90fe2e3..7d497e3cc42c411ed83a02d9d59aa106fc90d4a4 100644 (file)
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -15,30 +15,14 @@
 #include "crc16.h"
 #include "string.h"
 
 #include "crc16.h"
 #include "string.h"
 

-void AcquireRawAdcSamples125k(int at134khz)
-{
-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-
-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
-
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-
-       // Now call the acquisition routine
-       DoAcquisition125k();
-}

 
 

-// split into two routines so we can avoid timing issues after sending commands //
-void DoAcquisition125k(void)
+/**
+* Does the sample acquisition. If threshold is specified, the actual sampling 
+* is not commenced until the threshold has been reached. 
+* @param trigger_threshold - the threshold
+* @param silent - is true, now outputs are made. If false, dbprints the status
+*/
+void DoAcquisition125k_internal(int trigger_threshold,bool silent)

 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int n = sizeof(BigBuf);
 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int n = sizeof(BigBuf);


@@ -53,38 +37,95 @@ void DoAcquisition125k(void)
                }
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                }
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;

-                       i++;

                        LED_D_OFF();
                        LED_D_OFF();

-                       if (i >= n) break;
+                       if (trigger_threshold != -1 && dest[i] < trigger_threshold)
+                               continue;
+                       else
+                               trigger_threshold = -1;
+                       if (++i >= n) break;

                }
        }
                }
        }

-       Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
-                       dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+       if(!silent)
+       {
+               Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
+                               dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
+               
+       }
+}
+/**
+* Perform sample aquisition. 
+*/
+void DoAcquisition125k(int trigger_threshold)
+{
+       DoAcquisition125k_internal(trigger_threshold, false);
+}
+
+/**
+* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream 
+* if not already loaded, sets divisor and starts up the antenna. 
+* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
+*                                 0 or 95 ==> 125 KHz
+*                                 
+**/
+void LFSetupFPGAForADC(int divisor, bool lf_field)
+{
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+       if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
+       else if (divisor == 0)
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       else
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
+
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
+
+       // Connect the A/D to the peak-detected low-frequency path.
+       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // Give it a bit of time for the resonant antenna to settle.
+       SpinDelay(50);
+       // Now set up the SSC to get the ADC samples that are now streaming at us.
+       FpgaSetupSsc();
+}
+/**
+* Initializes the FPGA, and acquires the samples. 
+**/
+void AcquireRawAdcSamples125k(int divisor)
+{
+       LFSetupFPGAForADC(divisor, true);
+       // Now call the acquisition routine
+       DoAcquisition125k_internal(-1,false);
+}
+/**
+* Initializes the FPGA for snoop-mode, and acquires the samples. 
+**/
+
+void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
+{
+       LFSetupFPGAForADC(divisor, false);
+       DoAcquisition125k(trigger_threshold);

 }
 
 void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
 {
 }
 
 void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
 {

-       int at134khz;

 
        /* Make sure the tag is reset */
 
        /* Make sure the tag is reset */

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelay(2500);
 
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelay(2500);
 

+
+       int divisor_used = 95; // 125 KHz

        // see if 'h' was specified
        // see if 'h' was specified

-       if (command[strlen((char *) command) - 1] == 'h')
-               at134khz = TRUE;
-       else
-               at134khz = FALSE;

 
 

-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       if (command[strlen((char *) command) - 1] == 'h')
+               divisor_used = 88; // 134.8 KHz

 
 

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);

 
 

+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

        // Give it a bit of time for the resonant antenna to settle.
        SpinDelay(50);
        // Give it a bit of time for the resonant antenna to settle.
        SpinDelay(50);

+

        // And a little more time for the tag to fully power up
        SpinDelay(2000);
 
        // And a little more time for the tag to fully power up
        SpinDelay(2000);
 


@@ -96,12 +137,9 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();
                SpinDelayUs(delay_off);
                FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
                LED_D_OFF();
                SpinDelayUs(delay_off);

-               if (at134khz)
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-               else
-                       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 

 
 

-               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+               FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

                LED_D_ON();
                if(*(command++) == '0')
                        SpinDelayUs(period_0);
                LED_D_ON();
                if(*(command++) == '0')
                        SpinDelayUs(period_0);


@@ -111,15 +149,12 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        SpinDelayUs(delay_off);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        LED_D_OFF();
        SpinDelayUs(delay_off);

-       if (at134khz)
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-       else
-               FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used); 

 
 

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

 
        // now do the read
 
        // now do the read

-       DoAcquisition125k();
+       DoAcquisition125k(-1);

 }
 
 /* blank r/w tag data stream
 }
 
 /* blank r/w tag data stream


@@ -156,6 +191,7 @@ void ReadTItag(void)
        uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
 
        // TI tags charge at 134.2Khz
        uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
 
        // TI tags charge at 134.2Khz

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
 
        // Place FPGA in passthrough mode, in this mode the CROSS_LO line
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
 
        // Place FPGA in passthrough mode, in this mode the CROSS_LO line


@@ -363,6 +399,7 @@ void AcquireTiType(void)
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {
 // if not provided a valid crc will be computed from the data and written.
 void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 {

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);   

        if(crc == 0) {
                crc = update_crc16(crc, (idlo)&0xff);
                crc = update_crc16(crc, (idlo>>8)&0xff);
        if(crc == 0) {
                crc = update_crc16(crc, (idlo)&0xff);
                crc = update_crc16(crc, (idlo>>8)&0xff);


@@ -434,6 +471,7 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
        int i;
        uint8_t *tab = (uint8_t *)BigBuf;
     
        int i;
        uint8_t *tab = (uint8_t *)BigBuf;
     

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
     
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
        FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
     
        AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;


@@ -592,219 +630,244 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
                LED_A_OFF();
 }
 
                LED_A_OFF();
 }
 

-
-// loop to capture raw HID waveform then FSK demodulate the TAG ID from it
-void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
+size_t fsk_demod(uint8_t * dest, size_t size)

 {
 {

-       uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, n=0, i=0, idx=0, found=0, lastval=0;
-       uint32_t hi2=0, hi=0, lo=0;
+       uint32_t last_transition = 0;
+       uint32_t idx = 1;

 
 

-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       // we don't care about actual value, only if it's more or less than a
+       // threshold essentially we capture zero crossings for later analysis
+       uint8_t threshold_value = 127;

 
 

-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+       // sync to first lo-hi transition, and threshold

 
 

-       // Give it a bit of time for the resonant antenna to settle.
-       SpinDelay(50);
+       //Need to threshold first sample
+       if(dest[0] < threshold_value) dest[0] = 0;
+       else dest[0] = 1;

 
 

-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
+       size_t numBits = 0;
+       // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
+       // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
+       // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
+       for(idx = 1; idx < size; idx++) {
+               // threshold current value
+               if (dest[idx] < threshold_value) dest[idx] = 0;
+               else dest[idx] = 1;

 
 

-       for(;;) {
-               WDT_HIT();
-               if (ledcontrol)
-                       LED_A_ON();
-               if(BUTTON_PRESS()) {
-                       DbpString("Stopped");
-                       if (ledcontrol)
-                               LED_A_OFF();
-                       return;
-               }
+               // Check for 0->1 transition
+               if (dest[idx-1] < dest[idx]) { // 0 -> 1 transition

 
 

-               i = 0;
-               m = sizeof(BigBuf);
-               memset(dest,128,m);
-               for(;;) {
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
-                               AT91C_BASE_SSC->SSC_THR = 0x43;
-                               if (ledcontrol)
-                                       LED_D_ON();
-                       }
-                       if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_RXRDY)) {
-                               dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                               // we don't care about actual value, only if it's more or less than a
-                               // threshold essentially we capture zero crossings for later analysis
-                               if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
-                               i++;
-                               if (ledcontrol)
-                                       LED_D_OFF();
-                               if(i >= m) {
-                                       break;
-                               }
+                       if (idx-last_transition <  9) {
+                                       dest[numBits]=1;
+                       } else {
+                                       dest[numBits]=0;

                        }
                        }

+                       last_transition = idx;
+                       numBits++;

                }
                }

+       }
+       return numBits; //Actually, it returns the number of bytes, but each byte represents a bit: 1 or 0
+}

 
 

-               // FSK demodulator

 
 

-               // sync to first lo-hi transition
-               for( idx=1; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx])
-                               lastval=idx;
-                               break;
-               }
-               WDT_HIT();
+size_t aggregate_bits(uint8_t *dest,size_t size, uint8_t h2l_crossing_value,uint8_t l2h_crossing_value, uint8_t maxConsequtiveBits )
+{
+       uint8_t lastval=dest[0];
+       uint32_t idx=0;
+       size_t numBits=0;
+       uint32_t n=1;

 
 

-               // count cycles between consecutive lo-hi transitions, there should be either 8 (fc/8)
-               // or 10 (fc/10) cycles but in practice due to noise etc we may end up with with anywhere
-               // between 7 to 11 cycles so fuzz it by treat anything <9 as 8 and anything else as 10
-               for( i=0; idx<m; idx++) {
-                       if (dest[idx-1]<dest[idx]) {
-                               dest[i]=idx-lastval;
-                               if (dest[i] <= 8) {
-                                               dest[i]=1;
-                               } else {
-                                               dest[i]=0;
-                               }
+       for( idx=1; idx < size; idx++) {

 
 

-                               lastval=idx;
-                               i++;
-                       }
+               if (dest[idx]==lastval) {
+                       n++;
+                       continue;
+               }
+               //if lastval was 1, we have a 1->0 crossing
+               if ( dest[idx-1] ) {
+                       n=(n+1) / h2l_crossing_value;
+               } else {// 0->1 crossing
+                       n=(n+1) / l2h_crossing_value;

                }
                }

-               m=i;
+               if (n == 0) n = 1;
+
+               if(n < maxConsequtiveBits)
+               {
+                       memset(dest+numBits, dest[idx-1] , n);
+                       numBits += n;
+               }
+               n=0;
+               lastval=dest[idx];
+       }//end for
+
+       return numBits;
+
+}
+// loop to capture raw HID waveform then FSK demodulate the TAG ID from it
+void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
+
+       size_t size=0,idx=0; //, found=0;
+       uint32_t hi2=0, hi=0, lo=0;
+
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+
+       while(!BUTTON_PRESS()) {
+

                WDT_HIT();
                WDT_HIT();

+               if (ledcontrol) LED_A_ON();
+
+               DoAcquisition125k_internal(-1,true);
+               size  = sizeof(BigBuf);
+
+               // FSK demodulator
+               size = fsk_demod(dest, size);

 
                // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
 
                // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns

-               lastval=dest[0];
-               idx=0;
-               i=0;
-               n=0;
-               for( idx=0; idx<m; idx++) {
-                       if (dest[idx]==lastval) {
-                               n++;
-                       } else {
-                               // a bit time is five fc/10 or six fc/8 cycles so figure out how many bits a pattern width represents,
-                               // an extra fc/8 pattern preceeds every 4 bits (about 200 cycles) just to complicate things but it gets
-                               // swallowed up by rounding
-                               // expected results are 1 or 2 bits, any more and it's an invalid manchester encoding
-                               // special start of frame markers use invalid manchester states (no transitions) by using sequences
-                               // like 111000
-                               if (dest[idx-1]) {
-                                       n=(n+1)/6;                      // fc/8 in sets of 6
-                               } else {
-                                       n=(n+1)/5;                      // fc/10 in sets of 5
-                               }
-                               switch (n) {                    // stuff appropriate bits in buffer
-                                       case 0:
-                                       case 1: // one bit
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 2: // two bits
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       case 3: // 3 bit start of frame markers
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       // When a logic 0 is immediately followed by the start of the next transmisson
-                                       // (special pattern) a pattern of 4 bit duration lengths is created.
-                                       case 4:
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               dest[i++]=dest[idx-1];
-                                               break;
-                                       default:        // this shouldn't happen, don't stuff any bits
-                                               break;
-                               }
-                               n=0;
-                               lastval=dest[idx];
-                       }
-               }
-               m=i;
+               // 1->0 : fc/8 in sets of 6
+               // 0->1 : fc/10 in sets of 5
+               size = aggregate_bits(dest,size, 6,5,5);
+

                WDT_HIT();
 
                // final loop, go over previously decoded manchester data and decode into usable tag ID
                // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0
                WDT_HIT();
 
                // final loop, go over previously decoded manchester data and decode into usable tag ID
                // 111000 bit pattern represent start of frame, 01 pattern represents a 1 and 10 represents a 0

-               for( idx=0; idx<m-6; idx++) {
+               uint8_t frame_marker_mask[] = {1,1,1,0,0,0};
+               int numshifts = 0;
+               idx = 0;
+               while( idx + sizeof(frame_marker_mask) < size) {

                        // search for a start of frame marker
                        // search for a start of frame marker

-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-                               if (found && (hi2|hi|lo)) {
-                                       if (hi2 != 0){
-                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
-                                               (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                               }               
-                                       else {
-                                         Dbprintf("TAG ID: %x%08x (%d)",
-                                                 (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                       }       
-                                       /* if we're only looking for one tag */
-                                       if (findone)
-                                       {
-                                               *high = hi;
-                                               *low = lo;
-                                               return;
-                                       }
-                                       hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
-                               }
-                       }
-                       if (found) {
-                               if (dest[idx] && (!dest[idx+1]) ) {
-                                       hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|0;
-                               } else if ( (!dest[idx]) && dest[idx+1]) {
-                                       hi2=(hi2<<1)|(hi>>31);
-                                       hi=(hi<<1)|(lo>>31);
-                                       lo=(lo<<1)|1;
-                               } else {
-                                       found=0;
-                                       hi2=0;
-                                       hi=0;
-                                       lo=0;
+                       if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)
+                       { // frame marker found
+                               idx+=sizeof(frame_marker_mask);
+
+                               while(dest[idx] != dest[idx+1] && idx < size-2)
+                               {       
+                                       // Keep going until next frame marker (or error)
+                                       // Shift in a bit. Start by shifting high registers
+                                       hi2 = (hi2<<1)|(hi>>31);
+                                       hi = (hi<<1)|(lo>>31);
+                                       //Then, shift in a 0 or one into low
+                                       if (dest[idx] && !dest[idx+1])  // 1 0
+                                               lo=(lo<<1)|0;
+                                       else // 0 1
+                                               lo=(lo<<1)|
+                                                               1;
+                                       numshifts ++;
+                                       idx += 2;

                                }
                                }

-                               idx++;
-                       }
-                       if ( dest[idx] && dest[idx+1] && dest[idx+2] && (!dest[idx+3]) && (!dest[idx+4]) && (!dest[idx+5]) )
-                       {
-                               found=1;
-                               idx+=6;
-                               if (found && (hi|lo)) {
-                                       if (hi2 != 0){
-                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
-                                               (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                               }               
-                                       else {
-                                         Dbprintf("TAG ID: %x%08x (%d)",
-                                                 (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-                                       }       
-                                       /* if we're only looking for one tag */
-                                       if (findone)
+                               //Dbprintf("Num shifts: %d ", numshifts);
+                               // Hopefully, we read a tag and  hit upon the next frame marker
+                               if(idx + sizeof(frame_marker_mask) < size)
+                               {
+                                       if ( memcmp(dest+idx, frame_marker_mask, sizeof(frame_marker_mask)) == 0)

                                        {
                                        {

-                                               *high = hi;
-                                               *low = lo;
-                                               return;
+                                               if (hi2 != 0){
+                                                       Dbprintf("TAG ID: %x%08x%08x (%d)",
+                                                                (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+                                               }
+                                               else {
+                                                       Dbprintf("TAG ID: %x%08x (%d)",
+                                                        (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
+                                               }

                                        }
                                        }

-          hi2=0;
-                                       hi=0;
-                                       lo=0;
-                                       found=0;
+

                                }
                                }

+
+                               // reset
+                               hi2 = hi = lo = 0;
+                               numshifts = 0;
+                       }else
+                       {
+                               idx++;

                        }
                }
                WDT_HIT();
                        }
                }
                WDT_HIT();

+

        }
        }

+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();

 }
 
 }
 

+uint32_t bytebits_to_byte(uint8_t* src, int numbits)
+{
+       uint32_t num = 0;
+       for(int i = 0 ; i < numbits ; i++)
+       {
+               num = (num << 1) | (*src);
+               src++;
+       }
+       return num;
+}
+
+
+void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
+{
+       uint8_t *dest = (uint8_t *)BigBuf;
+
+       size_t size=0, idx=0;
+       uint32_t code=0, code2=0;
+
+       // Configure to go in 125Khz listen mode
+       LFSetupFPGAForADC(95, true);
+
+       while(!BUTTON_PRESS()) {
+
+
+               WDT_HIT();
+               if (ledcontrol) LED_A_ON();
+
+               DoAcquisition125k_internal(-1,true);
+               size  = sizeof(BigBuf);
+
+               // FSK demodulator
+               size = fsk_demod(dest, size);
+
+               // we now have a set of cycle counts, loop over previous results and aggregate data into bit patterns
+               // 1->0 : fc/8 in sets of 7
+               // 0->1 : fc/10 in sets of 6
+               size = aggregate_bits(dest, size, 7,6,13);
+
+               WDT_HIT();
+               
+               //Handle the data
+           uint8_t mask[] = {0,0,0,0,0,0,0,0,0,1};
+               for( idx=0; idx < size - 64; idx++) {
+
+               if ( memcmp(dest + idx, mask, sizeof(mask)) ) continue;
+
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx],   dest[idx+1],   dest[idx+2],dest[idx+3],dest[idx+4],dest[idx+5],dest[idx+6],dest[idx+7]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+8], dest[idx+9], dest[idx+10],dest[idx+11],dest[idx+12],dest[idx+13],dest[idx+14],dest[idx+15]);                         
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+16],dest[idx+17],dest[idx+18],dest[idx+19],dest[idx+20],dest[idx+21],dest[idx+22],dest[idx+23]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+24],dest[idx+25],dest[idx+26],dest[idx+27],dest[idx+28],dest[idx+29],dest[idx+30],dest[idx+31]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+32],dest[idx+33],dest[idx+34],dest[idx+35],dest[idx+36],dest[idx+37],dest[idx+38],dest[idx+39]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+40],dest[idx+41],dest[idx+42],dest[idx+43],dest[idx+44],dest[idx+45],dest[idx+46],dest[idx+47]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+48],dest[idx+49],dest[idx+50],dest[idx+51],dest[idx+52],dest[idx+53],dest[idx+54],dest[idx+55]);
+                   Dbprintf("%d%d%d%d%d%d%d%d",dest[idx+56],dest[idx+57],dest[idx+58],dest[idx+59],dest[idx+60],dest[idx+61],dest[idx+62],dest[idx+63]);
+                       
+                   code = bytebits_to_byte(dest+idx,32);
+                   code2 = bytebits_to_byte(dest+idx+32,32); 
+
+                   short version = bytebits_to_byte(dest+idx+14,4); 
+                   char unknown = bytebits_to_byte(dest+idx+19,8) ;
+                   uint16_t number = bytebits_to_byte(dest+idx+36,9); 
+                   
+                   Dbprintf("XSF(%02d)%02x:%d (%08x%08x)",version,unknown,number,code,code2);
+                   if (ledcontrol)     LED_D_OFF();
+               
+                       // if we're only looking for one tag 
+                       if (findone){
+                               LED_A_OFF();
+                               return;
+                       }               
+               }
+               WDT_HIT();
+       }
+       DbpString("Stopped");
+       if (ledcontrol) LED_A_OFF();
+}

 
 /*------------------------------
  * T5555/T5557/T5567 routines
 
 /*------------------------------
  * T5555/T5557/T5567 routines


@@ -873,8 +936,9 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 // Write one bit to card
 void T55xxWriteBit(int bit)
 {
 // Write one bit to card
 void T55xxWriteBit(int bit)
 {

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

        if (bit == 0)
                SpinDelayUs(WRITE_0);
        else
        if (bit == 0)
                SpinDelayUs(WRITE_0);
        else


@@ -888,8 +952,9 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
 {
        unsigned int i;
 
 {
        unsigned int i;
 

+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
 
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up


@@ -902,11 +967,11 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(0); //Page 0
        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(0); //Page 0

-       if (PwdMode == 1){
-               // Pwd
-               for (i = 0x80000000; i != 0; i >>= 1)
-                       T55xxWriteBit(Pwd & i);
-       }       
+  if (PwdMode == 1){
+    // Pwd
+    for (i = 0x80000000; i != 0; i >>= 1)
+      T55xxWriteBit(Pwd & i);
+  }

        // Lock bit
        T55xxWriteBit(0);
 
        // Lock bit
        T55xxWriteBit(0);
 


@@ -921,18 +986,18 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
        // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        // Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
        // so wait a little more)
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);

        SpinDelay(20);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 
        SpinDelay(20);
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 

-
-// Read one card block in page 0 
+// Read one card block in page 0

 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;

- 
+  
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);
        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);


@@ -940,19 +1005,19 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
        FpgaSetupSsc();
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
        FpgaSetupSsc();

-
+  

        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+  

        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
        SpinDelay(150);
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
        SpinDelay(150);

-
+  

        // Now start writting
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
        // Now start writting
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);

-
+  

        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(0); //Page 0
        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(0); //Page 0


@@ -960,7 +1025,7 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
                // Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);
                // Pwd
                for (i = 0x80000000; i != 0; i >>= 1)
                        T55xxWriteBit(Pwd & i);

-       }       
+       }

        // Lock bit
        T55xxWriteBit(0);
        // Block
        // Lock bit
        T55xxWriteBit(0);
        // Block


@@ -969,9 +1034,9 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
-       // Now do the acquisition 
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+  
+       // Now do the acquisition

        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {


@@ -981,22 +1046,23 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        // we don't care about actual value, only if it's more or less than a
                        // threshold essentially we capture zero crossings for later analysis
                        dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
                        // we don't care about actual value, only if it's more or less than a
                        // threshold essentially we capture zero crossings for later analysis

-//                     if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
+      //                       if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;

                        i++;
                        if (i >= m) break;
                }
        }
                        i++;
                        if (i >= m) break;
                }
        }

-
+  

   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");
 }
 
 // Read card traceability data (page 1)
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");
 }
 
 // Read card traceability data (page 1)

-void T55xxReadTrace(void){ 
+void T55xxReadTrace(void){

        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;
        uint8_t *dest = (uint8_t *)BigBuf;
        int m=0, i=0;

- 
+  
+       FpgaDownloadAndGo(FPGA_BITSTREAM_LF);

        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);
        m = sizeof(BigBuf);
   // Clear destination buffer before sending the command
        memset(dest, 128, m);


@@ -1004,28 +1070,28 @@ void T55xxReadTrace(void){
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
        FpgaSetupSsc();
        SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
        // Now set up the SSC to get the ADC samples that are now streaming at us.
        FpgaSetupSsc();

-
+  

        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        LED_D_ON();
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+  

        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
        SpinDelay(150);
        // Give it a bit of time for the resonant antenna to settle.
        // And for the tag to fully power up
        SpinDelay(150);

-
+  

        // Now start writting
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);
        // Now start writting
        FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
        SpinDelayUs(START_GAP);

-
+  

        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(1); //Page 1
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
        // Opcode
        T55xxWriteBit(1);
        T55xxWriteBit(1); //Page 1
   
   // Turn field on to read the response
        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-
-       // Now do the acquisition 
+       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+  
+       // Now do the acquisition

        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
        i = 0;
        for(;;) {
                if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {


@@ -1037,7 +1103,7 @@ void T55xxReadTrace(void){
                        if (i >= m) break;
                }
        }
                        if (i >= m) break;
                }
        }

-
+  

   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
        LED_D_OFF();
        DbpString("DONE!");


@@ -1047,9 +1113,9 @@ void T55xxReadTrace(void){
 // Copy HID id to card and setup block 0 config
 void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
 {
 // Copy HID id to card and setup block 0 config
 void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
 {

-       int data1, data2, data3, data4, data5, data6; //up to six blocks for long format
+       int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format

        int last_block = 0;
        int last_block = 0;

-
+  

   if (longFMT){
          // Ensure no more than 84 bits supplied
          if (hi2>0xFFFFF) {
   if (longFMT){
          // Ensure no more than 84 bits supplied
          if (hi2>0xFFFFF) {


@@ -1065,7 +1131,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                  else
                          data1 |= (1<<((3-i)*2)); // 0 -> 01
          }
                  else
                          data1 |= (1<<((3-i)*2)); // 0 -> 01
          }

-
+    

        data2 = 0;
        for (int i=0;i<16;i++) {
                if (hi2 & (1<<(15-i)))
        data2 = 0;
        for (int i=0;i<16;i++) {
                if (hi2 & (1<<(15-i)))


@@ -1073,7 +1139,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                else
                        data2 |= (1<<((15-i)*2)); // 0 -> 01
     }
                else
                        data2 |= (1<<((15-i)*2)); // 0 -> 01
     }

-
+    

        data3 = 0;
        for (int i=0;i<16;i++) {
                if (hi & (1<<(31-i)))
        data3 = 0;
        for (int i=0;i<16;i++) {
                if (hi & (1<<(31-i)))


@@ -1081,7 +1147,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                else
                        data3 |= (1<<((15-i)*2)); // 0 -> 01
        }
                else
                        data3 |= (1<<((15-i)*2)); // 0 -> 01
        }

-  
+    

        data4 = 0;
        for (int i=0;i<16;i++) {
                if (hi & (1<<(15-i)))
        data4 = 0;
        for (int i=0;i<16;i++) {
                if (hi & (1<<(15-i)))


@@ -1097,7 +1163,7 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                else
                        data5 |= (1<<((15-i)*2)); // 0 -> 01
        }
                else
                        data5 |= (1<<((15-i)*2)); // 0 -> 01
        }

-  
+    

        data6 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(15-i)))
        data6 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(15-i)))


@@ -1106,25 +1172,25 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                        data6 |= (1<<((15-i)*2)); // 0 -> 01
     }
   }
                        data6 |= (1<<((15-i)*2)); // 0 -> 01
     }
   }

-  else {       
+  else {

          // Ensure no more than 44 bits supplied
          if (hi>0xFFF) {
                  DbpString("Tags can only have 44 bits.");
                  return;
          }
          // Ensure no more than 44 bits supplied
          if (hi>0xFFF) {
                  DbpString("Tags can only have 44 bits.");
                  return;
          }

-
+    

        // Build the 3 data blocks for supplied 44bit ID
        last_block = 3;
        
        data1 = 0x1D000000; // load preamble
        // Build the 3 data blocks for supplied 44bit ID
        last_block = 3;
        
        data1 = 0x1D000000; // load preamble

-  
-       for (int i=0;i<12;i++) {
-               if (hi & (1<<(11-i)))
-                       data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
-               else
-                       data1 |= (1<<((11-i)*2)); // 0 -> 01
-       }
-  
+    
+    for (int i=0;i<12;i++) {
+      if (hi & (1<<(11-i)))
+        data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
+      else
+        data1 |= (1<<((11-i)*2)); // 0 -> 01
+    }
+    

        data2 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(31-i)))
        data2 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(31-i)))


@@ -1132,16 +1198,16 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
                else
                        data2 |= (1<<((15-i)*2)); // 0 -> 01
        }
                else
                        data2 |= (1<<((15-i)*2)); // 0 -> 01
        }

-  
+    

        data3 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(15-i)))
                        data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
                else
                        data3 |= (1<<((15-i)*2)); // 0 -> 01
        data3 = 0;
        for (int i=0;i<16;i++) {
                if (lo & (1<<(15-i)))
                        data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
                else
                        data3 |= (1<<((15-i)*2)); // 0 -> 01

-       }               
+       }

   }
   }

-
+  

        LED_D_ON();
        // Program the data blocks for supplied ID
        // and the block 0 for HID format
        LED_D_ON();
        // Program the data blocks for supplied ID
        // and the block 0 for HID format


@@ -1154,18 +1220,38 @@ void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
          T55xxWriteBlock(data5,5,0,0);
          T55xxWriteBlock(data6,6,0,0);
   }
          T55xxWriteBlock(data5,5,0,0);
          T55xxWriteBlock(data6,6,0,0);
   }

-
+  

        // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
        T55xxWriteBlock(T55x7_BITRATE_RF_50    |
        // Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
        T55xxWriteBlock(T55x7_BITRATE_RF_50    |

-                       T55x7_MODULATION_FSK2a |
-                       last_block << T55x7_MAXBLOCK_SHIFT,
-                       0,0,0);
+                  T55x7_MODULATION_FSK2a |
+                  last_block << T55x7_MAXBLOCK_SHIFT,
+                  0,0,0);

   
        LED_D_OFF();
        
        DbpString("DONE!");
 }
 
   
        LED_D_OFF();
        
        DbpString("DONE!");
 }
 

+void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
+{
+   int data1=0, data2=0; //up to six blocks for long format
+       
+    data1 = hi;  // load preamble
+    data2 = lo;
+    
+    LED_D_ON();
+    // Program the data blocks for supplied ID
+    // and the block 0 for HID format
+    T55xxWriteBlock(data1,1,0,0);
+    T55xxWriteBlock(data2,2,0,0);
+       
+    //Config Block
+    T55xxWriteBlock(0x00147040,0,0,0);
+    LED_D_OFF();
+       
+    DbpString("DONE!");
+}
+

 // Define 9bit header for EM410x tags
 #define EM410X_HEADER          0x1FF
 #define EM410X_ID_LENGTH       40
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER          0x1FF
 #define EM410X_ID_LENGTH       40


@@ -1177,6 +1263,7 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        uint64_t rev_id = 0;    // reversed ID
        int c_parity[4];        // column parity
        int r_parity = 0;       // row parity
        uint64_t rev_id = 0;    // reversed ID
        int c_parity[4];        // column parity
        int r_parity = 0;       // row parity

+       uint32_t clock = 0;

 
        // Reverse ID bits given as parameter (for simpler operations)
        for (i = 0; i < EM410X_ID_LENGTH; ++i) {
 
        // Reverse ID bits given as parameter (for simpler operations)
        for (i = 0; i < EM410X_ID_LENGTH; ++i) {


@@ -1234,12 +1321,35 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
        T55xxWriteBlock((uint32_t)id, 2, 0, 0);
 
        // Config for EM410x (RF/64, Manchester, Maxblock=2)
        T55xxWriteBlock((uint32_t)id, 2, 0, 0);
 
        // Config for EM410x (RF/64, Manchester, Maxblock=2)

-       if (card)
+       if (card) {
+               // Clock rate is stored in bits 8-15 of the card value
+               clock = (card & 0xFF00) >> 8;
+               Dbprintf("Clock rate: %d", clock);
+               switch (clock)
+               {
+                       case 32:
+                               clock = T55x7_BITRATE_RF_32;
+                               break;
+                       case 16:
+                               clock = T55x7_BITRATE_RF_16;
+                               break;
+                       case 0:
+                               // A value of 0 is assumed to be 64 for backwards-compatibility
+                               // Fall through...
+                       case 64:
+                               clock = T55x7_BITRATE_RF_64;
+                               break;      
+                       default:
+                               Dbprintf("Invalid clock rate: %d", clock);
+                               return;
+               }
+

                // Writing configuration for T55x7 tag
                // Writing configuration for T55x7 tag

-               T55xxWriteBlock(T55x7_BITRATE_RF_64         |
+               T55xxWriteBlock(clock       |

                                T55x7_MODULATION_MANCHESTER |
                                2 << T55x7_MAXBLOCK_SHIFT,
                                0, 0, 0);
                                T55x7_MODULATION_MANCHESTER |
                                2 << T55x7_MAXBLOCK_SHIFT,
                                0, 0, 0);

+  }

        else
                // Writing configuration for T5555(Q5) tag
                T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
        else
                // Writing configuration for T5555(Q5) tag
                T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |


@@ -1264,7 +1374,7 @@ void CopyIndala64toT55x7(int hi, int lo)
        T55xxWriteBlock(T55x7_BITRATE_RF_32    |
                        T55x7_MODULATION_PSK1 |
                        2 << T55x7_MAXBLOCK_SHIFT,
        T55xxWriteBlock(T55x7_BITRATE_RF_32    |
                        T55x7_MODULATION_PSK1 |
                        2 << T55x7_MAXBLOCK_SHIFT,

-                       0,0,0);
+                       0, 0, 0);

        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
 //     T5567WriteBlock(0x603E1042,0);
 
        //Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
 //     T5567WriteBlock(0x603E1042,0);
 


@@ -1296,165 +1406,169 @@ void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int
 
 }
 
 
 }
 

+

 #define abs(x) ( ((x)<0) ? -(x) : (x) )
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {
 #define abs(x) ( ((x)<0) ? -(x) : (x) )
 #define max(x,y) ( x<y ? y:x)
 
 int DemodPCF7931(uint8_t **outBlocks) {

-  uint8_t BitStream[256];
-  uint8_t Blocks[8][16];
-  uint8_t *GraphBuffer = (uint8_t *)BigBuf;
-  int GraphTraceLen = sizeof(BigBuf);
-  int i, j, lastval, bitidx, half_switch;
-  int clock = 64;
-  int tolerance = clock / 8;
-  int pmc, block_done;
-  int lc, warnings = 0;
-  int num_blocks = 0;
-  int lmin=128, lmax=128;
-  uint8_t dir;
-
-  AcquireRawAdcSamples125k(0);
-
-  lmin = 64;
-  lmax = 192;
-
-  i = 2;
-
-  /* Find first local max/min */
-  if(GraphBuffer[1] > GraphBuffer[0]) {
+       uint8_t BitStream[256];
+       uint8_t Blocks[8][16];
+       uint8_t *GraphBuffer = (uint8_t *)BigBuf;
+       int GraphTraceLen = sizeof(BigBuf);
+       int i, j, lastval, bitidx, half_switch;
+       int clock = 64;
+       int tolerance = clock / 8;
+       int pmc, block_done;
+       int lc, warnings = 0;
+       int num_blocks = 0;
+       int lmin=128, lmax=128;
+       uint8_t dir;
+       
+       AcquireRawAdcSamples125k(0);
+       
+       lmin = 64;
+       lmax = 192;
+       
+       i = 2;
+       
+       /* Find first local max/min */
+       if(GraphBuffer[1] > GraphBuffer[0]) {

     while(i < GraphTraceLen) {
       if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)
     while(i < GraphTraceLen) {
       if( !(GraphBuffer[i] > GraphBuffer[i-1]) && GraphBuffer[i] > lmax)

-       break;
+        break;

       i++;
     }
     dir = 0;
       i++;
     }
     dir = 0;

-  }
-  else {
+       }
+       else {

     while(i < GraphTraceLen) {
       if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)
     while(i < GraphTraceLen) {
       if( !(GraphBuffer[i] < GraphBuffer[i-1]) && GraphBuffer[i] < lmin)

-       break;
+        break;

       i++;
     }
     dir = 1;
       i++;
     }
     dir = 1;

-  }
-  
-  lastval = i++;
-  half_switch = 0;
-  pmc = 0;
-  block_done = 0;
-  
-  for (bitidx = 0; i < GraphTraceLen; i++)
-    {
-      if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+       }
+       
+       lastval = i++;
+       half_switch = 0;
+       pmc = 0;
+       block_done = 0;
+       
+       for (bitidx = 0; i < GraphTraceLen; i++)

        {
        {

-         lc = i - lastval;
-         lastval = i;
-         
-         // Switch depending on lc length:
-         // Tolerance is 1/8 of clock rate (arbitrary)
-         if (abs(lc-clock/4) < tolerance) {
-           // 16T0
-           if((i - pmc) == lc) { /* 16T0 was previous one */
-             /* It's a PMC ! */
-             i += (128+127+16+32+33+16)-1;
-             lastval = i;
-             pmc = 0;
-             block_done = 1;
-           }
-           else {
-             pmc = i;
-           }
-         } else if (abs(lc-clock/2) < tolerance) {
-           // 32TO
-           if((i - pmc) == lc) { /* 16T0 was previous one */
-             /* It's a PMC ! */
-             i += (128+127+16+32+33)-1;
+           if ( (GraphBuffer[i-1] > GraphBuffer[i] && dir == 1 && GraphBuffer[i] > lmax) || (GraphBuffer[i-1] < GraphBuffer[i] && dir == 0 && GraphBuffer[i] < lmin))
+           {
+             lc = i - lastval;

              lastval = i;
              lastval = i;

-             pmc = 0;
-             block_done = 1;
-           }
-           else if(half_switch == 1) {
-             BitStream[bitidx++] = 0;
-             half_switch = 0;
-           }
-           else
-             half_switch++;
-         } else if (abs(lc-clock) < tolerance) {
-           // 64TO
-           BitStream[bitidx++] = 1;
-         } else {
-           // Error
-           warnings++;
-           if (warnings > 10)
-             {
-               Dbprintf("Error: too many detection errors, aborting.");
-               return 0;
+             
+             // Switch depending on lc length:
+             // Tolerance is 1/8 of clock rate (arbitrary)
+             if (abs(lc-clock/4) < tolerance) {
+               // 16T0
+               if((i - pmc) == lc) { /* 16T0 was previous one */
+                 /* It's a PMC ! */
+                 i += (128+127+16+32+33+16)-1;
+                 lastval = i;
+                 pmc = 0;
+                 block_done = 1;
+               }
+               else {
+                 pmc = i;
+               }
+             } else if (abs(lc-clock/2) < tolerance) {
+               // 32TO
+               if((i - pmc) == lc) { /* 16T0 was previous one */
+                 /* It's a PMC ! */
+                 i += (128+127+16+32+33)-1;
+                 lastval = i;
+                 pmc = 0;
+                 block_done = 1;
+               }
+               else if(half_switch == 1) {
+                 BitStream[bitidx++] = 0;
+                 half_switch = 0;
+               }
+               else
+                 half_switch++;
+             } else if (abs(lc-clock) < tolerance) {
+               // 64TO
+               BitStream[bitidx++] = 1;
+             } else {
+               // Error
+               warnings++;
+               if (warnings > 10)
+               {
+                 Dbprintf("Error: too many detection errors, aborting.");
+                 return 0;
+               }

              }
              }

-         }
-         
-         if(block_done == 1) {
-           if(bitidx == 128) {
-             for(j=0; j<16; j++) {
-               Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
-                 64*BitStream[j*8+6]+
-                 32*BitStream[j*8+5]+
-                 16*BitStream[j*8+4]+
-                 8*BitStream[j*8+3]+
-                 4*BitStream[j*8+2]+
-                 2*BitStream[j*8+1]+
-                 BitStream[j*8];
+             
+             if(block_done == 1) {
+               if(bitidx == 128) {
+                 for(j=0; j<16; j++) {
+                   Blocks[num_blocks][j] = 128*BitStream[j*8+7]+
+                   64*BitStream[j*8+6]+
+                   32*BitStream[j*8+5]+
+                   16*BitStream[j*8+4]+
+                   8*BitStream[j*8+3]+
+                   4*BitStream[j*8+2]+
+                   2*BitStream[j*8+1]+
+                   BitStream[j*8];
+                 }
+                 num_blocks++;
+               }
+               bitidx = 0;
+               block_done = 0;
+               half_switch = 0;
+             }
+             if(i < GraphTraceLen)
+             {
+                     if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
+                     else dir = 1;             

              }
              }

-             num_blocks++;

            }
            }

-           bitidx = 0;
-           block_done = 0;
-           half_switch = 0;
-         }
-         if (GraphBuffer[i-1] > GraphBuffer[i]) dir=0;
-         else dir = 1;
+           if(bitidx==255)
+             bitidx=0;
+           warnings = 0;
+           if(num_blocks == 4) break;

        }
        }

-      if(bitidx==255)
-       bitidx=0;
-      warnings = 0;
-      if(num_blocks == 4) break;
-    }
-  memcpy(outBlocks, Blocks, 16*num_blocks);
-  return num_blocks;
+       memcpy(outBlocks, Blocks, 16*num_blocks);
+       return num_blocks;

 }
 
 int IsBlock0PCF7931(uint8_t *Block) {
 }
 
 int IsBlock0PCF7931(uint8_t *Block) {

-  // Assume RFU means 0 :)
-  if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
+       // Assume RFU means 0 :)
+       if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled

     return 1;
     return 1;

-  if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
+       if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?

     return 1;
     return 1;

-  return 0;
+       return 0;

 }
 
 int IsBlock1PCF7931(uint8_t *Block) {
 }
 
 int IsBlock1PCF7931(uint8_t *Block) {

-  // Assume RFU means 0 :)
-  if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
+       // Assume RFU means 0 :)
+       if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)

     if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
       return 1;
     if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
       return 1;

-
-  return 0;
+       
+       return 0;

 }
 
 #define ALLOC 16
 
 void ReadPCF7931() {
 }
 
 #define ALLOC 16
 
 void ReadPCF7931() {

-  uint8_t Blocks[8][17];
-  uint8_t tmpBlocks[4][16];
-  int i, j, ind, ind2, n;
-  int num_blocks = 0;
-  int max_blocks = 8;
-  int ident = 0;
-  int error = 0;
-  int tries = 0;
-  
-  memset(Blocks, 0, 8*17*sizeof(uint8_t));
-
-  do {
+       uint8_t Blocks[8][17];
+       uint8_t tmpBlocks[4][16];
+       int i, j, ind, ind2, n;
+       int num_blocks = 0;
+       int max_blocks = 8;
+       int ident = 0;
+       int error = 0;
+       int tries = 0;
+       
+       memset(Blocks, 0, 8*17*sizeof(uint8_t));
+       
+       do {

     memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
     n = DemodPCF7931((uint8_t**)tmpBlocks);
     if(!n)
     memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
     n = DemodPCF7931((uint8_t**)tmpBlocks);
     if(!n)


@@ -1471,304 +1585,304 @@ void ReadPCF7931() {
     
     for(i=0; i<n; i++)
       Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
     
     for(i=0; i<n; i++)
       Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",

-              tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7], 
-              tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
+               tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
+               tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);

     if(!ident) {
       for(i=0; i<n; i++) {
     if(!ident) {
       for(i=0; i<n; i++) {

-       if(IsBlock0PCF7931(tmpBlocks[i])) {
-         // Found block 0 ?
-         if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
-           // Found block 1!
-           // \o/
-           ident = 1;
-           memcpy(Blocks[0], tmpBlocks[i], 16);
-           Blocks[0][ALLOC] = 1;
-           memcpy(Blocks[1], tmpBlocks[i+1], 16);
-           Blocks[1][ALLOC] = 1;
-           max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
-           // Debug print
-           Dbprintf("(dbg) Max blocks: %d", max_blocks);
-           num_blocks = 2;
-           // Handle following blocks
-           for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
-             if(j==n) j=0;
-             if(j==i) break;
-             memcpy(Blocks[ind2], tmpBlocks[j], 16);
-             Blocks[ind2][ALLOC] = 1;
-           }
-           break;
-         }
-       }
+        if(IsBlock0PCF7931(tmpBlocks[i])) {
+          // Found block 0 ?
+          if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
+            // Found block 1!
+            // \o/
+            ident = 1;
+            memcpy(Blocks[0], tmpBlocks[i], 16);
+            Blocks[0][ALLOC] = 1;
+            memcpy(Blocks[1], tmpBlocks[i+1], 16);
+            Blocks[1][ALLOC] = 1;
+            max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
+            // Debug print
+            Dbprintf("(dbg) Max blocks: %d", max_blocks);
+            num_blocks = 2;
+            // Handle following blocks
+            for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
+              if(j==n) j=0;
+              if(j==i) break;
+              memcpy(Blocks[ind2], tmpBlocks[j], 16);
+              Blocks[ind2][ALLOC] = 1;
+            }
+            break;
+          }
+        }

       }
     }
     else {
       for(i=0; i<n; i++) { // Look for identical block in known blocks
       }
     }
     else {
       for(i=0; i<n; i++) { // Look for identical block in known blocks

-       if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
-         for(j=0; j<max_blocks; j++) {
-           if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
-             // Found an identical block
-             for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
-               if(ind2 < 0)
-                 ind2 = max_blocks;
-               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                 // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                 memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                 Blocks[ind2][ALLOC] = 1;
-                 num_blocks++;
-                 if(num_blocks == max_blocks) goto end;
-               }
-             }
-             for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
-               if(ind2 > max_blocks)
-                 ind2 = 0;
-               if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-                 // Dbprintf("Tmp %d -> Block %d", ind, ind2);
-                 memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-                 Blocks[ind2][ALLOC] = 1;
-                 num_blocks++;
-                 if(num_blocks == max_blocks) goto end;
-               }
-             }
-           }
-         }
-       }
+        if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
+          for(j=0; j<max_blocks; j++) {
+            if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
+              // Found an identical block
+              for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
+                if(ind2 < 0)
+                  ind2 = max_blocks;
+                if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+                  // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+                  memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+                  Blocks[ind2][ALLOC] = 1;
+                  num_blocks++;
+                  if(num_blocks == max_blocks) goto end;
+                }
+              }
+              for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
+                if(ind2 > max_blocks)
+                  ind2 = 0;
+                if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
+                  // Dbprintf("Tmp %d -> Block %d", ind, ind2);
+                  memcpy(Blocks[ind2], tmpBlocks[ind], 16);
+                  Blocks[ind2][ALLOC] = 1;
+                  num_blocks++;
+                  if(num_blocks == max_blocks) goto end;
+                }
+              }
+            }
+          }
+        }

       }
     }
     tries++;
     if (BUTTON_PRESS()) return;
       }
     }
     tries++;
     if (BUTTON_PRESS()) return;

-  } while (num_blocks != max_blocks);
- end:
-  Dbprintf("-----------------------------------------");
-  Dbprintf("Memory content:");
-  Dbprintf("-----------------------------------------");
-  for(i=0; i<max_blocks; i++) {
+       } while (num_blocks != max_blocks);
+end:
+       Dbprintf("-----------------------------------------");
+       Dbprintf("Memory content:");
+       Dbprintf("-----------------------------------------");
+       for(i=0; i<max_blocks; i++) {

     if(Blocks[i][ALLOC]==1)
       Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
     if(Blocks[i][ALLOC]==1)
       Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",

-              Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7], 
-              Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
+               Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
+               Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);

     else
       Dbprintf("<missing block %d>", i);
     else
       Dbprintf("<missing block %d>", i);

-  }
-  Dbprintf("-----------------------------------------");
-  
-  return ;
+       }
+       Dbprintf("-----------------------------------------");
+       
+       return ;

 }
 
 
 //-----------------------------------
 }
 
 
 //-----------------------------------

-//   EM4469 / EM4305 routines
+// EM4469 / EM4305 routines

 //-----------------------------------
 //-----------------------------------

-#define FWD_CMD_LOGIN   0xC      //including the even parity, binary mirrored 
-#define FWD_CMD_WRITE   0xA 
-#define FWD_CMD_READ    0x9 
-#define FWD_CMD_DISABLE 0x5 
-
-
-uint8_t forwardLink_data[64];       //array of forwarded bits  
-uint8_t * forward_ptr;              //ptr for forward message preparation 
-uint8_t fwd_bit_sz;                 //forwardlink bit counter
-uint8_t * fwd_write_ptr;            //forwardlink bit pointer
- 
-//==================================================================== 
-// prepares command bits 
-// see EM4469 spec 
-//==================================================================== 
-//-------------------------------------------------------------------- 
-uint8_t Prepare_Cmd( uint8_t cmd ) { 
-//--------------------------------------------------------------------  
- 
-  *forward_ptr++ = 0;               //start bit 
-  *forward_ptr++ = 0;               //second pause for 4050 code 
- 
-  *forward_ptr++ = cmd; 
-  cmd >>= 1; 
-  *forward_ptr++ = cmd; 
-  cmd >>= 1; 
-  *forward_ptr++ = cmd; 
+#define FWD_CMD_LOGIN 0xC //including the even parity, binary mirrored
+#define FWD_CMD_WRITE 0xA
+#define FWD_CMD_READ 0x9
+#define FWD_CMD_DISABLE 0x5
+
+
+uint8_t forwardLink_data[64]; //array of forwarded bits
+uint8_t * forward_ptr; //ptr for forward message preparation
+uint8_t fwd_bit_sz; //forwardlink bit counter
+uint8_t * fwd_write_ptr; //forwardlink bit pointer
+
+//====================================================================
+// prepares command bits
+// see EM4469 spec
+//====================================================================
+//--------------------------------------------------------------------
+uint8_t Prepare_Cmd( uint8_t cmd ) {
+  //--------------------------------------------------------------------
+  
+  *forward_ptr++ = 0; //start bit
+  *forward_ptr++ = 0; //second pause for 4050 code
+  
+  *forward_ptr++ = cmd;
+  cmd >>= 1;
+  *forward_ptr++ = cmd;

   cmd >>= 1;
   cmd >>= 1;

-  *forward_ptr++ = cmd; 
- 
-  return 6;                         //return number of emited bits 
-} 
- 
-//==================================================================== 
-// prepares address bits 
-// see EM4469 spec 
-//==================================================================== 
- 
-//-------------------------------------------------------------------- 
-uint8_t Prepare_Addr( uint8_t addr ) { 
-//-------------------------------------------------------------------- 
- 
-  register uint8_t line_parity; 
- 
+  *forward_ptr++ = cmd;
+  cmd >>= 1;
+  *forward_ptr++ = cmd;
+  
+  return 6; //return number of emited bits
+}
+
+//====================================================================
+// prepares address bits
+// see EM4469 spec
+//====================================================================
+
+//--------------------------------------------------------------------
+uint8_t Prepare_Addr( uint8_t addr ) {
+  //--------------------------------------------------------------------
+  
+  register uint8_t line_parity;
+  

   uint8_t i;
   line_parity = 0;
   for(i=0;i<6;i++) {
   uint8_t i;
   line_parity = 0;
   for(i=0;i<6;i++) {

-    *forward_ptr++ = addr; 
-    line_parity ^= addr; 
+    *forward_ptr++ = addr;
+    line_parity ^= addr;

     addr >>= 1;
   }
   
     addr >>= 1;
   }
   

-  *forward_ptr++ = (line_parity & 1);  
- 
-  return 7;                      //return number of emited bits 
-} 
- 
-//==================================================================== 
-// prepares data bits intreleaved with parity bits 
-// see EM4469 spec 
-//==================================================================== 
- 
-//-------------------------------------------------------------------- 
-uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) { 
-//-------------------------------------------------------------------- 
- 
-  register uint8_t line_parity; 
-  register uint8_t column_parity; 
-  register uint8_t i, j; 
-  register uint16_t data; 
- 
-  data = data_low; 
-  column_parity = 0; 
- 
-  for(i=0; i<4; i++) { 
-    line_parity = 0; 
-    for(j=0; j<8; j++) { 
-      line_parity ^= data; 
-      column_parity ^= (data & 1) << j; 
-      *forward_ptr++ = data; 
-      data >>= 1; 
-    } 
-    *forward_ptr++ = line_parity; 
-    if(i == 1) 
-      data = data_hi; 
-  } 
- 
-  for(j=0; j<8; j++) { 
-    *forward_ptr++ = column_parity; 
-    column_parity >>= 1; 
-  } 
-  *forward_ptr = 0; 
- 
-  return 45;                             //return number of emited bits 
-} 
- 
-//==================================================================== 
-// Forward Link send function 
-// Requires: forwarLink_data filled with valid bits (1 bit per byte) 
-//           fwd_bit_count set with number of bits to be sent 
-//==================================================================== 
-void SendForward(uint8_t fwd_bit_count) {
+  *forward_ptr++ = (line_parity & 1);
+  
+  return 7; //return number of emited bits
+}

 
 

-  fwd_write_ptr = forwardLink_data;
-  fwd_bit_sz = fwd_bit_count;
+//====================================================================
+// prepares data bits intreleaved with parity bits
+// see EM4469 spec
+//====================================================================

 
 

-       LED_D_ON();
+//--------------------------------------------------------------------
+uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
+  //--------------------------------------------------------------------
+  
+  register uint8_t line_parity;
+  register uint8_t column_parity;
+  register uint8_t i, j;
+  register uint16_t data;
+  
+  data = data_low;
+  column_parity = 0;
+  
+  for(i=0; i<4; i++) {
+    line_parity = 0;
+    for(j=0; j<8; j++) {
+      line_parity ^= data;
+      column_parity ^= (data & 1) << j;
+      *forward_ptr++ = data;
+      data >>= 1;
+    }
+    *forward_ptr++ = line_parity;
+    if(i == 1)
+      data = data_hi;
+  }
+  
+  for(j=0; j<8; j++) {
+    *forward_ptr++ = column_parity;
+    column_parity >>= 1;
+  }
+  *forward_ptr = 0;
+  
+  return 45; //return number of emited bits
+}

 
 

+//====================================================================
+// Forward Link send function
+// Requires: forwarLink_data filled with valid bits (1 bit per byte)
+// fwd_bit_count set with number of bits to be sent
+//====================================================================
+void SendForward(uint8_t fwd_bit_count) {
+  
+  fwd_write_ptr = forwardLink_data;
+  fwd_bit_sz = fwd_bit_count;
+  
+  LED_D_ON();
+  

   //Field on
   //Field on

-       FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-       FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);
-       
-       // Give it a bit of time for the resonant antenna to settle.
-       // And for the tag to fully power up
-       SpinDelay(150);
-       
+  FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+  FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+  
+  // Give it a bit of time for the resonant antenna to settle.
+  // And for the tag to fully power up
+  SpinDelay(150);
+  

   // force 1st mod pulse (start gap must be longer for 4305)
   // force 1st mod pulse (start gap must be longer for 4305)

-  fwd_bit_sz--;                        //prepare next bit modulation 
-  fwd_write_ptr++; 
+  fwd_bit_sz--; //prepare next bit modulation
+  fwd_write_ptr++;

   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
   SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
   FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
   SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
   FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz

-  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);//field on
+  FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on

   SpinDelayUs(16*8); //16 cycles on (8us each)
   SpinDelayUs(16*8); //16 cycles on (8us each)

-
-       // now start writting
-  while(fwd_bit_sz-- > 0) {                   //prepare next bit modulation
-    if(((*fwd_write_ptr++) & 1) == 1) 
+  
+  // now start writting
+  while(fwd_bit_sz-- > 0) { //prepare next bit modulation
+    if(((*fwd_write_ptr++) & 1) == 1)

       SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
     else {
       //These timings work for 4469/4269/4305 (with the 55*8 above)
       SpinDelayUs(32*8); //32 cycles at 125Khz (8us each)
     else {
       //These timings work for 4469/4269/4305 (with the 55*8 above)

-           FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+      FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

       SpinDelayUs(23*8); //16-4 cycles off (8us each)
       SpinDelayUs(23*8); //16-4 cycles off (8us each)

-           FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-           FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_READER);//field on
+      FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
+      FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on

       SpinDelayUs(9*8); //16 cycles on (8us each)
     }
       SpinDelayUs(9*8); //16 cycles on (8us each)
     }

-  } 
+  }

 }
 
 }
 

-void Login (uint32_t Password) {
-
+void EM4xLogin(uint32_t Password) {
+  

   uint8_t fwd_bit_count;
   uint8_t fwd_bit_count;

-
-  forward_ptr = forwardLink_data; 
-  fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN ); 
-  fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 ); 
-
-  SendForward(fwd_bit_count); 

   
   

-  //Wait for command to complete 
-       SpinDelay(20);
-
-} 
+  forward_ptr = forwardLink_data;
+  fwd_bit_count = Prepare_Cmd( FWD_CMD_LOGIN );
+  fwd_bit_count += Prepare_Data( Password&0xFFFF, Password>>16 );
+  
+  SendForward(fwd_bit_count);
+  
+  //Wait for command to complete
+  SpinDelay(20);
+  
+}

 
 

-void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) { 
- 
+void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
+  

   uint8_t fwd_bit_count;
   uint8_t fwd_bit_count;

-       uint8_t *dest = (uint8_t *)BigBuf;
-       int m=0, i=0;
- 
+  uint8_t *dest = (uint8_t *)BigBuf;
+  int m=0, i=0;
+  

   //If password mode do login
   //If password mode do login

-  if (PwdMode == 1) Login(Pwd);
-
-  forward_ptr = forwardLink_data; 
-  fwd_bit_count  = Prepare_Cmd( FWD_CMD_READ ); 
-  fwd_bit_count += Prepare_Addr( Address ); 
-
-       m = sizeof(BigBuf);
+  if (PwdMode == 1) EM4xLogin(Pwd);
+  
+  forward_ptr = forwardLink_data;
+  fwd_bit_count = Prepare_Cmd( FWD_CMD_READ );
+  fwd_bit_count += Prepare_Addr( Address );
+  
+  m = sizeof(BigBuf);

   // Clear destination buffer before sending the command
   // Clear destination buffer before sending the command

-       memset(dest, 128, m);
-       // Connect the A/D to the peak-detected low-frequency path.
-       SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-       // Now set up the SSC to get the ADC samples that are now streaming at us.
-       FpgaSetupSsc();
-
-  SendForward(fwd_bit_count); 
+  memset(dest, 128, m);
+  // Connect the A/D to the peak-detected low-frequency path.
+  SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+  // Now set up the SSC to get the ADC samples that are now streaming at us.
+  FpgaSetupSsc();

   
   

-       // Now do the acquisition 
-       i = 0;
-       for(;;) {
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-                       AT91C_BASE_SSC->SSC_THR = 0x43;
-               }
-               if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-                       dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-                       i++;
-                       if (i >= m) break;
-               }
-       }
+  SendForward(fwd_bit_count);
+  
+  // Now do the acquisition
+  i = 0;
+  for(;;) {
+    if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+      AT91C_BASE_SSC->SSC_THR = 0x43;
+    }
+    if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+      dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+      i++;
+      if (i >= m) break;
+    }
+  }

   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

-       LED_D_OFF();
+  LED_D_OFF();

 }
 
 }
 

-void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) { 
- 
+void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
+  

   uint8_t fwd_bit_count;
   uint8_t fwd_bit_count;

- 
+  

   //If password mode do login
   //If password mode do login

-  if (PwdMode == 1) Login(Pwd);
-       
-  forward_ptr = forwardLink_data; 
-  fwd_bit_count  = Prepare_Cmd( FWD_CMD_WRITE ); 
-  fwd_bit_count += Prepare_Addr( Address ); 
-  fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 ); 
-
-  SendForward(fwd_bit_count); 
+  if (PwdMode == 1) EM4xLogin(Pwd);

   
   

-  //Wait for write to complete 
-       SpinDelay(20);
+  forward_ptr = forwardLink_data;
+  fwd_bit_count = Prepare_Cmd( FWD_CMD_WRITE );
+  fwd_bit_count += Prepare_Addr( Address );
+  fwd_bit_count += Prepare_Data( Data&0xFFFF, Data>>16 );
+  
+  SendForward(fwd_bit_count);
+  
+  //Wait for write to complete
+  SpinDelay(20);

   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
   FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off

-       LED_D_OFF();
+  LED_D_OFF();

 }
 }

-