+// iclass / picopass chip config structures and shared routines
+typedef struct {
+ uint8_t app_limit; //[8]
+ uint8_t otp[2]; //[9-10]
+ uint8_t block_writelock;//[11]
+ uint8_t chip_config; //[12]
+ uint8_t mem_config; //[13]
+ uint8_t eas; //[14]
+ uint8_t fuses; //[15]
+} picopass_conf_block;
+
+typedef struct {
+ uint8_t csn[8];
+ picopass_conf_block conf;
+ uint8_t epurse[8];
+ uint8_t key_d[8];
+ uint8_t key_c[8];
+ uint8_t app_issuer_area[8];
+} picopass_hdr;
+
+
+static void fuse_config(const picopass_hdr *hdr) {
+ uint8_t fuses = hdr->conf.fuses;
+
+ if (fuses & FUSE_FPERS)
+ PrintAndLog(" Mode: Personalization [Programmable]");
+ else
+ PrintAndLog(" Mode: Application [Locked]");
+
+ if (fuses & FUSE_CODING1)
+ PrintAndLog("Coding: RFU");
+ else {
+ if (fuses & FUSE_CODING0)
+ PrintAndLog("Coding: ISO 14443-2 B/ISO 15693");
+ else
+ PrintAndLog("Coding: ISO 14443B only");
+ }
+ if ((fuses & FUSE_CRYPT1) && (fuses & FUSE_CRYPT0)) PrintAndLog(" Crypt: Secured page, keys not locked");
+ if ((fuses & FUSE_CRYPT1) && !(fuses & FUSE_CRYPT0)) PrintAndLog(" Crypt: Secured page, keys locked");
+ if (!(fuses & FUSE_CRYPT1) && (fuses & FUSE_CRYPT0)) PrintAndLog(" Crypt: Non secured page");
+ if (!(fuses & FUSE_CRYPT1) && !(fuses & FUSE_CRYPT0)) PrintAndLog(" Crypt: No auth possible. Read only if RA is enabled");
+
+ if (fuses & FUSE_RA)
+ PrintAndLog(" RA: Read access enabled");
+ else
+ PrintAndLog(" RA: Read access not enabled");
+}
+
+
+static void getMemConfig(uint8_t mem_cfg, uint8_t chip_cfg, uint8_t *max_blk, uint8_t *app_areas, uint8_t *kb) {
+ // mem-bit 5, mem-bit 7, chip-bit 4: defines chip type
+ if((chip_cfg & 0x10) && !(mem_cfg & 0x80) && !(mem_cfg & 0x20)) {
+ *kb = 2;
+ *app_areas = 2;
+ *max_blk = 31;
+ } else if((chip_cfg & 0x10) && (mem_cfg & 0x80) && !(mem_cfg & 0x20)) {
+ *kb = 16;
+ *app_areas = 2;
+ *max_blk = 255; //16kb
+ } else if(!(chip_cfg & 0x10) && !(mem_cfg & 0x80) && !(mem_cfg & 0x20)) {
+ *kb = 16;
+ *app_areas = 16;
+ *max_blk = 255; //16kb
+ } else if((chip_cfg & 0x10) && (mem_cfg & 0x80) && (mem_cfg & 0x20)) {
+ *kb = 32;
+ *app_areas = 3;
+ *max_blk = 255; //16kb
+ } else if(!(chip_cfg & 0x10) && !(mem_cfg & 0x80) && (mem_cfg & 0x20)) {
+ *kb = 32;
+ *app_areas = 17;
+ *max_blk = 255; //16kb
+ } else {
+ *kb = 32;
+ *app_areas = 2;
+ *max_blk = 255;
+ }
+}
+
+
+static void mem_app_config(const picopass_hdr *hdr) {
+ uint8_t mem = hdr->conf.mem_config;
+ uint8_t chip = hdr->conf.chip_config;
+ uint8_t applimit = hdr->conf.app_limit;
+ if (applimit < 6) applimit = 26;
+ uint8_t kb = 2;
+ uint8_t app_areas = 2;
+ uint8_t max_blk = 31;
+ getMemConfig(mem, chip, &max_blk, &app_areas, &kb);
+ PrintAndLog(" Mem: %u KBits/%u App Areas (%u * 8 bytes) [%02X]", kb, app_areas, max_blk+1, mem);
+ PrintAndLog(" AA1: blocks 06-%02X", applimit);
+ PrintAndLog(" AA2: blocks %02X-%02X", applimit+1, max_blk);
+}
+
+
+static void printIclassDumpInfo(uint8_t* iclass_dump) {
+ fuse_config((picopass_hdr*)iclass_dump);
+ mem_app_config((picopass_hdr*)iclass_dump);
+}