fpga_compress: interleave (combine) fpga_lf.bit and fpga_hf.bit before compression.

[proxmark3-svn] / armsrc / ldscript

diff --git a/armsrc/ldscript b/armsrc/ldscript
index 3219a041de6fecf656fb27cc6ff8cc8183bd7eaf..6175564dceff930950c4b272d3b60536cc1cbda2 100644 (file)
--- a/armsrc/ldscript
+++ b/armsrc/ldscript
@@ -1,24 +1,66 @@
-INCLUDE ../common/ldscript.common\r
-\r
-ENTRY(Vector)\r
-SECTIONS\r
-{\r
-       fpgaimage : {\r
-               *(fpga_bit.data)\r
-       } >fpgaimage\r
-       .start : { *(.startos) } >osimage\r
-       .text : { \r
-               *(.text)\r
-               *(.text.*)\r
-               *(.glue_7)\r
-               *(.glue_7t)\r
-       } >osimage\r
-       .rodata : { \r
-               *(.rodata) \r
-               *(.rodata*) \r
-       } >osimage\r
-       .data : { *(.data) } >ram\r
-       __bss_start__ = .;\r
-       .bss : { *(.bss) } >ram\r
-       __bss_end__ = .;\r
-}\r
+/*
+-----------------------------------------------------------------------------
+ This code is licensed to you under the terms of the GNU GPL, version 2 or,
+ at your option, any later version. See the LICENSE.txt file for the text of
+ the license.
+-----------------------------------------------------------------------------
+ Linker script for the ARM binary
+-----------------------------------------------------------------------------
+*/
+INCLUDE ../common/ldscript.common
+
+PHDRS
+{
+       text PT_LOAD FLAGS(5);
+       data PT_LOAD;
+       bss PT_LOAD;
+}
+
+ENTRY(Vector)
+SECTIONS
+{
+       .start : {
+               *(.startos)
+       } >osimage :text
+
+       .text : {
+               *(.text)
+               *(.text.*)
+               *(.eh_frame)
+               *(.glue_7)
+               *(.glue_7t)
+       } >osimage :text
+
+       .rodata : {
+               *(.rodata)
+               *(.rodata.*)
+               *(fpga_all_bit.data)
+               KEEP(*(.version_information))
+       } >osimage :text
+
+       . = ALIGN(4);
+
+       .data : {
+               *(.data)
+               *(.data.*)
+               *(.ramfunc)
+               . = ALIGN(4);
+       } >ram AT>osimage :data
+
+       __data_src_start__ = LOADADDR(.data);
+       __data_start__ = ADDR(.data);
+       __data_end__ = __data_start__ + SIZEOF(.data);
+       __os_size__ = SIZEOF(.text) + SIZEOF(.data) + SIZEOF(.rodata);
+       
+       .bss : {
+               __bss_start__ = .; 
+               *(.bss)
+               *(.bss.*) 
+               . = ALIGN(4);
+               __bss_end__ = .;
+       } >ram AT>ram :bss
+
+       .commonarea (NOLOAD) : {
+               *(.commonarea)
+       } >commonarea :NONE
+}