#include "string.h"
#include "lfsampling.h"
-#include "cipherutils.h"
+
sample_config config = { 1, 8, 1, 95, 0 } ;
void printConfig()
{
- Dbprintf("Sampling config: ");
+ Dbprintf("LF Sampling config: ");
Dbprintf(" [q] divisor: %d ", config.divisor);
Dbprintf(" [b] bps: %d ", config.bits_per_sample);
Dbprintf(" [d] decimation: %d ", config.decimation);
{
return &config;
}
-/*
+
typedef struct {
uint8_t * buffer;
uint32_t numbits;
uint32_t position;
} BitstreamOut;
-*/
/**
* @brief Pushes bit onto the stream
* @param stream
* @param bit
*/
-/*void pushBit( BitstreamOut* stream, uint8_t bit)
+void pushBit( BitstreamOut* stream, uint8_t bit)
{
int bytepos = stream->position >> 3; // divide by 8
int bitpos = stream->position & 7;
stream->position++;
stream->numbits++;
}
-*/
+
/**
* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
* if not already loaded, sets divisor and starts up the antenna.
* @param silent - is true, now outputs are made. If false, dbprints the status
* @return the number of bits occupied by the samples.
*/
-
uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
{
//.
if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
LED_D_OFF();
- if (trigger_threshold > 0 && sample < trigger_threshold)
+ // threshold either high or low values 128 = center 0. if trigger = 178
+ if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) //
continue;
trigger_threshold = 0;
,silent);
}
-uint32_t ReadLF(bool activeField)
+uint32_t ReadLF(bool activeField, bool silent)
{
- printConfig();
+ if (!silent) printConfig();
LFSetupFPGAForADC(config.divisor, activeField);
// Now call the acquisition routine
- return DoAcquisition_config(false);
+ return DoAcquisition_config(silent);
}
/**
* Initializes the FPGA for reader-mode (field on), and acquires the samples.
* @return number of bits sampled
**/
-uint32_t SampleLF()
+uint32_t SampleLF(bool printCfg)
{
- return ReadLF(true);
+ return ReadLF(true, printCfg);
}
/**
* Initializes the FPGA for snoop-mode (field off), and acquires the samples.
* @return number of bits sampled
**/
-uint32_t SnoopLF()
-{
- return ReadLF(false);
+uint32_t SnoopLF() {
+ return ReadLF(false, true);
}
+
+/**
+* acquisition of T55x7 LF signal. Similart to other LF, but adjusted with @marshmellows thresholds
+* the data is collected in BigBuf.
+**/
+void doT55x7Acquisition(void){
+
+ #define T55xx_SAMPLES_SIZE 12000 // 32 x 32 x 10 (32 bit times numofblock (7), times clock skip..)
+ #define T55xx_READ_UPPER_THRESHOLD 128+40 // 50
+ #define T55xx_READ_TOL 5
+ //#define T55xx_READ_LOWER_THRESHOLD 128-40 //-50
+
+ uint8_t *dest = BigBuf_get_addr();
+ uint16_t bufsize = BigBuf_max_traceLen();
+
+ if ( bufsize > T55xx_SAMPLES_SIZE )
+ bufsize = T55xx_SAMPLES_SIZE;
+
+ memset(dest, 0, bufsize);
+
+ uint16_t i = 0;
+ bool startFound = false;
+ bool highFound = false;
+ uint8_t curSample = 0;
+ uint8_t firstSample = 0;
+ for(;;) {
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
+ AT91C_BASE_SSC->SSC_THR = 0x43;
+ LED_D_ON();
+ }
+ if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
+ curSample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
+
+ // find first high sample
+ if (!startFound && curSample > T55xx_READ_UPPER_THRESHOLD) {
+ if (curSample > firstSample)
+ firstSample = curSample;
+ highFound = true;
+ } else if (!highFound) {
+ continue;
+ }
+
+ // skip until samples begin to change
+ if (startFound || curSample < firstSample-T55xx_READ_TOL){
+ if (!startFound)
+ dest[i++] = firstSample;
+ startFound = true;
+ dest[i++] = curSample;
+ LED_D_OFF();
+ if (i >= bufsize) break;
+ }
+ }
+ }
+}
\ No newline at end of file