- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
- // now do the read
- DoAcquisition125k(-1);
-}
-
-/* blank r/w tag data stream
-...0000000000000000 01111111
-1010101010101010101010101010101010101010101010101010101010101010
-0011010010100001
-01111111
-101010101010101[0]000...
-
-[5555fe852c5555555555555555fe0000]
-*/
-void ReadTItag(void)
-{
- // some hardcoded initial params
- // when we read a TI tag we sample the zerocross line at 2Mhz
- // TI tags modulate a 1 as 16 cycles of 123.2Khz
- // TI tags modulate a 0 as 16 cycles of 134.2Khz
- #define FSAMPLE 2000000
- #define FREQLO 123200
- #define FREQHI 134200
-
- signed char *dest = (signed char *)BigBuf;
- int n = sizeof(BigBuf);
- // 128 bit shift register [shift3:shift2:shift1:shift0]
- uint32_t shift3 = 0, shift2 = 0, shift1 = 0, shift0 = 0;
-
- int i, cycles=0, samples=0;
- // how many sample points fit in 16 cycles of each frequency
- uint32_t sampleslo = (FSAMPLE<<4)/FREQLO, sampleshi = (FSAMPLE<<4)/FREQHI;
- // when to tell if we're close enough to one freq or another
- uint32_t threshold = (sampleslo - sampleshi + 1)>>1;
-
- // TI tags charge at 134.2Khz
- FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
- FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-
- // Place FPGA in passthrough mode, in this mode the CROSS_LO line
- // connects to SSP_DIN and the SSP_DOUT logic level controls
- // whether we're modulating the antenna (high)
- // or listening to the antenna (low)
- FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_PASSTHRU);
-
- // get TI tag data into the buffer
- AcquireTiType();
-
- FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-
- for (i=0; i<n-1; i++) {
- // count cycles by looking for lo to hi zero crossings
- if ( (dest[i]<0) && (dest[i+1]>0) ) {
- cycles++;
- // after 16 cycles, measure the frequency
- if (cycles>15) {
- cycles=0;
- samples=i-samples; // number of samples in these 16 cycles
-
- // TI bits are coming to us lsb first so shift them
- // right through our 128 bit right shift register
- shift0 = (shift0>>1) | (shift1 << 31);
- shift1 = (shift1>>1) | (shift2 << 31);
- shift2 = (shift2>>1) | (shift3 << 31);
- shift3 >>= 1;
-
- // check if the cycles fall close to the number
- // expected for either the low or high frequency
- if ( (samples>(sampleslo-threshold)) && (samples<(sampleslo+threshold)) ) {
- // low frequency represents a 1
- shift3 |= (1<<31);
- } else if ( (samples>(sampleshi-threshold)) && (samples<(sampleshi+threshold)) ) {
- // high frequency represents a 0
- } else {
- // probably detected a gay waveform or noise
- // use this as gaydar or discard shift register and start again
- shift3 = shift2 = shift1 = shift0 = 0;
- }
- samples = i;
-
- // for each bit we receive, test if we've detected a valid tag
-
- // if we see 17 zeroes followed by 6 ones, we might have a tag
- // remember the bits are backwards
- if ( ((shift0 & 0x7fffff) == 0x7e0000) ) {
- // if start and end bytes match, we have a tag so break out of the loop
- if ( ((shift0>>16)&0xff) == ((shift3>>8)&0xff) ) {
- cycles = 0xF0B; //use this as a flag (ugly but whatever)
- break;
- }
- }
- }
- }
- }
-
- // if flag is set we have a tag
- if (cycles!=0xF0B) {
- DbpString("Info: No valid tag detected.");
- } else {
- // put 64 bit data into shift1 and shift0
- shift0 = (shift0>>24) | (shift1 << 8);
- shift1 = (shift1>>24) | (shift2 << 8);
-
- // align 16 bit crc into lower half of shift2
- shift2 = ((shift2>>24) | (shift3 << 8)) & 0x0ffff;
-
- // if r/w tag, check ident match
- if (shift3 & (1<<15) ) {
- DbpString("Info: TI tag is rewriteable");
- // only 15 bits compare, last bit of ident is not valid
- if (((shift3 >> 16) ^ shift0) & 0x7fff ) {
- DbpString("Error: Ident mismatch!");
- } else {
- DbpString("Info: TI tag ident is valid");
- }
- } else {
- DbpString("Info: TI tag is readonly");
- }
-
- // WARNING the order of the bytes in which we calc crc below needs checking
- // i'm 99% sure the crc algorithm is correct, but it may need to eat the
- // bytes in reverse or something
- // calculate CRC
- uint32_t crc=0;
-
- crc = update_crc16(crc, (shift0)&0xff);
- crc = update_crc16(crc, (shift0>>8)&0xff);
- crc = update_crc16(crc, (shift0>>16)&0xff);
- crc = update_crc16(crc, (shift0>>24)&0xff);
- crc = update_crc16(crc, (shift1)&0xff);
- crc = update_crc16(crc, (shift1>>8)&0xff);
- crc = update_crc16(crc, (shift1>>16)&0xff);
- crc = update_crc16(crc, (shift1>>24)&0xff);
-
- Dbprintf("Info: Tag data: %x%08x, crc=%x",
- (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
- if (crc != (shift2&0xffff)) {
- Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
- } else {
- DbpString("Info: CRC is good");
- }
- }
-}
projects / proxmark3-svn / blobdiff