X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/0cd2a41ac0e27ba7647ecfaa0d713552e9684460..d5810937bdf7fd5aab2629c58740eecac1ac3b7c:/armsrc/lfsampling.c?ds=sidebyside

diff --git a/armsrc/lfsampling.c b/armsrc/lfsampling.c
index 138814b7..662ebf24 100644
--- a/armsrc/lfsampling.c
+++ b/armsrc/lfsampling.c
@@ -62,7 +62,6 @@ typedef struct {
 	uint32_t position;
 } BitstreamOut;
 
-
 /**
  * @brief Pushes bit onto the stream
  * @param stream
@@ -120,8 +119,7 @@ void LFSetupFPGAForADC(int divisor, bool lf_field)
  * @param silent - is true, now outputs are made. If false, dbprints the status
  * @return the number of bits occupied by the samples.
  */
-
-uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold,bool silent)
+uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averaging, int trigger_threshold, bool silent)
 {
 	//.
 	uint8_t *dest = BigBuf_get_addr();
@@ -152,8 +150,12 @@ uint32_t DoAcquisition(uint8_t decimation, uint32_t bits_per_sample, bool averag
 		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
 			sample = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
 			LED_D_OFF();
-			if (trigger_threshold > 0 && sample < trigger_threshold)
+			// threshold either high or low values 128 = center 0.  if trigger = 178 
+			if ((trigger_threshold > 0) && (sample < (trigger_threshold+128)) && (sample > (128-trigger_threshold))) // 
 				continue;
+		
+			//if (trigger_threshold > 0 && sample < trigger_threshold) // 
+				//continue;
 
 			trigger_threshold = 0;
 			sample_total_numbers++;
@@ -225,21 +227,21 @@ uint32_t DoAcquisition_config( bool silent)
 				  ,silent);
 }
 
-uint32_t ReadLF(bool activeField)
+uint32_t ReadLF(bool activeField, bool silent)
 {
-	printConfig();
+	if (!silent) printConfig();
 	LFSetupFPGAForADC(config.divisor, activeField);
 	// Now call the acquisition routine
-	return DoAcquisition_config(false);
+	return DoAcquisition_config(silent);
 }
 
 /**
 * Initializes the FPGA for reader-mode (field on), and acquires the samples.
 * @return number of bits sampled
 **/
-uint32_t SampleLF()
+uint32_t SampleLF(bool printCfg)
 {
-	return ReadLF(true);
+	return ReadLF(true, printCfg);
 }
 /**
 * Initializes the FPGA for snoop-mode (field off), and acquires the samples.
@@ -248,5 +250,5 @@ uint32_t SampleLF()
 
 uint32_t SnoopLF()
 {
-	return ReadLF(false);
+	return ReadLF(false, true);
 }