X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/0de8e3874d6524379550a50a4d9c29faf2d239ea..98c799ba499b81a02bef8f04ccb5149394c4d4d5:/armsrc/lfops.c

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index 8feaa6ae..7f61c78d 100644
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -16,8 +16,8 @@
 #include "string.h"
 #include "lfdemod.h"
 #include "lfsampling.h"
-#include "usb_cdc.h"
-
+#include "protocols.h"
+#include "usb_cdc.h" // for usb_poll_validate_length
 
 /**
  * Function to do a modulation and then get samples.
@@ -26,7 +26,7 @@
  * @param period_1
  * @param command
  */
-void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
+void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t period_0, uint32_t period_1, uint8_t *command)
 {
 
 	int divisor_used = 95; // 125 KHz
@@ -37,6 +37,8 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
 
 	sample_config sc = { 0,0,1, divisor_used, 0};
 	setSamplingConfig(&sc);
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 
 	/* Make sure the tag is reset */
 	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
@@ -73,8 +75,6 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
 	DoAcquisition_config(false);
 }
 
-
-
 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010
@@ -204,8 +204,7 @@ void ReadTItag(void)
 		crc = update_crc16(crc, (shift1>>16)&0xff);
 		crc = update_crc16(crc, (shift1>>24)&0xff);
 
-		Dbprintf("Info: Tag data: %x%08x, crc=%x",
-				 (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
+		Dbprintf("Info: Tag data: %x%08x, crc=%x", (unsigned int)shift1, (unsigned int)shift0, (unsigned int)shift2 & 0xFFFF);
 		if (crc != (shift2&0xffff)) {
 			Dbprintf("Error: CRC mismatch, expected %x", (unsigned int)crc);
 		} else {
@@ -244,11 +243,13 @@ void AcquireTiType(void)
 	int i, j, n;
 	// tag transmission is <20ms, sampling at 2M gives us 40K samples max
 	// each sample is 1 bit stuffed into a uint32_t so we need 1250 uint32_t
- #define TIBUFLEN 1250
+	#define TIBUFLEN 1250
 
 	// clear buffer
-	uint32_t *BigBuf = (uint32_t *)BigBuf_get_addr();
-	memset(BigBuf,0,BigBuf_max_traceLen()/sizeof(uint32_t));
+	uint32_t *buf = (uint32_t *)BigBuf_get_addr();
+
+	//clear buffer now so it does not interfere with timing later
+	BigBuf_Clear_ext(false);
 
 	// Set up the synchronous serial port
 	AT91C_BASE_PIOA->PIO_PDR = GPIO_SSC_DIN;
@@ -286,7 +287,7 @@ void AcquireTiType(void)
 	i = 0;
 	for(;;) {
 		if(AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-			BigBuf[i] = AT91C_BASE_SSC->SSC_RHR;	// store 32 bit values in buffer
+			buf[i] = AT91C_BASE_SSC->SSC_RHR;	// store 32 bit values in buffer
 			i++; if(i >= TIBUFLEN) break;
 		}
 		WDT_HIT();
@@ -297,11 +298,12 @@ void AcquireTiType(void)
 	AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_DIN | GPIO_SSC_DOUT;
 
 	char *dest = (char *)BigBuf_get_addr();
-	n = TIBUFLEN*32;
+	n = TIBUFLEN * 32;
+	
 	// unpack buffer
-	for (i=TIBUFLEN-1; i>=0; i--) {
-		for (j=0; j<32; j++) {
-			if(BigBuf[i] & (1 << j)) {
+	for (i = TIBUFLEN-1; i >= 0; i--) {
+		for (j = 0; j < 32; j++) {
+			if(buf[i] & (1 << j)) {
 				dest[--n] = 1;
 			} else {
 				dest[--n] = -1;
@@ -326,8 +328,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 		crc = update_crc16(crc, (idhi>>16)&0xff);
 		crc = update_crc16(crc, (idhi>>24)&0xff);
 	}
-	Dbprintf("Writing to tag: %x%08x, crc=%x",
-			(unsigned int) idhi, (unsigned int) idlo, crc);
+	Dbprintf("Writing to tag: %x%08x, crc=%x",	(unsigned int) idhi, (unsigned int) idlo, crc);
 
 	// TI tags charge at 134.2Khz
 	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
@@ -349,7 +350,7 @@ void WriteTItag(uint32_t idhi, uint32_t idlo, uint16_t crc)
 	// start by writing 0xBB (keyword) and 0xEB (password)
 	// then write 80 bits of data (or 64 bit data + 16 bit crc if you prefer)
 	// finally end with 0x0300 (write frame)
-	// all data is sent lsb firts
+	// all data is sent lsb first
 	// finish with 15ms programming time
 
 	// modulate antenna
@@ -391,36 +392,34 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_EDGE_DETECT);
 
 	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT | GPIO_SSC_CLK;
-
 	AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
 	AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
 
  #define SHORT_COIL()	LOW(GPIO_SSC_DOUT)
- #define OPEN_COIL()		HIGH(GPIO_SSC_DOUT)
+ #define OPEN_COIL()	HIGH(GPIO_SSC_DOUT)
 
 	i = 0;
 	for(;;) {
 		//wait until SSC_CLK goes HIGH
 		while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-			if(BUTTON_PRESS() || (usb_poll_validate_length() )) {
+			if(BUTTON_PRESS() || usb_poll_validate_length() ) {
 				DbpString("Stopped");
 				return;
 			}
 			WDT_HIT();
 		}
-		if (ledcontrol)
-			LED_D_ON();
+		if (ledcontrol) LED_D_ON();
 
 		if(tab[i])
 			OPEN_COIL();
 		else
 			SHORT_COIL();
 
-		if (ledcontrol)
-			LED_D_OFF();
+		if (ledcontrol) LED_D_OFF();
+		
 		//wait until SSC_CLK goes LOW
 		while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
-			if(BUTTON_PRESS()) {
+			if( BUTTON_PRESS() || usb_poll_validate_length() ) {
 				DbpString("Stopped");
 				return;
 			}
@@ -571,12 +570,9 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
 		}
 	}
 
-	if (ledcontrol)
-		LED_A_ON();
+	if (ledcontrol)	LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
-
-	if (ledcontrol)
-		LED_A_OFF();
+	if (ledcontrol)	LED_A_OFF();
 }
 
 // prepare a waveform pattern in the buffer based on the ID given then
@@ -600,20 +596,10 @@ void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 		}
 	}
 	Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);
-	/*Dbprintf("DEBUG: First 32:");
-	uint8_t *dest = BigBuf_get_addr();
-	i=0;
-	Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	i+=16;
-	Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	*/
-	if (ledcontrol)
-		LED_A_ON();
 
+	if (ledcontrol)	LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
-
-	if (ledcontrol)
-		LED_A_OFF();
+	if (ledcontrol)	LED_A_OFF();
 }
 
 // compose ask waveform for one bit(ASK)
@@ -679,21 +665,10 @@ void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 	if (separator==1) Dbprintf("sorry but separator option not yet available"); 
 
 	Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
-	//DEBUG
-	//Dbprintf("First 32:");
-	//uint8_t *dest = BigBuf_get_addr();
-	//i=0;
-	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	//i+=16;
-	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-
-	if (ledcontrol)
-		LED_A_ON();
-	
-	SimulateTagLowFrequency(n, 0, ledcontrol);
 
-	if (ledcontrol)
-		LED_A_OFF();
+	if (ledcontrol)	LED_A_ON();
+	SimulateTagLowFrequency(n, 0, ledcontrol);
+	if (ledcontrol)	LED_A_OFF();
 }
 
 //carrier can be 2,4 or 8
@@ -722,7 +697,7 @@ static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, b
 // args clock, carrier, invert,
 void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 {
-	int ledcontrol=1;
+	int ledcontrol = 1;
 	int n=0, i=0;
 	uint8_t clk = arg1 >> 8;
 	uint8_t carrier = arg1 & 0xFF;
@@ -736,32 +711,25 @@ void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
 		}
 	}
 	Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
-	//Dbprintf("DEBUG: First 32:");
-	//uint8_t *dest = BigBuf_get_addr();
-	//i=0;
-	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
-	//i+=16;
-	//Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
 		   
-	if (ledcontrol)
-		LED_A_ON();
+	if (ledcontrol)	LED_A_ON();
 	SimulateTagLowFrequency(n, 0, ledcontrol);
-
-	if (ledcontrol)
-		LED_A_OFF();
+	if (ledcontrol)	LED_A_OFF();
 }
 
 // loop to get raw HID waveform then FSK demodulate the TAG ID from it
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
 	uint8_t *dest = BigBuf_get_addr();
-	//const size_t sizeOfBigBuff = BigBuf_max_traceLen();
 	size_t size = 0; 
 	uint32_t hi2=0, hi=0, lo=0;
 	int idx=0;
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
+
 	while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
 
 		WDT_HIT();
@@ -769,7 +737,6 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
 		DoAcquisition_default(-1,true);
 		// FSK demodulator
-		//size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
 		size = 50*128*2; //big enough to catch 2 sequences of largest format
 		idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
 		
@@ -777,12 +744,16 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 			// go over previously decoded manchester data and decode into usable tag ID
 			if (hi2 != 0){ //extra large HID tags  88/192 bits
 				Dbprintf("TAG ID: %x%08x%08x (%d)",
-				  (unsigned int) hi2, (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
-			}else {  //standard HID tags 44/96 bits
-				//Dbprintf("TAG ID: %x%08x (%d)",(unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF); //old print cmd
+				  (unsigned int) hi2,
+				  (unsigned int) hi,
+				  (unsigned int) lo,
+				  (unsigned int) (lo>>1) & 0xFFFF
+				  );
+			} else {  //standard HID tags 44/96 bits
 				uint8_t bitlen = 0;
 				uint32_t fc = 0;
 				uint32_t cardnum = 0;
+				
 				if (((hi>>5)&1) == 1){//if bit 38 is set then < 37 bit format is used
 					uint32_t lo2=0;
 					lo2=(((hi & 31) << 12) | (lo>>20)); //get bits 21-37 to check for format len bit
@@ -820,11 +791,13 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 						fc = ((hi&0xF)<<12)|(lo>>20);
 					}
 				}
-				//Dbprintf("TAG ID: %x%08x (%d)",
-				// (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF);
 				Dbprintf("TAG ID: %x%08x (%d) - Format Len: %dbit - FC: %d - Card: %d",
-						 (unsigned int) hi, (unsigned int) lo, (unsigned int) (lo>>1) & 0xFFFF,
-						 (unsigned int) bitlen, (unsigned int) fc, (unsigned int) cardnum);
+						 (unsigned int) hi,
+						 (unsigned int) lo,
+						 (unsigned int) (lo>>1) & 0xFFFF,
+						 (unsigned int) bitlen,
+						 (unsigned int) fc,
+						 (unsigned int) cardnum);
 			}
 			if (findone){
 				if (ledcontrol)	LED_A_OFF();
@@ -845,9 +818,10 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
 	uint8_t *dest = BigBuf_get_addr();
-	//const size_t sizeOfBigBuff = BigBuf_max_traceLen();
 	size_t size; 
 	int idx=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -858,11 +832,10 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 
 		DoAcquisition_default(-1,true);
 		// FSK demodulator
-		//size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
 		size = 50*128*2; //big enough to catch 2 sequences of largest format
 		idx = AWIDdemodFSK(dest, &size);
 		
-		if (idx>0 && size==96){
+		if (idx<=0 || size!=96) continue;
 	        // Index map
 	        // 0            10            20            30              40            50              60
 	        // |            |             |             |               |             |               |
@@ -882,6 +855,7 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	        uint32_t rawHi2 = bytebits_to_byte(dest+idx,32);
 
 	        size = removeParity(dest, idx+8, 4, 1, 88);
+		if (size != 66) continue;
 	        // ok valid card found!
 
 	        // Index map
@@ -923,7 +897,6 @@ void CmdAWIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 				return;
 			}
 			// reset
-		}
 		idx = 0;
 		WDT_HIT();
 	}
@@ -939,6 +912,8 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 	int clk=0, invert=0, errCnt=0, maxErr=20;
 	uint32_t hi=0;
 	uint64_t lo=0;
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
 	// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
@@ -1000,7 +975,11 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 	uint16_t number=0;
 	uint8_t crc = 0;
 	uint16_t calccrc = 0;
-	// Configure to go in 125Khz listen mode
+
+	//clear read buffer
+	BigBuf_Clear_keep_EM();
+	
+// Configure to go in 125Khz listen mode
 	LFSetupFPGAForADC(95, true);
 
 	while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
@@ -1043,7 +1022,7 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 			code = bytebits_to_byte(dest+idx,32);
 			code2 = bytebits_to_byte(dest+idx+32,32);
 			version = bytebits_to_byte(dest+idx+27,8); //14,4
-		facilitycode = bytebits_to_byte(dest+idx+18,8);
+			facilitycode = bytebits_to_byte(dest+idx+18,8);
 			number = (bytebits_to_byte(dest+idx+36,8)<<8)|(bytebits_to_byte(dest+idx+45,8)); //36,9
 
 			crc = bytebits_to_byte(dest+idx+54,8);
@@ -1058,7 +1037,6 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 			// if we're only looking for one tag
 			if (findone){
 				if (ledcontrol)	LED_A_OFF();
-				//LED_A_OFF();
 				*high=code;
 				*low=code2;
 				return;
@@ -1075,70 +1053,21 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 }
 
 /*------------------------------
- * T5555/T5557/T5567 routines
+ * T5555/T5557/T5567/T5577 routines
  *------------------------------
- */
-
-/* T55x7 configuration register definitions */
-#define T55x7_POR_DELAY				0x00000001
-#define T55x7_ST_TERMINATOR			0x00000008
-#define T55x7_PWD					0x00000010
-#define T55x7_MAXBLOCK_SHIFT		5
-#define T55x7_AOR					0x00000200
-#define T55x7_PSKCF_RF_2			0
-#define T55x7_PSKCF_RF_4			0x00000400
-#define T55x7_PSKCF_RF_8			0x00000800
-#define T55x7_MODULATION_DIRECT		0
-#define T55x7_MODULATION_PSK1		0x00001000
-#define T55x7_MODULATION_PSK2		0x00002000
-#define T55x7_MODULATION_PSK3		0x00003000
-#define T55x7_MODULATION_FSK1		0x00004000
-#define T55x7_MODULATION_FSK2		0x00005000
-#define T55x7_MODULATION_FSK1a		0x00006000
-#define T55x7_MODULATION_FSK2a		0x00007000
-#define T55x7_MODULATION_MANCHESTER	0x00008000
-#define T55x7_MODULATION_BIPHASE	0x00010000
-//#define T55x7_MODULATION_BIPHASE57	0x00011000
-#define T55x7_BITRATE_RF_8			0
-#define T55x7_BITRATE_RF_16			0x00040000
-#define T55x7_BITRATE_RF_32			0x00080000
-#define T55x7_BITRATE_RF_40			0x000C0000
-#define T55x7_BITRATE_RF_50			0x00100000
-#define T55x7_BITRATE_RF_64			0x00140000
-#define T55x7_BITRATE_RF_100		0x00180000
-#define T55x7_BITRATE_RF_128		0x001C0000
-
-/* T5555 (Q5) configuration register definitions */
-#define T5555_ST_TERMINATOR			0x00000001
-#define T5555_MAXBLOCK_SHIFT		0x00000001
-#define T5555_MODULATION_MANCHESTER	0
-#define T5555_MODULATION_PSK1		0x00000010
-#define T5555_MODULATION_PSK2		0x00000020
-#define T5555_MODULATION_PSK3		0x00000030
-#define T5555_MODULATION_FSK1		0x00000040
-#define T5555_MODULATION_FSK2		0x00000050
-#define T5555_MODULATION_BIPHASE	0x00000060
-#define T5555_MODULATION_DIRECT		0x00000070
-#define T5555_INVERT_OUTPUT			0x00000080
-#define T5555_PSK_RF_2				0
-#define T5555_PSK_RF_4				0x00000100
-#define T5555_PSK_RF_8				0x00000200
-#define T5555_USE_PWD				0x00000400
-#define T5555_USE_AOR				0x00000800
-#define T5555_BITRATE_SHIFT			12
-#define T5555_FAST_WRITE			0x00004000
-#define T5555_PAGE_SELECT			0x00008000
-
-/*
- * Relevant times in microsecond
+ * NOTE: T55x7/T5555 configuration register definitions moved to protocols.h 
+ *
+ * Relevant communication times in microsecond
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
+ * Q5 tags seems to have issues when these values changes. 
  */
 
-#define START_GAP 50*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
+#define START_GAP 31*8 // was 250 // SPEC:  1*8 to 50*8 - typ 15*8 (or 15fc)
 #define WRITE_GAP 20*8 // was 160 // SPEC:  1*8 to 20*8 - typ 10*8 (or 10fc)
 #define WRITE_0   18*8 // was 144 // SPEC: 16*8 to 32*8 - typ 24*8 (or 24fc)
 #define WRITE_1   50*8 // was 400 // SPEC: 48*8 to 64*8 - typ 56*8 (or 56fc)  432 for T55x7; 448 for E5550
+#define READ_GAP  15*8 
 
 //  VALUES TAKEN FROM EM4x function: SendForward
 //  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
@@ -1152,331 +1081,297 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
 // TIMER_CLOCK1 = MCK/2, MCK is running at 48 MHz, Timer is running at 48/2 = 24 MHz
 // Hitag units (T0) have duration of 8 microseconds (us), which is 1/125000 per second (carrier)
 // T0 = TIMER_CLOCK1 / 125000 = 192
-// 1 Cycle = 8 microseconds(us)
+// 1 Cycle = 8 microseconds(us)  == 1 field clock
 
-#define T55xx_SAMPLES_SIZE      12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)
+void TurnReadLFOn(int delay) {
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+	// Give it a bit of time for the resonant antenna to settle.
+
+	// measure antenna strength.
+	//int adcval = ((MAX_ADC_LF_VOLTAGE * AvgAdc(ADC_CHAN_LF)) >> 10);
+	// where to save it
+	
+	SpinDelayUs(delay);
+}
 
 // Write one bit to card
-void T55xxWriteBit(int bit)
-{
-	//FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+void T55xxWriteBit(int bit) {
 	if (!bit)
-		SpinDelayUs(WRITE_0);
+		TurnReadLFOn(WRITE_0);
 	else
-		SpinDelayUs(WRITE_1);
+		TurnReadLFOn(WRITE_1);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	SpinDelayUs(WRITE_GAP);
 }
 
+// Send T5577 reset command then read stream (see if we can identify the start of the stream)
+void T55xxResetRead(void) {
+	LED_A_ON();
+	//clear buffer now so it does not interfere with timing later
+	BigBuf_Clear_keep_EM();
+
+	// Set up FPGA, 125kHz
+	LFSetupFPGAForADC(95, true);
+
+	// Trigger T55x7 in mode.
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	SpinDelayUs(START_GAP);
+
+	// reset tag - op code 00
+	T55xxWriteBit(0);
+	T55xxWriteBit(0);
+
+	// Turn field on to read the response
+	TurnReadLFOn(READ_GAP);
+
+	// Acquisition
+	doT55x7Acquisition(BigBuf_max_traceLen());
+
+	// Turn the field off
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
+	cmd_send(CMD_ACK,0,0,0,0,0);    
+	LED_A_OFF();
+}
+
 // Write one card block in page 0, no lock
-void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
+void T55xxWriteBlockExt(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
+	LED_A_ON();
+	bool PwdMode = arg & 0x1;
+	uint8_t Page = (arg & 0x2)>>1;
 	uint32_t i = 0;
 
 	// Set up FPGA, 125kHz
-	// Wait for config.. (192+8190xPOW)x8 == 67ms
-	LFSetupFPGAForADC(0, true);
+	LFSetupFPGAForADC(95, true);
 	
-	// Now start writting
+	// Trigger T55x7 in mode.
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	SpinDelayUs(START_GAP);
 
-	// Opcode
+	// Opcode 10
 	T55xxWriteBit(1);
-	T55xxWriteBit(0); //Page 0
-	if (PwdMode == 1){
-		// Pwd
+	T55xxWriteBit(Page); //Page 0
+	if (PwdMode){
+		// Send Pwd
 		for (i = 0x80000000; i != 0; i >>= 1)
 			T55xxWriteBit(Pwd & i);
 	}
-	// Lock bit
+	// Send Lock bit
 	T55xxWriteBit(0);
 
-	// Data
+	// Send Data
 	for (i = 0x80000000; i != 0; i >>= 1)
 		T55xxWriteBit(Data & i);
 
-	// Block
+	// Send Block number
 	for (i = 0x04; i != 0; i >>= 1)
 		T55xxWriteBit(Block & i);
 
-	// Now perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
+	// Perform write (nominal is 5.6 ms for T55x7 and 18ms for E5550,
 	// so wait a little more)
-	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-	SpinDelay(20);
+	TurnReadLFOn(20 * 1000);
+		//could attempt to do a read to confirm write took
+		// as the tag should repeat back the new block 
+		// until it is reset, but to confirm it we would 
+		// need to know the current block 0 config mode
+	
+	// turn field off
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	LED_A_OFF();
 }
 
-void TurnReadLFOn(){
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-	// Give it a bit of time for the resonant antenna to settle.
-	SpinDelayUs(300);
+// Write one card block in page 0, no lock
+void T55xxWriteBlock(uint32_t Data, uint8_t Block, uint32_t Pwd, uint8_t arg) {
+	T55xxWriteBlockExt(Data, Block, Pwd, arg);
+	cmd_send(CMD_ACK,0,0,0,0,0);
 }
 
-
-// Read one card block in page 0
-void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
-{
+// Read one card block in page [page]
+void T55xxReadBlock(uint16_t arg0, uint8_t Block, uint32_t Pwd) {
+	LED_A_ON();
+	bool PwdMode = arg0 & 0x1;
+	uint8_t Page = (arg0 & 0x2) >> 1;
 	uint32_t i = 0;
-	uint8_t *dest = BigBuf_get_addr();
-	uint16_t bufferlength = BigBuf_max_traceLen();
-	if ( bufferlength > T55xx_SAMPLES_SIZE )
-		bufferlength = T55xx_SAMPLES_SIZE;
-
-	// Clear destination buffer before sending the command
-	memset(dest, 0x80, bufferlength);
-
-	// Set up FPGA, 125kHz
-	// Wait for config.. (192+8190xPOW)x8 == 67ms
-	//LFSetupFPGAForADC(0, true);
-	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-	// Connect the A/D to the peak-detected low-frequency path.
-	SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
+	bool RegReadMode = (Block == 0xFF);
+	
+	//clear buffer now so it does not interfere with timing later
+	BigBuf_Clear_ext(false);
 
-	// Now set up the SSC to get the ADC samples that are now streaming at us.
-	FpgaSetupSsc();
+	//make sure block is at max 7
+	Block &= 0x7;
 
-	// Give it a bit of time for the resonant antenna to settle.
-	//SpinDelayUs(8*200);  //192FC
-	SpinDelay(50);
+	// Set up FPGA, 125kHz to power up the tag
+	LFSetupFPGAForADC(95, true);
 	
+	// Trigger T55x7 Direct Access Mode with start gap
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	SpinDelayUs(START_GAP);
-
-	// Opcode
+	
+	// Opcode 1[page]
 	T55xxWriteBit(1);
-	T55xxWriteBit(0); //Page 0
-	if (PwdMode == 1){
-		// Pwd
+	T55xxWriteBit(Page); //Page 0
+
+	if (PwdMode){
+		// Send Pwd
 		for (i = 0x80000000; i != 0; i >>= 1)
 			T55xxWriteBit(Pwd & i);
 	}
-	// Lock bit
+	// Send a zero bit separation
 	T55xxWriteBit(0);
-	// Block
+	
+	// Send Block number (if direct access mode)
+	if (!RegReadMode)
 	for (i = 0x04; i != 0; i >>= 1)
 		T55xxWriteBit(Block & i);
 
 	// Turn field on to read the response
-	TurnReadLFOn();
-	// Now do the acquisition
-	i = 0;
-	for(;;) {
-		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-			AT91C_BASE_SSC->SSC_THR = 0x43;
-			LED_D_ON();
-		}
-		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-			dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-			i++;
-			LED_D_OFF();
-			if (i >= bufferlength) break;
-		}
-	}
-
-	cmd_send(CMD_ACK,0,0,0,0,0);    
+	TurnReadLFOn(READ_GAP);
+	
+	// Acquisition
+	doT55x7Acquisition(12000);
+	
+	// Turn the field off
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-	LED_D_OFF();
+	cmd_send(CMD_ACK,0,0,0,0,0);    
+	LED_A_OFF();
 }
 
-// Read card traceability data (page 1)
-void T55xxReadTrace(void){
-	
+void T55xxWakeUp(uint32_t Pwd){
+	LED_B_ON();
 	uint32_t i = 0;
-	uint8_t *dest = BigBuf_get_addr();
-	uint16_t bufferlength = BigBuf_max_traceLen();
-	if ( bufferlength > T55xx_SAMPLES_SIZE )
-		bufferlength= T55xx_SAMPLES_SIZE;
-
-	// Clear destination buffer before sending the command
-	memset(dest, 0x80, bufferlength);
-
-	LFSetupFPGAForADC(0, true);
+	
+	// Set up FPGA, 125kHz
+	LFSetupFPGAForADC(95, true);
+	
+	// Trigger T55x7 Direct Access Mode
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 	SpinDelayUs(START_GAP);
-
-	// Opcode
+	
+	// Opcode 10
 	T55xxWriteBit(1);
-	T55xxWriteBit(1); //Page 1
-
-	// Turn field on to read the response
-	TurnReadLFOn();
-
-	// Now do the acquisition
-	for(;;) {
-		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-			AT91C_BASE_SSC->SSC_THR = 0x43;
-			LED_D_ON();
-		}
-		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-			dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-			i++;
-			LED_D_OFF();
+	T55xxWriteBit(0); //Page 0
 
-			if (i >= bufferlength) break;
-		}
-	}
+	// Send Pwd
+	for (i = 0x80000000; i != 0; i >>= 1)
+		T55xxWriteBit(Pwd & i);
 
-	cmd_send(CMD_ACK,0,0,0,0,0);
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
-	LED_D_OFF();
+	// Turn and leave field on to let the begin repeating transmission
+	TurnReadLFOn(20*1000);
 }
 
 /*-------------- Cloning routines -----------*/
+void WriteT55xx(uint32_t *blockdata, uint8_t startblock, uint8_t numblocks) {
+	// write last block first and config block last (if included)
+	for (uint8_t i = numblocks+startblock; i > startblock; i--)
+		T55xxWriteBlockExt(blockdata[i-1], i-1, 0, 0);
+}
+
 // Copy HID id to card and setup block 0 config
-void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT)
-{
-	int data1=0, data2=0, data3=0, data4=0, data5=0, data6=0; //up to six blocks for long format
-	int last_block = 0;
+void CopyHIDtoT55x7(uint32_t hi2, uint32_t hi, uint32_t lo, uint8_t longFMT) {
+	uint32_t data[] = {0,0,0,0,0,0,0};
+	uint8_t last_block = 0;
 
 	if (longFMT){
 		// Ensure no more than 84 bits supplied
-		if (hi2>0xFFFFF) {
+		if (hi2 > 0xFFFFF) {
 			DbpString("Tags can only have 84 bits.");
 			return;
 		}
 		// Build the 6 data blocks for supplied 84bit ID
 		last_block = 6;
-		data1 = 0x1D96A900; // load preamble (1D) & long format identifier (9E manchester encoded)
-		for (int i=0;i<4;i++) {
-			if (hi2 & (1<<(19-i)))
-				data1 |= (1<<(((3-i)*2)+1)); // 1 -> 10
-			else
-				data1 |= (1<<((3-i)*2)); // 0 -> 01
-		}
-
-		data2 = 0;
-		for (int i=0;i<16;i++) {
-			if (hi2 & (1<<(15-i)))
-				data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data2 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-
-		data3 = 0;
-		for (int i=0;i<16;i++) {
-			if (hi & (1<<(31-i)))
-				data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data3 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-
-		data4 = 0;
-		for (int i=0;i<16;i++) {
-			if (hi & (1<<(15-i)))
-				data4 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data4 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-
-		data5 = 0;
-		for (int i=0;i<16;i++) {
-			if (lo & (1<<(31-i)))
-				data5 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data5 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-
-		data6 = 0;
-		for (int i=0;i<16;i++) {
-			if (lo & (1<<(15-i)))
-				data6 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data6 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-	}
-	else {
+		// load preamble (1D) & long format identifier (9E manchester encoded)
+		data[1] = 0x1D96A900 | (manchesterEncode2Bytes((hi2 >> 16) & 0xF) & 0xFF);
+		// load raw id from hi2, hi, lo to data blocks (manchester encoded)
+		data[2] = manchesterEncode2Bytes(hi2 & 0xFFFF);
+		data[3] = manchesterEncode2Bytes(hi >> 16);
+		data[4] = manchesterEncode2Bytes(hi & 0xFFFF);
+		data[5] = manchesterEncode2Bytes(lo >> 16);
+		data[6] = manchesterEncode2Bytes(lo & 0xFFFF);
+	}	else {
 		// Ensure no more than 44 bits supplied
-		if (hi>0xFFF) {
+		if (hi > 0xFFF) {
 			DbpString("Tags can only have 44 bits.");
 			return;
 		}
-
 		// Build the 3 data blocks for supplied 44bit ID
 		last_block = 3;
-
-		data1 = 0x1D000000; // load preamble
-
-		for (int i=0;i<12;i++) {
-			if (hi & (1<<(11-i)))
-				data1 |= (1<<(((11-i)*2)+1)); // 1 -> 10
-			else
-				data1 |= (1<<((11-i)*2)); // 0 -> 01
-		}
-
-		data2 = 0;
-		for (int i=0;i<16;i++) {
-			if (lo & (1<<(31-i)))
-				data2 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data2 |= (1<<((15-i)*2)); // 0 -> 01
-		}
-
-		data3 = 0;
-		for (int i=0;i<16;i++) {
-			if (lo & (1<<(15-i)))
-				data3 |= (1<<(((15-i)*2)+1)); // 1 -> 10
-			else
-				data3 |= (1<<((15-i)*2)); // 0 -> 01
-		}
+		// load preamble
+		data[1] = 0x1D000000 | (manchesterEncode2Bytes(hi) & 0xFFFFFF);
+		data[2] = manchesterEncode2Bytes(lo >> 16);
+		data[3] = manchesterEncode2Bytes(lo & 0xFFFF);
 	}
+	// load chip config block
+	data[0] = T55x7_BITRATE_RF_50 | T55x7_MODULATION_FSK2a | last_block << T55x7_MAXBLOCK_SHIFT;
+
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((50-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | last_block << T5555_MAXBLOCK_SHIFT;
 
 	LED_D_ON();
 	// Program the data blocks for supplied ID
 	// and the block 0 for HID format
-	T55xxWriteBlock(data1,1,0,0);
-	T55xxWriteBlock(data2,2,0,0);
-	T55xxWriteBlock(data3,3,0,0);
-
-	if (longFMT) { // if long format there are 6 blocks
-		T55xxWriteBlock(data4,4,0,0);
-		T55xxWriteBlock(data5,5,0,0);
-		T55xxWriteBlock(data6,6,0,0);
-	}
-
-	// Config for HID (RF/50, FSK2a, Maxblock=3 for short/6 for long)
-	T55xxWriteBlock(T55x7_BITRATE_RF_50    |
-					T55x7_MODULATION_FSK2a |
-					last_block << T55x7_MAXBLOCK_SHIFT,
-					0,0,0);
+	WriteT55xx(data, 0, last_block+1);
 
 	LED_D_OFF();
 
 	DbpString("DONE!");
 }
 
-void CopyIOtoT55x7(uint32_t hi, uint32_t lo, uint8_t longFMT)
-{
-	int data1=0, data2=0; //up to six blocks for long format
-
-	data1 = hi;  // load preamble
-	data2 = lo;
+void CopyIOtoT55x7(uint32_t hi, uint32_t lo) {
+	uint32_t data[] = {T55x7_BITRATE_RF_64 | T55x7_MODULATION_FSK2a | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((64-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_FSK2 | T5555_INVERT_OUTPUT | 2 << T5555_MAXBLOCK_SHIFT;
 
 	LED_D_ON();
 	// Program the data blocks for supplied ID
-	// and the block 0 for HID format
-	T55xxWriteBlock(data1,1,0,0);
-	T55xxWriteBlock(data2,2,0,0);
+	// and the block 0 config
+	WriteT55xx(data, 0, 3);
 
-	//Config Block
-	T55xxWriteBlock(0x00147040,0,0,0);
 	LED_D_OFF();
 
 	DbpString("DONE!");
 }
 
+// Clone Indala 64-bit tag by UID to T55x7
+void CopyIndala64toT55x7(uint32_t hi, uint32_t lo) {
+	//Program the 2 data blocks for supplied 64bit UID
+	// and the Config for Indala 64 format (RF/32;PSK1 with RF/2;Maxblock=2)
+	uint32_t data[] = { T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (2 << T55x7_MAXBLOCK_SHIFT), hi, lo};
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 2 << T5555_MAXBLOCK_SHIFT;
+
+	WriteT55xx(data, 0, 3);
+	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
+	//	T5567WriteBlock(0x603E1042,0);
+	DbpString("DONE!");
+}
+// Clone Indala 224-bit tag by UID to T55x7
+void CopyIndala224toT55x7(uint32_t uid1, uint32_t uid2, uint32_t uid3, uint32_t uid4, uint32_t uid5, uint32_t uid6, uint32_t uid7) {
+	//Program the 7 data blocks for supplied 224bit UID
+	uint32_t data[] = {0, uid1, uid2, uid3, uid4, uid5, uid6, uid7};
+	// and the block 0 for Indala224 format	
+	//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
+	data[0] = T55x7_BITRATE_RF_32 | T55x7_MODULATION_PSK1 | (7 << T55x7_MAXBLOCK_SHIFT);
+	//TODO add selection of chip for Q5 or T55x7
+	// data[0] = (((32-2)/2)<<T5555_BITRATE_SHIFT) | T5555_MODULATION_PSK1 | 7 << T5555_MAXBLOCK_SHIFT;
+	WriteT55xx(data, 0, 8);
+	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
+	//	T5567WriteBlock(0x603E10E2,0);
+	DbpString("DONE!");
+}
+// clone viking tag to T55xx
+void CopyVikingtoT55xx(uint32_t block1, uint32_t block2, uint8_t Q5) {
+	uint32_t data[] = {T55x7_BITRATE_RF_32 | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT), block1, block2};
+	if (Q5) data[0] = (32 << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | 2 << T5555_MAXBLOCK_SHIFT;
+	// Program the data blocks for supplied ID and the block 0 config
+	WriteT55xx(data, 0, 3);
+	LED_D_OFF();
+	cmd_send(CMD_ACK,0,0,0,0,0);
+}
+
 // Define 9bit header for EM410x tags
 #define EM410X_HEADER		0x1FF
 #define EM410X_ID_LENGTH	40
 
-void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
-{
+void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo) {
 	int i, id_bit;
 	uint64_t id = EM410X_HEADER;
 	uint64_t rev_id = 0;	// reversed ID
@@ -1536,363 +1431,32 @@ void WriteEM410x(uint32_t card, uint32_t id_hi, uint32_t id_lo)
 	LED_D_ON();
 
 	// Write EM410x ID
-	T55xxWriteBlock((uint32_t)(id >> 32), 1, 0, 0);
-	T55xxWriteBlock((uint32_t)id, 2, 0, 0);
-
-	// Config for EM410x (RF/64, Manchester, Maxblock=2)
-	if (card) {
-		// Clock rate is stored in bits 8-15 of the card value
-		clock = (card & 0xFF00) >> 8;
-		Dbprintf("Clock rate: %d", clock);
-		switch (clock)
-		{
-		case 32:
-			clock = T55x7_BITRATE_RF_32;
-			break;
-		case 16:
-			clock = T55x7_BITRATE_RF_16;
-			break;
-		case 0:
-			// A value of 0 is assumed to be 64 for backwards-compatibility
-			// Fall through...
-		case 64:
-			clock = T55x7_BITRATE_RF_64;
-			break;
-		default:
+	uint32_t data[] = {0, (uint32_t)(id>>32), id & 0xFFFFFFFF};
+
+	clock = (card & 0xFF00) >> 8;
+	clock = (clock == 0) ? 64 : clock;
+	Dbprintf("Clock rate: %d", clock);
+	if (card & 0xFF) { //t55x7
+		clock = GetT55xxClockBit(clock);
+		if (clock == 0) {
 			Dbprintf("Invalid clock rate: %d", clock);
 			return;
 		}
-
-		// Writing configuration for T55x7 tag
-		T55xxWriteBlock(clock	    |
-						T55x7_MODULATION_MANCHESTER |
-						2 << T55x7_MAXBLOCK_SHIFT,
-						0, 0, 0);
+		data[0] = clock | T55x7_MODULATION_MANCHESTER | (2 << T55x7_MAXBLOCK_SHIFT);
+	} else { //t5555 (Q5)
+		clock = (clock-2)>>1;  //n = (RF-2)/2
+		data[0] = (clock << T5555_BITRATE_SHIFT) | T5555_MODULATION_MANCHESTER | (2 << T5555_MAXBLOCK_SHIFT);
 	}
-	else
-		// Writing configuration for T5555(Q5) tag
-		T55xxWriteBlock(0x1F << T5555_BITRATE_SHIFT |
-						T5555_MODULATION_MANCHESTER |
-						2 << T5555_MAXBLOCK_SHIFT,
-						0, 0, 0);
-
-	LED_D_OFF();
-	Dbprintf("Tag %s written with 0x%08x%08x\n", card ? "T55x7":"T5555",
-			 (uint32_t)(id >> 32), (uint32_t)id);
-}
 
-// Clone Indala 64-bit tag by UID to T55x7
-void CopyIndala64toT55x7(int hi, int lo)
-{
-
-	//Program the 2 data blocks for supplied 64bit UID
-	// and the block 0 for Indala64 format
-	T55xxWriteBlock(hi,1,0,0);
-	T55xxWriteBlock(lo,2,0,0);
-	//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=2)
-	T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-					T55x7_MODULATION_PSK1 |
-					2 << T55x7_MAXBLOCK_SHIFT,
-					0, 0, 0);
-	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=2;Inverse data)
-	//	T5567WriteBlock(0x603E1042,0);
-
-	DbpString("DONE!");
-
-}
-
-void CopyIndala224toT55x7(int uid1, int uid2, int uid3, int uid4, int uid5, int uid6, int uid7)
-{
-
-	//Program the 7 data blocks for supplied 224bit UID
-	// and the block 0 for Indala224 format
-	T55xxWriteBlock(uid1,1,0,0);
-	T55xxWriteBlock(uid2,2,0,0);
-	T55xxWriteBlock(uid3,3,0,0);
-	T55xxWriteBlock(uid4,4,0,0);
-	T55xxWriteBlock(uid5,5,0,0);
-	T55xxWriteBlock(uid6,6,0,0);
-	T55xxWriteBlock(uid7,7,0,0);
-	//Config for Indala (RF/32;PSK1 with RF/2;Maxblock=7)
-	T55xxWriteBlock(T55x7_BITRATE_RF_32    |
-					T55x7_MODULATION_PSK1 |
-					7 << T55x7_MAXBLOCK_SHIFT,
-					0,0,0);
-	//Alternative config for Indala (Extended mode;RF/32;PSK1 with RF/2;Maxblock=7;Inverse data)
-	//	T5567WriteBlock(0x603E10E2,0);
-
-	DbpString("DONE!");
-
-}
-
-
-#define abs(x) ( ((x)<0) ? -(x) : (x) )
-#define max(x,y) ( x<y ? y:x)
-
-int DemodPCF7931(uint8_t **outBlocks) {
-
-    uint8_t bits[256] = {0x00};
-	uint8_t blocks[8][16];
-    uint8_t *dest = BigBuf_get_addr();
-    
-	int GraphTraceLen = BigBuf_max_traceLen();
-	if (  GraphTraceLen > 18000 )
-		GraphTraceLen = 18000;
-	
-	
-	int i, j, lastval, bitidx, half_switch;
-	int clock = 64;
-	int tolerance = clock / 8;
-	int pmc, block_done;
-	int lc, warnings = 0;
-	int num_blocks = 0;
-	int lmin=128, lmax=128;
-	uint8_t dir;
-
-	LFSetupFPGAForADC(95, true);
-	DoAcquisition_default(0, true);
-
-	lmin = 64;
-	lmax = 192;
-
-	i = 2;
-
-	/* Find first local max/min */
-    if(dest[1] > dest[0]) {
-		while(i < GraphTraceLen) {
-            if( !(dest[i] > dest[i-1]) && dest[i] > lmax)
-				break;
-			i++;
-		}
-		dir = 0;
-	}
-	else {
-		while(i < GraphTraceLen) {
-            if( !(dest[i] < dest[i-1]) && dest[i] < lmin)
-				break;
-			i++;
-		}
-		dir = 1;
-	}
+	WriteT55xx(data, 0, 3);
 
-	lastval = i++;
-	half_switch = 0;
-	pmc = 0;
-	block_done = 0;
-
-	for (bitidx = 0; i < GraphTraceLen; i++)
-	{
-        if ( (dest[i-1] > dest[i] && dir == 1 && dest[i] > lmax) || (dest[i-1] < dest[i] && dir == 0 && dest[i] < lmin))
-		{
-			lc = i - lastval;
-			lastval = i;
-
-			// Switch depending on lc length:
-			// Tolerance is 1/8 of clock rate (arbitrary)
-			if (abs(lc-clock/4) < tolerance) {
-				// 16T0
-				if((i - pmc) == lc) { /* 16T0 was previous one */
-					/* It's a PMC ! */
-					i += (128+127+16+32+33+16)-1;
-					lastval = i;
-					pmc = 0;
-					block_done = 1;
-				}
-				else {
-					pmc = i;
-				}
-			} else if (abs(lc-clock/2) < tolerance) {
-				// 32TO
-				if((i - pmc) == lc) { /* 16T0 was previous one */
-					/* It's a PMC ! */
-					i += (128+127+16+32+33)-1;
-					lastval = i;
-					pmc = 0;
-					block_done = 1;
-				}
-				else if(half_switch == 1) {
-                    bits[bitidx++] = 0;
-					half_switch = 0;
-				}
-				else
-					half_switch++;
-			} else if (abs(lc-clock) < tolerance) {
-				// 64TO
-                bits[bitidx++] = 1;
-			} else {
-				// Error
-				warnings++;
-				if (warnings > 10)
-				{
-					Dbprintf("Error: too many detection errors, aborting.");
-					return 0;
-				}
-			}
-
-			if(block_done == 1) {
-				if(bitidx == 128) {
-					for(j=0; j<16; j++) {
-                        blocks[num_blocks][j] = 128*bits[j*8+7]+
-                                64*bits[j*8+6]+
-                                32*bits[j*8+5]+
-                                16*bits[j*8+4]+
-                                8*bits[j*8+3]+
-                                4*bits[j*8+2]+
-                                2*bits[j*8+1]+
-                                bits[j*8];
-						
-					}
-					num_blocks++;
-				}
-				bitidx = 0;
-				block_done = 0;
-				half_switch = 0;
-			}
-			if(i < GraphTraceLen)
-                dir =(dest[i-1] > dest[i]) ? 0 : 1;
-		}
-		if(bitidx==255)
-			bitidx=0;
-		warnings = 0;
-		if(num_blocks == 4) break;
-	}
-    memcpy(outBlocks, blocks, 16*num_blocks);
-	return num_blocks;
-}
-
-int IsBlock0PCF7931(uint8_t *Block) {
-	// Assume RFU means 0 :)
-	if((memcmp(Block, "\x00\x00\x00\x00\x00\x00\x00\x01", 8) == 0) && memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) // PAC enabled
-		return 1;
-	if((memcmp(Block+9, "\x00\x00\x00\x00\x00\x00\x00", 7) == 0) && Block[7] == 0) // PAC disabled, can it *really* happen ?
-		return 1;
-	return 0;
-}
-
-int IsBlock1PCF7931(uint8_t *Block) {
-	// Assume RFU means 0 :)
-	if(Block[10] == 0 && Block[11] == 0 && Block[12] == 0 && Block[13] == 0)
-		if((Block[14] & 0x7f) <= 9 && Block[15] <= 9)
-			return 1;
-
-	return 0;
-}
-
-#define ALLOC 16
-
-void ReadPCF7931() {
-	uint8_t Blocks[8][17];
-	uint8_t tmpBlocks[4][16];
-	int i, j, ind, ind2, n;
-	int num_blocks = 0;
-	int max_blocks = 8;
-	int ident = 0;
-	int error = 0;
-	int tries = 0;
-
-	memset(Blocks, 0, 8*17*sizeof(uint8_t));
-
-	do {
-		memset(tmpBlocks, 0, 4*16*sizeof(uint8_t));
-		n = DemodPCF7931((uint8_t**)tmpBlocks);
-		if(!n)
-			error++;
-		if(error==10 && num_blocks == 0) {
-			Dbprintf("Error, no tag or bad tag");
-			return;
-		}
-		else if (tries==20 || error==10) {
-			Dbprintf("Error reading the tag");
-			Dbprintf("Here is the partial content");
-			goto end;
-		}
-
-		for(i=0; i<n; i++)
-			Dbprintf("(dbg) %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-					 tmpBlocks[i][0], tmpBlocks[i][1], tmpBlocks[i][2], tmpBlocks[i][3], tmpBlocks[i][4], tmpBlocks[i][5], tmpBlocks[i][6], tmpBlocks[i][7],
-					tmpBlocks[i][8], tmpBlocks[i][9], tmpBlocks[i][10], tmpBlocks[i][11], tmpBlocks[i][12], tmpBlocks[i][13], tmpBlocks[i][14], tmpBlocks[i][15]);
-		if(!ident) {
-			for(i=0; i<n; i++) {
-				if(IsBlock0PCF7931(tmpBlocks[i])) {
-					// Found block 0 ?
-					if(i < n-1 && IsBlock1PCF7931(tmpBlocks[i+1])) {
-						// Found block 1!
-						// \o/
-						ident = 1;
-						memcpy(Blocks[0], tmpBlocks[i], 16);
-						Blocks[0][ALLOC] = 1;
-						memcpy(Blocks[1], tmpBlocks[i+1], 16);
-						Blocks[1][ALLOC] = 1;
-						max_blocks = max((Blocks[1][14] & 0x7f), Blocks[1][15]) + 1;
-						// Debug print
-						Dbprintf("(dbg) Max blocks: %d", max_blocks);
-						num_blocks = 2;
-						// Handle following blocks
-						for(j=i+2, ind2=2; j!=i; j++, ind2++, num_blocks++) {
-							if(j==n) j=0;
-							if(j==i) break;
-							memcpy(Blocks[ind2], tmpBlocks[j], 16);
-							Blocks[ind2][ALLOC] = 1;
-						}
-						break;
-					}
-				}
-			}
-		}
-		else {
-			for(i=0; i<n; i++) { // Look for identical block in known blocks
-				if(memcmp(tmpBlocks[i], "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00", 16)) { // Block is not full of 00
-					for(j=0; j<max_blocks; j++) {
-						if(Blocks[j][ALLOC] == 1 && !memcmp(tmpBlocks[i], Blocks[j], 16)) {
-							// Found an identical block
-							for(ind=i-1,ind2=j-1; ind >= 0; ind--,ind2--) {
-								if(ind2 < 0)
-									ind2 = max_blocks;
-								if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-									// Dbprintf("Tmp %d -> Block %d", ind, ind2);
-									memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-									Blocks[ind2][ALLOC] = 1;
-									num_blocks++;
-									if(num_blocks == max_blocks) goto end;
-								}
-							}
-							for(ind=i+1,ind2=j+1; ind < n; ind++,ind2++) {
-								if(ind2 > max_blocks)
-									ind2 = 0;
-								if(!Blocks[ind2][ALLOC]) { // Block ind2 not already found
-									// Dbprintf("Tmp %d -> Block %d", ind, ind2);
-									memcpy(Blocks[ind2], tmpBlocks[ind], 16);
-									Blocks[ind2][ALLOC] = 1;
-									num_blocks++;
-									if(num_blocks == max_blocks) goto end;
-								}
-							}
-						}
-					}
-				}
-			}
-		}
-		tries++;
-		if (BUTTON_PRESS()) return;
-	} while (num_blocks != max_blocks);
- end:
-	Dbprintf("-----------------------------------------");
-	Dbprintf("Memory content:");
-	Dbprintf("-----------------------------------------");
-	for(i=0; i<max_blocks; i++) {
-		if(Blocks[i][ALLOC]==1)
-			Dbprintf("%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x",
-					 Blocks[i][0], Blocks[i][1], Blocks[i][2], Blocks[i][3], Blocks[i][4], Blocks[i][5], Blocks[i][6], Blocks[i][7],
-					Blocks[i][8], Blocks[i][9], Blocks[i][10], Blocks[i][11], Blocks[i][12], Blocks[i][13], Blocks[i][14], Blocks[i][15]);
-		else
-			Dbprintf("<missing block %d>", i);
-	}
-	Dbprintf("-----------------------------------------");
-
-	return ;
+	LED_D_OFF();
+	Dbprintf("Tag %s written with 0x%08x%08x\n",
+			card ? "T55x7":"T5555",
+			(uint32_t)(id >> 32),
+			(uint32_t)id);
 }
 
-
 //-----------------------------------
 // EM4469 / EM4305 routines
 //-----------------------------------
@@ -1901,7 +1465,6 @@ void ReadPCF7931() {
 #define FWD_CMD_READ 0x9
 #define FWD_CMD_DISABLE 0x5
 
-
 uint8_t forwardLink_data[64]; //array of forwarded bits
 uint8_t * forward_ptr; //ptr for forward message preparation
 uint8_t fwd_bit_sz; //forwardlink bit counter
@@ -1912,8 +1475,15 @@ uint8_t * fwd_write_ptr; //forwardlink bit pointer
 // see EM4469 spec
 //====================================================================
 //--------------------------------------------------------------------
+//  VALUES TAKEN FROM EM4x function: SendForward
+//  START_GAP = 440;       (55*8) cycles at 125Khz (8us = 1cycle)
+//  WRITE_GAP = 128;       (16*8)
+//  WRITE_1   = 256 32*8;  (32*8) 
+
+//  These timings work for 4469/4269/4305 (with the 55*8 above)
+//  WRITE_0 = 23*8 , 9*8  SpinDelayUs(23*8); 
+
 uint8_t Prepare_Cmd( uint8_t cmd ) {
-	//--------------------------------------------------------------------
 
 	*forward_ptr++ = 0; //start bit
 	*forward_ptr++ = 0; //second pause for 4050 code
@@ -1933,10 +1503,7 @@ uint8_t Prepare_Cmd( uint8_t cmd ) {
 // prepares address bits
 // see EM4469 spec
 //====================================================================
-
-//--------------------------------------------------------------------
 uint8_t Prepare_Addr( uint8_t addr ) {
-	//--------------------------------------------------------------------
 
 	register uint8_t line_parity;
 
@@ -1957,10 +1524,7 @@ uint8_t Prepare_Addr( uint8_t addr ) {
 // prepares data bits intreleaved with parity bits
 // see EM4469 spec
 //====================================================================
-
-//--------------------------------------------------------------------
 uint8_t Prepare_Data( uint16_t data_low, uint16_t data_hi) {
-	//--------------------------------------------------------------------
 
 	register uint8_t line_parity;
 	register uint8_t column_parity;
@@ -2004,21 +1568,14 @@ void SendForward(uint8_t fwd_bit_count) {
 
 	LED_D_ON();
 
-	//Field on
-	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-	// Give it a bit of time for the resonant antenna to settle.
-	// And for the tag to fully power up
-	SpinDelay(150);
-
+	// Set up FPGA, 125kHz
+	LFSetupFPGAForADC(95, true);
+	
 	// force 1st mod pulse (start gap must be longer for 4305)
 	fwd_bit_sz--; //prepare next bit modulation
 	fwd_write_ptr++;
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 	SpinDelayUs(55*8); //55 cycles off (8us each)for 4305
-	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
 	SpinDelayUs(16*8); //16 cycles on (8us each)
 
@@ -2030,7 +1587,6 @@ void SendForward(uint8_t fwd_bit_count) {
 			//These timings work for 4469/4269/4305 (with the 55*8 above)
 			FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 			SpinDelayUs(23*8); //16-4 cycles off (8us each)
-			FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
 			FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);//field on
 			SpinDelayUs(9*8); //16 cycles on (8us each)
 		}
@@ -2049,20 +1605,18 @@ void EM4xLogin(uint32_t Password) {
 
 	//Wait for command to complete
 	SpinDelay(20);
-
 }
 
 void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 
+	uint8_t fwd_bit_count;
 	uint8_t *dest = BigBuf_get_addr();
-	uint16_t bufferlength = BigBuf_max_traceLen();
+	uint16_t bufsize = BigBuf_max_traceLen();
 	uint32_t i = 0;
 
-	// Clear destination buffer before sending the command  0x80 = average.
-	memset(dest, 0x80, bufferlength);
+	// Clear destination buffer before sending the command
+	BigBuf_Clear_ext(false);
 	
-    uint8_t fwd_bit_count;
-
 	//If password mode do login
 	if (PwdMode == 1) EM4xLogin(Pwd);
 
@@ -2086,12 +1640,12 @@ void EM4xReadWord(uint8_t Address, uint32_t Pwd, uint8_t PwdMode) {
 		if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
 			dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
 			++i;
-			if (i >= bufferlength) break;
+			if (i >= bufsize) break;
 		}
 	}
-  
+
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off	
 	cmd_send(CMD_ACK,0,0,0,0,0);
-	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 	LED_D_OFF();
 }
 
@@ -2114,14 +1668,3 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
 	LED_D_OFF();
 }
-void CopyViKingtoT55x7(uint32_t block1,uint32_t block2)
-{
-    LED_D_ON();
-    T55xxWriteBlock(block1,1,0,0);
-    T55xxWriteBlock(block2,2,0,0);
-
-    T55xxWriteBlock(T55x7_MODULATION_MANCHESTER | T55x7_BITRATE_RF_32 | 2 << T5555_MAXBLOCK_SHIFT,0,0,1);
-    LED_D_OFF();
-    DbpString("DONE!");
-}
-