X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/42c235e7efdac01da7e7ef3e4e442557fe50198d..bdf387c7ef7d9c2c30c06a1c26583e1326504a94:/armsrc/lfops.c?ds=inline diff --git a/armsrc/lfops.c b/armsrc/lfops.c index 71d9ba95..0dc5bcf9 100644 --- a/armsrc/lfops.c +++ b/armsrc/lfops.c @@ -78,6 +78,8 @@ void ModThenAcquireRawAdcSamples125k(uint32_t delay_off, uint32_t periods, uint3 // now do the read DoAcquisition_config(false); + + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); } /* blank r/w tag data stream @@ -1737,3 +1739,54 @@ void EM4xWriteWord(uint32_t Data, uint8_t Address, uint32_t Pwd, uint8_t PwdMode FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off LED_D_OFF(); } + +void Cotag() { + +//#define WAIT2200 { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2035); } +#define WAIT2200 { FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); WaitUS(2200); } + LED_A_ON(); + + //clear buffer now so it does not interfere with timing later + BigBuf_Clear_ext(false); + + // Set up FPGA, 132kHz to power up the tag + FpgaDownloadAndGo(FPGA_BITSTREAM_LF); + FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 89); + FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD); + + // Connect the A/D to the peak-detected low-frequency path. + SetAdcMuxFor(GPIO_MUXSEL_LOPKD); + + // Now set up the SSC to get the ADC samples that are now streaming at us. + FpgaSetupSsc(); + + // start a 1.5ticks is 1us + StartTicks(); + + //send start pulse + TurnReadLFOn(800); WAIT2200 + TurnReadLFOn(3600); WAIT2200 + TurnReadLFOn(800); WAIT2200 + TurnReadLFOn(3600); + +/* + TurnReadLFOn(740); WAIT2200 + TurnReadLFOn(3330); WAIT2200 + TurnReadLFOn(740); WAIT2200 + TurnReadLFOn(3330); + + +burst 800 us, gap 2.2 msecs +burst 3.6 msecs gap 2.2 msecs +burst 800 us gap 2.2 msecs +pulse 3.6 msecs +*/ + + // Acquisition + DoAcquisition_default(-1, true); + + // Turn the field off + FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off + cmd_send(CMD_ACK,0,0,0,0,0); + LED_A_OFF(); +}