X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/4c18913dd890bdcb947d832c0b0923b565ad1dd3..327a690813ff04d580a2630977f160b8ec809bd9:/armsrc/lfops.c?ds=sidebyside

diff --git a/armsrc/lfops.c b/armsrc/lfops.c
index b703c3cd..3042b80a 100644
--- a/armsrc/lfops.c
+++ b/armsrc/lfops.c
@@ -15,130 +15,45 @@
 #include "crc16.h"
 #include "string.h"
 #include "lfdemod.h"
+#include "lfsampling.h"
+#include "usb_cdc.h"
 
 
 /**
-* Does the sample acquisition. If threshold is specified, the actual sampling
-* is not commenced until the threshold has been reached.
-* @param trigger_threshold - the threshold
-* @param silent - is true, now outputs are made. If false, dbprints the status
-*/
-void DoAcquisition125k_internal(int trigger_threshold,bool silent)
-{
-    uint8_t *dest = BigBuf_get_addr();
-    int n = BigBuf_max_traceLen();
-    int i;
-
-    memset(dest, 0, n);
-    i = 0;
-    for(;;) {
-        if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
-            AT91C_BASE_SSC->SSC_THR = 0x43;
-            LED_D_ON();
-        }
-        if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
-            dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-            LED_D_OFF();
-            if (trigger_threshold != -1 && dest[i] < trigger_threshold)
-                continue;
-            else
-                trigger_threshold = -1;
-            if (++i >= n) break;
-        }
-    }
-    if(!silent)
-    {
-        Dbprintf("buffer samples: %02x %02x %02x %02x %02x %02x %02x %02x ...",
-                 dest[0], dest[1], dest[2], dest[3], dest[4], dest[5], dest[6], dest[7]);
-
-    }
-}
-/**
-* Perform sample aquisition.
-*/
-void DoAcquisition125k(int trigger_threshold)
-{
-    DoAcquisition125k_internal(trigger_threshold, false);
-}
-
-/**
-* Setup the FPGA to listen for samples. This method downloads the FPGA bitstream
-* if not already loaded, sets divisor and starts up the antenna.
-* @param divisor : 1, 88> 255 or negative ==> 134.8 KHz
-* 				   0 or 95 ==> 125 KHz
-*
-**/
-void LFSetupFPGAForADC(int divisor, bool lf_field)
-{
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    if ( (divisor == 1) || (divisor < 0) || (divisor > 255) )
-        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 88); //134.8Khz
-    else if (divisor == 0)
-        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    else
-        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor);
-
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | (lf_field ? FPGA_LF_ADC_READER_FIELD : 0));
-
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Give it a bit of time for the resonant antenna to settle.
-    SpinDelay(50);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-}
-/**
-* Initializes the FPGA, and acquires the samples.
-**/
-void AcquireRawAdcSamples125k(int divisor)
-{
-    LFSetupFPGAForADC(divisor, true);
-    // Now call the acquisition routine
-    DoAcquisition125k_internal(-1,false);
-}
-/**
-* Initializes the FPGA for snoop-mode, and acquires the samples.
-**/
-
-void SnoopLFRawAdcSamples(int divisor, int trigger_threshold)
-{
-    LFSetupFPGAForADC(divisor, false);
-    DoAcquisition125k(trigger_threshold);
-}
-
+ * Function to do a modulation and then get samples.
+ * @param delay_off
+ * @param period_0
+ * @param period_1
+ * @param command
+ */
 void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1, uint8_t *command)
 {
 
-    /* Make sure the tag is reset */
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
-    SpinDelay(2500);
-
-
     int divisor_used = 95; // 125 KHz
     // see if 'h' was specified
 
     if (command[strlen((char *) command) - 1] == 'h')
         divisor_used = 88; // 134.8 KHz
 
+	sample_config sc = { 0,0,1, divisor_used, 0};
+	setSamplingConfig(&sc);
 
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-    // Give it a bit of time for the resonant antenna to settle.
-    SpinDelay(50);
+	/* Make sure the tag is reset */
+	FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
+	FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
+	SpinDelay(2500);
 
-    // And a little more time for the tag to fully power up
-    SpinDelay(2000);
+	LFSetupFPGAForADC(sc.divisor, 1);
 
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
+	// And a little more time for the tag to fully power up
+	SpinDelay(2000);
 
     // now modulate the reader field
     while(*command != '\0' && *command != ' ') {
         FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
         LED_D_OFF();
         SpinDelayUs(delay_off);
-        FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+		FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
 
         FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
         LED_D_ON();
@@ -150,14 +65,16 @@ void ModThenAcquireRawAdcSamples125k(int delay_off, int period_0, int period_1,
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     LED_D_OFF();
     SpinDelayUs(delay_off);
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, divisor_used);
+	FpgaSendCommand(FPGA_CMD_SET_DIVISOR, sc.divisor);
 
     FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
 
     // now do the read
-    DoAcquisition125k(-1);
+	DoAcquisition_config(false);
 }
 
+
+
 /* blank r/w tag data stream
 ...0000000000000000 01111111
 1010101010101010101010101010101010101010101010101010101010101010
@@ -478,19 +395,19 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
     AT91C_BASE_PIOA->PIO_OER = GPIO_SSC_DOUT;
     AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_CLK;
 
-#define SHORT_COIL()	LOW(GPIO_SSC_DOUT)
-#define OPEN_COIL()		HIGH(GPIO_SSC_DOUT)
+ #define SHORT_COIL()	LOW(GPIO_SSC_DOUT)
+ #define OPEN_COIL()		HIGH(GPIO_SSC_DOUT)
 
     i = 0;
     for(;;) {
+        //wait until SSC_CLK goes HIGH
         while(!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK)) {
-            if(BUTTON_PRESS()) {
+			if(BUTTON_PRESS() || usb_poll()) {
                 DbpString("Stopped");
                 return;
             }
             WDT_HIT();
         }
-
         if (ledcontrol)
             LED_D_ON();
 
@@ -501,17 +418,18 @@ void SimulateTagLowFrequency(int period, int gap, int ledcontrol)
 
         if (ledcontrol)
             LED_D_OFF();
-
+        //wait until SSC_CLK goes LOW
         while(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_CLK) {
             if(BUTTON_PRESS()) {
                 DbpString("Stopped");
                 return;
             }
             WDT_HIT();
-        }
-
+        }    
+               
         i++;
         if(i == period) {
+      
             i = 0;
             if (gap) {
                 SHORT_COIL();
@@ -526,8 +444,9 @@ void SimulateTagLowFrequencyBidir(int divisor, int t0)
 {
 }
 
-// compose fc/8 fc/10 waveform
-static void fc(int c, int *n) {
+// compose fc/8 fc/10 waveform (FSK2)
+static void fc(int c, int *n)
+{
     uint8_t *dest = BigBuf_get_addr();
     int idx;
 
@@ -535,20 +454,21 @@ static void fc(int c, int *n) {
     if(c==0) {
         dest[((*n)++)]=1;
         dest[((*n)++)]=1;
-        dest[((*n)++)]=0;
-        dest[((*n)++)]=0;
+        dest[((*n)++)]=1;
+        dest[((*n)++)]=1;
         dest[((*n)++)]=0;
         dest[((*n)++)]=0;
         dest[((*n)++)]=0;
         dest[((*n)++)]=0;
     }
-    //	an fc/8  encoded bit is a bit pattern of  11000000  x6 = 48 samples
+  
+    //	an fc/8  encoded bit is a bit pattern of  11110000  x6 = 48 samples
     if(c==8) {
         for (idx=0; idx<6; idx++) {
             dest[((*n)++)]=1;
             dest[((*n)++)]=1;
-            dest[((*n)++)]=0;
-            dest[((*n)++)]=0;
+            dest[((*n)++)]=1;
+            dest[((*n)++)]=1;
             dest[((*n)++)]=0;
             dest[((*n)++)]=0;
             dest[((*n)++)]=0;
@@ -556,14 +476,14 @@ static void fc(int c, int *n) {
         }
     }
 
-    //	an fc/10 encoded bit is a bit pattern of 1110000000 x5 = 50 samples
+    //	an fc/10 encoded bit is a bit pattern of 1111100000 x5 = 50 samples
     if(c==10) {
         for (idx=0; idx<5; idx++) {
             dest[((*n)++)]=1;
             dest[((*n)++)]=1;
             dest[((*n)++)]=1;
-            dest[((*n)++)]=0;
-            dest[((*n)++)]=0;
+            dest[((*n)++)]=1;
+            dest[((*n)++)]=1;
             dest[((*n)++)]=0;
             dest[((*n)++)]=0;
             dest[((*n)++)]=0;
@@ -572,6 +492,36 @@ static void fc(int c, int *n) {
         }
     }
 }
+// compose fc/X fc/Y waveform (FSKx)
+static void fcAll(uint8_t fc, int *n, uint8_t clock, uint16_t *modCnt) 
+{
+    uint8_t *dest = BigBuf_get_addr();
+    uint8_t halfFC = fc/2;
+    uint8_t wavesPerClock = clock/fc;
+    uint8_t mod = clock % fc;    //modifier
+    uint8_t modAdj = fc/mod;     //how often to apply modifier
+    bool modAdjOk = !(fc % mod); //if (fc % mod==0) modAdjOk=TRUE;
+    // loop through clock - step field clock
+    for (uint8_t idx=0; idx < wavesPerClock; idx++){
+        // put 1/2 FC length 1's and 1/2 0's per field clock wave (to create the wave)
+        memset(dest+(*n), 0, fc-halfFC);  //in case of odd number use extra here
+        memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+        *n += fc;
+    }
+    if (mod>0) (*modCnt)++;
+    if ((mod>0) && modAdjOk){  //fsk2 
+        if ((*modCnt % modAdj) == 0){ //if 4th 8 length wave in a rf/50 add extra 8 length wave
+            memset(dest+(*n), 0, fc-halfFC);
+            memset(dest+(*n)+(fc-halfFC), 1, halfFC);
+            *n += fc;
+        }
+    }
+    if (mod>0 && !modAdjOk){  //fsk1
+        memset(dest+(*n), 0, mod-(mod/2));
+        memset(dest+(*n)+(mod-(mod/2)), 1, mod/2);
+        *n += mod;
+    }
+}
 
 // prepare a waveform pattern in the buffer based on the ID given then
 // simulate a HID tag until the button is pressed
@@ -589,7 +539,7 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
     */
 
     if (hi>0xFFF) {
-        DbpString("Tags can only have 44 bits.");
+        DbpString("Tags can only have 44 bits. - USE lf simfsk for larger tags");
         return;
     }
     fc(0,&n);
@@ -629,6 +579,178 @@ void CmdHIDsimTAG(int hi, int lo, int ledcontrol)
         LED_A_OFF();
 }
 
+// prepare a waveform pattern in the buffer based on the ID given then
+// simulate a FSK tag until the button is pressed
+// arg1 contains fcHigh and fcLow, arg2 contains invert and clock
+void CmdFSKsimTAG(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
+{
+    int ledcontrol=1;
+    int n=0, i=0;
+    uint8_t fcHigh = arg1 >> 8;
+    uint8_t fcLow = arg1 & 0xFF;
+    uint16_t modCnt = 0;
+    uint8_t clk = arg2 & 0xFF;
+    uint8_t invert = (arg2 >> 8) & 1;
+
+    for (i=0; i<size; i++){
+        if (BitStream[i] == invert){
+            fcAll(fcLow, &n, clk, &modCnt);
+        } else {
+            fcAll(fcHigh, &n, clk, &modCnt);
+        }
+    }
+    Dbprintf("Simulating with fcHigh: %d, fcLow: %d, clk: %d, invert: %d, n: %d",fcHigh, fcLow, clk, invert, n);
+    /*Dbprintf("DEBUG: First 32:");
+    uint8_t *dest = BigBuf_get_addr();
+    i=0;
+    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    i+=16;
+    Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    */     
+    if (ledcontrol)
+        LED_A_ON();
+
+    SimulateTagLowFrequency(n, 0, ledcontrol);
+
+    if (ledcontrol)
+        LED_A_OFF();
+}
+
+// compose ask waveform for one bit(ASK)
+static void askSimBit(uint8_t c, int *n, uint8_t clock, uint8_t manchester) 
+{
+    uint8_t *dest = BigBuf_get_addr();
+    uint8_t halfClk = clock/2;
+    // c = current bit 1 or 0
+    if (manchester==1){
+        memset(dest+(*n), c, halfClk);
+        memset(dest+(*n) + halfClk, c^1, halfClk);
+    } else {
+        memset(dest+(*n), c, clock);
+    }
+    *n += clock;        
+}
+
+static void biphaseSimBit(uint8_t c, int *n, uint8_t clock, uint8_t *phase)
+{
+    uint8_t *dest = BigBuf_get_addr();
+    uint8_t halfClk = clock/2;
+    if (c){
+        memset(dest+(*n), c ^ 1 ^ *phase, halfClk);
+        memset(dest+(*n) + halfClk, c ^ *phase, halfClk);        
+    } else {
+        memset(dest+(*n), c ^ *phase, clock);
+        *phase ^= 1;
+    }
+
+}
+
+// args clock, ask/man or askraw, invert, transmission separator
+void CmdASKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
+{
+    int ledcontrol = 1;
+    int n=0, i=0;
+    uint8_t clk = (arg1 >> 8) & 0xFF;
+    uint8_t encoding = arg1 & 1;
+    uint8_t separator = arg2 & 1;
+    uint8_t invert = (arg2 >> 8) & 1;
+
+    if (encoding==2){  //biphase
+        uint8_t phase=0;
+        for (i=0; i<size; i++){
+            biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
+        }
+        if (BitStream[0]==BitStream[size-1]){ //run a second set inverted to keep phase in check
+            for (i=0; i<size; i++){
+                biphaseSimBit(BitStream[i]^invert, &n, clk, &phase);
+            }
+        }
+    } else {  // ask/manchester || ask/raw
+        for (i=0; i<size; i++){
+            askSimBit(BitStream[i]^invert, &n, clk, encoding);
+        }
+        if (encoding==0 && BitStream[0]==BitStream[size-1]){ //run a second set inverted (for biphase phase)
+            for (i=0; i<size; i++){
+                askSimBit(BitStream[i]^invert^1, &n, clk, encoding);
+            }    
+        }    
+    }
+    
+    if (separator==1) Dbprintf("sorry but separator option not yet available"); 
+
+    Dbprintf("Simulating with clk: %d, invert: %d, encoding: %d, separator: %d, n: %d",clk, invert, encoding, separator, n);
+    //DEBUG
+    //Dbprintf("First 32:");
+    //uint8_t *dest = BigBuf_get_addr();
+    //i=0;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    //i+=16;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+
+    if (ledcontrol)
+        LED_A_ON();
+    
+    SimulateTagLowFrequency(n, 0, ledcontrol);
+
+    if (ledcontrol)
+        LED_A_OFF();
+}
+
+//carrier can be 2,4 or 8
+static void pskSimBit(uint8_t waveLen, int *n, uint8_t clk, uint8_t *curPhase, bool phaseChg)
+{
+    uint8_t *dest = BigBuf_get_addr();
+    uint8_t halfWave = waveLen/2;
+    //uint8_t idx;
+    int i = 0;
+    if (phaseChg){
+        // write phase change
+        memset(dest+(*n), *curPhase^1, halfWave);
+        memset(dest+(*n) + halfWave, *curPhase, halfWave);
+        *n += waveLen;
+        *curPhase ^= 1;
+        i += waveLen;
+    }
+    //write each normal clock wave for the clock duration
+    for (; i < clk; i+=waveLen){
+        memset(dest+(*n), *curPhase, halfWave);
+        memset(dest+(*n) + halfWave, *curPhase^1, halfWave);
+        *n += waveLen;
+    }
+}
+
+// args clock, carrier, invert,
+void CmdPSKsimTag(uint16_t arg1, uint16_t arg2, size_t size, uint8_t *BitStream)
+{
+    int ledcontrol=1;
+    int n=0, i=0;
+    uint8_t clk = arg1 >> 8;
+    uint8_t carrier = arg1 & 0xFF;
+    uint8_t invert = arg2 & 0xFF;
+    uint8_t curPhase = 0;
+    for (i=0; i<size; i++){
+        if (BitStream[i] == curPhase){
+            pskSimBit(carrier, &n, clk, &curPhase, FALSE);
+        } else {
+            pskSimBit(carrier, &n, clk, &curPhase, TRUE);
+        }            
+    }
+    Dbprintf("Simulating with Carrier: %d, clk: %d, invert: %d, n: %d",carrier, clk, invert, n);
+    //Dbprintf("DEBUG: First 32:");
+    //uint8_t *dest = BigBuf_get_addr();
+    //i=0;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+    //i+=16;
+    //Dbprintf("%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d%d", dest[i],dest[i+1],dest[i+2],dest[i+3],dest[i+4],dest[i+5],dest[i+6],dest[i+7],dest[i+8],dest[i+9],dest[i+10],dest[i+11],dest[i+12],dest[i+13],dest[i+14],dest[i+15]);
+           
+    if (ledcontrol)
+        LED_A_ON();
+    SimulateTagLowFrequency(n, 0, ledcontrol);
+
+    if (ledcontrol)
+        LED_A_OFF();
+}
+
 // loop to get raw HID waveform then FSK demodulate the TAG ID from it
 void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
 {
@@ -645,8 +767,8 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
 
-        DoAcquisition125k_internal(-1,true);
-        // FSK demodulator
+		DoAcquisition_default(-1,true);
+		// FSK demodulator
         size = sizeOfBigBuff;  //variable size will change after demod so re initialize it before use
 		idx = HIDdemodFSK(dest, &size, &hi2, &hi, &lo);
         
@@ -706,6 +828,8 @@ void CmdHIDdemodFSK(int findone, int *high, int *low, int ledcontrol)
             }
             if (findone){
                 if (ledcontrol)	LED_A_OFF();
+                *high = hi;
+                *low = lo;
                 return;
             }
             // reset
@@ -721,8 +845,9 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
 {
     uint8_t *dest = BigBuf_get_addr();
 
-	size_t size=0, idx=0;
-    int clk=0, invert=0, errCnt=0;
+    size_t size=0, idx=0;
+    int clk=0, invert=0, errCnt=0, maxErr=20;
+    uint32_t hi=0;
     uint64_t lo=0;
     // Configure to go in 125Khz listen mode
     LFSetupFPGAForADC(95, true);
@@ -732,33 +857,46 @@ void CmdEM410xdemod(int findone, int *high, int *low, int ledcontrol)
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
 
-        DoAcquisition125k_internal(-1,true);
+        DoAcquisition_default(-1,true);
         size  = BigBuf_max_traceLen();
         //Dbprintf("DEBUG: Buffer got");
-		//askdemod and manchester decode
-		errCnt = askmandemod(dest, &size, &clk, &invert);
+        //askdemod and manchester decode
+        errCnt = askmandemod(dest, &size, &clk, &invert, maxErr);
         //Dbprintf("DEBUG: ASK Got");
         WDT_HIT();
 
         if (errCnt>=0){
-			lo = Em410xDecode(dest, &size, &idx);
+            errCnt = Em410xDecode(dest, &size, &idx, &hi, &lo);
             //Dbprintf("DEBUG: EM GOT");
-            if (lo>0){
-				Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
-				    (uint32_t)(lo>>32),
-				    (uint32_t)lo,
-				    (uint32_t)(lo&0xFFFF),
-				    (uint32_t)((lo>>16LL) & 0xFF),
-				    (uint32_t)(lo & 0xFFFFFF));
+            if (errCnt){
+                if (size>64){
+                    Dbprintf("EM XL TAG ID: %06x%08x%08x - (%05d_%03d_%08d)",
+                        hi,
+                        (uint32_t)(lo>>32),
+                        (uint32_t)lo,
+                        (uint32_t)(lo&0xFFFF),
+                        (uint32_t)((lo>>16LL) & 0xFF),
+                        (uint32_t)(lo & 0xFFFFFF));
+                } else {
+                    Dbprintf("EM TAG ID: %02x%08x - (%05d_%03d_%08d)",
+                        (uint32_t)(lo>>32),
+                        (uint32_t)lo,
+                        (uint32_t)(lo&0xFFFF),
+                        (uint32_t)((lo>>16LL) & 0xFF),
+                        (uint32_t)(lo & 0xFFFFFF));
+                }
             }
             if (findone){
                 if (ledcontrol)	LED_A_OFF();
+                *high=lo>>32;
+                *low=lo & 0xFFFFFFFF;
                 return;
             }
         } else{
             //Dbprintf("DEBUG: No Tag");
         }
         WDT_HIT();
+        hi = 0;
         lo = 0;
         clk=0;
         invert=0;
@@ -783,8 +921,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
     while(!BUTTON_PRESS()) {
         WDT_HIT();
         if (ledcontrol) LED_A_ON();
-        DoAcquisition125k_internal(-1,true);
-        //fskdemod and get start index
+		DoAcquisition_default(-1,true);
+		//fskdemod and get start index
         WDT_HIT();
         idx = IOdemodFSK(dest, BigBuf_max_traceLen());
         if (idx>0){
@@ -819,6 +957,8 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
             if (findone){
                 if (ledcontrol)	LED_A_OFF();
                 //LED_A_OFF();
+                *high=code;
+                *low=code2;
                 return;
             }
             code=code2=0;
@@ -891,10 +1031,12 @@ void CmdIOdemodFSK(int findone, int *high, int *low, int ledcontrol)
  * To compensate antenna falling times shorten the write times
  * and enlarge the gap ones.
  */
-#define START_GAP 250
-#define WRITE_GAP 160
-#define WRITE_0   144 // 192
-#define WRITE_1   400 // 432 for T55x7; 448 for E5550
+#define START_GAP 50*8 // 10 - 50fc 250
+#define WRITE_GAP 20*8 //    - 30fc 160
+#define WRITE_0   24*8 // 16 - 63fc 54fc 144
+#define WRITE_1   54*8 // 48 - 63fc 54fc 432 for T55x7; 448 for E5550 //400
+
+#define T55xx_SAMPLES_SIZE      12000 // 32 x 32 x 10  (32 bit times numofblock (7), times clock skip..)
 
 // Write one bit to card
 void T55xxWriteBit(int bit)
@@ -913,16 +1055,11 @@ void T55xxWriteBit(int bit)
 // Write one card block in page 0, no lock
 void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
-    //unsigned int i;  //enio adjustment 12/10/14
-    uint32_t i;
+    uint32_t i = 0;
 
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    // Set up FPGA, 125kHz
+    // Wait for config.. (192+8190xPOW)x8 == 67ms
+    LFSetupFPGAForADC(0, true);
 
     // Now start writting
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
@@ -955,30 +1092,28 @@ void T55xxWriteBlock(uint32_t Data, uint32_t Block, uint32_t Pwd, uint8_t PwdMod
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
 }
 
+void TurnReadLFOn(){
+    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+    // Give it a bit of time for the resonant antenna to settle.
+    SpinDelayUs(8*150);
+}
+
+
 // Read one card block in page 0
 void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
 {
+    uint32_t i = 0;
     uint8_t *dest = BigBuf_get_addr();
-    //int m=0, i=0; //enio adjustment 12/10/14
-    uint32_t m=0, i=0;
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
-    // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
+    uint16_t bufferlength = BigBuf_max_traceLen();
+    if ( bufferlength > T55xx_SAMPLES_SIZE )
+        bufferlength = T55xx_SAMPLES_SIZE;
 
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    // Clear destination buffer before sending the command
+    memset(dest, 0x80, bufferlength);
 
-    // Now start writting
+    // Set up FPGA, 125kHz
+    // Wait for config.. (192+8190xPOW)x8 == 67ms
+    LFSetupFPGAForADC(0, true);
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
@@ -997,53 +1132,40 @@ void T55xxReadBlock(uint32_t Block, uint32_t Pwd, uint8_t PwdMode)
         T55xxWriteBit(Block & i);
 
     // Turn field on to read the response
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
+    TurnReadLFOn();
     // Now do the acquisition
     i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
+            LED_D_ON();
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
-            // we don't care about actual value, only if it's more or less than a
-            // threshold essentially we capture zero crossings for later analysis
-            //			if(dest[i] < 127) dest[i] = 0; else dest[i] = 1;
             i++;
-            if (i >= m) break;
+            LED_D_OFF();
+            if (i >= bufferlength) break;
         }
     }
 
+    cmd_send(CMD_ACK,0,0,0,0,0);    
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
-    DbpString("DONE!");
 }
 
 // Read card traceability data (page 1)
 void T55xxReadTrace(void){
+    
+    uint32_t i = 0;
     uint8_t *dest = BigBuf_get_addr();
-    int m=0, i=0;
+    uint16_t bufferlength = BigBuf_max_traceLen();
+    if ( bufferlength > T55xx_SAMPLES_SIZE )
+        bufferlength= T55xx_SAMPLES_SIZE;
 
-    FpgaDownloadAndGo(FPGA_BITSTREAM_LF);
-    m = BigBuf_max_traceLen();
     // Clear destination buffer before sending the command
-    memset(dest, 128, m);
-    // Connect the A/D to the peak-detected low-frequency path.
-    SetAdcMuxFor(GPIO_MUXSEL_LOPKD);
-    // Now set up the SSC to get the ADC samples that are now streaming at us.
-    FpgaSetupSsc();
-
-    LED_D_ON();
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
-
-    // Give it a bit of time for the resonant antenna to settle.
-    // And for the tag to fully power up
-    SpinDelay(150);
+    memset(dest, 0x80, bufferlength);
 
-    // Now start writting
+    LFSetupFPGAForADC(0, true);
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF);
     SpinDelayUs(START_GAP);
 
@@ -1052,25 +1174,26 @@ void T55xxReadTrace(void){
     T55xxWriteBit(1); //Page 1
 
     // Turn field on to read the response
-    FpgaSendCommand(FPGA_CMD_SET_DIVISOR, 95); //125Khz
-    FpgaWriteConfWord(FPGA_MAJOR_MODE_LF_ADC | FPGA_LF_ADC_READER_FIELD);
+    TurnReadLFOn();
 
     // Now do the acquisition
-    i = 0;
     for(;;) {
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_TXRDY) {
             AT91C_BASE_SSC->SSC_THR = 0x43;
+            LED_D_ON();
         }
         if (AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY) {
             dest[i] = (uint8_t)AT91C_BASE_SSC->SSC_RHR;
             i++;
-            if (i >= m) break;
+            LED_D_OFF();
+
+            if (i >= bufferlength) break;
         }
     }
 
+    cmd_send(CMD_ACK,0,0,0,0,0);
     FpgaWriteConfWord(FPGA_MAJOR_MODE_OFF); // field off
     LED_D_OFF();
-    DbpString("DONE!");
 }
 
 /*-------------- Cloning routines -----------*/
@@ -1388,7 +1511,9 @@ int DemodPCF7931(uint8_t **outBlocks) {
     int lmin=128, lmax=128;
     uint8_t dir;
 
-    AcquireRawAdcSamples125k(0);
+	LFSetupFPGAForADC(95, true);
+	DoAcquisition_default(0, 0);
+
 
     lmin = 64;
     lmax = 192;
@@ -1615,7 +1740,7 @@ void ReadPCF7931() {
         tries++;
         if (BUTTON_PRESS()) return;
     } while (num_blocks != max_blocks);
-end:
+ end:
     Dbprintf("-----------------------------------------");
     Dbprintf("Memory content:");
     Dbprintf("-----------------------------------------");