X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/715bed50234cb73cd3cb646e41021e93b3cff6b5..517fbd5d9d81f1d62cc9e2a0a45c7297dfe8bb67:/armsrc/legicrf.c?ds=inline

diff --git a/armsrc/legicrf.c b/armsrc/legicrf.c
index a92e7671..f58cb442 100644
--- a/armsrc/legicrf.c
+++ b/armsrc/legicrf.c
@@ -69,7 +69,7 @@ static void setup_timer(void) {
 */
 
 // At TIMER_CLOCK3 (MCK/32)
-// testing calculating in (us) microseconds.
+// testing calculating in ticks. 1.5ticks = 1us 
 #define	RWD_TIME_1 120		// READER_TIME_PAUSE 20us off, 80us on = 100us  80 * 1.5 == 120ticks
 #define RWD_TIME_0 60		// READER_TIME_PAUSE 20us off, 40us on = 60us   40 * 1.5 == 60ticks 
 #define RWD_TIME_PAUSE 30	// 20us == 20 * 1.5 == 30ticks */
@@ -180,7 +180,7 @@ void frame_send_tag(uint16_t response, uint8_t bits) {
 	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
 
 	 /* TAG_FRAME_WAIT -> shift by 2 */
-	legic_prng_forward(2);
+	legic_prng_forward(3);
 	response ^= legic_prng_get_bits(bits);
 
 	/* Wait for the frame start */
@@ -217,7 +217,7 @@ void frame_sendAsReader(uint32_t data, uint8_t bits){
 	COIL_PULSE(0);
 	
 	// log
-	uint8_t cmdbytes[] = {bits, BYTEx(data,0), BYTEx(data,1), BYTEx(data,2) , BYTEx(send,0), BYTEx(send,1)};
+	uint8_t cmdbytes[] = {bits, BYTEx(data,0), BYTEx(data,1), BYTEx(data,2), BYTEx(send,0), BYTEx(send,1), BYTEx(send,2)};
 	LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, TRUE);
 }
 
@@ -297,19 +297,18 @@ static void frame_receiveAsReader(struct legic_frame * const f, uint8_t bits) {
 // Setup pm3 as a Legic Reader
 static uint32_t setup_phase_reader(uint8_t iv) {
 	
-	// Switch on carrier and let the tag charge for 1ms
+	// Switch on carrier and let the tag charge for 5ms
 	HIGH(GPIO_SSC_DOUT);
-	WaitUS(5000);	
+	WaitUS(5000);
 	
 	ResetTicks();
 	
-	// no keystream yet
 	legic_prng_init(0);
 	
 	// send IV handshake
 	frame_sendAsReader(iv, 7);
 
-	// Now both tag and reader has same IV. Prng can start.
+	// tag and reader has same IV.
 	legic_prng_init(iv);
 
 	frame_receiveAsReader(&current_frame, 6);
@@ -333,7 +332,7 @@ static uint32_t setup_phase_reader(uint8_t iv) {
 	return current_frame.data;
 }
 
-static void LegicCommonInit(void) {
+void LegicCommonInit(bool clear_mem) {
 
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_READER_TX);
@@ -347,7 +346,8 @@ static void LegicCommonInit(void) {
 	
 	// reserve a cardmem,  meaning we can use the tracelog function in bigbuff easier.
 	cardmem = BigBuf_get_EM_addr();
-	memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
+	if ( clear_mem )
+		memset(cardmem, 0x00, LEGIC_CARD_MEMSIZE);
 
 	clear_trace();
 	set_tracing(TRUE);
@@ -410,13 +410,6 @@ bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) {
 	uint8_t	cmd_sz = addr_sz+1+8+4; //crc+data+cmd;
 	uint32_t steps = 0, next_bit_at, start, crc, old_level = 0;
 
-/*	
-	crc_clear(&legic_crc);
-	crc_update(&legic_crc, 0, 1); // CMD_WRITE 
-	crc_update(&legic_crc, index, addr_sz);
-	crc_update(&legic_crc, byte, 8);
-	crc = crc_finish(&legic_crc);
-*/
 	crc = legic4Crc(LEGIC_WRITE, index, byte, addr_sz+1);
 
 	// send write command
@@ -424,12 +417,8 @@ bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) {
 	cmd |= index << 1;			  // index
 	cmd |= byte  << (addr_sz+1);  // Data	
 	cmd	|= (crc & 0xF ) << (addr_sz+1+8); 	// CRC
-
-	/* Bitbang the response */
-	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DOUT;
 	
-	legic_prng_forward(2);
-	WaitTicks(330);
+	WaitTicks(240);
 	
 	frame_sendAsReader(cmd, cmd_sz);
 	
@@ -439,7 +428,7 @@ bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) {
 
 	// ACK,  - one single "1" bit after 3.6ms
 	// 3.6ms = 3600us * 1.5 = 5400ticks.
-	WaitTicks(5300);
+	WaitTicks(5400);
 	
 	next_bit_at = GET_TICKS + TAG_BIT_PERIOD;
 	
@@ -466,11 +455,10 @@ bool legic_write_byte(uint16_t index, uint8_t byte, uint8_t addr_sz) {
 			goto OUT;
         }
     }
-
-	Dbprintf("ice: i == %d",i);
 		
 OUT: ;
-	// log
+	legic_prng_forward(1);
+	
 	uint8_t cmdbytes[] = {1, isOK, BYTEx(steps, 0), BYTEx(steps, 1) };
 	LogTrace(cmdbytes, sizeof(cmdbytes), start, GET_TICKS, NULL, FALSE);
 	return isOK;
@@ -482,14 +470,14 @@ int LegicRfReader(uint16_t offset, uint16_t len, uint8_t iv) {
 	uint8_t isOK = 1;
 	legic_card_select_t card;
 	
-	LegicCommonInit();
+	LegicCommonInit(TRUE);
 	
 	if ( legic_select_card_iv(&card, iv) ) {
 		isOK = 0;
 		goto OUT;
 	}
 
-	if (len + offset >= card.cardsize)
+	if (len + offset > card.cardsize)
 		len = card.cardsize - offset;
 
 	LED_B_ON();
@@ -516,7 +504,7 @@ OUT:
 void LegicRfWriter(uint16_t offset, uint16_t len, uint8_t iv, uint8_t *data) {
 
 	#define LOWERLIMIT 4
-	uint8_t isOK = 1;
+	uint8_t isOK = 1, msg = 0;
 	legic_card_select_t card;
 	
 	// uid NOT is writeable.
@@ -525,30 +513,29 @@ void LegicRfWriter(uint16_t offset, uint16_t len, uint8_t iv, uint8_t *data) {
 		goto OUT;
 	}
 	
-	LegicCommonInit();
+	LegicCommonInit(TRUE);
 	
 	if ( legic_select_card_iv(&card, iv) ) {
 		isOK = 0;
+		msg = 1;
 		goto OUT;
 	}
 	
-	if ( len + offset + LOWERLIMIT >= card.cardsize) {
-		isOK = 0;
-		goto OUT;
-	}
+	if ( len + offset > card.cardsize)
+		len = card.cardsize - offset;
 
     LED_B_ON();	
 	while( len > 0 ) {
 		--len;		
 		if ( !legic_write_byte( len + offset, data[len], card.addrsize) ) {
-			Dbprintf("operation failed | %d | %d | %d", len + offset, len, data[len] );
+			Dbprintf("operation failed | %02X | %02X | %02X", len + offset, len, data[len] );
 			isOK = 0;
 			goto OUT;
 		}
 		WDT_HIT();
 	}
 OUT:
-	cmd_send(CMD_ACK, isOK, 0,0,0,0);
+	cmd_send(CMD_ACK, isOK, msg,0,0,0);
 	switch_off_tag_rwd();
 	LEDsoff();	
 }
@@ -626,7 +613,7 @@ void LegicRfInfo(void){
 	uint8_t buf[sizeof(legic_card_select_t)] = {0x00};
 	legic_card_select_t *card = (legic_card_select_t*) buf;
 	
-	LegicCommonInit();
+	LegicCommonInit(FALSE);
 
 	if ( legic_select_card(card) ) {
 		cmd_send(CMD_ACK,0,0,0,0,0);
@@ -667,31 +654,35 @@ static void frame_handle_tag(struct legic_frame const * const f)
 	// log
 	//uint8_t cmdbytes[] = {bits,	BYTEx(data, 0),	BYTEx(data, 1)};
 	//LogTrace(cmdbytes, sizeof(cmdbytes), starttime, GET_TICKS, NULL, FALSE);
-	
-	cardmem = BigBuf_get_EM_addr();
-
+	//Dbprintf("ICE: enter frame_handle_tag: %02x ", f->bits);
+		
 	/* First Part of Handshake (IV) */
 	if(f->bits == 7) {
 
 		LED_C_ON();
 
 		// Reset prng timer
-		ResetTimer(prng_timer);
+		//ResetTimer(prng_timer);
+		ResetTicks();
 
 		// IV from reader.
 		legic_prng_init(f->data);
 		
+		Dbprintf("ICE: IV: %02x ", f->data);
+		
 		// We should have three tagtypes with three different answers.
-		frame_send_tag(0x3d, 6); /* 0x3d^0x26 = 0x1B */
+		legic_prng_forward(2);
+		//frame_send_tag(0x3d, 6); /* MIM1024 0x3d^0x26 = 0x1B */
+		frame_send_tag(0x1d, 6); // MIM256
 		
 		legic_state = STATE_IV;
 		legic_read_count = 0;
 		legic_prng_bc = 0;
 		legic_prng_iv = f->data;
 
-
-		ResetTimer(timer);
-		WaitUS(280);
+		//ResetTimer(timer);
+		//WaitUS(280);
+		WaitTicks(388);
 		return;
 	}
 
@@ -703,7 +694,7 @@ static void frame_handle_tag(struct legic_frame const * const f)
          legic_state = STATE_CON;
 
 		 ResetTimer(timer);
-		 WaitUS(200);
+		 WaitTicks(300);
          return;
 
 	 } else {
@@ -721,13 +712,14 @@ static void frame_handle_tag(struct legic_frame const * const f)
          uint16_t addr = f->data ^ key; 
 		 addr >>= 1;
          uint8_t data = cardmem[addr];
-         int hash = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
+		 
+         uint32_t crc = legic4Crc(LEGIC_READ, addr, data, 11) << 8;
 
-         legic_read_count++;
-         legic_prng_forward(legic_reqresp_drift);
+         //legic_read_count++;
+         //legic_prng_forward(legic_reqresp_drift);
 
-         frame_send_tag(hash | data, 12);
-		 ResetTimer(timer);
+         frame_send_tag(crc | data, 12);
+		 //ResetTimer(timer);
          legic_prng_forward(2);
 		 WaitTicks(330);
          return;
@@ -735,7 +727,7 @@ static void frame_handle_tag(struct legic_frame const * const f)
    }
 
    /* Write */
-   if(f->bits == 23) {
+   if (f->bits == 23 || f->bits == 21 ) {
       uint32_t key  = get_key_stream(-1, 23); //legic_frame_drift, 23);
       uint16_t addr = f->data ^ key; 
 	  addr >>= 1; 
@@ -749,7 +741,7 @@ static void frame_handle_tag(struct legic_frame const * const f)
       legic_state = STATE_DISCON;
       LED_C_OFF();
       Dbprintf("write - addr: %x, data: %x", addr, data);
-	  // should send a ACK within 3.5ms too
+	  // should send a ACK after 3.6ms 
       return;
    }
 
@@ -758,11 +750,11 @@ static void frame_handle_tag(struct legic_frame const * const f)
       Dbprintf("IV: %03.3x", legic_prng_iv);
    }
 
-   legic_state = STATE_DISCON; 
-   legic_read_count = 0;
-   SpinDelay(10);
-   LED_C_OFF();
-   return; 
+	legic_state = STATE_DISCON; 
+	legic_read_count = 0;
+	WaitMS(10);
+	LED_C_OFF();
+	return; 
 }
 
 /* Read bit by bit untill full frame is received
@@ -799,22 +791,41 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
    * measure the time between two rising edges on DIN, and no encoding on the
    * subcarrier from card to reader, so we'll just shift out our verbatim data
    * on DOUT, 1 bit is 100us. The time from reader to card frame is still unclear,
-   * seems to be 300us-ish.
+   * seems to be 330us.
    */
 		
 	int old_level = 0, active = 0;
+	volatile int32_t level = 0;
+	
 	legic_state = STATE_DISCON;
-
 	legic_phase_drift = phase;
 	legic_frame_drift = frame;
 	legic_reqresp_drift = reqresp;
 
+
+	/* to get the stream of bits from FPGA in sim mode.*/
 	FpgaDownloadAndGo(FPGA_BITSTREAM_HF);
+	// Set up the synchronous serial port
+	//FpgaSetupSsc();
+	// connect Demodulated Signal to ADC:
 	SetAdcMuxFor(GPIO_MUXSEL_HIPKD);
 	FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_MODULATE_212K);
+	//FpgaWriteConfWord(FPGA_MAJOR_MODE_HF_SIMULATOR | FPGA_HF_SIMULATOR_NO_MODULATION);
 
+	#define LEGIC_DMA_BUFFER 256
+	// The DMA buffer, used to stream samples from the FPGA
+	//uint8_t *dmaBuf = BigBuf_malloc(LEGIC_DMA_BUFFER);
+	//uint8_t *data = dmaBuf;
+	// Setup and start DMA.
+	// if ( !FpgaSetupSscDma((uint8_t*) dmaBuf, LEGIC_DMA_BUFFER) ){
+		// if (MF_DBGLEVEL > 1) Dbprintf("FpgaSetupSscDma failed. Exiting"); 
+		// return;
+	// }
+
+	//StartCountSspClk();
 	/* Bitbang the receiver */
-	LINE_IN;
+	AT91C_BASE_PIOA->PIO_ODR = GPIO_SSC_DIN;
+	AT91C_BASE_PIOA->PIO_PER = GPIO_SSC_DIN;
 
 	// need a way to determine which tagtype we are simulating
 	
@@ -830,30 +841,62 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
 
 	LED_B_ON();
 	DbpString("Starting Legic emulator, press button to end");
-   
+	
+	/*
+	 * The mode FPGA_HF_SIMULATOR_MODULATE_212K works like this.
+	 * - A 1-bit input to the FPGA becomes 8 pulses on 212kHz (fc/64) (18.88us).
+	 * - A 0-bit input to the FPGA becomes an unmodulated time of 18.88us
+	 *
+	 * In this mode the SOF can be written as 00011101 = 0x1D
+	 * The EOF can be written as 10111000 = 0xb8
+	 * A logic 1 is 01
+	 * A logic 0 is 10
+	volatile uint8_t b;
+	uint8_t i = 0;
+	while( !BUTTON_PRESS() ) {
+		WDT_HIT();
+
+		// not sending anything.
+        if(AT91C_BASE_SSC->SSC_SR & (AT91C_SSC_TXRDY)) {
+            AT91C_BASE_SSC->SSC_THR = 0x00;
+        }
+
+		// receive
+		if ( AT91C_BASE_SSC->SSC_SR & AT91C_SSC_RXRDY ) {
+			b = (uint8_t) AT91C_BASE_SSC->SSC_RHR;
+			bd[i] = b;
+			++i;
+	//		if(OutOfNDecoding(b & 0x0f))
+	//				*len = Uart.byteCnt;
+			}
+		
+	}
+	 */
+
 	while(!BUTTON_PRESS() && !usb_poll_validate_length()) {
-		volatile uint32_t level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
+		
+		level = !!(AT91C_BASE_PIOA->PIO_PDSR & GPIO_SSC_DIN);
 
 		uint32_t time = GET_TICKS;
 
 		if (level != old_level) {
-			
-			if (level) {
+			if (level == 1) {
 
-				ResetTicks();
-				
+				//Dbprintf("start, %u ", time);
+				StartTicks();
+				// did we get a signal 
 				if (FUZZ_EQUAL(time, RWD_TIME_1, RWD_TIME_FUZZ)) {
-					/* 1 bit */
+					// 1 bit 
 					emit(1);
 					active = 1;
 					LED_A_ON();
 				} else if (FUZZ_EQUAL(time, RWD_TIME_0, RWD_TIME_FUZZ)) {
-					/* 0 bit */
+					// 0 bit 
 					emit(0);
 					active = 1;
 					LED_A_ON();
 				} else if (active) {
-					/* invalid */
+					// invalid 
 					emit(-1);
 					active = 0;
 					LED_A_OFF();
@@ -861,8 +904,9 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
 			}
 		}
 
+	
 		/* Frame end */
-		if(time >= (RWD_TIME_1+RWD_TIME_FUZZ) && active) {
+		if(time >= (RWD_TIME_1 + RWD_TIME_FUZZ) && active) {
 			emit(-1);
 			active = 0;
 			LED_A_OFF();
@@ -873,19 +917,23 @@ void LegicRfSimulate(int phase, int frame, int reqresp)
 		* shutdown in its status register. Reading the SR has the
 		* side-effect of clearing any pending state in there.
 		*/
-		if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
+		//if(time >= (20*RWD_TIME_1) && (timer->TC_SR & AT91C_TC_CLKSTA))
+		if(time >= (20 * RWD_TIME_1) )
 			StopTicks();
 
 		old_level = level;
 		WDT_HIT();
-	}
+}
 
 	WDT_HIT();
+	DbpString("LEGIC Prime emulator stopped");
 	switch_off_tag_rwd();
+	FpgaDisableSscDma();
 	LEDsoff();
 	cmd_send(CMD_ACK, 1, 0, 0, 0, 0);
 }
 
+
 //-----------------------------------------------------------------------------
 // Code up a string of octets at layer 2 (including CRC, we don't generate
 // that here) so that they can be transmitted to the reader. Doesn't transmit