X-Git-Url: http://cvs.zerfleddert.de/cgi-bin/gitweb.cgi/proxmark3-svn/blobdiff_plain/7838f4beba79370f94c7a3de2cf34278f5d481c8..a39944216dd5d765e16917c1092bacc6061b518f:/armsrc/fpgaloader.c diff --git a/armsrc/fpgaloader.c b/armsrc/fpgaloader.c index b4117e82..86f144cf 100644 --- a/armsrc/fpgaloader.c +++ b/armsrc/fpgaloader.c @@ -117,8 +117,7 @@ void SetupSpi(int mode) // Set up the synchronous serial port, with the one set of options that we // always use when we are talking to the FPGA. Both RX and TX are enabled. //----------------------------------------------------------------------------- -void FpgaSetupSsc(void) -{ +void FpgaSetupSsc(void) { // First configure the GPIOs, and get ourselves a clock. AT91C_BASE_PIOA->PIO_ASR = GPIO_SSC_FRAME | @@ -156,19 +155,15 @@ void FpgaSetupSsc(void) // ourselves, not to another buffer). The stuff to manipulate those buffers // is in apps.h, because it should be inlined, for speed. //----------------------------------------------------------------------------- -bool FpgaSetupSscDma(uint8_t *buf, int len) -{ - if (buf == NULL) { - return false; - } - +bool FpgaSetupSscDma(uint8_t *buf, int len) { + if (buf == NULL) return false; + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTDIS; // Disable DMA Transfer AT91C_BASE_PDC_SSC->PDC_RPR = (uint32_t) buf; // transfer to this memory address AT91C_BASE_PDC_SSC->PDC_RCR = len; // transfer this many bytes AT91C_BASE_PDC_SSC->PDC_RNPR = (uint32_t) buf; // next transfer to same memory address AT91C_BASE_PDC_SSC->PDC_RNCR = len; // ... with same number of bytes - AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN; // go! - + AT91C_BASE_PDC_SSC->PDC_PTCR = AT91C_PDC_RXTEN; // go! return true; } @@ -184,15 +179,15 @@ static int get_from_fpga_combined_stream(z_streamp compressed_fpga_stream, uint8 compressed_fpga_stream->avail_out = OUTPUT_BUFFER_LEN; fpga_image_ptr = output_buffer; int res = inflate(compressed_fpga_stream, Z_SYNC_FLUSH); - if (res != Z_OK) { + + if (res != Z_OK) Dbprintf("inflate returned: %d, %s", res, compressed_fpga_stream->msg); - } - if (res < 0) { + + if (res < 0) return res; - } } - uncompressed_bytes_cnt++; + ++uncompressed_bytes_cnt; return *fpga_image_ptr++; } @@ -209,8 +204,7 @@ static int get_from_fpga_stream(int bitstream_version, z_streamp compressed_fpga get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer); } - return get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer); - + return get_from_fpga_combined_stream(compressed_fpga_stream, output_buffer); } @@ -222,7 +216,8 @@ static voidpf fpga_inflate_malloc(voidpf opaque, uInt items, uInt size) static void fpga_inflate_free(voidpf opaque, voidpf address) { - BigBuf_free(); + // free eventually allocated BigBuf memory + BigBuf_free(); BigBuf_Clear_ext(false); } @@ -247,16 +242,14 @@ static bool reset_fpga_stream(int bitstream_version, z_streamp compressed_fpga_s fpga_image_ptr = output_buffer; - for (uint16_t i = 0; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++) { + for (uint16_t i = 0; i < FPGA_BITSTREAM_FIXED_HEADER_SIZE; i++) header[i] = get_from_fpga_stream(bitstream_version, compressed_fpga_stream, output_buffer); - } // Check for a valid .bit file (starts with _bitparse_fixed_header) - if(memcmp(_bitparse_fixed_header, header, FPGA_BITSTREAM_FIXED_HEADER_SIZE) == 0) { + if(memcmp(_bitparse_fixed_header, header, FPGA_BITSTREAM_FIXED_HEADER_SIZE) == 0) return true; - } else { - return false; - } + + return false; } @@ -276,9 +269,6 @@ static void DownloadFPGA_byte(unsigned char w) // Download the fpga image starting at current stream position with length FpgaImageLen bytes static void DownloadFPGA(int bitstream_version, int FpgaImageLen, z_streamp compressed_fpga_stream, uint8_t *output_buffer) { - - Dbprintf("DownloadFPGA(len: %d)", FpgaImageLen); - int i=0; AT91C_BASE_PIOA->PIO_OER = GPIO_FPGA_ON; @@ -416,14 +406,14 @@ static int bitparse_find_section(int bitstream_version, char section_name, unsig void FpgaDownloadAndGo(int bitstream_version) { z_stream compressed_fpga_stream; - uint8_t output_buffer[OUTPUT_BUFFER_LEN]; + uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00}; // check whether or not the bitstream is already loaded if (downloaded_bitstream == bitstream_version) return; // make sure that we have enough memory to decompress - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) { return; @@ -437,7 +427,8 @@ void FpgaDownloadAndGo(int bitstream_version) inflateEnd(&compressed_fpga_stream); - BigBuf_free(); + // free eventually allocated BigBuf memory + BigBuf_free(); BigBuf_Clear_ext(false); } @@ -450,18 +441,17 @@ void FpgaDownloadAndGo(int bitstream_version) void FpgaGatherVersion(int bitstream_version, char *dst, int len) { unsigned int fpga_info_len; - char tempstr[40]; + char tempstr[40] = {0x00}; z_stream compressed_fpga_stream; - uint8_t output_buffer[OUTPUT_BUFFER_LEN]; + uint8_t output_buffer[OUTPUT_BUFFER_LEN] = {0x00}; dst[0] = '\0'; // ensure that we can allocate enough memory for decompression: - BigBuf_free(); + BigBuf_free(); BigBuf_Clear_ext(false); - if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) { + if (!reset_fpga_stream(bitstream_version, &compressed_fpga_stream, output_buffer)) return; - } if(bitparse_find_section(bitstream_version, 'a', &fpga_info_len, &compressed_fpga_stream, output_buffer)) { for (uint16_t i = 0; i < fpga_info_len; i++) {